1 /* 2 * MUSB OTG driver defines 3 * 4 * Copyright 2005 Mentor Graphics Corporation 5 * Copyright (C) 2005-2006 by Texas Instruments 6 * Copyright (C) 2006-2007 Nokia Corporation 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * version 2 as published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, but 13 * WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 20 * 02110-1301 USA 21 * 22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED 23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35 #ifndef __MUSB_CORE_H__ 36 #define __MUSB_CORE_H__ 37 38 #include <linux/slab.h> 39 #include <linux/list.h> 40 #include <linux/interrupt.h> 41 #include <linux/errno.h> 42 #include <linux/timer.h> 43 #include <linux/device.h> 44 #include <linux/usb/ch9.h> 45 #include <linux/usb/gadget.h> 46 #include <linux/usb.h> 47 #include <linux/usb/otg.h> 48 #include <linux/usb/musb.h> 49 #include <linux/phy/phy.h> 50 51 struct musb; 52 struct musb_hw_ep; 53 struct musb_ep; 54 55 /* Helper defines for struct musb->hwvers */ 56 #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f) 57 #define MUSB_HWVERS_MINOR(x) (x & 0x3ff) 58 #define MUSB_HWVERS_RC 0x8000 59 #define MUSB_HWVERS_1300 0x52C 60 #define MUSB_HWVERS_1400 0x590 61 #define MUSB_HWVERS_1800 0x720 62 #define MUSB_HWVERS_1900 0x784 63 #define MUSB_HWVERS_2000 0x800 64 65 #include "musb_debug.h" 66 #include "musb_dma.h" 67 68 #include "musb_io.h" 69 #include "musb_regs.h" 70 71 #include "musb_gadget.h" 72 #include <linux/usb/hcd.h> 73 #include "musb_host.h" 74 75 /* NOTE: otg and peripheral-only state machines start at B_IDLE. 76 * OTG or host-only go to A_IDLE when ID is sensed. 77 */ 78 #define is_peripheral_active(m) (!(m)->is_host) 79 #define is_host_active(m) ((m)->is_host) 80 81 enum { 82 MUSB_PORT_MODE_HOST = 1, 83 MUSB_PORT_MODE_GADGET, 84 MUSB_PORT_MODE_DUAL_ROLE, 85 }; 86 87 /****************************** CONSTANTS ********************************/ 88 89 #ifndef MUSB_C_NUM_EPS 90 #define MUSB_C_NUM_EPS ((u8)16) 91 #endif 92 93 #ifndef MUSB_MAX_END0_PACKET 94 #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE) 95 #endif 96 97 /* host side ep0 states */ 98 enum musb_h_ep0_state { 99 MUSB_EP0_IDLE, 100 MUSB_EP0_START, /* expect ack of setup */ 101 MUSB_EP0_IN, /* expect IN DATA */ 102 MUSB_EP0_OUT, /* expect ack of OUT DATA */ 103 MUSB_EP0_STATUS, /* expect ack of STATUS */ 104 } __attribute__ ((packed)); 105 106 /* peripheral side ep0 states */ 107 enum musb_g_ep0_state { 108 MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */ 109 MUSB_EP0_STAGE_SETUP, /* received SETUP */ 110 MUSB_EP0_STAGE_TX, /* IN data */ 111 MUSB_EP0_STAGE_RX, /* OUT data */ 112 MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */ 113 MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */ 114 MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */ 115 } __attribute__ ((packed)); 116 117 /* 118 * OTG protocol constants. See USB OTG 1.3 spec, 119 * sections 5.5 "Device Timings" and 6.6.5 "Timers". 120 */ 121 #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */ 122 #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */ 123 #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */ 124 #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */ 125 126 127 /*************************** REGISTER ACCESS ********************************/ 128 129 /* Endpoint registers (other than dynfifo setup) can be accessed either 130 * directly with the "flat" model, or after setting up an index register. 131 */ 132 133 #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \ 134 || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \ 135 || defined(CONFIG_ARCH_OMAP4) 136 /* REVISIT indexed access seemed to 137 * misbehave (on DaVinci) for at least peripheral IN ... 138 */ 139 #define MUSB_FLAT_REG 140 #endif 141 142 /* TUSB mapping: "flat" plus ep0 special cases */ 143 #if defined(CONFIG_USB_MUSB_TUSB6010) || \ 144 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 145 #define musb_ep_select(_mbase, _epnum) \ 146 musb_writeb((_mbase), MUSB_INDEX, (_epnum)) 147 #define MUSB_EP_OFFSET MUSB_TUSB_OFFSET 148 149 /* "flat" mapping: each endpoint has its own i/o address */ 150 #elif defined(MUSB_FLAT_REG) 151 #define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum))) 152 #define MUSB_EP_OFFSET MUSB_FLAT_OFFSET 153 154 /* "indexed" mapping: INDEX register controls register bank select */ 155 #else 156 #define musb_ep_select(_mbase, _epnum) \ 157 musb_writeb((_mbase), MUSB_INDEX, (_epnum)) 158 #define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET 159 #endif 160 161 /****************************** FUNCTIONS ********************************/ 162 163 #define MUSB_HST_MODE(_musb)\ 164 { (_musb)->is_host = true; } 165 #define MUSB_DEV_MODE(_musb) \ 166 { (_musb)->is_host = false; } 167 168 #define test_devctl_hst_mode(_x) \ 169 (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM) 170 171 #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral") 172 173 /******************************** TYPES *************************************/ 174 175 /** 176 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer 177 * @init: turns on clocks, sets up platform-specific registers, etc 178 * @exit: undoes @init 179 * @set_mode: forcefully changes operating mode 180 * @try_ilde: tries to idle the IP 181 * @vbus_status: returns vbus status if possible 182 * @set_vbus: forces vbus status 183 * @adjust_channel_params: pre check for standard dma channel_program func 184 */ 185 struct musb_platform_ops { 186 int (*init)(struct musb *musb); 187 int (*exit)(struct musb *musb); 188 189 void (*enable)(struct musb *musb); 190 void (*disable)(struct musb *musb); 191 192 int (*set_mode)(struct musb *musb, u8 mode); 193 void (*try_idle)(struct musb *musb, unsigned long timeout); 194 195 int (*vbus_status)(struct musb *musb); 196 void (*set_vbus)(struct musb *musb, int on); 197 198 int (*adjust_channel_params)(struct dma_channel *channel, 199 u16 packet_sz, u8 *mode, 200 dma_addr_t *dma_addr, u32 *len); 201 }; 202 203 /* 204 * struct musb_hw_ep - endpoint hardware (bidirectional) 205 * 206 * Ordered slightly for better cacheline locality. 207 */ 208 struct musb_hw_ep { 209 struct musb *musb; 210 void __iomem *fifo; 211 void __iomem *regs; 212 213 #if defined(CONFIG_USB_MUSB_TUSB6010) || \ 214 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 215 void __iomem *conf; 216 #endif 217 218 /* index in musb->endpoints[] */ 219 u8 epnum; 220 221 /* hardware configuration, possibly dynamic */ 222 bool is_shared_fifo; 223 bool tx_double_buffered; 224 bool rx_double_buffered; 225 u16 max_packet_sz_tx; 226 u16 max_packet_sz_rx; 227 228 struct dma_channel *tx_channel; 229 struct dma_channel *rx_channel; 230 231 #if defined(CONFIG_USB_MUSB_TUSB6010) || \ 232 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 233 /* TUSB has "asynchronous" and "synchronous" dma modes */ 234 dma_addr_t fifo_async; 235 dma_addr_t fifo_sync; 236 void __iomem *fifo_sync_va; 237 #endif 238 239 void __iomem *target_regs; 240 241 /* currently scheduled peripheral endpoint */ 242 struct musb_qh *in_qh; 243 struct musb_qh *out_qh; 244 245 u8 rx_reinit; 246 u8 tx_reinit; 247 248 /* peripheral side */ 249 struct musb_ep ep_in; /* TX */ 250 struct musb_ep ep_out; /* RX */ 251 }; 252 253 static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep) 254 { 255 return next_request(&hw_ep->ep_in); 256 } 257 258 static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep) 259 { 260 return next_request(&hw_ep->ep_out); 261 } 262 263 struct musb_csr_regs { 264 /* FIFO registers */ 265 u16 txmaxp, txcsr, rxmaxp, rxcsr; 266 u16 rxfifoadd, txfifoadd; 267 u8 txtype, txinterval, rxtype, rxinterval; 268 u8 rxfifosz, txfifosz; 269 u8 txfunaddr, txhubaddr, txhubport; 270 u8 rxfunaddr, rxhubaddr, rxhubport; 271 }; 272 273 struct musb_context_registers { 274 275 u8 power; 276 u8 intrusbe; 277 u16 frame; 278 u8 index, testmode; 279 280 u8 devctl, busctl, misc; 281 u32 otg_interfsel; 282 283 struct musb_csr_regs index_regs[MUSB_C_NUM_EPS]; 284 }; 285 286 /* 287 * struct musb - Driver instance data. 288 */ 289 struct musb { 290 /* device lock */ 291 spinlock_t lock; 292 293 const struct musb_platform_ops *ops; 294 struct musb_context_registers context; 295 296 irqreturn_t (*isr)(int, void *); 297 struct work_struct irq_work; 298 u16 hwvers; 299 300 u16 intrrxe; 301 u16 intrtxe; 302 /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */ 303 #define MUSB_PORT_STAT_RESUME (1 << 31) 304 305 u32 port1_status; 306 307 unsigned long rh_timer; 308 309 enum musb_h_ep0_state ep0_stage; 310 311 /* bulk traffic normally dedicates endpoint hardware, and each 312 * direction has its own ring of host side endpoints. 313 * we try to progress the transfer at the head of each endpoint's 314 * queue until it completes or NAKs too much; then we try the next 315 * endpoint. 316 */ 317 struct musb_hw_ep *bulk_ep; 318 319 struct list_head control; /* of musb_qh */ 320 struct list_head in_bulk; /* of musb_qh */ 321 struct list_head out_bulk; /* of musb_qh */ 322 323 struct timer_list otg_timer; 324 struct notifier_block nb; 325 326 struct dma_controller *dma_controller; 327 328 struct device *controller; 329 void __iomem *ctrl_base; 330 void __iomem *mregs; 331 332 #if defined(CONFIG_USB_MUSB_TUSB6010) || \ 333 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 334 dma_addr_t async; 335 dma_addr_t sync; 336 void __iomem *sync_va; 337 #endif 338 339 /* passed down from chip/board specific irq handlers */ 340 u8 int_usb; 341 u16 int_rx; 342 u16 int_tx; 343 344 struct usb_phy *xceiv; 345 struct phy *phy; 346 347 int nIrq; 348 unsigned irq_wake:1; 349 350 struct musb_hw_ep endpoints[MUSB_C_NUM_EPS]; 351 #define control_ep endpoints 352 353 #define VBUSERR_RETRY_COUNT 3 354 u16 vbuserr_retry; 355 u16 epmask; 356 u8 nr_endpoints; 357 358 int (*board_set_power)(int state); 359 360 u8 min_power; /* vbus for periph, in mA/2 */ 361 362 int port_mode; /* MUSB_PORT_MODE_* */ 363 bool is_host; 364 365 int a_wait_bcon; /* VBUS timeout in msecs */ 366 unsigned long idle_timeout; /* Next timeout in jiffies */ 367 368 /* active means connected and not suspended */ 369 unsigned is_active:1; 370 371 unsigned is_multipoint:1; 372 373 unsigned hb_iso_rx:1; /* high bandwidth iso rx? */ 374 unsigned hb_iso_tx:1; /* high bandwidth iso tx? */ 375 unsigned dyn_fifo:1; /* dynamic FIFO supported? */ 376 377 unsigned bulk_split:1; 378 #define can_bulk_split(musb,type) \ 379 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split) 380 381 unsigned bulk_combine:1; 382 #define can_bulk_combine(musb,type) \ 383 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine) 384 385 /* is_suspended means USB B_PERIPHERAL suspend */ 386 unsigned is_suspended:1; 387 388 /* may_wakeup means remote wakeup is enabled */ 389 unsigned may_wakeup:1; 390 391 /* is_self_powered is reported in device status and the 392 * config descriptor. is_bus_powered means B_PERIPHERAL 393 * draws some VBUS current; both can be true. 394 */ 395 unsigned is_self_powered:1; 396 unsigned is_bus_powered:1; 397 398 unsigned set_address:1; 399 unsigned test_mode:1; 400 unsigned softconnect:1; 401 402 u8 address; 403 u8 test_mode_nr; 404 u16 ackpend; /* ep0 */ 405 enum musb_g_ep0_state ep0_state; 406 struct usb_gadget g; /* the gadget */ 407 struct usb_gadget_driver *gadget_driver; /* its driver */ 408 struct usb_hcd *hcd; /* the usb hcd */ 409 410 /* 411 * FIXME: Remove this flag. 412 * 413 * This is only added to allow Blackfin to work 414 * with current driver. For some unknown reason 415 * Blackfin doesn't work with double buffering 416 * and that's enabled by default. 417 * 418 * We added this flag to forcefully disable double 419 * buffering until we get it working. 420 */ 421 unsigned double_buffer_not_ok:1; 422 423 struct musb_hdrc_config *config; 424 425 int xceiv_old_state; 426 #ifdef CONFIG_DEBUG_FS 427 struct dentry *debugfs_root; 428 #endif 429 }; 430 431 static inline struct musb *gadget_to_musb(struct usb_gadget *g) 432 { 433 return container_of(g, struct musb, g); 434 } 435 436 #ifdef CONFIG_BLACKFIN 437 static inline int musb_read_fifosize(struct musb *musb, 438 struct musb_hw_ep *hw_ep, u8 epnum) 439 { 440 musb->nr_endpoints++; 441 musb->epmask |= (1 << epnum); 442 443 if (epnum < 5) { 444 hw_ep->max_packet_sz_tx = 128; 445 hw_ep->max_packet_sz_rx = 128; 446 } else { 447 hw_ep->max_packet_sz_tx = 1024; 448 hw_ep->max_packet_sz_rx = 1024; 449 } 450 hw_ep->is_shared_fifo = false; 451 452 return 0; 453 } 454 455 static inline void musb_configure_ep0(struct musb *musb) 456 { 457 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; 458 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; 459 musb->endpoints[0].is_shared_fifo = true; 460 } 461 462 #else 463 464 static inline int musb_read_fifosize(struct musb *musb, 465 struct musb_hw_ep *hw_ep, u8 epnum) 466 { 467 void __iomem *mbase = musb->mregs; 468 u8 reg = 0; 469 470 /* read from core using indexed model */ 471 reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE)); 472 /* 0's returned when no more endpoints */ 473 if (!reg) 474 return -ENODEV; 475 476 musb->nr_endpoints++; 477 musb->epmask |= (1 << epnum); 478 479 hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f); 480 481 /* shared TX/RX FIFO? */ 482 if ((reg & 0xf0) == 0xf0) { 483 hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx; 484 hw_ep->is_shared_fifo = true; 485 return 0; 486 } else { 487 hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4); 488 hw_ep->is_shared_fifo = false; 489 } 490 491 return 0; 492 } 493 494 static inline void musb_configure_ep0(struct musb *musb) 495 { 496 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; 497 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; 498 musb->endpoints[0].is_shared_fifo = true; 499 } 500 #endif /* CONFIG_BLACKFIN */ 501 502 503 /***************************** Glue it together *****************************/ 504 505 extern const char musb_driver_name[]; 506 507 extern void musb_stop(struct musb *musb); 508 extern void musb_start(struct musb *musb); 509 510 extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src); 511 extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst); 512 513 extern void musb_load_testpacket(struct musb *); 514 515 extern irqreturn_t musb_interrupt(struct musb *); 516 517 extern void musb_hnp_stop(struct musb *musb); 518 519 static inline void musb_platform_set_vbus(struct musb *musb, int is_on) 520 { 521 if (musb->ops->set_vbus) 522 musb->ops->set_vbus(musb, is_on); 523 } 524 525 static inline void musb_platform_enable(struct musb *musb) 526 { 527 if (musb->ops->enable) 528 musb->ops->enable(musb); 529 } 530 531 static inline void musb_platform_disable(struct musb *musb) 532 { 533 if (musb->ops->disable) 534 musb->ops->disable(musb); 535 } 536 537 static inline int musb_platform_set_mode(struct musb *musb, u8 mode) 538 { 539 if (!musb->ops->set_mode) 540 return 0; 541 542 return musb->ops->set_mode(musb, mode); 543 } 544 545 static inline void musb_platform_try_idle(struct musb *musb, 546 unsigned long timeout) 547 { 548 if (musb->ops->try_idle) 549 musb->ops->try_idle(musb, timeout); 550 } 551 552 static inline int musb_platform_get_vbus_status(struct musb *musb) 553 { 554 if (!musb->ops->vbus_status) 555 return 0; 556 557 return musb->ops->vbus_status(musb); 558 } 559 560 static inline int musb_platform_init(struct musb *musb) 561 { 562 if (!musb->ops->init) 563 return -EINVAL; 564 565 return musb->ops->init(musb); 566 } 567 568 static inline int musb_platform_exit(struct musb *musb) 569 { 570 if (!musb->ops->exit) 571 return -EINVAL; 572 573 return musb->ops->exit(musb); 574 } 575 576 #endif /* __MUSB_CORE_H__ */ 577