1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2019 MediaTek Inc. 4 * 5 * Author: 6 * Min Guo <min.guo@mediatek.com> 7 * Yonglong Wu <yonglong.wu@mediatek.com> 8 */ 9 10 #include <linux/clk.h> 11 #include <linux/dma-mapping.h> 12 #include <linux/module.h> 13 #include <linux/of_platform.h> 14 #include <linux/platform_device.h> 15 #include <linux/usb/role.h> 16 #include <linux/usb/usb_phy_generic.h> 17 #include "musb_core.h" 18 #include "musb_dma.h" 19 20 #define USB_L1INTS 0x00a0 21 #define USB_L1INTM 0x00a4 22 #define MTK_MUSB_TXFUNCADDR 0x0480 23 24 /* MediaTek controller toggle enable and status reg */ 25 #define MUSB_RXTOG 0x80 26 #define MUSB_RXTOGEN 0x82 27 #define MUSB_TXTOG 0x84 28 #define MUSB_TXTOGEN 0x86 29 #define MTK_TOGGLE_EN GENMASK(15, 0) 30 31 #define TX_INT_STATUS BIT(0) 32 #define RX_INT_STATUS BIT(1) 33 #define USBCOM_INT_STATUS BIT(2) 34 #define DMA_INT_STATUS BIT(3) 35 36 #define DMA_INTR_STATUS_MSK GENMASK(7, 0) 37 #define DMA_INTR_UNMASK_SET_MSK GENMASK(31, 24) 38 39 struct mtk_glue { 40 struct device *dev; 41 struct musb *musb; 42 struct platform_device *musb_pdev; 43 struct platform_device *usb_phy; 44 struct phy *phy; 45 struct usb_phy *xceiv; 46 enum phy_mode phy_mode; 47 struct clk *main; 48 struct clk *mcu; 49 struct clk *univpll; 50 enum usb_role role; 51 struct usb_role_switch *role_sw; 52 }; 53 54 static int mtk_musb_clks_get(struct mtk_glue *glue) 55 { 56 struct device *dev = glue->dev; 57 58 glue->main = devm_clk_get(dev, "main"); 59 if (IS_ERR(glue->main)) { 60 dev_err(dev, "fail to get main clock\n"); 61 return PTR_ERR(glue->main); 62 } 63 64 glue->mcu = devm_clk_get(dev, "mcu"); 65 if (IS_ERR(glue->mcu)) { 66 dev_err(dev, "fail to get mcu clock\n"); 67 return PTR_ERR(glue->mcu); 68 } 69 70 glue->univpll = devm_clk_get(dev, "univpll"); 71 if (IS_ERR(glue->univpll)) { 72 dev_err(dev, "fail to get univpll clock\n"); 73 return PTR_ERR(glue->univpll); 74 } 75 76 return 0; 77 } 78 79 static int mtk_musb_clks_enable(struct mtk_glue *glue) 80 { 81 int ret; 82 83 ret = clk_prepare_enable(glue->main); 84 if (ret) { 85 dev_err(glue->dev, "failed to enable main clock\n"); 86 goto err_main_clk; 87 } 88 89 ret = clk_prepare_enable(glue->mcu); 90 if (ret) { 91 dev_err(glue->dev, "failed to enable mcu clock\n"); 92 goto err_mcu_clk; 93 } 94 95 ret = clk_prepare_enable(glue->univpll); 96 if (ret) { 97 dev_err(glue->dev, "failed to enable univpll clock\n"); 98 goto err_univpll_clk; 99 } 100 101 return 0; 102 103 err_univpll_clk: 104 clk_disable_unprepare(glue->mcu); 105 err_mcu_clk: 106 clk_disable_unprepare(glue->main); 107 err_main_clk: 108 return ret; 109 } 110 111 static void mtk_musb_clks_disable(struct mtk_glue *glue) 112 { 113 clk_disable_unprepare(glue->univpll); 114 clk_disable_unprepare(glue->mcu); 115 clk_disable_unprepare(glue->main); 116 } 117 118 static int musb_usb_role_sx_set(struct device *dev, enum usb_role role) 119 { 120 struct mtk_glue *glue = dev_get_drvdata(dev); 121 struct musb *musb = glue->musb; 122 u8 devctl = readb(musb->mregs + MUSB_DEVCTL); 123 enum usb_role new_role; 124 125 if (role == glue->role) 126 return 0; 127 128 switch (role) { 129 case USB_ROLE_HOST: 130 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; 131 glue->phy_mode = PHY_MODE_USB_HOST; 132 new_role = USB_ROLE_HOST; 133 if (glue->role == USB_ROLE_NONE) 134 phy_power_on(glue->phy); 135 136 devctl |= MUSB_DEVCTL_SESSION; 137 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); 138 MUSB_HST_MODE(musb); 139 break; 140 case USB_ROLE_DEVICE: 141 musb->xceiv->otg->state = OTG_STATE_B_IDLE; 142 glue->phy_mode = PHY_MODE_USB_DEVICE; 143 new_role = USB_ROLE_DEVICE; 144 devctl &= ~MUSB_DEVCTL_SESSION; 145 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); 146 if (glue->role == USB_ROLE_NONE) 147 phy_power_on(glue->phy); 148 149 MUSB_DEV_MODE(musb); 150 break; 151 case USB_ROLE_NONE: 152 glue->phy_mode = PHY_MODE_USB_OTG; 153 new_role = USB_ROLE_NONE; 154 devctl &= ~MUSB_DEVCTL_SESSION; 155 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); 156 if (glue->role != USB_ROLE_NONE) 157 phy_power_off(glue->phy); 158 159 break; 160 default: 161 dev_err(glue->dev, "Invalid State\n"); 162 return -EINVAL; 163 } 164 165 glue->role = new_role; 166 phy_set_mode(glue->phy, glue->phy_mode); 167 168 return 0; 169 } 170 171 static enum usb_role musb_usb_role_sx_get(struct device *dev) 172 { 173 struct mtk_glue *glue = dev_get_drvdata(dev); 174 175 return glue->role; 176 } 177 178 static int mtk_otg_switch_init(struct mtk_glue *glue) 179 { 180 struct usb_role_switch_desc role_sx_desc = { 0 }; 181 182 role_sx_desc.set = musb_usb_role_sx_set; 183 role_sx_desc.get = musb_usb_role_sx_get; 184 role_sx_desc.fwnode = dev_fwnode(glue->dev); 185 glue->role_sw = usb_role_switch_register(glue->dev, &role_sx_desc); 186 187 return PTR_ERR_OR_ZERO(glue->role_sw); 188 } 189 190 static void mtk_otg_switch_exit(struct mtk_glue *glue) 191 { 192 return usb_role_switch_unregister(glue->role_sw); 193 } 194 195 static irqreturn_t generic_interrupt(int irq, void *__hci) 196 { 197 unsigned long flags; 198 irqreturn_t retval = IRQ_NONE; 199 struct musb *musb = __hci; 200 201 spin_lock_irqsave(&musb->lock, flags); 202 musb->int_usb = musb_clearb(musb->mregs, MUSB_INTRUSB); 203 musb->int_rx = musb_clearw(musb->mregs, MUSB_INTRRX); 204 musb->int_tx = musb_clearw(musb->mregs, MUSB_INTRTX); 205 206 if (musb->int_usb || musb->int_tx || musb->int_rx) 207 retval = musb_interrupt(musb); 208 209 spin_unlock_irqrestore(&musb->lock, flags); 210 211 return retval; 212 } 213 214 static irqreturn_t mtk_musb_interrupt(int irq, void *dev_id) 215 { 216 irqreturn_t retval = IRQ_NONE; 217 struct musb *musb = (struct musb *)dev_id; 218 u32 l1_ints; 219 220 l1_ints = musb_readl(musb->mregs, USB_L1INTS) & 221 musb_readl(musb->mregs, USB_L1INTM); 222 223 if (l1_ints & (TX_INT_STATUS | RX_INT_STATUS | USBCOM_INT_STATUS)) 224 retval = generic_interrupt(irq, musb); 225 226 #if defined(CONFIG_USB_INVENTRA_DMA) 227 if (l1_ints & DMA_INT_STATUS) 228 retval = dma_controller_irq(irq, musb->dma_controller); 229 #endif 230 return retval; 231 } 232 233 static u32 mtk_musb_busctl_offset(u8 epnum, u16 offset) 234 { 235 return MTK_MUSB_TXFUNCADDR + offset + 8 * epnum; 236 } 237 238 static u8 mtk_musb_clearb(void __iomem *addr, unsigned int offset) 239 { 240 u8 data; 241 242 /* W1C */ 243 data = musb_readb(addr, offset); 244 musb_writeb(addr, offset, data); 245 return data; 246 } 247 248 static u16 mtk_musb_clearw(void __iomem *addr, unsigned int offset) 249 { 250 u16 data; 251 252 /* W1C */ 253 data = musb_readw(addr, offset); 254 musb_writew(addr, offset, data); 255 return data; 256 } 257 258 static int mtk_musb_set_mode(struct musb *musb, u8 mode) 259 { 260 struct device *dev = musb->controller; 261 struct mtk_glue *glue = dev_get_drvdata(dev->parent); 262 enum phy_mode new_mode; 263 enum usb_role new_role; 264 265 switch (mode) { 266 case MUSB_HOST: 267 new_mode = PHY_MODE_USB_HOST; 268 new_role = USB_ROLE_HOST; 269 break; 270 case MUSB_PERIPHERAL: 271 new_mode = PHY_MODE_USB_DEVICE; 272 new_role = USB_ROLE_DEVICE; 273 break; 274 case MUSB_OTG: 275 new_mode = PHY_MODE_USB_OTG; 276 new_role = USB_ROLE_NONE; 277 break; 278 default: 279 dev_err(glue->dev, "Invalid mode request\n"); 280 return -EINVAL; 281 } 282 283 if (glue->phy_mode == new_mode) 284 return 0; 285 286 if (musb->port_mode != MUSB_OTG) { 287 dev_err(glue->dev, "Does not support changing modes\n"); 288 return -EINVAL; 289 } 290 291 glue->role = new_role; 292 musb_usb_role_sx_set(dev, glue->role); 293 return 0; 294 } 295 296 static int mtk_musb_init(struct musb *musb) 297 { 298 struct device *dev = musb->controller; 299 struct mtk_glue *glue = dev_get_drvdata(dev->parent); 300 int ret; 301 302 glue->musb = musb; 303 musb->phy = glue->phy; 304 musb->xceiv = glue->xceiv; 305 musb->is_host = false; 306 musb->isr = mtk_musb_interrupt; 307 308 /* Set TX/RX toggle enable */ 309 musb_writew(musb->mregs, MUSB_TXTOGEN, MTK_TOGGLE_EN); 310 musb_writew(musb->mregs, MUSB_RXTOGEN, MTK_TOGGLE_EN); 311 312 if (musb->port_mode == MUSB_OTG) { 313 ret = mtk_otg_switch_init(glue); 314 if (ret) 315 return ret; 316 } 317 318 ret = phy_init(glue->phy); 319 if (ret) 320 goto err_phy_init; 321 322 ret = phy_power_on(glue->phy); 323 if (ret) 324 goto err_phy_power_on; 325 326 phy_set_mode(glue->phy, glue->phy_mode); 327 328 #if defined(CONFIG_USB_INVENTRA_DMA) 329 musb_writel(musb->mregs, MUSB_HSDMA_INTR, 330 DMA_INTR_STATUS_MSK | DMA_INTR_UNMASK_SET_MSK); 331 #endif 332 musb_writel(musb->mregs, USB_L1INTM, TX_INT_STATUS | RX_INT_STATUS | 333 USBCOM_INT_STATUS | DMA_INT_STATUS); 334 return 0; 335 336 err_phy_power_on: 337 phy_exit(glue->phy); 338 err_phy_init: 339 mtk_otg_switch_exit(glue); 340 return ret; 341 } 342 343 static u16 mtk_musb_get_toggle(struct musb_qh *qh, int is_out) 344 { 345 struct musb *musb = qh->hw_ep->musb; 346 u8 epnum = qh->hw_ep->epnum; 347 u16 toggle; 348 349 toggle = musb_readw(musb->mregs, is_out ? MUSB_TXTOG : MUSB_RXTOG); 350 return toggle & (1 << epnum); 351 } 352 353 static u16 mtk_musb_set_toggle(struct musb_qh *qh, int is_out, struct urb *urb) 354 { 355 struct musb *musb = qh->hw_ep->musb; 356 u8 epnum = qh->hw_ep->epnum; 357 u16 value, toggle; 358 359 toggle = usb_gettoggle(urb->dev, qh->epnum, is_out); 360 361 if (is_out) { 362 value = musb_readw(musb->mregs, MUSB_TXTOG); 363 value |= toggle << epnum; 364 musb_writew(musb->mregs, MUSB_TXTOG, value); 365 } else { 366 value = musb_readw(musb->mregs, MUSB_RXTOG); 367 value |= toggle << epnum; 368 musb_writew(musb->mregs, MUSB_RXTOG, value); 369 } 370 371 return 0; 372 } 373 374 static int mtk_musb_exit(struct musb *musb) 375 { 376 struct device *dev = musb->controller; 377 struct mtk_glue *glue = dev_get_drvdata(dev->parent); 378 379 mtk_otg_switch_exit(glue); 380 phy_power_off(glue->phy); 381 phy_exit(glue->phy); 382 mtk_musb_clks_disable(glue); 383 384 pm_runtime_put_sync(dev); 385 pm_runtime_disable(dev); 386 return 0; 387 } 388 389 static const struct musb_platform_ops mtk_musb_ops = { 390 .quirks = MUSB_DMA_INVENTRA, 391 .init = mtk_musb_init, 392 .get_toggle = mtk_musb_get_toggle, 393 .set_toggle = mtk_musb_set_toggle, 394 .exit = mtk_musb_exit, 395 #ifdef CONFIG_USB_INVENTRA_DMA 396 .dma_init = musbhs_dma_controller_create_noirq, 397 .dma_exit = musbhs_dma_controller_destroy, 398 #endif 399 .clearb = mtk_musb_clearb, 400 .clearw = mtk_musb_clearw, 401 .busctl_offset = mtk_musb_busctl_offset, 402 .set_mode = mtk_musb_set_mode, 403 }; 404 405 #define MTK_MUSB_MAX_EP_NUM 8 406 #define MTK_MUSB_RAM_BITS 11 407 408 static struct musb_fifo_cfg mtk_musb_mode_cfg[] = { 409 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, }, 410 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, }, 411 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, }, 412 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, }, 413 { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, }, 414 { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, }, 415 { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, }, 416 { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, }, 417 { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, }, 418 { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, }, 419 { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 1024, }, 420 { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 1024, }, 421 { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, }, 422 { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 64, }, 423 }; 424 425 static const struct musb_hdrc_config mtk_musb_hdrc_config = { 426 .fifo_cfg = mtk_musb_mode_cfg, 427 .fifo_cfg_size = ARRAY_SIZE(mtk_musb_mode_cfg), 428 .multipoint = true, 429 .dyn_fifo = true, 430 .num_eps = MTK_MUSB_MAX_EP_NUM, 431 .ram_bits = MTK_MUSB_RAM_BITS, 432 }; 433 434 static const struct platform_device_info mtk_dev_info = { 435 .name = "musb-hdrc", 436 .id = PLATFORM_DEVID_AUTO, 437 .dma_mask = DMA_BIT_MASK(32), 438 }; 439 440 static int mtk_musb_probe(struct platform_device *pdev) 441 { 442 struct musb_hdrc_platform_data *pdata; 443 struct mtk_glue *glue; 444 struct platform_device_info pinfo; 445 struct device *dev = &pdev->dev; 446 struct device_node *np = dev->of_node; 447 int ret = -ENOMEM; 448 449 glue = devm_kzalloc(dev, sizeof(*glue), GFP_KERNEL); 450 if (!glue) 451 return -ENOMEM; 452 453 glue->dev = dev; 454 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 455 if (!pdata) 456 return -ENOMEM; 457 458 ret = of_platform_populate(np, NULL, NULL, dev); 459 if (ret) { 460 dev_err(dev, "failed to create child devices at %p\n", np); 461 return ret; 462 } 463 464 ret = mtk_musb_clks_get(glue); 465 if (ret) 466 return ret; 467 468 pdata->config = &mtk_musb_hdrc_config; 469 pdata->platform_ops = &mtk_musb_ops; 470 pdata->mode = usb_get_dr_mode(dev); 471 472 if (IS_ENABLED(CONFIG_USB_MUSB_HOST)) 473 pdata->mode = USB_DR_MODE_HOST; 474 else if (IS_ENABLED(CONFIG_USB_MUSB_GADGET)) 475 pdata->mode = USB_DR_MODE_PERIPHERAL; 476 477 switch (pdata->mode) { 478 case USB_DR_MODE_HOST: 479 glue->phy_mode = PHY_MODE_USB_HOST; 480 glue->role = USB_ROLE_HOST; 481 break; 482 case USB_DR_MODE_PERIPHERAL: 483 glue->phy_mode = PHY_MODE_USB_DEVICE; 484 glue->role = USB_ROLE_DEVICE; 485 break; 486 case USB_DR_MODE_OTG: 487 glue->phy_mode = PHY_MODE_USB_OTG; 488 glue->role = USB_ROLE_NONE; 489 break; 490 default: 491 dev_err(&pdev->dev, "Error 'dr_mode' property\n"); 492 return -EINVAL; 493 } 494 495 glue->phy = devm_of_phy_get_by_index(dev, np, 0); 496 if (IS_ERR(glue->phy)) { 497 dev_err(dev, "fail to getting phy %ld\n", 498 PTR_ERR(glue->phy)); 499 return PTR_ERR(glue->phy); 500 } 501 502 glue->usb_phy = usb_phy_generic_register(); 503 if (IS_ERR(glue->usb_phy)) { 504 dev_err(dev, "fail to registering usb-phy %ld\n", 505 PTR_ERR(glue->usb_phy)); 506 return PTR_ERR(glue->usb_phy); 507 } 508 509 glue->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2); 510 if (IS_ERR(glue->xceiv)) { 511 dev_err(dev, "fail to getting usb-phy %d\n", ret); 512 ret = PTR_ERR(glue->xceiv); 513 goto err_unregister_usb_phy; 514 } 515 516 platform_set_drvdata(pdev, glue); 517 pm_runtime_enable(dev); 518 pm_runtime_get_sync(dev); 519 520 ret = mtk_musb_clks_enable(glue); 521 if (ret) 522 goto err_enable_clk; 523 524 pinfo = mtk_dev_info; 525 pinfo.parent = dev; 526 pinfo.res = pdev->resource; 527 pinfo.num_res = pdev->num_resources; 528 pinfo.data = pdata; 529 pinfo.size_data = sizeof(*pdata); 530 531 glue->musb_pdev = platform_device_register_full(&pinfo); 532 if (IS_ERR(glue->musb_pdev)) { 533 ret = PTR_ERR(glue->musb_pdev); 534 dev_err(dev, "failed to register musb device: %d\n", ret); 535 goto err_device_register; 536 } 537 538 return 0; 539 540 err_device_register: 541 mtk_musb_clks_disable(glue); 542 err_enable_clk: 543 pm_runtime_put_sync(dev); 544 pm_runtime_disable(dev); 545 err_unregister_usb_phy: 546 usb_phy_generic_unregister(glue->usb_phy); 547 return ret; 548 } 549 550 static int mtk_musb_remove(struct platform_device *pdev) 551 { 552 struct mtk_glue *glue = platform_get_drvdata(pdev); 553 struct platform_device *usb_phy = glue->usb_phy; 554 555 platform_device_unregister(glue->musb_pdev); 556 usb_phy_generic_unregister(usb_phy); 557 558 return 0; 559 } 560 561 #ifdef CONFIG_OF 562 static const struct of_device_id mtk_musb_match[] = { 563 {.compatible = "mediatek,mtk-musb",}, 564 {}, 565 }; 566 MODULE_DEVICE_TABLE(of, mtk_musb_match); 567 #endif 568 569 static struct platform_driver mtk_musb_driver = { 570 .probe = mtk_musb_probe, 571 .remove = mtk_musb_remove, 572 .driver = { 573 .name = "musb-mtk", 574 .of_match_table = of_match_ptr(mtk_musb_match), 575 }, 576 }; 577 578 module_platform_driver(mtk_musb_driver); 579 580 MODULE_DESCRIPTION("MediaTek MUSB Glue Layer"); 581 MODULE_AUTHOR("Min Guo <min.guo@mediatek.com>"); 582 MODULE_LICENSE("GPL v2"); 583