xref: /openbmc/linux/drivers/usb/musb/da8xx.c (revision 82e6fdd6)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Texas Instruments DA8xx/OMAP-L1x "glue layer"
4  *
5  * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
6  *
7  * Based on the DaVinci "glue layer" code.
8  * Copyright (C) 2005-2006 by Texas Instruments
9  *
10  * DT support
11  * Copyright (c) 2016 Petr Kulhavy <petr@barix.com>
12  *
13  * This file is part of the Inventra Controller Driver for Linux.
14  */
15 
16 #include <linux/module.h>
17 #include <linux/clk.h>
18 #include <linux/err.h>
19 #include <linux/io.h>
20 #include <linux/of_platform.h>
21 #include <linux/phy/phy.h>
22 #include <linux/platform_device.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/usb/usb_phy_generic.h>
25 
26 #include "musb_core.h"
27 
28 /*
29  * DA8XX specific definitions
30  */
31 
32 /* USB 2.0 OTG module registers */
33 #define DA8XX_USB_REVISION_REG	0x00
34 #define DA8XX_USB_CTRL_REG	0x04
35 #define DA8XX_USB_STAT_REG	0x08
36 #define DA8XX_USB_EMULATION_REG 0x0c
37 #define DA8XX_USB_SRP_FIX_TIME_REG 0x18
38 #define DA8XX_USB_INTR_SRC_REG	0x20
39 #define DA8XX_USB_INTR_SRC_SET_REG 0x24
40 #define DA8XX_USB_INTR_SRC_CLEAR_REG 0x28
41 #define DA8XX_USB_INTR_MASK_REG 0x2c
42 #define DA8XX_USB_INTR_MASK_SET_REG 0x30
43 #define DA8XX_USB_INTR_MASK_CLEAR_REG 0x34
44 #define DA8XX_USB_INTR_SRC_MASKED_REG 0x38
45 #define DA8XX_USB_END_OF_INTR_REG 0x3c
46 #define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2))
47 
48 /* Control register bits */
49 #define DA8XX_SOFT_RESET_MASK	1
50 
51 #define DA8XX_USB_TX_EP_MASK	0x1f		/* EP0 + 4 Tx EPs */
52 #define DA8XX_USB_RX_EP_MASK	0x1e		/* 4 Rx EPs */
53 
54 /* USB interrupt register bits */
55 #define DA8XX_INTR_USB_SHIFT	16
56 #define DA8XX_INTR_USB_MASK	(0x1ff << DA8XX_INTR_USB_SHIFT) /* 8 Mentor */
57 					/* interrupts and DRVVBUS interrupt */
58 #define DA8XX_INTR_DRVVBUS	0x100
59 #define DA8XX_INTR_RX_SHIFT	8
60 #define DA8XX_INTR_RX_MASK	(DA8XX_USB_RX_EP_MASK << DA8XX_INTR_RX_SHIFT)
61 #define DA8XX_INTR_TX_SHIFT	0
62 #define DA8XX_INTR_TX_MASK	(DA8XX_USB_TX_EP_MASK << DA8XX_INTR_TX_SHIFT)
63 
64 #define DA8XX_MENTOR_CORE_OFFSET 0x400
65 
66 struct da8xx_glue {
67 	struct device		*dev;
68 	struct platform_device	*musb;
69 	struct platform_device	*usb_phy;
70 	struct clk		*clk;
71 	struct phy		*phy;
72 };
73 
74 /*
75  * Because we don't set CTRL.UINT, it's "important" to:
76  *	- not read/write INTRUSB/INTRUSBE (except during
77  *	  initial setup, as a workaround);
78  *	- use INTSET/INTCLR instead.
79  */
80 
81 /**
82  * da8xx_musb_enable - enable interrupts
83  */
84 static void da8xx_musb_enable(struct musb *musb)
85 {
86 	void __iomem *reg_base = musb->ctrl_base;
87 	u32 mask;
88 
89 	/* Workaround: setup IRQs through both register sets. */
90 	mask = ((musb->epmask & DA8XX_USB_TX_EP_MASK) << DA8XX_INTR_TX_SHIFT) |
91 	       ((musb->epmask & DA8XX_USB_RX_EP_MASK) << DA8XX_INTR_RX_SHIFT) |
92 	       DA8XX_INTR_USB_MASK;
93 	musb_writel(reg_base, DA8XX_USB_INTR_MASK_SET_REG, mask);
94 
95 	/* Force the DRVVBUS IRQ so we can start polling for ID change. */
96 	musb_writel(reg_base, DA8XX_USB_INTR_SRC_SET_REG,
97 			DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT);
98 }
99 
100 /**
101  * da8xx_musb_disable - disable HDRC and flush interrupts
102  */
103 static void da8xx_musb_disable(struct musb *musb)
104 {
105 	void __iomem *reg_base = musb->ctrl_base;
106 
107 	musb_writel(reg_base, DA8XX_USB_INTR_MASK_CLEAR_REG,
108 		    DA8XX_INTR_USB_MASK |
109 		    DA8XX_INTR_TX_MASK | DA8XX_INTR_RX_MASK);
110 	musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
111 }
112 
113 #define portstate(stmt)		stmt
114 
115 static void da8xx_musb_set_vbus(struct musb *musb, int is_on)
116 {
117 	WARN_ON(is_on && is_peripheral_active(musb));
118 }
119 
120 #define	POLL_SECONDS	2
121 
122 static void otg_timer(struct timer_list *t)
123 {
124 	struct musb		*musb = from_timer(musb, t, dev_timer);
125 	void __iomem		*mregs = musb->mregs;
126 	u8			devctl;
127 	unsigned long		flags;
128 
129 	/*
130 	 * We poll because DaVinci's won't expose several OTG-critical
131 	 * status change events (from the transceiver) otherwise.
132 	 */
133 	devctl = musb_readb(mregs, MUSB_DEVCTL);
134 	dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
135 		usb_otg_state_string(musb->xceiv->otg->state));
136 
137 	spin_lock_irqsave(&musb->lock, flags);
138 	switch (musb->xceiv->otg->state) {
139 	case OTG_STATE_A_WAIT_BCON:
140 		devctl &= ~MUSB_DEVCTL_SESSION;
141 		musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
142 
143 		devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
144 		if (devctl & MUSB_DEVCTL_BDEVICE) {
145 			musb->xceiv->otg->state = OTG_STATE_B_IDLE;
146 			MUSB_DEV_MODE(musb);
147 		} else {
148 			musb->xceiv->otg->state = OTG_STATE_A_IDLE;
149 			MUSB_HST_MODE(musb);
150 		}
151 		break;
152 	case OTG_STATE_A_WAIT_VFALL:
153 		/*
154 		 * Wait till VBUS falls below SessionEnd (~0.2 V); the 1.3
155 		 * RTL seems to mis-handle session "start" otherwise (or in
156 		 * our case "recover"), in routine "VBUS was valid by the time
157 		 * VBUSERR got reported during enumeration" cases.
158 		 */
159 		if (devctl & MUSB_DEVCTL_VBUS) {
160 			mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
161 			break;
162 		}
163 		musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
164 		musb_writel(musb->ctrl_base, DA8XX_USB_INTR_SRC_SET_REG,
165 			    MUSB_INTR_VBUSERROR << DA8XX_INTR_USB_SHIFT);
166 		break;
167 	case OTG_STATE_B_IDLE:
168 		/*
169 		 * There's no ID-changed IRQ, so we have no good way to tell
170 		 * when to switch to the A-Default state machine (by setting
171 		 * the DEVCTL.Session bit).
172 		 *
173 		 * Workaround:  whenever we're in B_IDLE, try setting the
174 		 * session flag every few seconds.  If it works, ID was
175 		 * grounded and we're now in the A-Default state machine.
176 		 *
177 		 * NOTE: setting the session flag is _supposed_ to trigger
178 		 * SRP but clearly it doesn't.
179 		 */
180 		musb_writeb(mregs, MUSB_DEVCTL, devctl | MUSB_DEVCTL_SESSION);
181 		devctl = musb_readb(mregs, MUSB_DEVCTL);
182 		if (devctl & MUSB_DEVCTL_BDEVICE)
183 			mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
184 		else
185 			musb->xceiv->otg->state = OTG_STATE_A_IDLE;
186 		break;
187 	default:
188 		break;
189 	}
190 	spin_unlock_irqrestore(&musb->lock, flags);
191 }
192 
193 static void da8xx_musb_try_idle(struct musb *musb, unsigned long timeout)
194 {
195 	static unsigned long last_timer;
196 
197 	if (timeout == 0)
198 		timeout = jiffies + msecs_to_jiffies(3);
199 
200 	/* Never idle if active, or when VBUS timeout is not set as host */
201 	if (musb->is_active || (musb->a_wait_bcon == 0 &&
202 				musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)) {
203 		dev_dbg(musb->controller, "%s active, deleting timer\n",
204 			usb_otg_state_string(musb->xceiv->otg->state));
205 		del_timer(&musb->dev_timer);
206 		last_timer = jiffies;
207 		return;
208 	}
209 
210 	if (time_after(last_timer, timeout) && timer_pending(&musb->dev_timer)) {
211 		dev_dbg(musb->controller, "Longer idle timer already pending, ignoring...\n");
212 		return;
213 	}
214 	last_timer = timeout;
215 
216 	dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
217 		usb_otg_state_string(musb->xceiv->otg->state),
218 		jiffies_to_msecs(timeout - jiffies));
219 	mod_timer(&musb->dev_timer, timeout);
220 }
221 
222 static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
223 {
224 	struct musb		*musb = hci;
225 	void __iomem		*reg_base = musb->ctrl_base;
226 	struct usb_otg		*otg = musb->xceiv->otg;
227 	unsigned long		flags;
228 	irqreturn_t		ret = IRQ_NONE;
229 	u32			status;
230 
231 	spin_lock_irqsave(&musb->lock, flags);
232 
233 	/*
234 	 * NOTE: DA8XX shadows the Mentor IRQs.  Don't manage them through
235 	 * the Mentor registers (except for setup), use the TI ones and EOI.
236 	 */
237 
238 	/* Acknowledge and handle non-CPPI interrupts */
239 	status = musb_readl(reg_base, DA8XX_USB_INTR_SRC_MASKED_REG);
240 	if (!status)
241 		goto eoi;
242 
243 	musb_writel(reg_base, DA8XX_USB_INTR_SRC_CLEAR_REG, status);
244 	dev_dbg(musb->controller, "USB IRQ %08x\n", status);
245 
246 	musb->int_rx = (status & DA8XX_INTR_RX_MASK) >> DA8XX_INTR_RX_SHIFT;
247 	musb->int_tx = (status & DA8XX_INTR_TX_MASK) >> DA8XX_INTR_TX_SHIFT;
248 	musb->int_usb = (status & DA8XX_INTR_USB_MASK) >> DA8XX_INTR_USB_SHIFT;
249 
250 	/*
251 	 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
252 	 * DA8xx's missing ID change IRQ.  We need an ID change IRQ to
253 	 * switch appropriately between halves of the OTG state machine.
254 	 * Managing DEVCTL.Session per Mentor docs requires that we know its
255 	 * value but DEVCTL.BDevice is invalid without DEVCTL.Session set.
256 	 * Also, DRVVBUS pulses for SRP (but not at 5 V)...
257 	 */
258 	if (status & (DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT)) {
259 		int drvvbus = musb_readl(reg_base, DA8XX_USB_STAT_REG);
260 		void __iomem *mregs = musb->mregs;
261 		u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
262 		int err;
263 
264 		err = musb->int_usb & MUSB_INTR_VBUSERROR;
265 		if (err) {
266 			/*
267 			 * The Mentor core doesn't debounce VBUS as needed
268 			 * to cope with device connect current spikes. This
269 			 * means it's not uncommon for bus-powered devices
270 			 * to get VBUS errors during enumeration.
271 			 *
272 			 * This is a workaround, but newer RTL from Mentor
273 			 * seems to allow a better one: "re"-starting sessions
274 			 * without waiting for VBUS to stop registering in
275 			 * devctl.
276 			 */
277 			musb->int_usb &= ~MUSB_INTR_VBUSERROR;
278 			musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
279 			mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
280 			WARNING("VBUS error workaround (delay coming)\n");
281 		} else if (drvvbus) {
282 			MUSB_HST_MODE(musb);
283 			otg->default_a = 1;
284 			musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
285 			portstate(musb->port1_status |= USB_PORT_STAT_POWER);
286 			del_timer(&musb->dev_timer);
287 		} else if (!(musb->int_usb & MUSB_INTR_BABBLE)) {
288 			/*
289 			 * When babble condition happens, drvvbus interrupt
290 			 * is also generated. Ignore this drvvbus interrupt
291 			 * and let babble interrupt handler recovers the
292 			 * controller; otherwise, the host-mode flag is lost
293 			 * due to the MUSB_DEV_MODE() call below and babble
294 			 * recovery logic will not be called.
295 			 */
296 			musb->is_active = 0;
297 			MUSB_DEV_MODE(musb);
298 			otg->default_a = 0;
299 			musb->xceiv->otg->state = OTG_STATE_B_IDLE;
300 			portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
301 		}
302 
303 		dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
304 				drvvbus ? "on" : "off",
305 				usb_otg_state_string(musb->xceiv->otg->state),
306 				err ? " ERROR" : "",
307 				devctl);
308 		ret = IRQ_HANDLED;
309 	}
310 
311 	if (musb->int_tx || musb->int_rx || musb->int_usb)
312 		ret |= musb_interrupt(musb);
313 
314  eoi:
315 	/* EOI needs to be written for the IRQ to be re-asserted. */
316 	if (ret == IRQ_HANDLED || status)
317 		musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
318 
319 	/* Poll for ID change */
320 	if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
321 		mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
322 
323 	spin_unlock_irqrestore(&musb->lock, flags);
324 
325 	return ret;
326 }
327 
328 static int da8xx_musb_set_mode(struct musb *musb, u8 musb_mode)
329 {
330 	struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
331 	enum phy_mode phy_mode;
332 
333 	/*
334 	 * The PHY has some issues when it is forced in device or host mode.
335 	 * Unless the user request another mode, configure the PHY in OTG mode.
336 	 */
337 	if (!musb->is_initialized)
338 		return phy_set_mode(glue->phy, PHY_MODE_USB_OTG);
339 
340 	switch (musb_mode) {
341 	case MUSB_HOST:		/* Force VBUS valid, ID = 0 */
342 		phy_mode = PHY_MODE_USB_HOST;
343 		break;
344 	case MUSB_PERIPHERAL:	/* Force VBUS valid, ID = 1 */
345 		phy_mode = PHY_MODE_USB_DEVICE;
346 		break;
347 	case MUSB_OTG:		/* Don't override the VBUS/ID comparators */
348 		phy_mode = PHY_MODE_USB_OTG;
349 		break;
350 	default:
351 		return -EINVAL;
352 	}
353 
354 	return phy_set_mode(glue->phy, phy_mode);
355 }
356 
357 static int da8xx_musb_init(struct musb *musb)
358 {
359 	struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
360 	void __iomem *reg_base = musb->ctrl_base;
361 	u32 rev;
362 	int ret = -ENODEV;
363 
364 	musb->mregs += DA8XX_MENTOR_CORE_OFFSET;
365 
366 	ret = clk_prepare_enable(glue->clk);
367 	if (ret) {
368 		dev_err(glue->dev, "failed to enable clock\n");
369 		return ret;
370 	}
371 
372 	/* Returns zero if e.g. not clocked */
373 	rev = musb_readl(reg_base, DA8XX_USB_REVISION_REG);
374 	if (!rev)
375 		goto fail;
376 
377 	musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
378 	if (IS_ERR_OR_NULL(musb->xceiv)) {
379 		ret = -EPROBE_DEFER;
380 		goto fail;
381 	}
382 
383 	timer_setup(&musb->dev_timer, otg_timer, 0);
384 
385 	/* Reset the controller */
386 	musb_writel(reg_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK);
387 
388 	/* Start the on-chip PHY and its PLL. */
389 	ret = phy_init(glue->phy);
390 	if (ret) {
391 		dev_err(glue->dev, "Failed to init phy.\n");
392 		goto fail;
393 	}
394 
395 	ret = phy_power_on(glue->phy);
396 	if (ret) {
397 		dev_err(glue->dev, "Failed to power on phy.\n");
398 		goto err_phy_power_on;
399 	}
400 
401 	msleep(5);
402 
403 	/* NOTE: IRQs are in mixed mode, not bypass to pure MUSB */
404 	pr_debug("DA8xx OTG revision %08x, control %02x\n", rev,
405 		 musb_readb(reg_base, DA8XX_USB_CTRL_REG));
406 
407 	musb->isr = da8xx_musb_interrupt;
408 	return 0;
409 
410 err_phy_power_on:
411 	phy_exit(glue->phy);
412 fail:
413 	clk_disable_unprepare(glue->clk);
414 	return ret;
415 }
416 
417 static int da8xx_musb_exit(struct musb *musb)
418 {
419 	struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
420 
421 	del_timer_sync(&musb->dev_timer);
422 
423 	phy_power_off(glue->phy);
424 	phy_exit(glue->phy);
425 	clk_disable_unprepare(glue->clk);
426 
427 	usb_put_phy(musb->xceiv);
428 
429 	return 0;
430 }
431 
432 static inline u8 get_vbus_power(struct device *dev)
433 {
434 	struct regulator *vbus_supply;
435 	int current_uA;
436 
437 	vbus_supply = regulator_get_optional(dev, "vbus");
438 	if (IS_ERR(vbus_supply))
439 		return 255;
440 	current_uA = regulator_get_current_limit(vbus_supply);
441 	regulator_put(vbus_supply);
442 	if (current_uA <= 0 || current_uA > 510000)
443 		return 255;
444 	return current_uA / 1000 / 2;
445 }
446 
447 #ifdef CONFIG_USB_TI_CPPI41_DMA
448 static void da8xx_dma_controller_callback(struct dma_controller *c)
449 {
450 	struct musb *musb = c->musb;
451 	void __iomem *reg_base = musb->ctrl_base;
452 
453 	musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
454 }
455 
456 static struct dma_controller *
457 da8xx_dma_controller_create(struct musb *musb, void __iomem *base)
458 {
459 	struct dma_controller *controller;
460 
461 	controller = cppi41_dma_controller_create(musb, base);
462 	if (IS_ERR_OR_NULL(controller))
463 		return controller;
464 
465 	controller->dma_callback = da8xx_dma_controller_callback;
466 
467 	return controller;
468 }
469 #endif
470 
471 static const struct musb_platform_ops da8xx_ops = {
472 	.quirks		= MUSB_INDEXED_EP | MUSB_PRESERVE_SESSION |
473 			  MUSB_DMA_CPPI41 | MUSB_DA8XX,
474 	.init		= da8xx_musb_init,
475 	.exit		= da8xx_musb_exit,
476 
477 	.fifo_mode	= 2,
478 #ifdef CONFIG_USB_TI_CPPI41_DMA
479 	.dma_init	= da8xx_dma_controller_create,
480 	.dma_exit	= cppi41_dma_controller_destroy,
481 #endif
482 	.enable		= da8xx_musb_enable,
483 	.disable	= da8xx_musb_disable,
484 
485 	.set_mode	= da8xx_musb_set_mode,
486 	.try_idle	= da8xx_musb_try_idle,
487 
488 	.set_vbus	= da8xx_musb_set_vbus,
489 };
490 
491 static const struct platform_device_info da8xx_dev_info = {
492 	.name		= "musb-hdrc",
493 	.id		= PLATFORM_DEVID_AUTO,
494 	.dma_mask	= DMA_BIT_MASK(32),
495 };
496 
497 static const struct musb_hdrc_config da8xx_config = {
498 	.ram_bits = 10,
499 	.num_eps = 5,
500 	.multipoint = 1,
501 };
502 
503 static struct of_dev_auxdata da8xx_auxdata_lookup[] = {
504 	OF_DEV_AUXDATA("ti,da830-cppi41", 0x01e01000, "cppi41-dmaengine",
505 		       NULL),
506 	{}
507 };
508 
509 static int da8xx_probe(struct platform_device *pdev)
510 {
511 	struct resource musb_resources[2];
512 	struct musb_hdrc_platform_data	*pdata = dev_get_platdata(&pdev->dev);
513 	struct da8xx_glue		*glue;
514 	struct platform_device_info	pinfo;
515 	struct clk			*clk;
516 	struct device_node		*np = pdev->dev.of_node;
517 	int				ret;
518 
519 	glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
520 	if (!glue)
521 		return -ENOMEM;
522 
523 	clk = devm_clk_get(&pdev->dev, NULL);
524 	if (IS_ERR(clk)) {
525 		dev_err(&pdev->dev, "failed to get clock\n");
526 		return PTR_ERR(clk);
527 	}
528 
529 	glue->phy = devm_phy_get(&pdev->dev, "usb-phy");
530 	if (IS_ERR(glue->phy)) {
531 		if (PTR_ERR(glue->phy) != -EPROBE_DEFER)
532 			dev_err(&pdev->dev, "failed to get phy\n");
533 		return PTR_ERR(glue->phy);
534 	}
535 
536 	glue->dev			= &pdev->dev;
537 	glue->clk			= clk;
538 
539 	if (IS_ENABLED(CONFIG_OF) && np) {
540 		pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
541 		if (!pdata)
542 			return -ENOMEM;
543 
544 		pdata->config	= &da8xx_config;
545 		pdata->mode	= musb_get_mode(&pdev->dev);
546 		pdata->power	= get_vbus_power(&pdev->dev);
547 	}
548 
549 	pdata->platform_ops		= &da8xx_ops;
550 
551 	glue->usb_phy = usb_phy_generic_register();
552 	ret = PTR_ERR_OR_ZERO(glue->usb_phy);
553 	if (ret) {
554 		dev_err(&pdev->dev, "failed to register usb_phy\n");
555 		return ret;
556 	}
557 	platform_set_drvdata(pdev, glue);
558 
559 	ret = of_platform_populate(pdev->dev.of_node, NULL,
560 				   da8xx_auxdata_lookup, &pdev->dev);
561 	if (ret)
562 		return ret;
563 
564 	memset(musb_resources, 0x00, sizeof(*musb_resources) *
565 			ARRAY_SIZE(musb_resources));
566 
567 	musb_resources[0].name = pdev->resource[0].name;
568 	musb_resources[0].start = pdev->resource[0].start;
569 	musb_resources[0].end = pdev->resource[0].end;
570 	musb_resources[0].flags = pdev->resource[0].flags;
571 
572 	musb_resources[1].name = pdev->resource[1].name;
573 	musb_resources[1].start = pdev->resource[1].start;
574 	musb_resources[1].end = pdev->resource[1].end;
575 	musb_resources[1].flags = pdev->resource[1].flags;
576 
577 	pinfo = da8xx_dev_info;
578 	pinfo.parent = &pdev->dev;
579 	pinfo.res = musb_resources;
580 	pinfo.num_res = ARRAY_SIZE(musb_resources);
581 	pinfo.data = pdata;
582 	pinfo.size_data = sizeof(*pdata);
583 
584 	glue->musb = platform_device_register_full(&pinfo);
585 	ret = PTR_ERR_OR_ZERO(glue->musb);
586 	if (ret) {
587 		dev_err(&pdev->dev, "failed to register musb device: %d\n", ret);
588 		usb_phy_generic_unregister(glue->usb_phy);
589 	}
590 
591 	return ret;
592 }
593 
594 static int da8xx_remove(struct platform_device *pdev)
595 {
596 	struct da8xx_glue		*glue = platform_get_drvdata(pdev);
597 
598 	platform_device_unregister(glue->musb);
599 	usb_phy_generic_unregister(glue->usb_phy);
600 
601 	return 0;
602 }
603 
604 #ifdef CONFIG_PM_SLEEP
605 static int da8xx_suspend(struct device *dev)
606 {
607 	int ret;
608 	struct da8xx_glue *glue = dev_get_drvdata(dev);
609 
610 	ret = phy_power_off(glue->phy);
611 	if (ret)
612 		return ret;
613 	clk_disable_unprepare(glue->clk);
614 
615 	return 0;
616 }
617 
618 static int da8xx_resume(struct device *dev)
619 {
620 	int ret;
621 	struct da8xx_glue *glue = dev_get_drvdata(dev);
622 
623 	ret = clk_prepare_enable(glue->clk);
624 	if (ret)
625 		return ret;
626 	return phy_power_on(glue->phy);
627 }
628 #endif
629 
630 static SIMPLE_DEV_PM_OPS(da8xx_pm_ops, da8xx_suspend, da8xx_resume);
631 
632 #ifdef CONFIG_OF
633 static const struct of_device_id da8xx_id_table[] = {
634 	{
635 		.compatible = "ti,da830-musb",
636 	},
637 	{},
638 };
639 MODULE_DEVICE_TABLE(of, da8xx_id_table);
640 #endif
641 
642 static struct platform_driver da8xx_driver = {
643 	.probe		= da8xx_probe,
644 	.remove		= da8xx_remove,
645 	.driver		= {
646 		.name	= "musb-da8xx",
647 		.pm = &da8xx_pm_ops,
648 		.of_match_table = of_match_ptr(da8xx_id_table),
649 	},
650 };
651 
652 MODULE_DESCRIPTION("DA8xx/OMAP-L1x MUSB Glue Layer");
653 MODULE_AUTHOR("Sergei Shtylyov <sshtylyov@ru.mvista.com>");
654 MODULE_LICENSE("GPL v2");
655 module_platform_driver(da8xx_driver);
656