xref: /openbmc/linux/drivers/usb/mtu3/mtu3_plat.c (revision aa0dc6a7)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2016 MediaTek Inc.
4  *
5  * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
6  */
7 
8 #include <linux/dma-mapping.h>
9 #include <linux/iopoll.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/of_address.h>
13 #include <linux/of_irq.h>
14 #include <linux/platform_device.h>
15 
16 #include "mtu3.h"
17 #include "mtu3_dr.h"
18 #include "mtu3_debug.h"
19 
20 /* u2-port0 should be powered on and enabled; */
21 int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks)
22 {
23 	void __iomem *ibase = ssusb->ippc_base;
24 	u32 value, check_val;
25 	int ret;
26 
27 	check_val = ex_clks | SSUSB_SYS125_RST_B_STS | SSUSB_SYSPLL_STABLE |
28 			SSUSB_REF_RST_B_STS;
29 
30 	ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
31 			(check_val == (value & check_val)), 100, 20000);
32 	if (ret) {
33 		dev_err(ssusb->dev, "clks of sts1 are not stable!\n");
34 		return ret;
35 	}
36 
37 	ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS2, value,
38 			(value & SSUSB_U2_MAC_SYS_RST_B_STS), 100, 10000);
39 	if (ret) {
40 		dev_err(ssusb->dev, "mac2 clock is not stable\n");
41 		return ret;
42 	}
43 
44 	return 0;
45 }
46 
47 static int ssusb_phy_init(struct ssusb_mtk *ssusb)
48 {
49 	int i;
50 	int ret;
51 
52 	for (i = 0; i < ssusb->num_phys; i++) {
53 		ret = phy_init(ssusb->phys[i]);
54 		if (ret)
55 			goto exit_phy;
56 	}
57 	return 0;
58 
59 exit_phy:
60 	for (; i > 0; i--)
61 		phy_exit(ssusb->phys[i - 1]);
62 
63 	return ret;
64 }
65 
66 static int ssusb_phy_exit(struct ssusb_mtk *ssusb)
67 {
68 	int i;
69 
70 	for (i = 0; i < ssusb->num_phys; i++)
71 		phy_exit(ssusb->phys[i]);
72 
73 	return 0;
74 }
75 
76 static int ssusb_phy_power_on(struct ssusb_mtk *ssusb)
77 {
78 	int i;
79 	int ret;
80 
81 	for (i = 0; i < ssusb->num_phys; i++) {
82 		ret = phy_power_on(ssusb->phys[i]);
83 		if (ret)
84 			goto power_off_phy;
85 	}
86 	return 0;
87 
88 power_off_phy:
89 	for (; i > 0; i--)
90 		phy_power_off(ssusb->phys[i - 1]);
91 
92 	return ret;
93 }
94 
95 static void ssusb_phy_power_off(struct ssusb_mtk *ssusb)
96 {
97 	unsigned int i;
98 
99 	for (i = 0; i < ssusb->num_phys; i++)
100 		phy_power_off(ssusb->phys[i]);
101 }
102 
103 static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
104 {
105 	int ret = 0;
106 
107 	ret = regulator_enable(ssusb->vusb33);
108 	if (ret) {
109 		dev_err(ssusb->dev, "failed to enable vusb33\n");
110 		goto vusb33_err;
111 	}
112 
113 	ret = clk_bulk_prepare_enable(BULK_CLKS_CNT, ssusb->clks);
114 	if (ret)
115 		goto clks_err;
116 
117 	ret = ssusb_phy_init(ssusb);
118 	if (ret) {
119 		dev_err(ssusb->dev, "failed to init phy\n");
120 		goto phy_init_err;
121 	}
122 
123 	ret = ssusb_phy_power_on(ssusb);
124 	if (ret) {
125 		dev_err(ssusb->dev, "failed to power on phy\n");
126 		goto phy_err;
127 	}
128 
129 	return 0;
130 
131 phy_err:
132 	ssusb_phy_exit(ssusb);
133 phy_init_err:
134 	clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
135 clks_err:
136 	regulator_disable(ssusb->vusb33);
137 vusb33_err:
138 	return ret;
139 }
140 
141 static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
142 {
143 	clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
144 	regulator_disable(ssusb->vusb33);
145 	ssusb_phy_power_off(ssusb);
146 	ssusb_phy_exit(ssusb);
147 }
148 
149 static void ssusb_ip_sw_reset(struct ssusb_mtk *ssusb)
150 {
151 	/* reset whole ip (xhci & u3d) */
152 	mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
153 	udelay(1);
154 	mtu3_clrbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
155 
156 	/*
157 	 * device ip may be powered on in firmware/BROM stage before entering
158 	 * kernel stage;
159 	 * power down device ip, otherwise ip-sleep will fail when working as
160 	 * host only mode
161 	 */
162 	mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
163 }
164 
165 static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk *ssusb)
166 {
167 	struct device_node *node = pdev->dev.of_node;
168 	struct otg_switch_mtk *otg_sx = &ssusb->otg_switch;
169 	struct clk_bulk_data *clks = ssusb->clks;
170 	struct device *dev = &pdev->dev;
171 	int i;
172 	int ret;
173 
174 	ssusb->vusb33 = devm_regulator_get(dev, "vusb33");
175 	if (IS_ERR(ssusb->vusb33)) {
176 		dev_err(dev, "failed to get vusb33\n");
177 		return PTR_ERR(ssusb->vusb33);
178 	}
179 
180 	clks[0].id = "sys_ck";
181 	clks[1].id = "ref_ck";
182 	clks[2].id = "mcu_ck";
183 	clks[3].id = "dma_ck";
184 	ret = devm_clk_bulk_get_optional(dev, BULK_CLKS_CNT, clks);
185 	if (ret)
186 		return ret;
187 
188 	ssusb->num_phys = of_count_phandle_with_args(node,
189 			"phys", "#phy-cells");
190 	if (ssusb->num_phys > 0) {
191 		ssusb->phys = devm_kcalloc(dev, ssusb->num_phys,
192 					sizeof(*ssusb->phys), GFP_KERNEL);
193 		if (!ssusb->phys)
194 			return -ENOMEM;
195 	} else {
196 		ssusb->num_phys = 0;
197 	}
198 
199 	for (i = 0; i < ssusb->num_phys; i++) {
200 		ssusb->phys[i] = devm_of_phy_get_by_index(dev, node, i);
201 		if (IS_ERR(ssusb->phys[i])) {
202 			dev_err(dev, "failed to get phy-%d\n", i);
203 			return PTR_ERR(ssusb->phys[i]);
204 		}
205 	}
206 
207 	ssusb->ippc_base = devm_platform_ioremap_resource_byname(pdev, "ippc");
208 	if (IS_ERR(ssusb->ippc_base))
209 		return PTR_ERR(ssusb->ippc_base);
210 
211 	ssusb->dr_mode = usb_get_dr_mode(dev);
212 	if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN)
213 		ssusb->dr_mode = USB_DR_MODE_OTG;
214 
215 	if (ssusb->dr_mode == USB_DR_MODE_PERIPHERAL)
216 		goto out;
217 
218 	/* if host role is supported */
219 	ret = ssusb_wakeup_of_property_parse(ssusb, node);
220 	if (ret) {
221 		dev_err(dev, "failed to parse uwk property\n");
222 		return ret;
223 	}
224 
225 	/* optional property, ignore the error if it does not exist */
226 	of_property_read_u32(node, "mediatek,u3p-dis-msk",
227 			     &ssusb->u3p_dis_msk);
228 
229 	otg_sx->vbus = devm_regulator_get(dev, "vbus");
230 	if (IS_ERR(otg_sx->vbus)) {
231 		dev_err(dev, "failed to get vbus\n");
232 		return PTR_ERR(otg_sx->vbus);
233 	}
234 
235 	if (ssusb->dr_mode == USB_DR_MODE_HOST)
236 		goto out;
237 
238 	/* if dual-role mode is supported */
239 	otg_sx->is_u3_drd = of_property_read_bool(node, "mediatek,usb3-drd");
240 	otg_sx->manual_drd_enabled =
241 		of_property_read_bool(node, "enable-manual-drd");
242 	otg_sx->role_sw_used = of_property_read_bool(node, "usb-role-switch");
243 
244 	if (otg_sx->role_sw_used || otg_sx->manual_drd_enabled)
245 		goto out;
246 
247 	if (of_property_read_bool(node, "extcon")) {
248 		otg_sx->edev = extcon_get_edev_by_phandle(ssusb->dev, 0);
249 		if (IS_ERR(otg_sx->edev)) {
250 			return dev_err_probe(dev, PTR_ERR(otg_sx->edev),
251 					     "couldn't get extcon device\n");
252 		}
253 	}
254 
255 out:
256 	dev_info(dev, "dr_mode: %d, is_u3_dr: %d, u3p_dis_msk: %x, drd: %s\n",
257 		ssusb->dr_mode, otg_sx->is_u3_drd, ssusb->u3p_dis_msk,
258 		otg_sx->manual_drd_enabled ? "manual" : "auto");
259 
260 	return 0;
261 }
262 
263 static int mtu3_probe(struct platform_device *pdev)
264 {
265 	struct device_node *node = pdev->dev.of_node;
266 	struct device *dev = &pdev->dev;
267 	struct ssusb_mtk *ssusb;
268 	int ret = -ENOMEM;
269 
270 	/* all elements are set to ZERO as default value */
271 	ssusb = devm_kzalloc(dev, sizeof(*ssusb), GFP_KERNEL);
272 	if (!ssusb)
273 		return -ENOMEM;
274 
275 	ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
276 	if (ret) {
277 		dev_err(dev, "No suitable DMA config available\n");
278 		return -ENOTSUPP;
279 	}
280 
281 	platform_set_drvdata(pdev, ssusb);
282 	ssusb->dev = dev;
283 
284 	ret = get_ssusb_rscs(pdev, ssusb);
285 	if (ret)
286 		return ret;
287 
288 	ssusb_debugfs_create_root(ssusb);
289 
290 	/* enable power domain */
291 	pm_runtime_enable(dev);
292 	pm_runtime_get_sync(dev);
293 	device_enable_async_suspend(dev);
294 
295 	ret = ssusb_rscs_init(ssusb);
296 	if (ret)
297 		goto comm_init_err;
298 
299 	ssusb_ip_sw_reset(ssusb);
300 
301 	if (IS_ENABLED(CONFIG_USB_MTU3_HOST))
302 		ssusb->dr_mode = USB_DR_MODE_HOST;
303 	else if (IS_ENABLED(CONFIG_USB_MTU3_GADGET))
304 		ssusb->dr_mode = USB_DR_MODE_PERIPHERAL;
305 
306 	/* default as host */
307 	ssusb->is_host = !(ssusb->dr_mode == USB_DR_MODE_PERIPHERAL);
308 
309 	switch (ssusb->dr_mode) {
310 	case USB_DR_MODE_PERIPHERAL:
311 		ret = ssusb_gadget_init(ssusb);
312 		if (ret) {
313 			dev_err(dev, "failed to initialize gadget\n");
314 			goto comm_exit;
315 		}
316 		break;
317 	case USB_DR_MODE_HOST:
318 		ret = ssusb_host_init(ssusb, node);
319 		if (ret) {
320 			dev_err(dev, "failed to initialize host\n");
321 			goto comm_exit;
322 		}
323 		break;
324 	case USB_DR_MODE_OTG:
325 		ret = ssusb_gadget_init(ssusb);
326 		if (ret) {
327 			dev_err(dev, "failed to initialize gadget\n");
328 			goto comm_exit;
329 		}
330 
331 		ret = ssusb_host_init(ssusb, node);
332 		if (ret) {
333 			dev_err(dev, "failed to initialize host\n");
334 			goto gadget_exit;
335 		}
336 
337 		ret = ssusb_otg_switch_init(ssusb);
338 		if (ret) {
339 			dev_err(dev, "failed to initialize switch\n");
340 			goto host_exit;
341 		}
342 		break;
343 	default:
344 		dev_err(dev, "unsupported mode: %d\n", ssusb->dr_mode);
345 		ret = -EINVAL;
346 		goto comm_exit;
347 	}
348 
349 	return 0;
350 
351 host_exit:
352 	ssusb_host_exit(ssusb);
353 gadget_exit:
354 	ssusb_gadget_exit(ssusb);
355 comm_exit:
356 	ssusb_rscs_exit(ssusb);
357 comm_init_err:
358 	pm_runtime_put_sync(dev);
359 	pm_runtime_disable(dev);
360 	ssusb_debugfs_remove_root(ssusb);
361 
362 	return ret;
363 }
364 
365 static int mtu3_remove(struct platform_device *pdev)
366 {
367 	struct ssusb_mtk *ssusb = platform_get_drvdata(pdev);
368 
369 	switch (ssusb->dr_mode) {
370 	case USB_DR_MODE_PERIPHERAL:
371 		ssusb_gadget_exit(ssusb);
372 		break;
373 	case USB_DR_MODE_HOST:
374 		ssusb_host_exit(ssusb);
375 		break;
376 	case USB_DR_MODE_OTG:
377 		ssusb_otg_switch_exit(ssusb);
378 		ssusb_gadget_exit(ssusb);
379 		ssusb_host_exit(ssusb);
380 		break;
381 	default:
382 		return -EINVAL;
383 	}
384 
385 	ssusb_rscs_exit(ssusb);
386 	pm_runtime_put_sync(&pdev->dev);
387 	pm_runtime_disable(&pdev->dev);
388 	ssusb_debugfs_remove_root(ssusb);
389 
390 	return 0;
391 }
392 
393 /*
394  * when support dual-role mode, we reject suspend when
395  * it works as device mode;
396  */
397 static int __maybe_unused mtu3_suspend(struct device *dev)
398 {
399 	struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
400 
401 	dev_dbg(dev, "%s\n", __func__);
402 
403 	/* REVISIT: disconnect it for only device mode? */
404 	if (!ssusb->is_host)
405 		return 0;
406 
407 	ssusb_host_disable(ssusb, true);
408 	ssusb_phy_power_off(ssusb);
409 	clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
410 	ssusb_wakeup_set(ssusb, true);
411 
412 	return 0;
413 }
414 
415 static int __maybe_unused mtu3_resume(struct device *dev)
416 {
417 	struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
418 	int ret;
419 
420 	dev_dbg(dev, "%s\n", __func__);
421 
422 	if (!ssusb->is_host)
423 		return 0;
424 
425 	ssusb_wakeup_set(ssusb, false);
426 	ret = clk_bulk_prepare_enable(BULK_CLKS_CNT, ssusb->clks);
427 	if (ret)
428 		goto clks_err;
429 
430 	ret = ssusb_phy_power_on(ssusb);
431 	if (ret)
432 		goto phy_err;
433 
434 	ssusb_host_enable(ssusb);
435 
436 	return 0;
437 
438 phy_err:
439 	clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
440 clks_err:
441 	return ret;
442 }
443 
444 static const struct dev_pm_ops mtu3_pm_ops = {
445 	SET_SYSTEM_SLEEP_PM_OPS(mtu3_suspend, mtu3_resume)
446 };
447 
448 #define DEV_PM_OPS (IS_ENABLED(CONFIG_PM) ? &mtu3_pm_ops : NULL)
449 
450 static const struct of_device_id mtu3_of_match[] = {
451 	{.compatible = "mediatek,mt8173-mtu3",},
452 	{.compatible = "mediatek,mtu3",},
453 	{},
454 };
455 MODULE_DEVICE_TABLE(of, mtu3_of_match);
456 
457 static struct platform_driver mtu3_driver = {
458 	.probe = mtu3_probe,
459 	.remove = mtu3_remove,
460 	.driver = {
461 		.name = MTU3_DRIVER_NAME,
462 		.pm = DEV_PM_OPS,
463 		.of_match_table = mtu3_of_match,
464 	},
465 };
466 module_platform_driver(mtu3_driver);
467 
468 MODULE_AUTHOR("Chunfeng Yun <chunfeng.yun@mediatek.com>");
469 MODULE_LICENSE("GPL v2");
470 MODULE_DESCRIPTION("MediaTek USB3 DRD Controller Driver");
471