1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2016 MediaTek Inc. 4 * 5 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com> 6 */ 7 8 #include <linux/clk.h> 9 #include <linux/dma-mapping.h> 10 #include <linux/iopoll.h> 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/of_address.h> 14 #include <linux/of_irq.h> 15 #include <linux/platform_device.h> 16 17 #include "mtu3.h" 18 #include "mtu3_dr.h" 19 #include "mtu3_debug.h" 20 21 /* u2-port0 should be powered on and enabled; */ 22 int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks) 23 { 24 void __iomem *ibase = ssusb->ippc_base; 25 u32 value, check_val; 26 int ret; 27 28 check_val = ex_clks | SSUSB_SYS125_RST_B_STS | SSUSB_SYSPLL_STABLE | 29 SSUSB_REF_RST_B_STS; 30 31 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value, 32 (check_val == (value & check_val)), 100, 20000); 33 if (ret) { 34 dev_err(ssusb->dev, "clks of sts1 are not stable!\n"); 35 return ret; 36 } 37 38 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS2, value, 39 (value & SSUSB_U2_MAC_SYS_RST_B_STS), 100, 10000); 40 if (ret) { 41 dev_err(ssusb->dev, "mac2 clock is not stable\n"); 42 return ret; 43 } 44 45 return 0; 46 } 47 48 static int ssusb_phy_init(struct ssusb_mtk *ssusb) 49 { 50 int i; 51 int ret; 52 53 for (i = 0; i < ssusb->num_phys; i++) { 54 ret = phy_init(ssusb->phys[i]); 55 if (ret) 56 goto exit_phy; 57 } 58 return 0; 59 60 exit_phy: 61 for (; i > 0; i--) 62 phy_exit(ssusb->phys[i - 1]); 63 64 return ret; 65 } 66 67 static int ssusb_phy_exit(struct ssusb_mtk *ssusb) 68 { 69 int i; 70 71 for (i = 0; i < ssusb->num_phys; i++) 72 phy_exit(ssusb->phys[i]); 73 74 return 0; 75 } 76 77 static int ssusb_phy_power_on(struct ssusb_mtk *ssusb) 78 { 79 int i; 80 int ret; 81 82 for (i = 0; i < ssusb->num_phys; i++) { 83 ret = phy_power_on(ssusb->phys[i]); 84 if (ret) 85 goto power_off_phy; 86 } 87 return 0; 88 89 power_off_phy: 90 for (; i > 0; i--) 91 phy_power_off(ssusb->phys[i - 1]); 92 93 return ret; 94 } 95 96 static void ssusb_phy_power_off(struct ssusb_mtk *ssusb) 97 { 98 unsigned int i; 99 100 for (i = 0; i < ssusb->num_phys; i++) 101 phy_power_off(ssusb->phys[i]); 102 } 103 104 static int ssusb_clks_enable(struct ssusb_mtk *ssusb) 105 { 106 int ret; 107 108 ret = clk_prepare_enable(ssusb->sys_clk); 109 if (ret) { 110 dev_err(ssusb->dev, "failed to enable sys_clk\n"); 111 goto sys_clk_err; 112 } 113 114 ret = clk_prepare_enable(ssusb->ref_clk); 115 if (ret) { 116 dev_err(ssusb->dev, "failed to enable ref_clk\n"); 117 goto ref_clk_err; 118 } 119 120 ret = clk_prepare_enable(ssusb->mcu_clk); 121 if (ret) { 122 dev_err(ssusb->dev, "failed to enable mcu_clk\n"); 123 goto mcu_clk_err; 124 } 125 126 ret = clk_prepare_enable(ssusb->dma_clk); 127 if (ret) { 128 dev_err(ssusb->dev, "failed to enable dma_clk\n"); 129 goto dma_clk_err; 130 } 131 132 return 0; 133 134 dma_clk_err: 135 clk_disable_unprepare(ssusb->mcu_clk); 136 mcu_clk_err: 137 clk_disable_unprepare(ssusb->ref_clk); 138 ref_clk_err: 139 clk_disable_unprepare(ssusb->sys_clk); 140 sys_clk_err: 141 return ret; 142 } 143 144 static void ssusb_clks_disable(struct ssusb_mtk *ssusb) 145 { 146 clk_disable_unprepare(ssusb->dma_clk); 147 clk_disable_unprepare(ssusb->mcu_clk); 148 clk_disable_unprepare(ssusb->ref_clk); 149 clk_disable_unprepare(ssusb->sys_clk); 150 } 151 152 static int ssusb_rscs_init(struct ssusb_mtk *ssusb) 153 { 154 int ret = 0; 155 156 ret = regulator_enable(ssusb->vusb33); 157 if (ret) { 158 dev_err(ssusb->dev, "failed to enable vusb33\n"); 159 goto vusb33_err; 160 } 161 162 ret = ssusb_clks_enable(ssusb); 163 if (ret) 164 goto clks_err; 165 166 ret = ssusb_phy_init(ssusb); 167 if (ret) { 168 dev_err(ssusb->dev, "failed to init phy\n"); 169 goto phy_init_err; 170 } 171 172 ret = ssusb_phy_power_on(ssusb); 173 if (ret) { 174 dev_err(ssusb->dev, "failed to power on phy\n"); 175 goto phy_err; 176 } 177 178 return 0; 179 180 phy_err: 181 ssusb_phy_exit(ssusb); 182 phy_init_err: 183 ssusb_clks_disable(ssusb); 184 clks_err: 185 regulator_disable(ssusb->vusb33); 186 vusb33_err: 187 return ret; 188 } 189 190 static void ssusb_rscs_exit(struct ssusb_mtk *ssusb) 191 { 192 ssusb_clks_disable(ssusb); 193 regulator_disable(ssusb->vusb33); 194 ssusb_phy_power_off(ssusb); 195 ssusb_phy_exit(ssusb); 196 } 197 198 static void ssusb_ip_sw_reset(struct ssusb_mtk *ssusb) 199 { 200 /* reset whole ip (xhci & u3d) */ 201 mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST); 202 udelay(1); 203 mtu3_clrbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST); 204 205 /* 206 * device ip may be powered on in firmware/BROM stage before entering 207 * kernel stage; 208 * power down device ip, otherwise ip-sleep will fail when working as 209 * host only mode 210 */ 211 mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN); 212 } 213 214 static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk *ssusb) 215 { 216 struct device_node *node = pdev->dev.of_node; 217 struct otg_switch_mtk *otg_sx = &ssusb->otg_switch; 218 struct device *dev = &pdev->dev; 219 int i; 220 int ret; 221 222 ssusb->vusb33 = devm_regulator_get(dev, "vusb33"); 223 if (IS_ERR(ssusb->vusb33)) { 224 dev_err(dev, "failed to get vusb33\n"); 225 return PTR_ERR(ssusb->vusb33); 226 } 227 228 ssusb->sys_clk = devm_clk_get(dev, "sys_ck"); 229 if (IS_ERR(ssusb->sys_clk)) { 230 dev_err(dev, "failed to get sys clock\n"); 231 return PTR_ERR(ssusb->sys_clk); 232 } 233 234 ssusb->ref_clk = devm_clk_get_optional(dev, "ref_ck"); 235 if (IS_ERR(ssusb->ref_clk)) 236 return PTR_ERR(ssusb->ref_clk); 237 238 ssusb->mcu_clk = devm_clk_get_optional(dev, "mcu_ck"); 239 if (IS_ERR(ssusb->mcu_clk)) 240 return PTR_ERR(ssusb->mcu_clk); 241 242 ssusb->dma_clk = devm_clk_get_optional(dev, "dma_ck"); 243 if (IS_ERR(ssusb->dma_clk)) 244 return PTR_ERR(ssusb->dma_clk); 245 246 ssusb->num_phys = of_count_phandle_with_args(node, 247 "phys", "#phy-cells"); 248 if (ssusb->num_phys > 0) { 249 ssusb->phys = devm_kcalloc(dev, ssusb->num_phys, 250 sizeof(*ssusb->phys), GFP_KERNEL); 251 if (!ssusb->phys) 252 return -ENOMEM; 253 } else { 254 ssusb->num_phys = 0; 255 } 256 257 for (i = 0; i < ssusb->num_phys; i++) { 258 ssusb->phys[i] = devm_of_phy_get_by_index(dev, node, i); 259 if (IS_ERR(ssusb->phys[i])) { 260 dev_err(dev, "failed to get phy-%d\n", i); 261 return PTR_ERR(ssusb->phys[i]); 262 } 263 } 264 265 ssusb->ippc_base = devm_platform_ioremap_resource_byname(pdev, "ippc"); 266 if (IS_ERR(ssusb->ippc_base)) 267 return PTR_ERR(ssusb->ippc_base); 268 269 ssusb->dr_mode = usb_get_dr_mode(dev); 270 if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN) 271 ssusb->dr_mode = USB_DR_MODE_OTG; 272 273 if (ssusb->dr_mode == USB_DR_MODE_PERIPHERAL) 274 goto out; 275 276 /* if host role is supported */ 277 ret = ssusb_wakeup_of_property_parse(ssusb, node); 278 if (ret) { 279 dev_err(dev, "failed to parse uwk property\n"); 280 return ret; 281 } 282 283 /* optional property, ignore the error if it does not exist */ 284 of_property_read_u32(node, "mediatek,u3p-dis-msk", 285 &ssusb->u3p_dis_msk); 286 287 otg_sx->vbus = devm_regulator_get(dev, "vbus"); 288 if (IS_ERR(otg_sx->vbus)) { 289 dev_err(dev, "failed to get vbus\n"); 290 return PTR_ERR(otg_sx->vbus); 291 } 292 293 if (ssusb->dr_mode == USB_DR_MODE_HOST) 294 goto out; 295 296 /* if dual-role mode is supported */ 297 otg_sx->is_u3_drd = of_property_read_bool(node, "mediatek,usb3-drd"); 298 otg_sx->manual_drd_enabled = 299 of_property_read_bool(node, "enable-manual-drd"); 300 otg_sx->role_sw_used = of_property_read_bool(node, "usb-role-switch"); 301 302 if (!otg_sx->role_sw_used && of_property_read_bool(node, "extcon")) { 303 otg_sx->edev = extcon_get_edev_by_phandle(ssusb->dev, 0); 304 if (IS_ERR(otg_sx->edev)) { 305 dev_err(ssusb->dev, "couldn't get extcon device\n"); 306 return PTR_ERR(otg_sx->edev); 307 } 308 } 309 310 out: 311 dev_info(dev, "dr_mode: %d, is_u3_dr: %d, u3p_dis_msk: %x, drd: %s\n", 312 ssusb->dr_mode, otg_sx->is_u3_drd, ssusb->u3p_dis_msk, 313 otg_sx->manual_drd_enabled ? "manual" : "auto"); 314 315 return 0; 316 } 317 318 static int mtu3_probe(struct platform_device *pdev) 319 { 320 struct device_node *node = pdev->dev.of_node; 321 struct device *dev = &pdev->dev; 322 struct ssusb_mtk *ssusb; 323 int ret = -ENOMEM; 324 325 /* all elements are set to ZERO as default value */ 326 ssusb = devm_kzalloc(dev, sizeof(*ssusb), GFP_KERNEL); 327 if (!ssusb) 328 return -ENOMEM; 329 330 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); 331 if (ret) { 332 dev_err(dev, "No suitable DMA config available\n"); 333 return -ENOTSUPP; 334 } 335 336 platform_set_drvdata(pdev, ssusb); 337 ssusb->dev = dev; 338 339 ret = get_ssusb_rscs(pdev, ssusb); 340 if (ret) 341 return ret; 342 343 ssusb_debugfs_create_root(ssusb); 344 345 /* enable power domain */ 346 pm_runtime_enable(dev); 347 pm_runtime_get_sync(dev); 348 device_enable_async_suspend(dev); 349 350 ret = ssusb_rscs_init(ssusb); 351 if (ret) 352 goto comm_init_err; 353 354 ssusb_ip_sw_reset(ssusb); 355 356 if (IS_ENABLED(CONFIG_USB_MTU3_HOST)) 357 ssusb->dr_mode = USB_DR_MODE_HOST; 358 else if (IS_ENABLED(CONFIG_USB_MTU3_GADGET)) 359 ssusb->dr_mode = USB_DR_MODE_PERIPHERAL; 360 361 /* default as host */ 362 ssusb->is_host = !(ssusb->dr_mode == USB_DR_MODE_PERIPHERAL); 363 364 switch (ssusb->dr_mode) { 365 case USB_DR_MODE_PERIPHERAL: 366 ret = ssusb_gadget_init(ssusb); 367 if (ret) { 368 dev_err(dev, "failed to initialize gadget\n"); 369 goto comm_exit; 370 } 371 break; 372 case USB_DR_MODE_HOST: 373 ret = ssusb_host_init(ssusb, node); 374 if (ret) { 375 dev_err(dev, "failed to initialize host\n"); 376 goto comm_exit; 377 } 378 break; 379 case USB_DR_MODE_OTG: 380 ret = ssusb_gadget_init(ssusb); 381 if (ret) { 382 dev_err(dev, "failed to initialize gadget\n"); 383 goto comm_exit; 384 } 385 386 ret = ssusb_host_init(ssusb, node); 387 if (ret) { 388 dev_err(dev, "failed to initialize host\n"); 389 goto gadget_exit; 390 } 391 392 ret = ssusb_otg_switch_init(ssusb); 393 if (ret) { 394 dev_err(dev, "failed to initialize switch\n"); 395 goto host_exit; 396 } 397 break; 398 default: 399 dev_err(dev, "unsupported mode: %d\n", ssusb->dr_mode); 400 ret = -EINVAL; 401 goto comm_exit; 402 } 403 404 return 0; 405 406 host_exit: 407 ssusb_host_exit(ssusb); 408 gadget_exit: 409 ssusb_gadget_exit(ssusb); 410 comm_exit: 411 ssusb_rscs_exit(ssusb); 412 comm_init_err: 413 pm_runtime_put_sync(dev); 414 pm_runtime_disable(dev); 415 ssusb_debugfs_remove_root(ssusb); 416 417 return ret; 418 } 419 420 static int mtu3_remove(struct platform_device *pdev) 421 { 422 struct ssusb_mtk *ssusb = platform_get_drvdata(pdev); 423 424 switch (ssusb->dr_mode) { 425 case USB_DR_MODE_PERIPHERAL: 426 ssusb_gadget_exit(ssusb); 427 break; 428 case USB_DR_MODE_HOST: 429 ssusb_host_exit(ssusb); 430 break; 431 case USB_DR_MODE_OTG: 432 ssusb_otg_switch_exit(ssusb); 433 ssusb_gadget_exit(ssusb); 434 ssusb_host_exit(ssusb); 435 break; 436 default: 437 return -EINVAL; 438 } 439 440 ssusb_rscs_exit(ssusb); 441 pm_runtime_put_sync(&pdev->dev); 442 pm_runtime_disable(&pdev->dev); 443 ssusb_debugfs_remove_root(ssusb); 444 445 return 0; 446 } 447 448 /* 449 * when support dual-role mode, we reject suspend when 450 * it works as device mode; 451 */ 452 static int __maybe_unused mtu3_suspend(struct device *dev) 453 { 454 struct ssusb_mtk *ssusb = dev_get_drvdata(dev); 455 456 dev_dbg(dev, "%s\n", __func__); 457 458 /* REVISIT: disconnect it for only device mode? */ 459 if (!ssusb->is_host) 460 return 0; 461 462 ssusb_host_disable(ssusb, true); 463 ssusb_phy_power_off(ssusb); 464 ssusb_clks_disable(ssusb); 465 ssusb_wakeup_set(ssusb, true); 466 467 return 0; 468 } 469 470 static int __maybe_unused mtu3_resume(struct device *dev) 471 { 472 struct ssusb_mtk *ssusb = dev_get_drvdata(dev); 473 int ret; 474 475 dev_dbg(dev, "%s\n", __func__); 476 477 if (!ssusb->is_host) 478 return 0; 479 480 ssusb_wakeup_set(ssusb, false); 481 ret = ssusb_clks_enable(ssusb); 482 if (ret) 483 goto clks_err; 484 485 ret = ssusb_phy_power_on(ssusb); 486 if (ret) 487 goto phy_err; 488 489 ssusb_host_enable(ssusb); 490 491 return 0; 492 493 phy_err: 494 ssusb_clks_disable(ssusb); 495 clks_err: 496 return ret; 497 } 498 499 static const struct dev_pm_ops mtu3_pm_ops = { 500 SET_SYSTEM_SLEEP_PM_OPS(mtu3_suspend, mtu3_resume) 501 }; 502 503 #define DEV_PM_OPS (IS_ENABLED(CONFIG_PM) ? &mtu3_pm_ops : NULL) 504 505 #ifdef CONFIG_OF 506 507 static const struct of_device_id mtu3_of_match[] = { 508 {.compatible = "mediatek,mt8173-mtu3",}, 509 {.compatible = "mediatek,mtu3",}, 510 {}, 511 }; 512 513 MODULE_DEVICE_TABLE(of, mtu3_of_match); 514 515 #endif 516 517 static struct platform_driver mtu3_driver = { 518 .probe = mtu3_probe, 519 .remove = mtu3_remove, 520 .driver = { 521 .name = MTU3_DRIVER_NAME, 522 .pm = DEV_PM_OPS, 523 .of_match_table = of_match_ptr(mtu3_of_match), 524 }, 525 }; 526 module_platform_driver(mtu3_driver); 527 528 MODULE_AUTHOR("Chunfeng Yun <chunfeng.yun@mediatek.com>"); 529 MODULE_LICENSE("GPL v2"); 530 MODULE_DESCRIPTION("MediaTek USB3 DRD Controller Driver"); 531