1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2016 MediaTek Inc. 4 * 5 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com> 6 */ 7 8 #include <linux/clk.h> 9 #include <linux/dma-mapping.h> 10 #include <linux/iopoll.h> 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/of_address.h> 14 #include <linux/of_irq.h> 15 #include <linux/platform_device.h> 16 17 #include "mtu3.h" 18 #include "mtu3_dr.h" 19 20 /* u2-port0 should be powered on and enabled; */ 21 int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks) 22 { 23 void __iomem *ibase = ssusb->ippc_base; 24 u32 value, check_val; 25 int ret; 26 27 check_val = ex_clks | SSUSB_SYS125_RST_B_STS | SSUSB_SYSPLL_STABLE | 28 SSUSB_REF_RST_B_STS; 29 30 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value, 31 (check_val == (value & check_val)), 100, 20000); 32 if (ret) { 33 dev_err(ssusb->dev, "clks of sts1 are not stable!\n"); 34 return ret; 35 } 36 37 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS2, value, 38 (value & SSUSB_U2_MAC_SYS_RST_B_STS), 100, 10000); 39 if (ret) { 40 dev_err(ssusb->dev, "mac2 clock is not stable\n"); 41 return ret; 42 } 43 44 return 0; 45 } 46 47 static int ssusb_phy_init(struct ssusb_mtk *ssusb) 48 { 49 int i; 50 int ret; 51 52 for (i = 0; i < ssusb->num_phys; i++) { 53 ret = phy_init(ssusb->phys[i]); 54 if (ret) 55 goto exit_phy; 56 } 57 return 0; 58 59 exit_phy: 60 for (; i > 0; i--) 61 phy_exit(ssusb->phys[i - 1]); 62 63 return ret; 64 } 65 66 static int ssusb_phy_exit(struct ssusb_mtk *ssusb) 67 { 68 int i; 69 70 for (i = 0; i < ssusb->num_phys; i++) 71 phy_exit(ssusb->phys[i]); 72 73 return 0; 74 } 75 76 static int ssusb_phy_power_on(struct ssusb_mtk *ssusb) 77 { 78 int i; 79 int ret; 80 81 for (i = 0; i < ssusb->num_phys; i++) { 82 ret = phy_power_on(ssusb->phys[i]); 83 if (ret) 84 goto power_off_phy; 85 } 86 return 0; 87 88 power_off_phy: 89 for (; i > 0; i--) 90 phy_power_off(ssusb->phys[i - 1]); 91 92 return ret; 93 } 94 95 static void ssusb_phy_power_off(struct ssusb_mtk *ssusb) 96 { 97 unsigned int i; 98 99 for (i = 0; i < ssusb->num_phys; i++) 100 phy_power_off(ssusb->phys[i]); 101 } 102 103 static int ssusb_clks_enable(struct ssusb_mtk *ssusb) 104 { 105 int ret; 106 107 ret = clk_prepare_enable(ssusb->sys_clk); 108 if (ret) { 109 dev_err(ssusb->dev, "failed to enable sys_clk\n"); 110 goto sys_clk_err; 111 } 112 113 ret = clk_prepare_enable(ssusb->ref_clk); 114 if (ret) { 115 dev_err(ssusb->dev, "failed to enable ref_clk\n"); 116 goto ref_clk_err; 117 } 118 119 ret = clk_prepare_enable(ssusb->mcu_clk); 120 if (ret) { 121 dev_err(ssusb->dev, "failed to enable mcu_clk\n"); 122 goto mcu_clk_err; 123 } 124 125 ret = clk_prepare_enable(ssusb->dma_clk); 126 if (ret) { 127 dev_err(ssusb->dev, "failed to enable dma_clk\n"); 128 goto dma_clk_err; 129 } 130 131 return 0; 132 133 dma_clk_err: 134 clk_disable_unprepare(ssusb->mcu_clk); 135 mcu_clk_err: 136 clk_disable_unprepare(ssusb->ref_clk); 137 ref_clk_err: 138 clk_disable_unprepare(ssusb->sys_clk); 139 sys_clk_err: 140 return ret; 141 } 142 143 static void ssusb_clks_disable(struct ssusb_mtk *ssusb) 144 { 145 clk_disable_unprepare(ssusb->dma_clk); 146 clk_disable_unprepare(ssusb->mcu_clk); 147 clk_disable_unprepare(ssusb->ref_clk); 148 clk_disable_unprepare(ssusb->sys_clk); 149 } 150 151 static int ssusb_rscs_init(struct ssusb_mtk *ssusb) 152 { 153 int ret = 0; 154 155 ret = regulator_enable(ssusb->vusb33); 156 if (ret) { 157 dev_err(ssusb->dev, "failed to enable vusb33\n"); 158 goto vusb33_err; 159 } 160 161 ret = ssusb_clks_enable(ssusb); 162 if (ret) 163 goto clks_err; 164 165 ret = ssusb_phy_init(ssusb); 166 if (ret) { 167 dev_err(ssusb->dev, "failed to init phy\n"); 168 goto phy_init_err; 169 } 170 171 ret = ssusb_phy_power_on(ssusb); 172 if (ret) { 173 dev_err(ssusb->dev, "failed to power on phy\n"); 174 goto phy_err; 175 } 176 177 return 0; 178 179 phy_err: 180 ssusb_phy_exit(ssusb); 181 phy_init_err: 182 ssusb_clks_disable(ssusb); 183 clks_err: 184 regulator_disable(ssusb->vusb33); 185 vusb33_err: 186 return ret; 187 } 188 189 static void ssusb_rscs_exit(struct ssusb_mtk *ssusb) 190 { 191 ssusb_clks_disable(ssusb); 192 regulator_disable(ssusb->vusb33); 193 ssusb_phy_power_off(ssusb); 194 ssusb_phy_exit(ssusb); 195 } 196 197 static void ssusb_ip_sw_reset(struct ssusb_mtk *ssusb) 198 { 199 /* reset whole ip (xhci & u3d) */ 200 mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST); 201 udelay(1); 202 mtu3_clrbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST); 203 204 /* 205 * device ip may be powered on in firmware/BROM stage before entering 206 * kernel stage; 207 * power down device ip, otherwise ip-sleep will fail when working as 208 * host only mode 209 */ 210 mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN); 211 } 212 213 /* ignore the error if the clock does not exist */ 214 static struct clk *get_optional_clk(struct device *dev, const char *id) 215 { 216 struct clk *opt_clk; 217 218 opt_clk = devm_clk_get(dev, id); 219 /* ignore error number except EPROBE_DEFER */ 220 if (IS_ERR(opt_clk) && (PTR_ERR(opt_clk) != -EPROBE_DEFER)) 221 opt_clk = NULL; 222 223 return opt_clk; 224 } 225 226 static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk *ssusb) 227 { 228 struct device_node *node = pdev->dev.of_node; 229 struct otg_switch_mtk *otg_sx = &ssusb->otg_switch; 230 struct device *dev = &pdev->dev; 231 struct regulator *vbus; 232 struct resource *res; 233 int i; 234 int ret; 235 236 ssusb->vusb33 = devm_regulator_get(&pdev->dev, "vusb33"); 237 if (IS_ERR(ssusb->vusb33)) { 238 dev_err(dev, "failed to get vusb33\n"); 239 return PTR_ERR(ssusb->vusb33); 240 } 241 242 ssusb->sys_clk = devm_clk_get(dev, "sys_ck"); 243 if (IS_ERR(ssusb->sys_clk)) { 244 dev_err(dev, "failed to get sys clock\n"); 245 return PTR_ERR(ssusb->sys_clk); 246 } 247 248 ssusb->ref_clk = get_optional_clk(dev, "ref_ck"); 249 if (IS_ERR(ssusb->ref_clk)) 250 return PTR_ERR(ssusb->ref_clk); 251 252 ssusb->mcu_clk = get_optional_clk(dev, "mcu_ck"); 253 if (IS_ERR(ssusb->mcu_clk)) 254 return PTR_ERR(ssusb->mcu_clk); 255 256 ssusb->dma_clk = get_optional_clk(dev, "dma_ck"); 257 if (IS_ERR(ssusb->dma_clk)) 258 return PTR_ERR(ssusb->dma_clk); 259 260 ssusb->num_phys = of_count_phandle_with_args(node, 261 "phys", "#phy-cells"); 262 if (ssusb->num_phys > 0) { 263 ssusb->phys = devm_kcalloc(dev, ssusb->num_phys, 264 sizeof(*ssusb->phys), GFP_KERNEL); 265 if (!ssusb->phys) 266 return -ENOMEM; 267 } else { 268 ssusb->num_phys = 0; 269 } 270 271 for (i = 0; i < ssusb->num_phys; i++) { 272 ssusb->phys[i] = devm_of_phy_get_by_index(dev, node, i); 273 if (IS_ERR(ssusb->phys[i])) { 274 dev_err(dev, "failed to get phy-%d\n", i); 275 return PTR_ERR(ssusb->phys[i]); 276 } 277 } 278 279 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ippc"); 280 ssusb->ippc_base = devm_ioremap_resource(dev, res); 281 if (IS_ERR(ssusb->ippc_base)) 282 return PTR_ERR(ssusb->ippc_base); 283 284 ssusb->dr_mode = usb_get_dr_mode(dev); 285 if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN) 286 ssusb->dr_mode = USB_DR_MODE_OTG; 287 288 if (ssusb->dr_mode == USB_DR_MODE_PERIPHERAL) 289 return 0; 290 291 /* if host role is supported */ 292 ret = ssusb_wakeup_of_property_parse(ssusb, node); 293 if (ret) { 294 dev_err(dev, "failed to parse uwk property\n"); 295 return ret; 296 } 297 298 /* optional property, ignore the error if it does not exist */ 299 of_property_read_u32(node, "mediatek,u3p-dis-msk", 300 &ssusb->u3p_dis_msk); 301 302 vbus = devm_regulator_get(&pdev->dev, "vbus"); 303 if (IS_ERR(vbus)) { 304 dev_err(dev, "failed to get vbus\n"); 305 return PTR_ERR(vbus); 306 } 307 otg_sx->vbus = vbus; 308 309 if (ssusb->dr_mode == USB_DR_MODE_HOST) 310 return 0; 311 312 /* if dual-role mode is supported */ 313 otg_sx->is_u3_drd = of_property_read_bool(node, "mediatek,usb3-drd"); 314 otg_sx->manual_drd_enabled = 315 of_property_read_bool(node, "enable-manual-drd"); 316 317 if (of_property_read_bool(node, "extcon")) { 318 otg_sx->edev = extcon_get_edev_by_phandle(ssusb->dev, 0); 319 if (IS_ERR(otg_sx->edev)) { 320 dev_err(ssusb->dev, "couldn't get extcon device\n"); 321 return PTR_ERR(otg_sx->edev); 322 } 323 } 324 325 dev_info(dev, "dr_mode: %d, is_u3_dr: %d, u3p_dis_msk: %x, drd: %s\n", 326 ssusb->dr_mode, otg_sx->is_u3_drd, ssusb->u3p_dis_msk, 327 otg_sx->manual_drd_enabled ? "manual" : "auto"); 328 329 return 0; 330 } 331 332 static int mtu3_probe(struct platform_device *pdev) 333 { 334 struct device_node *node = pdev->dev.of_node; 335 struct device *dev = &pdev->dev; 336 struct ssusb_mtk *ssusb; 337 int ret = -ENOMEM; 338 339 /* all elements are set to ZERO as default value */ 340 ssusb = devm_kzalloc(dev, sizeof(*ssusb), GFP_KERNEL); 341 if (!ssusb) 342 return -ENOMEM; 343 344 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); 345 if (ret) { 346 dev_err(dev, "No suitable DMA config available\n"); 347 return -ENOTSUPP; 348 } 349 350 platform_set_drvdata(pdev, ssusb); 351 ssusb->dev = dev; 352 353 ret = get_ssusb_rscs(pdev, ssusb); 354 if (ret) 355 return ret; 356 357 /* enable power domain */ 358 pm_runtime_enable(dev); 359 pm_runtime_get_sync(dev); 360 device_enable_async_suspend(dev); 361 362 ret = ssusb_rscs_init(ssusb); 363 if (ret) 364 goto comm_init_err; 365 366 ssusb_ip_sw_reset(ssusb); 367 368 if (IS_ENABLED(CONFIG_USB_MTU3_HOST)) 369 ssusb->dr_mode = USB_DR_MODE_HOST; 370 else if (IS_ENABLED(CONFIG_USB_MTU3_GADGET)) 371 ssusb->dr_mode = USB_DR_MODE_PERIPHERAL; 372 373 /* default as host */ 374 ssusb->is_host = !(ssusb->dr_mode == USB_DR_MODE_PERIPHERAL); 375 376 switch (ssusb->dr_mode) { 377 case USB_DR_MODE_PERIPHERAL: 378 ret = ssusb_gadget_init(ssusb); 379 if (ret) { 380 dev_err(dev, "failed to initialize gadget\n"); 381 goto comm_exit; 382 } 383 break; 384 case USB_DR_MODE_HOST: 385 ret = ssusb_host_init(ssusb, node); 386 if (ret) { 387 dev_err(dev, "failed to initialize host\n"); 388 goto comm_exit; 389 } 390 break; 391 case USB_DR_MODE_OTG: 392 ret = ssusb_gadget_init(ssusb); 393 if (ret) { 394 dev_err(dev, "failed to initialize gadget\n"); 395 goto comm_exit; 396 } 397 398 ret = ssusb_host_init(ssusb, node); 399 if (ret) { 400 dev_err(dev, "failed to initialize host\n"); 401 goto gadget_exit; 402 } 403 404 ssusb_otg_switch_init(ssusb); 405 break; 406 default: 407 dev_err(dev, "unsupported mode: %d\n", ssusb->dr_mode); 408 ret = -EINVAL; 409 goto comm_exit; 410 } 411 412 return 0; 413 414 gadget_exit: 415 ssusb_gadget_exit(ssusb); 416 comm_exit: 417 ssusb_rscs_exit(ssusb); 418 comm_init_err: 419 pm_runtime_put_sync(dev); 420 pm_runtime_disable(dev); 421 422 return ret; 423 } 424 425 static int mtu3_remove(struct platform_device *pdev) 426 { 427 struct ssusb_mtk *ssusb = platform_get_drvdata(pdev); 428 429 switch (ssusb->dr_mode) { 430 case USB_DR_MODE_PERIPHERAL: 431 ssusb_gadget_exit(ssusb); 432 break; 433 case USB_DR_MODE_HOST: 434 ssusb_host_exit(ssusb); 435 break; 436 case USB_DR_MODE_OTG: 437 ssusb_otg_switch_exit(ssusb); 438 ssusb_gadget_exit(ssusb); 439 ssusb_host_exit(ssusb); 440 break; 441 default: 442 return -EINVAL; 443 } 444 445 ssusb_rscs_exit(ssusb); 446 pm_runtime_put_sync(&pdev->dev); 447 pm_runtime_disable(&pdev->dev); 448 449 return 0; 450 } 451 452 /* 453 * when support dual-role mode, we reject suspend when 454 * it works as device mode; 455 */ 456 static int __maybe_unused mtu3_suspend(struct device *dev) 457 { 458 struct ssusb_mtk *ssusb = dev_get_drvdata(dev); 459 460 dev_dbg(dev, "%s\n", __func__); 461 462 /* REVISIT: disconnect it for only device mode? */ 463 if (!ssusb->is_host) 464 return 0; 465 466 ssusb_host_disable(ssusb, true); 467 ssusb_phy_power_off(ssusb); 468 ssusb_clks_disable(ssusb); 469 ssusb_wakeup_set(ssusb, true); 470 471 return 0; 472 } 473 474 static int __maybe_unused mtu3_resume(struct device *dev) 475 { 476 struct ssusb_mtk *ssusb = dev_get_drvdata(dev); 477 int ret; 478 479 dev_dbg(dev, "%s\n", __func__); 480 481 if (!ssusb->is_host) 482 return 0; 483 484 ssusb_wakeup_set(ssusb, false); 485 ret = ssusb_clks_enable(ssusb); 486 if (ret) 487 goto clks_err; 488 489 ret = ssusb_phy_power_on(ssusb); 490 if (ret) 491 goto phy_err; 492 493 ssusb_host_enable(ssusb); 494 495 return 0; 496 497 phy_err: 498 ssusb_clks_disable(ssusb); 499 clks_err: 500 return ret; 501 } 502 503 static const struct dev_pm_ops mtu3_pm_ops = { 504 SET_SYSTEM_SLEEP_PM_OPS(mtu3_suspend, mtu3_resume) 505 }; 506 507 #define DEV_PM_OPS (IS_ENABLED(CONFIG_PM) ? &mtu3_pm_ops : NULL) 508 509 #ifdef CONFIG_OF 510 511 static const struct of_device_id mtu3_of_match[] = { 512 {.compatible = "mediatek,mt8173-mtu3",}, 513 {.compatible = "mediatek,mtu3",}, 514 {}, 515 }; 516 517 MODULE_DEVICE_TABLE(of, mtu3_of_match); 518 519 #endif 520 521 static struct platform_driver mtu3_driver = { 522 .probe = mtu3_probe, 523 .remove = mtu3_remove, 524 .driver = { 525 .name = MTU3_DRIVER_NAME, 526 .pm = DEV_PM_OPS, 527 .of_match_table = of_match_ptr(mtu3_of_match), 528 }, 529 }; 530 module_platform_driver(mtu3_driver); 531 532 MODULE_AUTHOR("Chunfeng Yun <chunfeng.yun@mediatek.com>"); 533 MODULE_LICENSE("GPL v2"); 534 MODULE_DESCRIPTION("MediaTek USB3 DRD Controller Driver"); 535