1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * mtu3_dr.c - dual role switch and host glue layer 4 * 5 * Copyright (C) 2016 MediaTek Inc. 6 * 7 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com> 8 */ 9 10 #include <linux/clk.h> 11 #include <linux/iopoll.h> 12 #include <linux/irq.h> 13 #include <linux/kernel.h> 14 #include <linux/mfd/syscon.h> 15 #include <linux/of_device.h> 16 #include <linux/regmap.h> 17 18 #include "mtu3.h" 19 #include "mtu3_dr.h" 20 21 #define PERI_WK_CTRL1 0x404 22 #define UWK_CTL1_IS_C(x) (((x) & 0xf) << 26) 23 #define UWK_CTL1_IS_E BIT(25) 24 #define UWK_CTL1_IDDIG_C(x) (((x) & 0xf) << 11) /* cycle debounce */ 25 #define UWK_CTL1_IDDIG_E BIT(10) /* enable debounce */ 26 #define UWK_CTL1_IDDIG_P BIT(9) /* polarity */ 27 #define UWK_CTL1_IS_P BIT(6) /* polarity for ip sleep */ 28 29 /* 30 * ip-sleep wakeup mode: 31 * all clocks can be turn off, but power domain should be kept on 32 */ 33 static void ssusb_wakeup_ip_sleep_en(struct ssusb_mtk *ssusb) 34 { 35 u32 tmp; 36 struct regmap *pericfg = ssusb->pericfg; 37 38 regmap_read(pericfg, PERI_WK_CTRL1, &tmp); 39 tmp &= ~UWK_CTL1_IS_P; 40 tmp &= ~(UWK_CTL1_IS_C(0xf)); 41 tmp |= UWK_CTL1_IS_C(0x8); 42 regmap_write(pericfg, PERI_WK_CTRL1, tmp); 43 regmap_write(pericfg, PERI_WK_CTRL1, tmp | UWK_CTL1_IS_E); 44 45 regmap_read(pericfg, PERI_WK_CTRL1, &tmp); 46 dev_dbg(ssusb->dev, "%s(): WK_CTRL1[P6,E25,C26:29]=%#x\n", 47 __func__, tmp); 48 } 49 50 static void ssusb_wakeup_ip_sleep_dis(struct ssusb_mtk *ssusb) 51 { 52 u32 tmp; 53 54 regmap_read(ssusb->pericfg, PERI_WK_CTRL1, &tmp); 55 tmp &= ~UWK_CTL1_IS_E; 56 regmap_write(ssusb->pericfg, PERI_WK_CTRL1, tmp); 57 } 58 59 int ssusb_wakeup_of_property_parse(struct ssusb_mtk *ssusb, 60 struct device_node *dn) 61 { 62 struct device *dev = ssusb->dev; 63 64 /* 65 * Wakeup function is optional, so it is not an error if this property 66 * does not exist, and in such case, no need to get relative 67 * properties anymore. 68 */ 69 ssusb->wakeup_en = of_property_read_bool(dn, "mediatek,enable-wakeup"); 70 if (!ssusb->wakeup_en) 71 return 0; 72 73 ssusb->pericfg = syscon_regmap_lookup_by_phandle(dn, 74 "mediatek,syscon-wakeup"); 75 if (IS_ERR(ssusb->pericfg)) { 76 dev_err(dev, "fail to get pericfg regs\n"); 77 return PTR_ERR(ssusb->pericfg); 78 } 79 80 return 0; 81 } 82 83 static void host_ports_num_get(struct ssusb_mtk *ssusb) 84 { 85 u32 xhci_cap; 86 87 xhci_cap = mtu3_readl(ssusb->ippc_base, U3D_SSUSB_IP_XHCI_CAP); 88 ssusb->u2_ports = SSUSB_IP_XHCI_U2_PORT_NUM(xhci_cap); 89 ssusb->u3_ports = SSUSB_IP_XHCI_U3_PORT_NUM(xhci_cap); 90 91 dev_dbg(ssusb->dev, "host - u2_ports:%d, u3_ports:%d\n", 92 ssusb->u2_ports, ssusb->u3_ports); 93 } 94 95 /* only configure ports will be used later */ 96 int ssusb_host_enable(struct ssusb_mtk *ssusb) 97 { 98 void __iomem *ibase = ssusb->ippc_base; 99 int num_u3p = ssusb->u3_ports; 100 int num_u2p = ssusb->u2_ports; 101 int u3_ports_disabed; 102 u32 check_clk; 103 u32 value; 104 int i; 105 106 /* power on host ip */ 107 mtu3_clrbits(ibase, U3D_SSUSB_IP_PW_CTRL1, SSUSB_IP_HOST_PDN); 108 109 /* power on and enable u3 ports except skipped ones */ 110 u3_ports_disabed = 0; 111 for (i = 0; i < num_u3p; i++) { 112 if ((0x1 << i) & ssusb->u3p_dis_msk) { 113 u3_ports_disabed++; 114 continue; 115 } 116 117 value = mtu3_readl(ibase, SSUSB_U3_CTRL(i)); 118 value &= ~(SSUSB_U3_PORT_PDN | SSUSB_U3_PORT_DIS); 119 value |= SSUSB_U3_PORT_HOST_SEL; 120 mtu3_writel(ibase, SSUSB_U3_CTRL(i), value); 121 } 122 123 /* power on and enable all u2 ports */ 124 for (i = 0; i < num_u2p; i++) { 125 value = mtu3_readl(ibase, SSUSB_U2_CTRL(i)); 126 value &= ~(SSUSB_U2_PORT_PDN | SSUSB_U2_PORT_DIS); 127 value |= SSUSB_U2_PORT_HOST_SEL; 128 mtu3_writel(ibase, SSUSB_U2_CTRL(i), value); 129 } 130 131 check_clk = SSUSB_XHCI_RST_B_STS; 132 if (num_u3p > u3_ports_disabed) 133 check_clk = SSUSB_U3_MAC_RST_B_STS; 134 135 return ssusb_check_clocks(ssusb, check_clk); 136 } 137 138 int ssusb_host_disable(struct ssusb_mtk *ssusb, bool suspend) 139 { 140 void __iomem *ibase = ssusb->ippc_base; 141 int num_u3p = ssusb->u3_ports; 142 int num_u2p = ssusb->u2_ports; 143 u32 value; 144 int ret; 145 int i; 146 147 /* power down and disable u3 ports except skipped ones */ 148 for (i = 0; i < num_u3p; i++) { 149 if ((0x1 << i) & ssusb->u3p_dis_msk) 150 continue; 151 152 value = mtu3_readl(ibase, SSUSB_U3_CTRL(i)); 153 value |= SSUSB_U3_PORT_PDN; 154 value |= suspend ? 0 : SSUSB_U3_PORT_DIS; 155 mtu3_writel(ibase, SSUSB_U3_CTRL(i), value); 156 } 157 158 /* power down and disable all u2 ports */ 159 for (i = 0; i < num_u2p; i++) { 160 value = mtu3_readl(ibase, SSUSB_U2_CTRL(i)); 161 value |= SSUSB_U2_PORT_PDN; 162 value |= suspend ? 0 : SSUSB_U2_PORT_DIS; 163 mtu3_writel(ibase, SSUSB_U2_CTRL(i), value); 164 } 165 166 /* power down host ip */ 167 mtu3_setbits(ibase, U3D_SSUSB_IP_PW_CTRL1, SSUSB_IP_HOST_PDN); 168 169 if (!suspend) 170 return 0; 171 172 /* wait for host ip to sleep */ 173 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value, 174 (value & SSUSB_IP_SLEEP_STS), 100, 100000); 175 if (ret) 176 dev_err(ssusb->dev, "ip sleep failed!!!\n"); 177 178 return ret; 179 } 180 181 static void ssusb_host_setup(struct ssusb_mtk *ssusb) 182 { 183 struct otg_switch_mtk *otg_sx = &ssusb->otg_switch; 184 185 host_ports_num_get(ssusb); 186 187 /* 188 * power on host and power on/enable all ports 189 * if support OTG, gadget driver will switch port0 to device mode 190 */ 191 ssusb_host_enable(ssusb); 192 193 if (otg_sx->manual_drd_enabled) 194 ssusb_set_force_mode(ssusb, MTU3_DR_FORCE_HOST); 195 196 /* if port0 supports dual-role, works as host mode by default */ 197 ssusb_set_vbus(&ssusb->otg_switch, 1); 198 } 199 200 static void ssusb_host_cleanup(struct ssusb_mtk *ssusb) 201 { 202 if (ssusb->is_host) 203 ssusb_set_vbus(&ssusb->otg_switch, 0); 204 205 ssusb_host_disable(ssusb, false); 206 } 207 208 /* 209 * If host supports multiple ports, the VBUSes(5V) of ports except port0 210 * which supports OTG are better to be enabled by default in DTS. 211 * Because the host driver will keep link with devices attached when system 212 * enters suspend mode, so no need to control VBUSes after initialization. 213 */ 214 int ssusb_host_init(struct ssusb_mtk *ssusb, struct device_node *parent_dn) 215 { 216 struct device *parent_dev = ssusb->dev; 217 int ret; 218 219 ssusb_host_setup(ssusb); 220 221 ret = of_platform_populate(parent_dn, NULL, NULL, parent_dev); 222 if (ret) { 223 dev_dbg(parent_dev, "failed to create child devices at %pOF\n", 224 parent_dn); 225 return ret; 226 } 227 228 dev_info(parent_dev, "xHCI platform device register success...\n"); 229 230 return 0; 231 } 232 233 void ssusb_host_exit(struct ssusb_mtk *ssusb) 234 { 235 of_platform_depopulate(ssusb->dev); 236 ssusb_host_cleanup(ssusb); 237 } 238 239 int ssusb_wakeup_enable(struct ssusb_mtk *ssusb) 240 { 241 if (ssusb->wakeup_en) 242 ssusb_wakeup_ip_sleep_en(ssusb); 243 244 return 0; 245 } 246 247 void ssusb_wakeup_disable(struct ssusb_mtk *ssusb) 248 { 249 if (ssusb->wakeup_en) 250 ssusb_wakeup_ip_sleep_dis(ssusb); 251 } 252