15fd54aceSGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0 2df2069acSChunfeng Yun /* 3df2069acSChunfeng Yun * mtu3.h - MediaTek USB3 DRD header 4df2069acSChunfeng Yun * 5df2069acSChunfeng Yun * Copyright (C) 2016 MediaTek Inc. 6df2069acSChunfeng Yun * 7df2069acSChunfeng Yun * Author: Chunfeng Yun <chunfeng.yun@mediatek.com> 8df2069acSChunfeng Yun */ 9df2069acSChunfeng Yun 10df2069acSChunfeng Yun #ifndef __MTU3_H__ 11df2069acSChunfeng Yun #define __MTU3_H__ 12df2069acSChunfeng Yun 13df2069acSChunfeng Yun #include <linux/device.h> 14df2069acSChunfeng Yun #include <linux/dmapool.h> 15d0ed062aSChunfeng Yun #include <linux/extcon.h> 16df2069acSChunfeng Yun #include <linux/interrupt.h> 17df2069acSChunfeng Yun #include <linux/list.h> 18df2069acSChunfeng Yun #include <linux/phy/phy.h> 19df2069acSChunfeng Yun #include <linux/regulator/consumer.h> 20df2069acSChunfeng Yun #include <linux/usb.h> 21df2069acSChunfeng Yun #include <linux/usb/ch9.h> 22df2069acSChunfeng Yun #include <linux/usb/gadget.h> 23df2069acSChunfeng Yun #include <linux/usb/otg.h> 24df2069acSChunfeng Yun 25df2069acSChunfeng Yun struct mtu3; 26df2069acSChunfeng Yun struct mtu3_ep; 27df2069acSChunfeng Yun struct mtu3_request; 28df2069acSChunfeng Yun 29df2069acSChunfeng Yun #include "mtu3_hw_regs.h" 30df2069acSChunfeng Yun #include "mtu3_qmu.h" 31df2069acSChunfeng Yun 32df2069acSChunfeng Yun #define MU3D_EP_TXCR0(epnum) (U3D_TX1CSR0 + (((epnum) - 1) * 0x10)) 33df2069acSChunfeng Yun #define MU3D_EP_TXCR1(epnum) (U3D_TX1CSR1 + (((epnum) - 1) * 0x10)) 34df2069acSChunfeng Yun #define MU3D_EP_TXCR2(epnum) (U3D_TX1CSR2 + (((epnum) - 1) * 0x10)) 35df2069acSChunfeng Yun 36df2069acSChunfeng Yun #define MU3D_EP_RXCR0(epnum) (U3D_RX1CSR0 + (((epnum) - 1) * 0x10)) 37df2069acSChunfeng Yun #define MU3D_EP_RXCR1(epnum) (U3D_RX1CSR1 + (((epnum) - 1) * 0x10)) 38df2069acSChunfeng Yun #define MU3D_EP_RXCR2(epnum) (U3D_RX1CSR2 + (((epnum) - 1) * 0x10)) 39df2069acSChunfeng Yun 401a46dfeaSChunfeng Yun #define USB_QMU_TQHIAR(epnum) (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4)) 411a46dfeaSChunfeng Yun #define USB_QMU_RQHIAR(epnum) (U3D_RXQHIAR1 + (((epnum) - 1) * 0x4)) 421a46dfeaSChunfeng Yun 43df2069acSChunfeng Yun #define USB_QMU_RQCSR(epnum) (U3D_RXQCSR1 + (((epnum) - 1) * 0x10)) 44df2069acSChunfeng Yun #define USB_QMU_RQSAR(epnum) (U3D_RXQSAR1 + (((epnum) - 1) * 0x10)) 45df2069acSChunfeng Yun #define USB_QMU_RQCPR(epnum) (U3D_RXQCPR1 + (((epnum) - 1) * 0x10)) 46df2069acSChunfeng Yun 47df2069acSChunfeng Yun #define USB_QMU_TQCSR(epnum) (U3D_TXQCSR1 + (((epnum) - 1) * 0x10)) 48df2069acSChunfeng Yun #define USB_QMU_TQSAR(epnum) (U3D_TXQSAR1 + (((epnum) - 1) * 0x10)) 49df2069acSChunfeng Yun #define USB_QMU_TQCPR(epnum) (U3D_TXQCPR1 + (((epnum) - 1) * 0x10)) 50df2069acSChunfeng Yun 51a29de31bSChunfeng Yun #define SSUSB_U3_CTRL(p) (U3D_SSUSB_U3_CTRL_0P + ((p) * 0x08)) 52df2069acSChunfeng Yun #define SSUSB_U2_CTRL(p) (U3D_SSUSB_U2_CTRL_0P + ((p) * 0x08)) 53df2069acSChunfeng Yun 54df2069acSChunfeng Yun #define MTU3_DRIVER_NAME "mtu3" 55df2069acSChunfeng Yun #define DMA_ADDR_INVALID (~(dma_addr_t)0) 56df2069acSChunfeng Yun 57df2069acSChunfeng Yun #define MTU3_EP_ENABLED BIT(0) 58df2069acSChunfeng Yun #define MTU3_EP_STALL BIT(1) 59df2069acSChunfeng Yun #define MTU3_EP_WEDGE BIT(2) 60df2069acSChunfeng Yun #define MTU3_EP_BUSY BIT(3) 61df2069acSChunfeng Yun 62a29de31bSChunfeng Yun #define MTU3_U3_IP_SLOT_DEFAULT 2 63df2069acSChunfeng Yun #define MTU3_U2_IP_SLOT_DEFAULT 1 64df2069acSChunfeng Yun 65df2069acSChunfeng Yun /** 66df2069acSChunfeng Yun * Normally the device works on HS or SS, to simplify fifo management, 67df2069acSChunfeng Yun * devide fifo into some 512B parts, use bitmap to manage it; And 68df2069acSChunfeng Yun * 128 bits size of bitmap is large enough, that means it can manage 69df2069acSChunfeng Yun * up to 64KB fifo size. 70df2069acSChunfeng Yun * NOTE: MTU3_EP_FIFO_UNIT should be power of two 71df2069acSChunfeng Yun */ 72df2069acSChunfeng Yun #define MTU3_EP_FIFO_UNIT (1 << 9) 73df2069acSChunfeng Yun #define MTU3_FIFO_BIT_SIZE 128 74df2069acSChunfeng Yun #define MTU3_U2_IP_EP0_FIFO_SIZE 64 75df2069acSChunfeng Yun 76df2069acSChunfeng Yun /** 77df2069acSChunfeng Yun * Maximum size of ep0 response buffer for ch9 requests, 78df2069acSChunfeng Yun * the SET_SEL request uses 6 so far, and GET_STATUS is 2 79df2069acSChunfeng Yun */ 80df2069acSChunfeng Yun #define EP0_RESPONSE_BUF 6 81df2069acSChunfeng Yun 82df2069acSChunfeng Yun /* device operated link and speed got from DEVICE_CONF register */ 83df2069acSChunfeng Yun enum mtu3_speed { 84df2069acSChunfeng Yun MTU3_SPEED_INACTIVE = 0, 85df2069acSChunfeng Yun MTU3_SPEED_FULL = 1, 86df2069acSChunfeng Yun MTU3_SPEED_HIGH = 3, 87a29de31bSChunfeng Yun MTU3_SPEED_SUPER = 4, 884d79e042SChunfeng Yun MTU3_SPEED_SUPER_PLUS = 5, 89df2069acSChunfeng Yun }; 90df2069acSChunfeng Yun 91df2069acSChunfeng Yun /** 92df2069acSChunfeng Yun * @MU3D_EP0_STATE_SETUP: waits for SETUP or received a SETUP 93df2069acSChunfeng Yun * without data stage. 94df2069acSChunfeng Yun * @MU3D_EP0_STATE_TX: IN data stage 95df2069acSChunfeng Yun * @MU3D_EP0_STATE_RX: OUT data stage 96df2069acSChunfeng Yun * @MU3D_EP0_STATE_TX_END: the last IN data is transferred, and 97df2069acSChunfeng Yun * waits for its completion interrupt 98df2069acSChunfeng Yun * @MU3D_EP0_STATE_STALL: ep0 is in stall status, will be auto-cleared 99df2069acSChunfeng Yun * after receives a SETUP. 100df2069acSChunfeng Yun */ 101df2069acSChunfeng Yun enum mtu3_g_ep0_state { 102df2069acSChunfeng Yun MU3D_EP0_STATE_SETUP = 1, 103df2069acSChunfeng Yun MU3D_EP0_STATE_TX, 104df2069acSChunfeng Yun MU3D_EP0_STATE_RX, 105df2069acSChunfeng Yun MU3D_EP0_STATE_TX_END, 106df2069acSChunfeng Yun MU3D_EP0_STATE_STALL, 107df2069acSChunfeng Yun }; 108df2069acSChunfeng Yun 109df2069acSChunfeng Yun /** 110c776f2c3SChunfeng Yun * MTU3_DR_FORCE_NONE: automatically switch host and periperal mode 111c776f2c3SChunfeng Yun * by IDPIN signal. 112c776f2c3SChunfeng Yun * MTU3_DR_FORCE_HOST: force to enter host mode and override OTG 113c776f2c3SChunfeng Yun * IDPIN signal. 114c776f2c3SChunfeng Yun * MTU3_DR_FORCE_DEVICE: force to enter peripheral mode. 115c776f2c3SChunfeng Yun */ 116c776f2c3SChunfeng Yun enum mtu3_dr_force_mode { 117c776f2c3SChunfeng Yun MTU3_DR_FORCE_NONE = 0, 118c776f2c3SChunfeng Yun MTU3_DR_FORCE_HOST, 119c776f2c3SChunfeng Yun MTU3_DR_FORCE_DEVICE, 120c776f2c3SChunfeng Yun }; 121c776f2c3SChunfeng Yun 122c776f2c3SChunfeng Yun /** 123df2069acSChunfeng Yun * @base: the base address of fifo 124df2069acSChunfeng Yun * @limit: the bitmap size in bits 125df2069acSChunfeng Yun * @bitmap: fifo bitmap in unit of @MTU3_EP_FIFO_UNIT 126df2069acSChunfeng Yun */ 127df2069acSChunfeng Yun struct mtu3_fifo_info { 128df2069acSChunfeng Yun u32 base; 129df2069acSChunfeng Yun u32 limit; 130df2069acSChunfeng Yun DECLARE_BITMAP(bitmap, MTU3_FIFO_BIT_SIZE); 131df2069acSChunfeng Yun }; 132df2069acSChunfeng Yun 133df2069acSChunfeng Yun /** 134df2069acSChunfeng Yun * General Purpose Descriptor (GPD): 135df2069acSChunfeng Yun * The format of TX GPD is a little different from RX one. 136df2069acSChunfeng Yun * And the size of GPD is 16 bytes. 137df2069acSChunfeng Yun * 138df2069acSChunfeng Yun * @flag: 139df2069acSChunfeng Yun * bit0: Hardware Own (HWO) 140df2069acSChunfeng Yun * bit1: Buffer Descriptor Present (BDP), always 0, BD is not supported 141df2069acSChunfeng Yun * bit2: Bypass (BPS), 1: HW skips this GPD if HWO = 1 142df2069acSChunfeng Yun * bit7: Interrupt On Completion (IOC) 143df2069acSChunfeng Yun * @chksum: This is used to validate the contents of this GPD; 144df2069acSChunfeng Yun * If TXQ_CS_EN / RXQ_CS_EN bit is set, an interrupt is issued 145df2069acSChunfeng Yun * when checksum validation fails; 146df2069acSChunfeng Yun * Checksum value is calculated over the 16 bytes of the GPD by default; 147df2069acSChunfeng Yun * @data_buf_len (RX ONLY): This value indicates the length of 148df2069acSChunfeng Yun * the assigned data buffer 1491a46dfeaSChunfeng Yun * @tx_ext_addr (TX ONLY): [3:0] are 4 extension bits of @buffer, 1501a46dfeaSChunfeng Yun * [7:4] are 4 extension bits of @next_gpd 151df2069acSChunfeng Yun * @next_gpd: Physical address of the next GPD 152df2069acSChunfeng Yun * @buffer: Physical address of the data buffer 153df2069acSChunfeng Yun * @buf_len: 154df2069acSChunfeng Yun * (TX): This value indicates the length of the assigned data buffer 155df2069acSChunfeng Yun * (RX): The total length of data received 156df2069acSChunfeng Yun * @ext_len: reserved 1571a46dfeaSChunfeng Yun * @rx_ext_addr(RX ONLY): [3:0] are 4 extension bits of @buffer, 1581a46dfeaSChunfeng Yun * [7:4] are 4 extension bits of @next_gpd 159df2069acSChunfeng Yun * @ext_flag: 160df2069acSChunfeng Yun * bit5 (TX ONLY): Zero Length Packet (ZLP), 161df2069acSChunfeng Yun */ 162df2069acSChunfeng Yun struct qmu_gpd { 163df2069acSChunfeng Yun __u8 flag; 164df2069acSChunfeng Yun __u8 chksum; 1651a46dfeaSChunfeng Yun union { 166df2069acSChunfeng Yun __le16 data_buf_len; 1671a46dfeaSChunfeng Yun __le16 tx_ext_addr; 1681a46dfeaSChunfeng Yun }; 169df2069acSChunfeng Yun __le32 next_gpd; 170df2069acSChunfeng Yun __le32 buffer; 171df2069acSChunfeng Yun __le16 buf_len; 1721a46dfeaSChunfeng Yun union { 173df2069acSChunfeng Yun __u8 ext_len; 1741a46dfeaSChunfeng Yun __u8 rx_ext_addr; 1751a46dfeaSChunfeng Yun }; 176df2069acSChunfeng Yun __u8 ext_flag; 177df2069acSChunfeng Yun } __packed; 178df2069acSChunfeng Yun 179df2069acSChunfeng Yun /** 180df2069acSChunfeng Yun * dma: physical base address of GPD segment 181df2069acSChunfeng Yun * start: virtual base address of GPD segment 182df2069acSChunfeng Yun * end: the last GPD element 183df2069acSChunfeng Yun * enqueue: the first empty GPD to use 184df2069acSChunfeng Yun * dequeue: the first completed GPD serviced by ISR 185df2069acSChunfeng Yun * NOTE: the size of GPD ring should be >= 2 186df2069acSChunfeng Yun */ 187df2069acSChunfeng Yun struct mtu3_gpd_ring { 188df2069acSChunfeng Yun dma_addr_t dma; 189df2069acSChunfeng Yun struct qmu_gpd *start; 190df2069acSChunfeng Yun struct qmu_gpd *end; 191df2069acSChunfeng Yun struct qmu_gpd *enqueue; 192df2069acSChunfeng Yun struct qmu_gpd *dequeue; 193df2069acSChunfeng Yun }; 194d0ed062aSChunfeng Yun 195d0ed062aSChunfeng Yun /** 196d0ed062aSChunfeng Yun * @vbus: vbus 5V used by host mode 197d0ed062aSChunfeng Yun * @edev: external connector used to detect vbus and iddig changes 198d0ed062aSChunfeng Yun * @vbus_nb: notifier for vbus detection 199d0ed062aSChunfeng Yun * @vbus_nb: notifier for iddig(idpin) detection 200d0ed062aSChunfeng Yun * @extcon_reg_dwork: delay work for extcon notifier register, waiting for 201d0ed062aSChunfeng Yun * xHCI driver initialization, it's necessary for system bootup 202d0ed062aSChunfeng Yun * as device. 203d0ed062aSChunfeng Yun * @is_u3_drd: whether port0 supports usb3.0 dual-role device or not 204d0ed062aSChunfeng Yun * @manual_drd_enabled: it's true when supports dual-role device by debugfs 205d0ed062aSChunfeng Yun * to switch host/device modes depending on user input. 206d0ed062aSChunfeng Yun */ 207d0ed062aSChunfeng Yun struct otg_switch_mtk { 208d0ed062aSChunfeng Yun struct regulator *vbus; 209d0ed062aSChunfeng Yun struct extcon_dev *edev; 210d0ed062aSChunfeng Yun struct notifier_block vbus_nb; 211d0ed062aSChunfeng Yun struct notifier_block id_nb; 212d0ed062aSChunfeng Yun struct delayed_work extcon_reg_dwork; 213d0ed062aSChunfeng Yun bool is_u3_drd; 214d0ed062aSChunfeng Yun bool manual_drd_enabled; 215d0ed062aSChunfeng Yun }; 216d0ed062aSChunfeng Yun 217b3f4e727SChunfeng Yun /** 218b3f4e727SChunfeng Yun * @mac_base: register base address of device MAC, exclude xHCI's 219d0ed062aSChunfeng Yun * @ippc_base: register base address of IP Power and Clock interface (IPPC) 220b3f4e727SChunfeng Yun * @vusb33: usb3.3V shared by device/host IP 221b3f4e727SChunfeng Yun * @sys_clk: system clock of mtu3, shared by device/host IP 222a316da82SChunfeng Yun * @ref_clk: reference clock 223a316da82SChunfeng Yun * @mcu_clk: mcu_bus_ck clock for AHB bus etc 224a316da82SChunfeng Yun * @dma_clk: dma_bus_ck clock for AXI bus etc 225b3f4e727SChunfeng Yun * @dr_mode: works in which mode: 226b3f4e727SChunfeng Yun * host only, device only or dual-role mode 227b3f4e727SChunfeng Yun * @u2_ports: number of usb2.0 host ports 228b3f4e727SChunfeng Yun * @u3_ports: number of usb3.0 host ports 229076f1a89SChunfeng Yun * @u3p_dis_msk: mask of disabling usb3 ports, for example, bit0==1 to 230076f1a89SChunfeng Yun * disable u3port0, bit1==1 to disable u3port1,... etc 231d0ed062aSChunfeng Yun * @dbgfs_root: only used when supports manual dual-role switch via debugfs 232f0ede2c6SChunfeng Yun * @uwk_en: it's true when supports remote wakeup in host mode 233f0ede2c6SChunfeng Yun * @uwk: syscon including usb wakeup glue layer between SSUSB IP and SPM 234f0ede2c6SChunfeng Yun * @uwk_reg_base: the base address of the wakeup glue layer in @uwk 235f0ede2c6SChunfeng Yun * @uwk_vers: the version of the wakeup glue layer 236b3f4e727SChunfeng Yun */ 237b3f4e727SChunfeng Yun struct ssusb_mtk { 238b3f4e727SChunfeng Yun struct device *dev; 239b3f4e727SChunfeng Yun struct mtu3 *u3d; 240b3f4e727SChunfeng Yun void __iomem *mac_base; 241b3f4e727SChunfeng Yun void __iomem *ippc_base; 242b3f4e727SChunfeng Yun struct phy **phys; 243b3f4e727SChunfeng Yun int num_phys; 244b3f4e727SChunfeng Yun /* common power & clock */ 245b3f4e727SChunfeng Yun struct regulator *vusb33; 246b3f4e727SChunfeng Yun struct clk *sys_clk; 2474d70d0c6SChunfeng Yun struct clk *ref_clk; 248a316da82SChunfeng Yun struct clk *mcu_clk; 249a316da82SChunfeng Yun struct clk *dma_clk; 250b3f4e727SChunfeng Yun /* otg */ 251d0ed062aSChunfeng Yun struct otg_switch_mtk otg_switch; 252b3f4e727SChunfeng Yun enum usb_dr_mode dr_mode; 253b3f4e727SChunfeng Yun bool is_host; 254b3f4e727SChunfeng Yun int u2_ports; 255b3f4e727SChunfeng Yun int u3_ports; 256076f1a89SChunfeng Yun int u3p_dis_msk; 257d0ed062aSChunfeng Yun struct dentry *dbgfs_root; 258b3f4e727SChunfeng Yun /* usb wakeup for host mode */ 259f0ede2c6SChunfeng Yun bool uwk_en; 260f0ede2c6SChunfeng Yun struct regmap *uwk; 261f0ede2c6SChunfeng Yun u32 uwk_reg_base; 262f0ede2c6SChunfeng Yun u32 uwk_vers; 263b3f4e727SChunfeng Yun }; 264df2069acSChunfeng Yun 265df2069acSChunfeng Yun /** 266df2069acSChunfeng Yun * @fifo_size: it is (@slot + 1) * @fifo_seg_size 267df2069acSChunfeng Yun * @fifo_seg_size: it is roundup_pow_of_two(@maxp) 268df2069acSChunfeng Yun */ 269df2069acSChunfeng Yun struct mtu3_ep { 270df2069acSChunfeng Yun struct usb_ep ep; 271df2069acSChunfeng Yun char name[12]; 272df2069acSChunfeng Yun struct mtu3 *mtu; 273df2069acSChunfeng Yun u8 epnum; 274df2069acSChunfeng Yun u8 type; 275df2069acSChunfeng Yun u8 is_in; 276df2069acSChunfeng Yun u16 maxp; 277df2069acSChunfeng Yun int slot; 278df2069acSChunfeng Yun u32 fifo_size; 279df2069acSChunfeng Yun u32 fifo_addr; 280df2069acSChunfeng Yun u32 fifo_seg_size; 281df2069acSChunfeng Yun struct mtu3_fifo_info *fifo; 282df2069acSChunfeng Yun 283df2069acSChunfeng Yun struct list_head req_list; 284df2069acSChunfeng Yun struct mtu3_gpd_ring gpd_ring; 285a29de31bSChunfeng Yun const struct usb_ss_ep_comp_descriptor *comp_desc; 286df2069acSChunfeng Yun const struct usb_endpoint_descriptor *desc; 287df2069acSChunfeng Yun 288df2069acSChunfeng Yun int flags; 289df2069acSChunfeng Yun u8 wedged; 290df2069acSChunfeng Yun u8 busy; 291df2069acSChunfeng Yun }; 292df2069acSChunfeng Yun 293df2069acSChunfeng Yun struct mtu3_request { 294df2069acSChunfeng Yun struct usb_request request; 295df2069acSChunfeng Yun struct list_head list; 296df2069acSChunfeng Yun struct mtu3_ep *mep; 297df2069acSChunfeng Yun struct mtu3 *mtu; 298df2069acSChunfeng Yun struct qmu_gpd *gpd; 299df2069acSChunfeng Yun int epnum; 300df2069acSChunfeng Yun }; 301df2069acSChunfeng Yun 302b3f4e727SChunfeng Yun static inline struct ssusb_mtk *dev_to_ssusb(struct device *dev) 303b3f4e727SChunfeng Yun { 304b3f4e727SChunfeng Yun return dev_get_drvdata(dev); 305b3f4e727SChunfeng Yun } 306b3f4e727SChunfeng Yun 307df2069acSChunfeng Yun /** 308df2069acSChunfeng Yun * struct mtu3 - device driver instance data. 309a29de31bSChunfeng Yun * @slot: MTU3_U2_IP_SLOT_DEFAULT for U2 IP only, 310a29de31bSChunfeng Yun * MTU3_U3_IP_SLOT_DEFAULT for U3 IP 311df2069acSChunfeng Yun * @may_wakeup: means device's remote wakeup is enabled 312df2069acSChunfeng Yun * @is_self_powered: is reported in device status and the config descriptor 313fe7c994aSChunfeng Yun * @delayed_status: true when function drivers ask for delayed status 314df2069acSChunfeng Yun * @ep0_req: dummy request used while handling standard USB requests 315df2069acSChunfeng Yun * for GET_STATUS and SET_SEL 316df2069acSChunfeng Yun * @setup_buf: ep0 response buffer for GET_STATUS and SET_SEL requests 317df2069acSChunfeng Yun */ 318df2069acSChunfeng Yun struct mtu3 { 319df2069acSChunfeng Yun spinlock_t lock; 320b3f4e727SChunfeng Yun struct ssusb_mtk *ssusb; 321df2069acSChunfeng Yun struct device *dev; 322df2069acSChunfeng Yun void __iomem *mac_base; 323df2069acSChunfeng Yun void __iomem *ippc_base; 324df2069acSChunfeng Yun int irq; 325df2069acSChunfeng Yun 326df2069acSChunfeng Yun struct mtu3_fifo_info tx_fifo; 327df2069acSChunfeng Yun struct mtu3_fifo_info rx_fifo; 328df2069acSChunfeng Yun 329df2069acSChunfeng Yun struct mtu3_ep *ep_array; 330df2069acSChunfeng Yun struct mtu3_ep *in_eps; 331df2069acSChunfeng Yun struct mtu3_ep *out_eps; 332df2069acSChunfeng Yun struct mtu3_ep *ep0; 333df2069acSChunfeng Yun int num_eps; 334df2069acSChunfeng Yun int slot; 335df2069acSChunfeng Yun int active_ep; 336df2069acSChunfeng Yun 337df2069acSChunfeng Yun struct dma_pool *qmu_gpd_pool; 338df2069acSChunfeng Yun enum mtu3_g_ep0_state ep0_state; 339df2069acSChunfeng Yun struct usb_gadget g; /* the gadget */ 340df2069acSChunfeng Yun struct usb_gadget_driver *gadget_driver; 341df2069acSChunfeng Yun struct mtu3_request ep0_req; 342df2069acSChunfeng Yun u8 setup_buf[EP0_RESPONSE_BUF]; 343a29de31bSChunfeng Yun u32 max_speed; 344df2069acSChunfeng Yun 345df2069acSChunfeng Yun unsigned is_active:1; 346df2069acSChunfeng Yun unsigned may_wakeup:1; 347df2069acSChunfeng Yun unsigned is_self_powered:1; 348df2069acSChunfeng Yun unsigned test_mode:1; 349df2069acSChunfeng Yun unsigned softconnect:1; 350a29de31bSChunfeng Yun unsigned u1_enable:1; 351a29de31bSChunfeng Yun unsigned u2_enable:1; 352a29de31bSChunfeng Yun unsigned is_u3_ip:1; 353fe7c994aSChunfeng Yun unsigned delayed_status:1; 354df2069acSChunfeng Yun 355df2069acSChunfeng Yun u8 address; 356df2069acSChunfeng Yun u8 test_mode_nr; 357df2069acSChunfeng Yun u32 hw_version; 358df2069acSChunfeng Yun }; 359df2069acSChunfeng Yun 360df2069acSChunfeng Yun static inline struct mtu3 *gadget_to_mtu3(struct usb_gadget *g) 361df2069acSChunfeng Yun { 362df2069acSChunfeng Yun return container_of(g, struct mtu3, g); 363df2069acSChunfeng Yun } 364df2069acSChunfeng Yun 365df2069acSChunfeng Yun static inline int is_first_entry(const struct list_head *list, 366df2069acSChunfeng Yun const struct list_head *head) 367df2069acSChunfeng Yun { 368df2069acSChunfeng Yun return list_is_last(head, list); 369df2069acSChunfeng Yun } 370df2069acSChunfeng Yun 371df2069acSChunfeng Yun static inline struct mtu3_request *to_mtu3_request(struct usb_request *req) 372df2069acSChunfeng Yun { 373df2069acSChunfeng Yun return req ? container_of(req, struct mtu3_request, request) : NULL; 374df2069acSChunfeng Yun } 375df2069acSChunfeng Yun 376df2069acSChunfeng Yun static inline struct mtu3_ep *to_mtu3_ep(struct usb_ep *ep) 377df2069acSChunfeng Yun { 378df2069acSChunfeng Yun return ep ? container_of(ep, struct mtu3_ep, ep) : NULL; 379df2069acSChunfeng Yun } 380df2069acSChunfeng Yun 381df2069acSChunfeng Yun static inline struct mtu3_request *next_request(struct mtu3_ep *mep) 382df2069acSChunfeng Yun { 3839b4632efSMasahiro Yamada return list_first_entry_or_null(&mep->req_list, struct mtu3_request, 3849b4632efSMasahiro Yamada list); 385df2069acSChunfeng Yun } 386df2069acSChunfeng Yun 387df2069acSChunfeng Yun static inline void mtu3_writel(void __iomem *base, u32 offset, u32 data) 388df2069acSChunfeng Yun { 389df2069acSChunfeng Yun writel(data, base + offset); 390df2069acSChunfeng Yun } 391df2069acSChunfeng Yun 392df2069acSChunfeng Yun static inline u32 mtu3_readl(void __iomem *base, u32 offset) 393df2069acSChunfeng Yun { 394df2069acSChunfeng Yun return readl(base + offset); 395df2069acSChunfeng Yun } 396df2069acSChunfeng Yun 397df2069acSChunfeng Yun static inline void mtu3_setbits(void __iomem *base, u32 offset, u32 bits) 398df2069acSChunfeng Yun { 399df2069acSChunfeng Yun void __iomem *addr = base + offset; 400df2069acSChunfeng Yun u32 tmp = readl(addr); 401df2069acSChunfeng Yun 402df2069acSChunfeng Yun writel((tmp | (bits)), addr); 403df2069acSChunfeng Yun } 404df2069acSChunfeng Yun 405df2069acSChunfeng Yun static inline void mtu3_clrbits(void __iomem *base, u32 offset, u32 bits) 406df2069acSChunfeng Yun { 407df2069acSChunfeng Yun void __iomem *addr = base + offset; 408df2069acSChunfeng Yun u32 tmp = readl(addr); 409df2069acSChunfeng Yun 410df2069acSChunfeng Yun writel((tmp & ~(bits)), addr); 411df2069acSChunfeng Yun } 412df2069acSChunfeng Yun 413b3f4e727SChunfeng Yun int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks); 414df2069acSChunfeng Yun struct usb_request *mtu3_alloc_request(struct usb_ep *ep, gfp_t gfp_flags); 415df2069acSChunfeng Yun void mtu3_free_request(struct usb_ep *ep, struct usb_request *req); 416df2069acSChunfeng Yun void mtu3_req_complete(struct mtu3_ep *mep, 417df2069acSChunfeng Yun struct usb_request *req, int status); 418df2069acSChunfeng Yun 419df2069acSChunfeng Yun int mtu3_config_ep(struct mtu3 *mtu, struct mtu3_ep *mep, 420df2069acSChunfeng Yun int interval, int burst, int mult); 421df2069acSChunfeng Yun void mtu3_deconfig_ep(struct mtu3 *mtu, struct mtu3_ep *mep); 422df2069acSChunfeng Yun void mtu3_ep_stall_set(struct mtu3_ep *mep, bool set); 423df2069acSChunfeng Yun void mtu3_ep0_setup(struct mtu3 *mtu); 424df2069acSChunfeng Yun void mtu3_start(struct mtu3 *mtu); 425df2069acSChunfeng Yun void mtu3_stop(struct mtu3 *mtu); 426a29de31bSChunfeng Yun void mtu3_dev_on_off(struct mtu3 *mtu, int is_on); 427df2069acSChunfeng Yun 428df2069acSChunfeng Yun int mtu3_gadget_setup(struct mtu3 *mtu); 429df2069acSChunfeng Yun void mtu3_gadget_cleanup(struct mtu3 *mtu); 430df2069acSChunfeng Yun void mtu3_gadget_reset(struct mtu3 *mtu); 431df2069acSChunfeng Yun void mtu3_gadget_suspend(struct mtu3 *mtu); 432df2069acSChunfeng Yun void mtu3_gadget_resume(struct mtu3 *mtu); 433df2069acSChunfeng Yun void mtu3_gadget_disconnect(struct mtu3 *mtu); 434df2069acSChunfeng Yun 435df2069acSChunfeng Yun irqreturn_t mtu3_ep0_isr(struct mtu3 *mtu); 436df2069acSChunfeng Yun extern const struct usb_ep_ops mtu3_ep0_ops; 437df2069acSChunfeng Yun 438df2069acSChunfeng Yun #endif 439