1df2069acSChunfeng Yun /* 2df2069acSChunfeng Yun * mtu3.h - MediaTek USB3 DRD header 3df2069acSChunfeng Yun * 4df2069acSChunfeng Yun * Copyright (C) 2016 MediaTek Inc. 5df2069acSChunfeng Yun * 6df2069acSChunfeng Yun * Author: Chunfeng Yun <chunfeng.yun@mediatek.com> 7df2069acSChunfeng Yun * 8df2069acSChunfeng Yun * This software is licensed under the terms of the GNU General Public 9df2069acSChunfeng Yun * License version 2, as published by the Free Software Foundation, and 10df2069acSChunfeng Yun * may be copied, distributed, and modified under those terms. 11df2069acSChunfeng Yun * 12df2069acSChunfeng Yun * This program is distributed in the hope that it will be useful, 13df2069acSChunfeng Yun * but WITHOUT ANY WARRANTY; without even the implied warranty of 14df2069acSChunfeng Yun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15df2069acSChunfeng Yun * GNU General Public License for more details. 16df2069acSChunfeng Yun * 17df2069acSChunfeng Yun */ 18df2069acSChunfeng Yun 19df2069acSChunfeng Yun #ifndef __MTU3_H__ 20df2069acSChunfeng Yun #define __MTU3_H__ 21df2069acSChunfeng Yun 22df2069acSChunfeng Yun #include <linux/device.h> 23df2069acSChunfeng Yun #include <linux/dmapool.h> 24d0ed062aSChunfeng Yun #include <linux/extcon.h> 25df2069acSChunfeng Yun #include <linux/interrupt.h> 26df2069acSChunfeng Yun #include <linux/list.h> 27df2069acSChunfeng Yun #include <linux/phy/phy.h> 28df2069acSChunfeng Yun #include <linux/regulator/consumer.h> 29df2069acSChunfeng Yun #include <linux/usb.h> 30df2069acSChunfeng Yun #include <linux/usb/ch9.h> 31df2069acSChunfeng Yun #include <linux/usb/gadget.h> 32df2069acSChunfeng Yun #include <linux/usb/otg.h> 33df2069acSChunfeng Yun 34df2069acSChunfeng Yun struct mtu3; 35df2069acSChunfeng Yun struct mtu3_ep; 36df2069acSChunfeng Yun struct mtu3_request; 37df2069acSChunfeng Yun 38df2069acSChunfeng Yun #include "mtu3_hw_regs.h" 39df2069acSChunfeng Yun #include "mtu3_qmu.h" 40df2069acSChunfeng Yun 41df2069acSChunfeng Yun #define MU3D_EP_TXCR0(epnum) (U3D_TX1CSR0 + (((epnum) - 1) * 0x10)) 42df2069acSChunfeng Yun #define MU3D_EP_TXCR1(epnum) (U3D_TX1CSR1 + (((epnum) - 1) * 0x10)) 43df2069acSChunfeng Yun #define MU3D_EP_TXCR2(epnum) (U3D_TX1CSR2 + (((epnum) - 1) * 0x10)) 44df2069acSChunfeng Yun 45df2069acSChunfeng Yun #define MU3D_EP_RXCR0(epnum) (U3D_RX1CSR0 + (((epnum) - 1) * 0x10)) 46df2069acSChunfeng Yun #define MU3D_EP_RXCR1(epnum) (U3D_RX1CSR1 + (((epnum) - 1) * 0x10)) 47df2069acSChunfeng Yun #define MU3D_EP_RXCR2(epnum) (U3D_RX1CSR2 + (((epnum) - 1) * 0x10)) 48df2069acSChunfeng Yun 491a46dfeaSChunfeng Yun #define USB_QMU_TQHIAR(epnum) (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4)) 501a46dfeaSChunfeng Yun #define USB_QMU_RQHIAR(epnum) (U3D_RXQHIAR1 + (((epnum) - 1) * 0x4)) 511a46dfeaSChunfeng Yun 52df2069acSChunfeng Yun #define USB_QMU_RQCSR(epnum) (U3D_RXQCSR1 + (((epnum) - 1) * 0x10)) 53df2069acSChunfeng Yun #define USB_QMU_RQSAR(epnum) (U3D_RXQSAR1 + (((epnum) - 1) * 0x10)) 54df2069acSChunfeng Yun #define USB_QMU_RQCPR(epnum) (U3D_RXQCPR1 + (((epnum) - 1) * 0x10)) 55df2069acSChunfeng Yun 56df2069acSChunfeng Yun #define USB_QMU_TQCSR(epnum) (U3D_TXQCSR1 + (((epnum) - 1) * 0x10)) 57df2069acSChunfeng Yun #define USB_QMU_TQSAR(epnum) (U3D_TXQSAR1 + (((epnum) - 1) * 0x10)) 58df2069acSChunfeng Yun #define USB_QMU_TQCPR(epnum) (U3D_TXQCPR1 + (((epnum) - 1) * 0x10)) 59df2069acSChunfeng Yun 60a29de31bSChunfeng Yun #define SSUSB_U3_CTRL(p) (U3D_SSUSB_U3_CTRL_0P + ((p) * 0x08)) 61df2069acSChunfeng Yun #define SSUSB_U2_CTRL(p) (U3D_SSUSB_U2_CTRL_0P + ((p) * 0x08)) 62df2069acSChunfeng Yun 63df2069acSChunfeng Yun #define MTU3_DRIVER_NAME "mtu3" 64df2069acSChunfeng Yun #define DMA_ADDR_INVALID (~(dma_addr_t)0) 65df2069acSChunfeng Yun 66df2069acSChunfeng Yun #define MTU3_EP_ENABLED BIT(0) 67df2069acSChunfeng Yun #define MTU3_EP_STALL BIT(1) 68df2069acSChunfeng Yun #define MTU3_EP_WEDGE BIT(2) 69df2069acSChunfeng Yun #define MTU3_EP_BUSY BIT(3) 70df2069acSChunfeng Yun 71a29de31bSChunfeng Yun #define MTU3_U3_IP_SLOT_DEFAULT 2 72df2069acSChunfeng Yun #define MTU3_U2_IP_SLOT_DEFAULT 1 73df2069acSChunfeng Yun 74df2069acSChunfeng Yun /** 75df2069acSChunfeng Yun * Normally the device works on HS or SS, to simplify fifo management, 76df2069acSChunfeng Yun * devide fifo into some 512B parts, use bitmap to manage it; And 77df2069acSChunfeng Yun * 128 bits size of bitmap is large enough, that means it can manage 78df2069acSChunfeng Yun * up to 64KB fifo size. 79df2069acSChunfeng Yun * NOTE: MTU3_EP_FIFO_UNIT should be power of two 80df2069acSChunfeng Yun */ 81df2069acSChunfeng Yun #define MTU3_EP_FIFO_UNIT (1 << 9) 82df2069acSChunfeng Yun #define MTU3_FIFO_BIT_SIZE 128 83df2069acSChunfeng Yun #define MTU3_U2_IP_EP0_FIFO_SIZE 64 84df2069acSChunfeng Yun 85df2069acSChunfeng Yun /** 86df2069acSChunfeng Yun * Maximum size of ep0 response buffer for ch9 requests, 87df2069acSChunfeng Yun * the SET_SEL request uses 6 so far, and GET_STATUS is 2 88df2069acSChunfeng Yun */ 89df2069acSChunfeng Yun #define EP0_RESPONSE_BUF 6 90df2069acSChunfeng Yun 91df2069acSChunfeng Yun /* device operated link and speed got from DEVICE_CONF register */ 92df2069acSChunfeng Yun enum mtu3_speed { 93df2069acSChunfeng Yun MTU3_SPEED_INACTIVE = 0, 94df2069acSChunfeng Yun MTU3_SPEED_FULL = 1, 95df2069acSChunfeng Yun MTU3_SPEED_HIGH = 3, 96a29de31bSChunfeng Yun MTU3_SPEED_SUPER = 4, 97df2069acSChunfeng Yun }; 98df2069acSChunfeng Yun 99df2069acSChunfeng Yun /** 100df2069acSChunfeng Yun * @MU3D_EP0_STATE_SETUP: waits for SETUP or received a SETUP 101df2069acSChunfeng Yun * without data stage. 102df2069acSChunfeng Yun * @MU3D_EP0_STATE_TX: IN data stage 103df2069acSChunfeng Yun * @MU3D_EP0_STATE_RX: OUT data stage 104df2069acSChunfeng Yun * @MU3D_EP0_STATE_TX_END: the last IN data is transferred, and 105df2069acSChunfeng Yun * waits for its completion interrupt 106df2069acSChunfeng Yun * @MU3D_EP0_STATE_STALL: ep0 is in stall status, will be auto-cleared 107df2069acSChunfeng Yun * after receives a SETUP. 108df2069acSChunfeng Yun */ 109df2069acSChunfeng Yun enum mtu3_g_ep0_state { 110df2069acSChunfeng Yun MU3D_EP0_STATE_SETUP = 1, 111df2069acSChunfeng Yun MU3D_EP0_STATE_TX, 112df2069acSChunfeng Yun MU3D_EP0_STATE_RX, 113df2069acSChunfeng Yun MU3D_EP0_STATE_TX_END, 114df2069acSChunfeng Yun MU3D_EP0_STATE_STALL, 115df2069acSChunfeng Yun }; 116df2069acSChunfeng Yun 117df2069acSChunfeng Yun /** 118c776f2c3SChunfeng Yun * MTU3_DR_FORCE_NONE: automatically switch host and periperal mode 119c776f2c3SChunfeng Yun * by IDPIN signal. 120c776f2c3SChunfeng Yun * MTU3_DR_FORCE_HOST: force to enter host mode and override OTG 121c776f2c3SChunfeng Yun * IDPIN signal. 122c776f2c3SChunfeng Yun * MTU3_DR_FORCE_DEVICE: force to enter peripheral mode. 123c776f2c3SChunfeng Yun */ 124c776f2c3SChunfeng Yun enum mtu3_dr_force_mode { 125c776f2c3SChunfeng Yun MTU3_DR_FORCE_NONE = 0, 126c776f2c3SChunfeng Yun MTU3_DR_FORCE_HOST, 127c776f2c3SChunfeng Yun MTU3_DR_FORCE_DEVICE, 128c776f2c3SChunfeng Yun }; 129c776f2c3SChunfeng Yun 130c776f2c3SChunfeng Yun /** 131df2069acSChunfeng Yun * @base: the base address of fifo 132df2069acSChunfeng Yun * @limit: the bitmap size in bits 133df2069acSChunfeng Yun * @bitmap: fifo bitmap in unit of @MTU3_EP_FIFO_UNIT 134df2069acSChunfeng Yun */ 135df2069acSChunfeng Yun struct mtu3_fifo_info { 136df2069acSChunfeng Yun u32 base; 137df2069acSChunfeng Yun u32 limit; 138df2069acSChunfeng Yun DECLARE_BITMAP(bitmap, MTU3_FIFO_BIT_SIZE); 139df2069acSChunfeng Yun }; 140df2069acSChunfeng Yun 141df2069acSChunfeng Yun /** 142df2069acSChunfeng Yun * General Purpose Descriptor (GPD): 143df2069acSChunfeng Yun * The format of TX GPD is a little different from RX one. 144df2069acSChunfeng Yun * And the size of GPD is 16 bytes. 145df2069acSChunfeng Yun * 146df2069acSChunfeng Yun * @flag: 147df2069acSChunfeng Yun * bit0: Hardware Own (HWO) 148df2069acSChunfeng Yun * bit1: Buffer Descriptor Present (BDP), always 0, BD is not supported 149df2069acSChunfeng Yun * bit2: Bypass (BPS), 1: HW skips this GPD if HWO = 1 150df2069acSChunfeng Yun * bit7: Interrupt On Completion (IOC) 151df2069acSChunfeng Yun * @chksum: This is used to validate the contents of this GPD; 152df2069acSChunfeng Yun * If TXQ_CS_EN / RXQ_CS_EN bit is set, an interrupt is issued 153df2069acSChunfeng Yun * when checksum validation fails; 154df2069acSChunfeng Yun * Checksum value is calculated over the 16 bytes of the GPD by default; 155df2069acSChunfeng Yun * @data_buf_len (RX ONLY): This value indicates the length of 156df2069acSChunfeng Yun * the assigned data buffer 1571a46dfeaSChunfeng Yun * @tx_ext_addr (TX ONLY): [3:0] are 4 extension bits of @buffer, 1581a46dfeaSChunfeng Yun * [7:4] are 4 extension bits of @next_gpd 159df2069acSChunfeng Yun * @next_gpd: Physical address of the next GPD 160df2069acSChunfeng Yun * @buffer: Physical address of the data buffer 161df2069acSChunfeng Yun * @buf_len: 162df2069acSChunfeng Yun * (TX): This value indicates the length of the assigned data buffer 163df2069acSChunfeng Yun * (RX): The total length of data received 164df2069acSChunfeng Yun * @ext_len: reserved 1651a46dfeaSChunfeng Yun * @rx_ext_addr(RX ONLY): [3:0] are 4 extension bits of @buffer, 1661a46dfeaSChunfeng Yun * [7:4] are 4 extension bits of @next_gpd 167df2069acSChunfeng Yun * @ext_flag: 168df2069acSChunfeng Yun * bit5 (TX ONLY): Zero Length Packet (ZLP), 169df2069acSChunfeng Yun */ 170df2069acSChunfeng Yun struct qmu_gpd { 171df2069acSChunfeng Yun __u8 flag; 172df2069acSChunfeng Yun __u8 chksum; 1731a46dfeaSChunfeng Yun union { 174df2069acSChunfeng Yun __le16 data_buf_len; 1751a46dfeaSChunfeng Yun __le16 tx_ext_addr; 1761a46dfeaSChunfeng Yun }; 177df2069acSChunfeng Yun __le32 next_gpd; 178df2069acSChunfeng Yun __le32 buffer; 179df2069acSChunfeng Yun __le16 buf_len; 1801a46dfeaSChunfeng Yun union { 181df2069acSChunfeng Yun __u8 ext_len; 1821a46dfeaSChunfeng Yun __u8 rx_ext_addr; 1831a46dfeaSChunfeng Yun }; 184df2069acSChunfeng Yun __u8 ext_flag; 185df2069acSChunfeng Yun } __packed; 186df2069acSChunfeng Yun 187df2069acSChunfeng Yun /** 188df2069acSChunfeng Yun * dma: physical base address of GPD segment 189df2069acSChunfeng Yun * start: virtual base address of GPD segment 190df2069acSChunfeng Yun * end: the last GPD element 191df2069acSChunfeng Yun * enqueue: the first empty GPD to use 192df2069acSChunfeng Yun * dequeue: the first completed GPD serviced by ISR 193df2069acSChunfeng Yun * NOTE: the size of GPD ring should be >= 2 194df2069acSChunfeng Yun */ 195df2069acSChunfeng Yun struct mtu3_gpd_ring { 196df2069acSChunfeng Yun dma_addr_t dma; 197df2069acSChunfeng Yun struct qmu_gpd *start; 198df2069acSChunfeng Yun struct qmu_gpd *end; 199df2069acSChunfeng Yun struct qmu_gpd *enqueue; 200df2069acSChunfeng Yun struct qmu_gpd *dequeue; 201df2069acSChunfeng Yun }; 202d0ed062aSChunfeng Yun 203d0ed062aSChunfeng Yun /** 204d0ed062aSChunfeng Yun * @vbus: vbus 5V used by host mode 205d0ed062aSChunfeng Yun * @edev: external connector used to detect vbus and iddig changes 206d0ed062aSChunfeng Yun * @vbus_nb: notifier for vbus detection 207d0ed062aSChunfeng Yun * @vbus_nb: notifier for iddig(idpin) detection 208d0ed062aSChunfeng Yun * @extcon_reg_dwork: delay work for extcon notifier register, waiting for 209d0ed062aSChunfeng Yun * xHCI driver initialization, it's necessary for system bootup 210d0ed062aSChunfeng Yun * as device. 211d0ed062aSChunfeng Yun * @is_u3_drd: whether port0 supports usb3.0 dual-role device or not 212d0ed062aSChunfeng Yun * @manual_drd_enabled: it's true when supports dual-role device by debugfs 213d0ed062aSChunfeng Yun * to switch host/device modes depending on user input. 214d0ed062aSChunfeng Yun */ 215d0ed062aSChunfeng Yun struct otg_switch_mtk { 216d0ed062aSChunfeng Yun struct regulator *vbus; 217d0ed062aSChunfeng Yun struct extcon_dev *edev; 218d0ed062aSChunfeng Yun struct notifier_block vbus_nb; 219d0ed062aSChunfeng Yun struct notifier_block id_nb; 220d0ed062aSChunfeng Yun struct delayed_work extcon_reg_dwork; 221d0ed062aSChunfeng Yun bool is_u3_drd; 222d0ed062aSChunfeng Yun bool manual_drd_enabled; 223d0ed062aSChunfeng Yun }; 224d0ed062aSChunfeng Yun 225b3f4e727SChunfeng Yun /** 226b3f4e727SChunfeng Yun * @mac_base: register base address of device MAC, exclude xHCI's 227d0ed062aSChunfeng Yun * @ippc_base: register base address of IP Power and Clock interface (IPPC) 228b3f4e727SChunfeng Yun * @vusb33: usb3.3V shared by device/host IP 229b3f4e727SChunfeng Yun * @sys_clk: system clock of mtu3, shared by device/host IP 230a316da82SChunfeng Yun * @ref_clk: reference clock 231a316da82SChunfeng Yun * @mcu_clk: mcu_bus_ck clock for AHB bus etc 232a316da82SChunfeng Yun * @dma_clk: dma_bus_ck clock for AXI bus etc 233b3f4e727SChunfeng Yun * @dr_mode: works in which mode: 234b3f4e727SChunfeng Yun * host only, device only or dual-role mode 235b3f4e727SChunfeng Yun * @u2_ports: number of usb2.0 host ports 236b3f4e727SChunfeng Yun * @u3_ports: number of usb3.0 host ports 237076f1a89SChunfeng Yun * @u3p_dis_msk: mask of disabling usb3 ports, for example, bit0==1 to 238076f1a89SChunfeng Yun * disable u3port0, bit1==1 to disable u3port1,... etc 239d0ed062aSChunfeng Yun * @dbgfs_root: only used when supports manual dual-role switch via debugfs 240b3f4e727SChunfeng Yun * @wakeup_en: it's true when supports remote wakeup in host mode 241b3f4e727SChunfeng Yun */ 242b3f4e727SChunfeng Yun struct ssusb_mtk { 243b3f4e727SChunfeng Yun struct device *dev; 244b3f4e727SChunfeng Yun struct mtu3 *u3d; 245b3f4e727SChunfeng Yun void __iomem *mac_base; 246b3f4e727SChunfeng Yun void __iomem *ippc_base; 247b3f4e727SChunfeng Yun struct phy **phys; 248b3f4e727SChunfeng Yun int num_phys; 249b3f4e727SChunfeng Yun /* common power & clock */ 250b3f4e727SChunfeng Yun struct regulator *vusb33; 251b3f4e727SChunfeng Yun struct clk *sys_clk; 2524d70d0c6SChunfeng Yun struct clk *ref_clk; 253a316da82SChunfeng Yun struct clk *mcu_clk; 254a316da82SChunfeng Yun struct clk *dma_clk; 255b3f4e727SChunfeng Yun /* otg */ 256d0ed062aSChunfeng Yun struct otg_switch_mtk otg_switch; 257b3f4e727SChunfeng Yun enum usb_dr_mode dr_mode; 258b3f4e727SChunfeng Yun bool is_host; 259b3f4e727SChunfeng Yun int u2_ports; 260b3f4e727SChunfeng Yun int u3_ports; 261076f1a89SChunfeng Yun int u3p_dis_msk; 262d0ed062aSChunfeng Yun struct dentry *dbgfs_root; 263b3f4e727SChunfeng Yun /* usb wakeup for host mode */ 264b3f4e727SChunfeng Yun bool wakeup_en; 265b3f4e727SChunfeng Yun struct regmap *pericfg; 266b3f4e727SChunfeng Yun }; 267df2069acSChunfeng Yun 268df2069acSChunfeng Yun /** 269df2069acSChunfeng Yun * @fifo_size: it is (@slot + 1) * @fifo_seg_size 270df2069acSChunfeng Yun * @fifo_seg_size: it is roundup_pow_of_two(@maxp) 271df2069acSChunfeng Yun */ 272df2069acSChunfeng Yun struct mtu3_ep { 273df2069acSChunfeng Yun struct usb_ep ep; 274df2069acSChunfeng Yun char name[12]; 275df2069acSChunfeng Yun struct mtu3 *mtu; 276df2069acSChunfeng Yun u8 epnum; 277df2069acSChunfeng Yun u8 type; 278df2069acSChunfeng Yun u8 is_in; 279df2069acSChunfeng Yun u16 maxp; 280df2069acSChunfeng Yun int slot; 281df2069acSChunfeng Yun u32 fifo_size; 282df2069acSChunfeng Yun u32 fifo_addr; 283df2069acSChunfeng Yun u32 fifo_seg_size; 284df2069acSChunfeng Yun struct mtu3_fifo_info *fifo; 285df2069acSChunfeng Yun 286df2069acSChunfeng Yun struct list_head req_list; 287df2069acSChunfeng Yun struct mtu3_gpd_ring gpd_ring; 288a29de31bSChunfeng Yun const struct usb_ss_ep_comp_descriptor *comp_desc; 289df2069acSChunfeng Yun const struct usb_endpoint_descriptor *desc; 290df2069acSChunfeng Yun 291df2069acSChunfeng Yun int flags; 292df2069acSChunfeng Yun u8 wedged; 293df2069acSChunfeng Yun u8 busy; 294df2069acSChunfeng Yun }; 295df2069acSChunfeng Yun 296df2069acSChunfeng Yun struct mtu3_request { 297df2069acSChunfeng Yun struct usb_request request; 298df2069acSChunfeng Yun struct list_head list; 299df2069acSChunfeng Yun struct mtu3_ep *mep; 300df2069acSChunfeng Yun struct mtu3 *mtu; 301df2069acSChunfeng Yun struct qmu_gpd *gpd; 302df2069acSChunfeng Yun int epnum; 303df2069acSChunfeng Yun }; 304df2069acSChunfeng Yun 305b3f4e727SChunfeng Yun static inline struct ssusb_mtk *dev_to_ssusb(struct device *dev) 306b3f4e727SChunfeng Yun { 307b3f4e727SChunfeng Yun return dev_get_drvdata(dev); 308b3f4e727SChunfeng Yun } 309b3f4e727SChunfeng Yun 310df2069acSChunfeng Yun /** 311df2069acSChunfeng Yun * struct mtu3 - device driver instance data. 312a29de31bSChunfeng Yun * @slot: MTU3_U2_IP_SLOT_DEFAULT for U2 IP only, 313a29de31bSChunfeng Yun * MTU3_U3_IP_SLOT_DEFAULT for U3 IP 314df2069acSChunfeng Yun * @may_wakeup: means device's remote wakeup is enabled 315df2069acSChunfeng Yun * @is_self_powered: is reported in device status and the config descriptor 316fe7c994aSChunfeng Yun * @delayed_status: true when function drivers ask for delayed status 317df2069acSChunfeng Yun * @ep0_req: dummy request used while handling standard USB requests 318df2069acSChunfeng Yun * for GET_STATUS and SET_SEL 319df2069acSChunfeng Yun * @setup_buf: ep0 response buffer for GET_STATUS and SET_SEL requests 320df2069acSChunfeng Yun */ 321df2069acSChunfeng Yun struct mtu3 { 322df2069acSChunfeng Yun spinlock_t lock; 323b3f4e727SChunfeng Yun struct ssusb_mtk *ssusb; 324df2069acSChunfeng Yun struct device *dev; 325df2069acSChunfeng Yun void __iomem *mac_base; 326df2069acSChunfeng Yun void __iomem *ippc_base; 327df2069acSChunfeng Yun int irq; 328df2069acSChunfeng Yun 329df2069acSChunfeng Yun struct mtu3_fifo_info tx_fifo; 330df2069acSChunfeng Yun struct mtu3_fifo_info rx_fifo; 331df2069acSChunfeng Yun 332df2069acSChunfeng Yun struct mtu3_ep *ep_array; 333df2069acSChunfeng Yun struct mtu3_ep *in_eps; 334df2069acSChunfeng Yun struct mtu3_ep *out_eps; 335df2069acSChunfeng Yun struct mtu3_ep *ep0; 336df2069acSChunfeng Yun int num_eps; 337df2069acSChunfeng Yun int slot; 338df2069acSChunfeng Yun int active_ep; 339df2069acSChunfeng Yun 340df2069acSChunfeng Yun struct dma_pool *qmu_gpd_pool; 341df2069acSChunfeng Yun enum mtu3_g_ep0_state ep0_state; 342df2069acSChunfeng Yun struct usb_gadget g; /* the gadget */ 343df2069acSChunfeng Yun struct usb_gadget_driver *gadget_driver; 344df2069acSChunfeng Yun struct mtu3_request ep0_req; 345df2069acSChunfeng Yun u8 setup_buf[EP0_RESPONSE_BUF]; 346a29de31bSChunfeng Yun u32 max_speed; 347df2069acSChunfeng Yun 348df2069acSChunfeng Yun unsigned is_active:1; 349df2069acSChunfeng Yun unsigned may_wakeup:1; 350df2069acSChunfeng Yun unsigned is_self_powered:1; 351df2069acSChunfeng Yun unsigned test_mode:1; 352df2069acSChunfeng Yun unsigned softconnect:1; 353a29de31bSChunfeng Yun unsigned u1_enable:1; 354a29de31bSChunfeng Yun unsigned u2_enable:1; 355a29de31bSChunfeng Yun unsigned is_u3_ip:1; 356fe7c994aSChunfeng Yun unsigned delayed_status:1; 357df2069acSChunfeng Yun 358df2069acSChunfeng Yun u8 address; 359df2069acSChunfeng Yun u8 test_mode_nr; 360df2069acSChunfeng Yun u32 hw_version; 361df2069acSChunfeng Yun }; 362df2069acSChunfeng Yun 363df2069acSChunfeng Yun static inline struct mtu3 *gadget_to_mtu3(struct usb_gadget *g) 364df2069acSChunfeng Yun { 365df2069acSChunfeng Yun return container_of(g, struct mtu3, g); 366df2069acSChunfeng Yun } 367df2069acSChunfeng Yun 368df2069acSChunfeng Yun static inline int is_first_entry(const struct list_head *list, 369df2069acSChunfeng Yun const struct list_head *head) 370df2069acSChunfeng Yun { 371df2069acSChunfeng Yun return list_is_last(head, list); 372df2069acSChunfeng Yun } 373df2069acSChunfeng Yun 374df2069acSChunfeng Yun static inline struct mtu3_request *to_mtu3_request(struct usb_request *req) 375df2069acSChunfeng Yun { 376df2069acSChunfeng Yun return req ? container_of(req, struct mtu3_request, request) : NULL; 377df2069acSChunfeng Yun } 378df2069acSChunfeng Yun 379df2069acSChunfeng Yun static inline struct mtu3_ep *to_mtu3_ep(struct usb_ep *ep) 380df2069acSChunfeng Yun { 381df2069acSChunfeng Yun return ep ? container_of(ep, struct mtu3_ep, ep) : NULL; 382df2069acSChunfeng Yun } 383df2069acSChunfeng Yun 384df2069acSChunfeng Yun static inline struct mtu3_request *next_request(struct mtu3_ep *mep) 385df2069acSChunfeng Yun { 3869b4632efSMasahiro Yamada return list_first_entry_or_null(&mep->req_list, struct mtu3_request, 3879b4632efSMasahiro Yamada list); 388df2069acSChunfeng Yun } 389df2069acSChunfeng Yun 390df2069acSChunfeng Yun static inline void mtu3_writel(void __iomem *base, u32 offset, u32 data) 391df2069acSChunfeng Yun { 392df2069acSChunfeng Yun writel(data, base + offset); 393df2069acSChunfeng Yun } 394df2069acSChunfeng Yun 395df2069acSChunfeng Yun static inline u32 mtu3_readl(void __iomem *base, u32 offset) 396df2069acSChunfeng Yun { 397df2069acSChunfeng Yun return readl(base + offset); 398df2069acSChunfeng Yun } 399df2069acSChunfeng Yun 400df2069acSChunfeng Yun static inline void mtu3_setbits(void __iomem *base, u32 offset, u32 bits) 401df2069acSChunfeng Yun { 402df2069acSChunfeng Yun void __iomem *addr = base + offset; 403df2069acSChunfeng Yun u32 tmp = readl(addr); 404df2069acSChunfeng Yun 405df2069acSChunfeng Yun writel((tmp | (bits)), addr); 406df2069acSChunfeng Yun } 407df2069acSChunfeng Yun 408df2069acSChunfeng Yun static inline void mtu3_clrbits(void __iomem *base, u32 offset, u32 bits) 409df2069acSChunfeng Yun { 410df2069acSChunfeng Yun void __iomem *addr = base + offset; 411df2069acSChunfeng Yun u32 tmp = readl(addr); 412df2069acSChunfeng Yun 413df2069acSChunfeng Yun writel((tmp & ~(bits)), addr); 414df2069acSChunfeng Yun } 415df2069acSChunfeng Yun 416b3f4e727SChunfeng Yun int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks); 417df2069acSChunfeng Yun struct usb_request *mtu3_alloc_request(struct usb_ep *ep, gfp_t gfp_flags); 418df2069acSChunfeng Yun void mtu3_free_request(struct usb_ep *ep, struct usb_request *req); 419df2069acSChunfeng Yun void mtu3_req_complete(struct mtu3_ep *mep, 420df2069acSChunfeng Yun struct usb_request *req, int status); 421df2069acSChunfeng Yun 422df2069acSChunfeng Yun int mtu3_config_ep(struct mtu3 *mtu, struct mtu3_ep *mep, 423df2069acSChunfeng Yun int interval, int burst, int mult); 424df2069acSChunfeng Yun void mtu3_deconfig_ep(struct mtu3 *mtu, struct mtu3_ep *mep); 425df2069acSChunfeng Yun void mtu3_ep_stall_set(struct mtu3_ep *mep, bool set); 426df2069acSChunfeng Yun void mtu3_ep0_setup(struct mtu3 *mtu); 427df2069acSChunfeng Yun void mtu3_start(struct mtu3 *mtu); 428df2069acSChunfeng Yun void mtu3_stop(struct mtu3 *mtu); 429a29de31bSChunfeng Yun void mtu3_dev_on_off(struct mtu3 *mtu, int is_on); 430df2069acSChunfeng Yun 431df2069acSChunfeng Yun int mtu3_gadget_setup(struct mtu3 *mtu); 432df2069acSChunfeng Yun void mtu3_gadget_cleanup(struct mtu3 *mtu); 433df2069acSChunfeng Yun void mtu3_gadget_reset(struct mtu3 *mtu); 434df2069acSChunfeng Yun void mtu3_gadget_suspend(struct mtu3 *mtu); 435df2069acSChunfeng Yun void mtu3_gadget_resume(struct mtu3 *mtu); 436df2069acSChunfeng Yun void mtu3_gadget_disconnect(struct mtu3 *mtu); 437df2069acSChunfeng Yun 438df2069acSChunfeng Yun irqreturn_t mtu3_ep0_isr(struct mtu3 *mtu); 439df2069acSChunfeng Yun extern const struct usb_ep_ops mtu3_ep0_ops; 440df2069acSChunfeng Yun 441df2069acSChunfeng Yun #endif 442