14d49d352SNishad Kamdar /* SPDX-License-Identifier: GPL-2.0 */ 2df2069acSChunfeng Yun /* 3df2069acSChunfeng Yun * mtu3.h - MediaTek USB3 DRD header 4df2069acSChunfeng Yun * 5df2069acSChunfeng Yun * Copyright (C) 2016 MediaTek Inc. 6df2069acSChunfeng Yun * 7df2069acSChunfeng Yun * Author: Chunfeng Yun <chunfeng.yun@mediatek.com> 8df2069acSChunfeng Yun */ 9df2069acSChunfeng Yun 10df2069acSChunfeng Yun #ifndef __MTU3_H__ 11df2069acSChunfeng Yun #define __MTU3_H__ 12df2069acSChunfeng Yun 13cd59ea91SChunfeng Yun #include <linux/clk.h> 14df2069acSChunfeng Yun #include <linux/device.h> 15df2069acSChunfeng Yun #include <linux/dmapool.h> 16d0ed062aSChunfeng Yun #include <linux/extcon.h> 17df2069acSChunfeng Yun #include <linux/interrupt.h> 18df2069acSChunfeng Yun #include <linux/list.h> 19df2069acSChunfeng Yun #include <linux/phy/phy.h> 20df2069acSChunfeng Yun #include <linux/regulator/consumer.h> 21df2069acSChunfeng Yun #include <linux/usb.h> 22df2069acSChunfeng Yun #include <linux/usb/ch9.h> 23df2069acSChunfeng Yun #include <linux/usb/gadget.h> 24df2069acSChunfeng Yun #include <linux/usb/otg.h> 2518cfd7b8SChunfeng Yun #include <linux/usb/role.h> 26df2069acSChunfeng Yun 27df2069acSChunfeng Yun struct mtu3; 28df2069acSChunfeng Yun struct mtu3_ep; 29df2069acSChunfeng Yun struct mtu3_request; 30df2069acSChunfeng Yun 31df2069acSChunfeng Yun #include "mtu3_hw_regs.h" 32df2069acSChunfeng Yun #include "mtu3_qmu.h" 33df2069acSChunfeng Yun 34df2069acSChunfeng Yun #define MU3D_EP_TXCR0(epnum) (U3D_TX1CSR0 + (((epnum) - 1) * 0x10)) 35df2069acSChunfeng Yun #define MU3D_EP_TXCR1(epnum) (U3D_TX1CSR1 + (((epnum) - 1) * 0x10)) 36df2069acSChunfeng Yun #define MU3D_EP_TXCR2(epnum) (U3D_TX1CSR2 + (((epnum) - 1) * 0x10)) 37df2069acSChunfeng Yun 38df2069acSChunfeng Yun #define MU3D_EP_RXCR0(epnum) (U3D_RX1CSR0 + (((epnum) - 1) * 0x10)) 39df2069acSChunfeng Yun #define MU3D_EP_RXCR1(epnum) (U3D_RX1CSR1 + (((epnum) - 1) * 0x10)) 40df2069acSChunfeng Yun #define MU3D_EP_RXCR2(epnum) (U3D_RX1CSR2 + (((epnum) - 1) * 0x10)) 41df2069acSChunfeng Yun 421a46dfeaSChunfeng Yun #define USB_QMU_TQHIAR(epnum) (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4)) 431a46dfeaSChunfeng Yun #define USB_QMU_RQHIAR(epnum) (U3D_RXQHIAR1 + (((epnum) - 1) * 0x4)) 441a46dfeaSChunfeng Yun 45df2069acSChunfeng Yun #define USB_QMU_RQCSR(epnum) (U3D_RXQCSR1 + (((epnum) - 1) * 0x10)) 46df2069acSChunfeng Yun #define USB_QMU_RQSAR(epnum) (U3D_RXQSAR1 + (((epnum) - 1) * 0x10)) 47df2069acSChunfeng Yun #define USB_QMU_RQCPR(epnum) (U3D_RXQCPR1 + (((epnum) - 1) * 0x10)) 48df2069acSChunfeng Yun 49df2069acSChunfeng Yun #define USB_QMU_TQCSR(epnum) (U3D_TXQCSR1 + (((epnum) - 1) * 0x10)) 50df2069acSChunfeng Yun #define USB_QMU_TQSAR(epnum) (U3D_TXQSAR1 + (((epnum) - 1) * 0x10)) 51df2069acSChunfeng Yun #define USB_QMU_TQCPR(epnum) (U3D_TXQCPR1 + (((epnum) - 1) * 0x10)) 52df2069acSChunfeng Yun 53a29de31bSChunfeng Yun #define SSUSB_U3_CTRL(p) (U3D_SSUSB_U3_CTRL_0P + ((p) * 0x08)) 54df2069acSChunfeng Yun #define SSUSB_U2_CTRL(p) (U3D_SSUSB_U2_CTRL_0P + ((p) * 0x08)) 55df2069acSChunfeng Yun 56df2069acSChunfeng Yun #define MTU3_DRIVER_NAME "mtu3" 57df2069acSChunfeng Yun #define DMA_ADDR_INVALID (~(dma_addr_t)0) 58df2069acSChunfeng Yun 59df2069acSChunfeng Yun #define MTU3_EP_ENABLED BIT(0) 60df2069acSChunfeng Yun #define MTU3_EP_STALL BIT(1) 61df2069acSChunfeng Yun #define MTU3_EP_WEDGE BIT(2) 62df2069acSChunfeng Yun #define MTU3_EP_BUSY BIT(3) 63df2069acSChunfeng Yun 64a29de31bSChunfeng Yun #define MTU3_U3_IP_SLOT_DEFAULT 2 65df2069acSChunfeng Yun #define MTU3_U2_IP_SLOT_DEFAULT 1 66df2069acSChunfeng Yun 67df2069acSChunfeng Yun /** 684c5964b4SChunfeng Yun * IP TRUNK version 694c5964b4SChunfeng Yun * from 0x1003 version, USB3 Gen2 is supported, two changes affect driver: 704c5964b4SChunfeng Yun * 1. MAXPKT and MULTI bits layout of TXCSR1 and RXCSR1 are adjusted, 714c5964b4SChunfeng Yun * but not backward compatible 724c5964b4SChunfeng Yun * 2. QMU extend buffer length supported 734c5964b4SChunfeng Yun */ 744c5964b4SChunfeng Yun #define MTU3_TRUNK_VERS_1003 0x1003 754c5964b4SChunfeng Yun 764c5964b4SChunfeng Yun /** 77df2069acSChunfeng Yun * Normally the device works on HS or SS, to simplify fifo management, 78df2069acSChunfeng Yun * devide fifo into some 512B parts, use bitmap to manage it; And 79df2069acSChunfeng Yun * 128 bits size of bitmap is large enough, that means it can manage 80df2069acSChunfeng Yun * up to 64KB fifo size. 81df2069acSChunfeng Yun * NOTE: MTU3_EP_FIFO_UNIT should be power of two 82df2069acSChunfeng Yun */ 83df2069acSChunfeng Yun #define MTU3_EP_FIFO_UNIT (1 << 9) 84df2069acSChunfeng Yun #define MTU3_FIFO_BIT_SIZE 128 85df2069acSChunfeng Yun #define MTU3_U2_IP_EP0_FIFO_SIZE 64 86df2069acSChunfeng Yun 87df2069acSChunfeng Yun /** 88df2069acSChunfeng Yun * Maximum size of ep0 response buffer for ch9 requests, 89df2069acSChunfeng Yun * the SET_SEL request uses 6 so far, and GET_STATUS is 2 90df2069acSChunfeng Yun */ 91df2069acSChunfeng Yun #define EP0_RESPONSE_BUF 6 92df2069acSChunfeng Yun 93cd59ea91SChunfeng Yun #define BULK_CLKS_CNT 4 94cd59ea91SChunfeng Yun 95df2069acSChunfeng Yun /* device operated link and speed got from DEVICE_CONF register */ 96df2069acSChunfeng Yun enum mtu3_speed { 97df2069acSChunfeng Yun MTU3_SPEED_INACTIVE = 0, 98df2069acSChunfeng Yun MTU3_SPEED_FULL = 1, 99df2069acSChunfeng Yun MTU3_SPEED_HIGH = 3, 100a29de31bSChunfeng Yun MTU3_SPEED_SUPER = 4, 1014d79e042SChunfeng Yun MTU3_SPEED_SUPER_PLUS = 5, 102df2069acSChunfeng Yun }; 103df2069acSChunfeng Yun 104df2069acSChunfeng Yun /** 105df2069acSChunfeng Yun * @MU3D_EP0_STATE_SETUP: waits for SETUP or received a SETUP 106df2069acSChunfeng Yun * without data stage. 107df2069acSChunfeng Yun * @MU3D_EP0_STATE_TX: IN data stage 108df2069acSChunfeng Yun * @MU3D_EP0_STATE_RX: OUT data stage 109df2069acSChunfeng Yun * @MU3D_EP0_STATE_TX_END: the last IN data is transferred, and 110df2069acSChunfeng Yun * waits for its completion interrupt 111df2069acSChunfeng Yun * @MU3D_EP0_STATE_STALL: ep0 is in stall status, will be auto-cleared 112df2069acSChunfeng Yun * after receives a SETUP. 113df2069acSChunfeng Yun */ 114df2069acSChunfeng Yun enum mtu3_g_ep0_state { 115df2069acSChunfeng Yun MU3D_EP0_STATE_SETUP = 1, 116df2069acSChunfeng Yun MU3D_EP0_STATE_TX, 117df2069acSChunfeng Yun MU3D_EP0_STATE_RX, 118df2069acSChunfeng Yun MU3D_EP0_STATE_TX_END, 119df2069acSChunfeng Yun MU3D_EP0_STATE_STALL, 120df2069acSChunfeng Yun }; 121df2069acSChunfeng Yun 122df2069acSChunfeng Yun /** 123c776f2c3SChunfeng Yun * MTU3_DR_FORCE_NONE: automatically switch host and periperal mode 124c776f2c3SChunfeng Yun * by IDPIN signal. 125c776f2c3SChunfeng Yun * MTU3_DR_FORCE_HOST: force to enter host mode and override OTG 126c776f2c3SChunfeng Yun * IDPIN signal. 127c776f2c3SChunfeng Yun * MTU3_DR_FORCE_DEVICE: force to enter peripheral mode. 128c776f2c3SChunfeng Yun */ 129c776f2c3SChunfeng Yun enum mtu3_dr_force_mode { 130c776f2c3SChunfeng Yun MTU3_DR_FORCE_NONE = 0, 131c776f2c3SChunfeng Yun MTU3_DR_FORCE_HOST, 132c776f2c3SChunfeng Yun MTU3_DR_FORCE_DEVICE, 133c776f2c3SChunfeng Yun }; 134c776f2c3SChunfeng Yun 135c776f2c3SChunfeng Yun /** 136df2069acSChunfeng Yun * @base: the base address of fifo 137df2069acSChunfeng Yun * @limit: the bitmap size in bits 138df2069acSChunfeng Yun * @bitmap: fifo bitmap in unit of @MTU3_EP_FIFO_UNIT 139df2069acSChunfeng Yun */ 140df2069acSChunfeng Yun struct mtu3_fifo_info { 141df2069acSChunfeng Yun u32 base; 142df2069acSChunfeng Yun u32 limit; 143df2069acSChunfeng Yun DECLARE_BITMAP(bitmap, MTU3_FIFO_BIT_SIZE); 144df2069acSChunfeng Yun }; 145df2069acSChunfeng Yun 146df2069acSChunfeng Yun /** 147df2069acSChunfeng Yun * General Purpose Descriptor (GPD): 148df2069acSChunfeng Yun * The format of TX GPD is a little different from RX one. 149df2069acSChunfeng Yun * And the size of GPD is 16 bytes. 150df2069acSChunfeng Yun * 15109befc32SChunfeng Yun * @dw0_info: 152df2069acSChunfeng Yun * bit0: Hardware Own (HWO) 153df2069acSChunfeng Yun * bit1: Buffer Descriptor Present (BDP), always 0, BD is not supported 154df2069acSChunfeng Yun * bit2: Bypass (BPS), 1: HW skips this GPD if HWO = 1 15548e0d373SChunfeng Yun * bit6: [EL] Zero Length Packet (ZLP), moved from @dw3_info[29] 156df2069acSChunfeng Yun * bit7: Interrupt On Completion (IOC) 15748e0d373SChunfeng Yun * bit[31:16]: ([EL] bit[31:12]) allow data buffer length (RX ONLY), 15809befc32SChunfeng Yun * the buffer length of the data to receive 15948e0d373SChunfeng Yun * bit[23:16]: ([EL] bit[31:24]) extension address (TX ONLY), 16009befc32SChunfeng Yun * lower 4 bits are extension bits of @buffer, 16109befc32SChunfeng Yun * upper 4 bits are extension bits of @next_gpd 162df2069acSChunfeng Yun * @next_gpd: Physical address of the next GPD 163df2069acSChunfeng Yun * @buffer: Physical address of the data buffer 16409befc32SChunfeng Yun * @dw3_info: 16548e0d373SChunfeng Yun * bit[15:0]: ([EL] bit[19:0]) data buffer length, 16609befc32SChunfeng Yun * (TX): the buffer length of the data to transmit 167df2069acSChunfeng Yun * (RX): The total length of data received 16848e0d373SChunfeng Yun * bit[23:16]: ([EL] bit[31:24]) extension address (RX ONLY), 16909befc32SChunfeng Yun * lower 4 bits are extension bits of @buffer, 17009befc32SChunfeng Yun * upper 4 bits are extension bits of @next_gpd 17148e0d373SChunfeng Yun * bit29: ([EL] abandoned) Zero Length Packet (ZLP) (TX ONLY) 172df2069acSChunfeng Yun */ 173df2069acSChunfeng Yun struct qmu_gpd { 17409befc32SChunfeng Yun __le32 dw0_info; 175df2069acSChunfeng Yun __le32 next_gpd; 176df2069acSChunfeng Yun __le32 buffer; 17709befc32SChunfeng Yun __le32 dw3_info; 178df2069acSChunfeng Yun } __packed; 179df2069acSChunfeng Yun 180df2069acSChunfeng Yun /** 181df2069acSChunfeng Yun * dma: physical base address of GPD segment 182df2069acSChunfeng Yun * start: virtual base address of GPD segment 183df2069acSChunfeng Yun * end: the last GPD element 184df2069acSChunfeng Yun * enqueue: the first empty GPD to use 185df2069acSChunfeng Yun * dequeue: the first completed GPD serviced by ISR 186df2069acSChunfeng Yun * NOTE: the size of GPD ring should be >= 2 187df2069acSChunfeng Yun */ 188df2069acSChunfeng Yun struct mtu3_gpd_ring { 189df2069acSChunfeng Yun dma_addr_t dma; 190df2069acSChunfeng Yun struct qmu_gpd *start; 191df2069acSChunfeng Yun struct qmu_gpd *end; 192df2069acSChunfeng Yun struct qmu_gpd *enqueue; 193df2069acSChunfeng Yun struct qmu_gpd *dequeue; 194df2069acSChunfeng Yun }; 195d0ed062aSChunfeng Yun 196d0ed062aSChunfeng Yun /** 197d0ed062aSChunfeng Yun * @vbus: vbus 5V used by host mode 198d0ed062aSChunfeng Yun * @edev: external connector used to detect vbus and iddig changes 199681e9485SChunfeng Yun * @id_nb : notifier for iddig(idpin) detection 20018cfd7b8SChunfeng Yun * @dr_work : work for drd mode switch, used to avoid sleep in atomic context 20118cfd7b8SChunfeng Yun * @desired_role : role desired to switch 20288c6b901SChunfeng Yun * @default_role : default mode while usb role is USB_ROLE_NONE 2031ac91ac5SChunfeng Yun * @role_sw : use USB Role Switch to support dual-role switch, can't use 2041ac91ac5SChunfeng Yun * extcon at the same time, and extcon is deprecated. 2051ac91ac5SChunfeng Yun * @role_sw_used : true when the USB Role Switch is used. 206d0ed062aSChunfeng Yun * @is_u3_drd: whether port0 supports usb3.0 dual-role device or not 207d0ed062aSChunfeng Yun * @manual_drd_enabled: it's true when supports dual-role device by debugfs 208d0ed062aSChunfeng Yun * to switch host/device modes depending on user input. 209d0ed062aSChunfeng Yun */ 210d0ed062aSChunfeng Yun struct otg_switch_mtk { 211d0ed062aSChunfeng Yun struct regulator *vbus; 212d0ed062aSChunfeng Yun struct extcon_dev *edev; 213d0ed062aSChunfeng Yun struct notifier_block id_nb; 21418cfd7b8SChunfeng Yun struct work_struct dr_work; 21518cfd7b8SChunfeng Yun enum usb_role desired_role; 21688c6b901SChunfeng Yun enum usb_role default_role; 2171ac91ac5SChunfeng Yun struct usb_role_switch *role_sw; 2181ac91ac5SChunfeng Yun bool role_sw_used; 219d0ed062aSChunfeng Yun bool is_u3_drd; 220d0ed062aSChunfeng Yun bool manual_drd_enabled; 221d0ed062aSChunfeng Yun }; 222d0ed062aSChunfeng Yun 223b3f4e727SChunfeng Yun /** 224b3f4e727SChunfeng Yun * @mac_base: register base address of device MAC, exclude xHCI's 225d0ed062aSChunfeng Yun * @ippc_base: register base address of IP Power and Clock interface (IPPC) 226b3f4e727SChunfeng Yun * @vusb33: usb3.3V shared by device/host IP 227b3f4e727SChunfeng Yun * @dr_mode: works in which mode: 228b3f4e727SChunfeng Yun * host only, device only or dual-role mode 229b3f4e727SChunfeng Yun * @u2_ports: number of usb2.0 host ports 230b3f4e727SChunfeng Yun * @u3_ports: number of usb3.0 host ports 231d7e12724SChunfeng Yun * @u2p_dis_msk: mask of disabling usb2 ports, e.g. bit0==1 to 232d7e12724SChunfeng Yun * disable u2port0, bit1==1 to disable u2port1,... etc, 233d7e12724SChunfeng Yun * but when use dual-role mode, can't disable u2port0 234076f1a89SChunfeng Yun * @u3p_dis_msk: mask of disabling usb3 ports, for example, bit0==1 to 235076f1a89SChunfeng Yun * disable u3port0, bit1==1 to disable u3port1,... etc 236d0ed062aSChunfeng Yun * @dbgfs_root: only used when supports manual dual-role switch via debugfs 237f0ede2c6SChunfeng Yun * @uwk_en: it's true when supports remote wakeup in host mode 238f0ede2c6SChunfeng Yun * @uwk: syscon including usb wakeup glue layer between SSUSB IP and SPM 239f0ede2c6SChunfeng Yun * @uwk_reg_base: the base address of the wakeup glue layer in @uwk 240f0ede2c6SChunfeng Yun * @uwk_vers: the version of the wakeup glue layer 241b3f4e727SChunfeng Yun */ 242b3f4e727SChunfeng Yun struct ssusb_mtk { 243b3f4e727SChunfeng Yun struct device *dev; 244b3f4e727SChunfeng Yun struct mtu3 *u3d; 245b3f4e727SChunfeng Yun void __iomem *mac_base; 246b3f4e727SChunfeng Yun void __iomem *ippc_base; 247b3f4e727SChunfeng Yun struct phy **phys; 248b3f4e727SChunfeng Yun int num_phys; 249fa6f59e2SChunfeng Yun int wakeup_irq; 250b3f4e727SChunfeng Yun /* common power & clock */ 251b3f4e727SChunfeng Yun struct regulator *vusb33; 252cd59ea91SChunfeng Yun struct clk_bulk_data clks[BULK_CLKS_CNT]; 253b3f4e727SChunfeng Yun /* otg */ 254d0ed062aSChunfeng Yun struct otg_switch_mtk otg_switch; 255b3f4e727SChunfeng Yun enum usb_dr_mode dr_mode; 256b3f4e727SChunfeng Yun bool is_host; 257b3f4e727SChunfeng Yun int u2_ports; 258b3f4e727SChunfeng Yun int u3_ports; 259d7e12724SChunfeng Yun int u2p_dis_msk; 260076f1a89SChunfeng Yun int u3p_dis_msk; 261d0ed062aSChunfeng Yun struct dentry *dbgfs_root; 262b3f4e727SChunfeng Yun /* usb wakeup for host mode */ 263f0ede2c6SChunfeng Yun bool uwk_en; 264f0ede2c6SChunfeng Yun struct regmap *uwk; 265f0ede2c6SChunfeng Yun u32 uwk_reg_base; 266f0ede2c6SChunfeng Yun u32 uwk_vers; 267b3f4e727SChunfeng Yun }; 268df2069acSChunfeng Yun 269df2069acSChunfeng Yun /** 270df2069acSChunfeng Yun * @fifo_size: it is (@slot + 1) * @fifo_seg_size 271df2069acSChunfeng Yun * @fifo_seg_size: it is roundup_pow_of_two(@maxp) 272df2069acSChunfeng Yun */ 273df2069acSChunfeng Yun struct mtu3_ep { 274df2069acSChunfeng Yun struct usb_ep ep; 275df2069acSChunfeng Yun char name[12]; 276df2069acSChunfeng Yun struct mtu3 *mtu; 277df2069acSChunfeng Yun u8 epnum; 278df2069acSChunfeng Yun u8 type; 279df2069acSChunfeng Yun u8 is_in; 280df2069acSChunfeng Yun u16 maxp; 281df2069acSChunfeng Yun int slot; 282df2069acSChunfeng Yun u32 fifo_size; 283df2069acSChunfeng Yun u32 fifo_addr; 284df2069acSChunfeng Yun u32 fifo_seg_size; 285df2069acSChunfeng Yun struct mtu3_fifo_info *fifo; 286df2069acSChunfeng Yun 287df2069acSChunfeng Yun struct list_head req_list; 288df2069acSChunfeng Yun struct mtu3_gpd_ring gpd_ring; 289a29de31bSChunfeng Yun const struct usb_ss_ep_comp_descriptor *comp_desc; 290df2069acSChunfeng Yun const struct usb_endpoint_descriptor *desc; 291df2069acSChunfeng Yun 292df2069acSChunfeng Yun int flags; 293df2069acSChunfeng Yun }; 294df2069acSChunfeng Yun 295df2069acSChunfeng Yun struct mtu3_request { 296df2069acSChunfeng Yun struct usb_request request; 297df2069acSChunfeng Yun struct list_head list; 298df2069acSChunfeng Yun struct mtu3_ep *mep; 299df2069acSChunfeng Yun struct mtu3 *mtu; 300df2069acSChunfeng Yun struct qmu_gpd *gpd; 301df2069acSChunfeng Yun int epnum; 302df2069acSChunfeng Yun }; 303df2069acSChunfeng Yun 304b3f4e727SChunfeng Yun static inline struct ssusb_mtk *dev_to_ssusb(struct device *dev) 305b3f4e727SChunfeng Yun { 306b3f4e727SChunfeng Yun return dev_get_drvdata(dev); 307b3f4e727SChunfeng Yun } 308b3f4e727SChunfeng Yun 309df2069acSChunfeng Yun /** 310df2069acSChunfeng Yun * struct mtu3 - device driver instance data. 311a29de31bSChunfeng Yun * @slot: MTU3_U2_IP_SLOT_DEFAULT for U2 IP only, 312a29de31bSChunfeng Yun * MTU3_U3_IP_SLOT_DEFAULT for U3 IP 313df2069acSChunfeng Yun * @may_wakeup: means device's remote wakeup is enabled 314df2069acSChunfeng Yun * @is_self_powered: is reported in device status and the config descriptor 315fe7c994aSChunfeng Yun * @delayed_status: true when function drivers ask for delayed status 3164c5964b4SChunfeng Yun * @gen2cp: compatible with USB3 Gen2 IP 317df2069acSChunfeng Yun * @ep0_req: dummy request used while handling standard USB requests 318df2069acSChunfeng Yun * for GET_STATUS and SET_SEL 319df2069acSChunfeng Yun * @setup_buf: ep0 response buffer for GET_STATUS and SET_SEL requests 320df2069acSChunfeng Yun */ 321df2069acSChunfeng Yun struct mtu3 { 322df2069acSChunfeng Yun spinlock_t lock; 323b3f4e727SChunfeng Yun struct ssusb_mtk *ssusb; 324df2069acSChunfeng Yun struct device *dev; 325df2069acSChunfeng Yun void __iomem *mac_base; 326df2069acSChunfeng Yun void __iomem *ippc_base; 327df2069acSChunfeng Yun int irq; 328df2069acSChunfeng Yun 329df2069acSChunfeng Yun struct mtu3_fifo_info tx_fifo; 330df2069acSChunfeng Yun struct mtu3_fifo_info rx_fifo; 331df2069acSChunfeng Yun 332df2069acSChunfeng Yun struct mtu3_ep *ep_array; 333df2069acSChunfeng Yun struct mtu3_ep *in_eps; 334df2069acSChunfeng Yun struct mtu3_ep *out_eps; 335df2069acSChunfeng Yun struct mtu3_ep *ep0; 336df2069acSChunfeng Yun int num_eps; 337df2069acSChunfeng Yun int slot; 338df2069acSChunfeng Yun int active_ep; 339df2069acSChunfeng Yun 340df2069acSChunfeng Yun struct dma_pool *qmu_gpd_pool; 341df2069acSChunfeng Yun enum mtu3_g_ep0_state ep0_state; 342df2069acSChunfeng Yun struct usb_gadget g; /* the gadget */ 343df2069acSChunfeng Yun struct usb_gadget_driver *gadget_driver; 344df2069acSChunfeng Yun struct mtu3_request ep0_req; 345df2069acSChunfeng Yun u8 setup_buf[EP0_RESPONSE_BUF]; 346dc4c1aa7SChunfeng Yun enum usb_device_speed max_speed; 347dc4c1aa7SChunfeng Yun enum usb_device_speed speed; 348df2069acSChunfeng Yun 349df2069acSChunfeng Yun unsigned is_active:1; 350df2069acSChunfeng Yun unsigned may_wakeup:1; 351df2069acSChunfeng Yun unsigned is_self_powered:1; 352df2069acSChunfeng Yun unsigned test_mode:1; 353df2069acSChunfeng Yun unsigned softconnect:1; 354a29de31bSChunfeng Yun unsigned u1_enable:1; 355a29de31bSChunfeng Yun unsigned u2_enable:1; 356a29de31bSChunfeng Yun unsigned is_u3_ip:1; 357fe7c994aSChunfeng Yun unsigned delayed_status:1; 3584c5964b4SChunfeng Yun unsigned gen2cp:1; 359*427c6642SChunfeng Yun unsigned connected:1; 360df2069acSChunfeng Yun 361df2069acSChunfeng Yun u8 address; 362df2069acSChunfeng Yun u8 test_mode_nr; 363df2069acSChunfeng Yun u32 hw_version; 364df2069acSChunfeng Yun }; 365df2069acSChunfeng Yun 366df2069acSChunfeng Yun static inline struct mtu3 *gadget_to_mtu3(struct usb_gadget *g) 367df2069acSChunfeng Yun { 368df2069acSChunfeng Yun return container_of(g, struct mtu3, g); 369df2069acSChunfeng Yun } 370df2069acSChunfeng Yun 371df2069acSChunfeng Yun static inline struct mtu3_request *to_mtu3_request(struct usb_request *req) 372df2069acSChunfeng Yun { 373df2069acSChunfeng Yun return req ? container_of(req, struct mtu3_request, request) : NULL; 374df2069acSChunfeng Yun } 375df2069acSChunfeng Yun 376df2069acSChunfeng Yun static inline struct mtu3_ep *to_mtu3_ep(struct usb_ep *ep) 377df2069acSChunfeng Yun { 378df2069acSChunfeng Yun return ep ? container_of(ep, struct mtu3_ep, ep) : NULL; 379df2069acSChunfeng Yun } 380df2069acSChunfeng Yun 381df2069acSChunfeng Yun static inline struct mtu3_request *next_request(struct mtu3_ep *mep) 382df2069acSChunfeng Yun { 3839b4632efSMasahiro Yamada return list_first_entry_or_null(&mep->req_list, struct mtu3_request, 3849b4632efSMasahiro Yamada list); 385df2069acSChunfeng Yun } 386df2069acSChunfeng Yun 387df2069acSChunfeng Yun static inline void mtu3_writel(void __iomem *base, u32 offset, u32 data) 388df2069acSChunfeng Yun { 389df2069acSChunfeng Yun writel(data, base + offset); 390df2069acSChunfeng Yun } 391df2069acSChunfeng Yun 392df2069acSChunfeng Yun static inline u32 mtu3_readl(void __iomem *base, u32 offset) 393df2069acSChunfeng Yun { 394df2069acSChunfeng Yun return readl(base + offset); 395df2069acSChunfeng Yun } 396df2069acSChunfeng Yun 397df2069acSChunfeng Yun static inline void mtu3_setbits(void __iomem *base, u32 offset, u32 bits) 398df2069acSChunfeng Yun { 399df2069acSChunfeng Yun void __iomem *addr = base + offset; 400df2069acSChunfeng Yun u32 tmp = readl(addr); 401df2069acSChunfeng Yun 402df2069acSChunfeng Yun writel((tmp | (bits)), addr); 403df2069acSChunfeng Yun } 404df2069acSChunfeng Yun 405df2069acSChunfeng Yun static inline void mtu3_clrbits(void __iomem *base, u32 offset, u32 bits) 406df2069acSChunfeng Yun { 407df2069acSChunfeng Yun void __iomem *addr = base + offset; 408df2069acSChunfeng Yun u32 tmp = readl(addr); 409df2069acSChunfeng Yun 410df2069acSChunfeng Yun writel((tmp & ~(bits)), addr); 411df2069acSChunfeng Yun } 412df2069acSChunfeng Yun 413b3f4e727SChunfeng Yun int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks); 414df2069acSChunfeng Yun struct usb_request *mtu3_alloc_request(struct usb_ep *ep, gfp_t gfp_flags); 415df2069acSChunfeng Yun void mtu3_free_request(struct usb_ep *ep, struct usb_request *req); 416df2069acSChunfeng Yun void mtu3_req_complete(struct mtu3_ep *mep, 417df2069acSChunfeng Yun struct usb_request *req, int status); 418df2069acSChunfeng Yun 419df2069acSChunfeng Yun int mtu3_config_ep(struct mtu3 *mtu, struct mtu3_ep *mep, 420df2069acSChunfeng Yun int interval, int burst, int mult); 421df2069acSChunfeng Yun void mtu3_deconfig_ep(struct mtu3 *mtu, struct mtu3_ep *mep); 422df2069acSChunfeng Yun void mtu3_ep_stall_set(struct mtu3_ep *mep, bool set); 423df2069acSChunfeng Yun void mtu3_start(struct mtu3 *mtu); 424df2069acSChunfeng Yun void mtu3_stop(struct mtu3 *mtu); 425a29de31bSChunfeng Yun void mtu3_dev_on_off(struct mtu3 *mtu, int is_on); 426df2069acSChunfeng Yun 427df2069acSChunfeng Yun int mtu3_gadget_setup(struct mtu3 *mtu); 428df2069acSChunfeng Yun void mtu3_gadget_cleanup(struct mtu3 *mtu); 429df2069acSChunfeng Yun void mtu3_gadget_reset(struct mtu3 *mtu); 430df2069acSChunfeng Yun void mtu3_gadget_suspend(struct mtu3 *mtu); 431df2069acSChunfeng Yun void mtu3_gadget_resume(struct mtu3 *mtu); 432df2069acSChunfeng Yun void mtu3_gadget_disconnect(struct mtu3 *mtu); 433df2069acSChunfeng Yun 434df2069acSChunfeng Yun irqreturn_t mtu3_ep0_isr(struct mtu3 *mtu); 435df2069acSChunfeng Yun extern const struct usb_ep_ops mtu3_ep0_ops; 436df2069acSChunfeng Yun 437df2069acSChunfeng Yun #endif 438