1 /* 2 * xHCI host controller driver PCI Bus Glue. 3 * 4 * Copyright (C) 2008 Intel Corp. 5 * 6 * Author: Sarah Sharp 7 * Some code borrowed from the Linux EHCI driver. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 16 * for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software Foundation, 20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 */ 22 23 #include <linux/pci.h> 24 #include <linux/slab.h> 25 #include <linux/module.h> 26 27 #include "xhci.h" 28 #include "xhci-trace.h" 29 30 /* Device for a quirk */ 31 #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73 32 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000 33 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400 0x1400 34 35 #define PCI_VENDOR_ID_ETRON 0x1b6f 36 #define PCI_DEVICE_ID_EJ168 0x7023 37 38 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI 0x8c31 39 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31 40 41 static const char hcd_name[] = "xhci_hcd"; 42 43 static struct hc_driver __read_mostly xhci_pci_hc_driver; 44 45 /* called after powerup, by probe or system-pm "wakeup" */ 46 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev) 47 { 48 /* 49 * TODO: Implement finding debug ports later. 50 * TODO: see if there are any quirks that need to be added to handle 51 * new extended capabilities. 52 */ 53 54 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */ 55 if (!pci_set_mwi(pdev)) 56 xhci_dbg(xhci, "MWI active\n"); 57 58 xhci_dbg(xhci, "Finished xhci_pci_reinit\n"); 59 return 0; 60 } 61 62 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) 63 { 64 struct pci_dev *pdev = to_pci_dev(dev); 65 66 /* Look for vendor-specific quirks */ 67 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC && 68 (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK || 69 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) { 70 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK && 71 pdev->revision == 0x0) { 72 xhci->quirks |= XHCI_RESET_EP_QUIRK; 73 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, 74 "QUIRK: Fresco Logic xHC needs configure" 75 " endpoint cmd after reset endpoint"); 76 } 77 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK && 78 pdev->revision == 0x4) { 79 xhci->quirks |= XHCI_SLOW_SUSPEND; 80 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, 81 "QUIRK: Fresco Logic xHC revision %u" 82 "must be suspended extra slowly", 83 pdev->revision); 84 } 85 /* Fresco Logic confirms: all revisions of this chip do not 86 * support MSI, even though some of them claim to in their PCI 87 * capabilities. 88 */ 89 xhci->quirks |= XHCI_BROKEN_MSI; 90 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, 91 "QUIRK: Fresco Logic revision %u " 92 "has broken MSI implementation", 93 pdev->revision); 94 xhci->quirks |= XHCI_TRUST_TX_LENGTH; 95 } 96 97 if (pdev->vendor == PCI_VENDOR_ID_NEC) 98 xhci->quirks |= XHCI_NEC_HOST; 99 100 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96) 101 xhci->quirks |= XHCI_AMD_0x96_HOST; 102 103 /* AMD PLL quirk */ 104 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info()) 105 xhci->quirks |= XHCI_AMD_PLL_FIX; 106 107 if (pdev->vendor == PCI_VENDOR_ID_AMD) 108 xhci->quirks |= XHCI_TRUST_TX_LENGTH; 109 110 if (pdev->vendor == PCI_VENDOR_ID_INTEL) { 111 xhci->quirks |= XHCI_LPM_SUPPORT; 112 xhci->quirks |= XHCI_INTEL_HOST; 113 } 114 if (pdev->vendor == PCI_VENDOR_ID_INTEL && 115 pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) { 116 xhci->quirks |= XHCI_EP_LIMIT_QUIRK; 117 xhci->limit_active_eps = 64; 118 xhci->quirks |= XHCI_SW_BW_CHECKING; 119 /* 120 * PPT desktop boards DH77EB and DH77DF will power back on after 121 * a few seconds of being shutdown. The fix for this is to 122 * switch the ports from xHCI to EHCI on shutdown. We can't use 123 * DMI information to find those particular boards (since each 124 * vendor will change the board name), so we have to key off all 125 * PPT chipsets. 126 */ 127 xhci->quirks |= XHCI_SPURIOUS_REBOOT; 128 xhci->quirks |= XHCI_AVOID_BEI; 129 } 130 if (pdev->vendor == PCI_VENDOR_ID_INTEL && 131 (pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI || 132 pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI)) { 133 /* Workaround for occasional spurious wakeups from S5 (or 134 * any other sleep) on Haswell machines with LPT and LPT-LP 135 * with the new Intel BIOS 136 */ 137 /* Limit the quirk to only known vendors, as this triggers 138 * yet another BIOS bug on some other machines 139 * https://bugzilla.kernel.org/show_bug.cgi?id=66171 140 */ 141 if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP) 142 xhci->quirks |= XHCI_SPURIOUS_WAKEUP; 143 } 144 if (pdev->vendor == PCI_VENDOR_ID_INTEL && 145 pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI) { 146 xhci->quirks |= XHCI_SPURIOUS_REBOOT; 147 } 148 if (pdev->vendor == PCI_VENDOR_ID_ETRON && 149 pdev->device == PCI_DEVICE_ID_EJ168) { 150 xhci->quirks |= XHCI_RESET_ON_RESUME; 151 xhci->quirks |= XHCI_TRUST_TX_LENGTH; 152 xhci->quirks |= XHCI_BROKEN_STREAMS; 153 } 154 if (pdev->vendor == PCI_VENDOR_ID_RENESAS && 155 pdev->device == 0x0015) 156 xhci->quirks |= XHCI_RESET_ON_RESUME; 157 if (pdev->vendor == PCI_VENDOR_ID_VIA) 158 xhci->quirks |= XHCI_RESET_ON_RESUME; 159 160 /* See https://bugzilla.kernel.org/show_bug.cgi?id=79511 */ 161 if (pdev->vendor == PCI_VENDOR_ID_VIA && 162 pdev->device == 0x3432) 163 xhci->quirks |= XHCI_BROKEN_STREAMS; 164 165 if (xhci->quirks & XHCI_RESET_ON_RESUME) 166 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, 167 "QUIRK: Resetting on resume"); 168 } 169 170 /* called during probe() after chip reset completes */ 171 static int xhci_pci_setup(struct usb_hcd *hcd) 172 { 173 struct xhci_hcd *xhci; 174 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 175 int retval; 176 177 retval = xhci_gen_setup(hcd, xhci_pci_quirks); 178 if (retval) 179 return retval; 180 181 xhci = hcd_to_xhci(hcd); 182 if (!usb_hcd_is_primary_hcd(hcd)) 183 return 0; 184 185 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn); 186 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn); 187 188 /* Find any debug ports */ 189 retval = xhci_pci_reinit(xhci, pdev); 190 if (!retval) 191 return retval; 192 193 kfree(xhci); 194 return retval; 195 } 196 197 /* 198 * We need to register our own PCI probe function (instead of the USB core's 199 * function) in order to create a second roothub under xHCI. 200 */ 201 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) 202 { 203 int retval; 204 struct xhci_hcd *xhci; 205 struct hc_driver *driver; 206 struct usb_hcd *hcd; 207 208 driver = (struct hc_driver *)id->driver_data; 209 210 /* Prevent runtime suspending between USB-2 and USB-3 initialization */ 211 pm_runtime_get_noresume(&dev->dev); 212 213 /* Register the USB 2.0 roothub. 214 * FIXME: USB core must know to register the USB 2.0 roothub first. 215 * This is sort of silly, because we could just set the HCD driver flags 216 * to say USB 2.0, but I'm not sure what the implications would be in 217 * the other parts of the HCD code. 218 */ 219 retval = usb_hcd_pci_probe(dev, id); 220 221 if (retval) 222 goto put_runtime_pm; 223 224 /* USB 2.0 roothub is stored in the PCI device now. */ 225 hcd = dev_get_drvdata(&dev->dev); 226 xhci = hcd_to_xhci(hcd); 227 xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev, 228 pci_name(dev), hcd); 229 if (!xhci->shared_hcd) { 230 retval = -ENOMEM; 231 goto dealloc_usb2_hcd; 232 } 233 234 /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset) 235 * is called by usb_add_hcd(). 236 */ 237 *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci; 238 239 retval = usb_add_hcd(xhci->shared_hcd, dev->irq, 240 IRQF_SHARED); 241 if (retval) 242 goto put_usb3_hcd; 243 /* Roothub already marked as USB 3.0 speed */ 244 245 if (!(xhci->quirks & XHCI_BROKEN_STREAMS) && 246 HCC_MAX_PSA(xhci->hcc_params) >= 4) 247 xhci->shared_hcd->can_do_streams = 1; 248 249 /* USB-2 and USB-3 roothubs initialized, allow runtime pm suspend */ 250 pm_runtime_put_noidle(&dev->dev); 251 252 return 0; 253 254 put_usb3_hcd: 255 usb_put_hcd(xhci->shared_hcd); 256 dealloc_usb2_hcd: 257 usb_hcd_pci_remove(dev); 258 put_runtime_pm: 259 pm_runtime_put_noidle(&dev->dev); 260 return retval; 261 } 262 263 static void xhci_pci_remove(struct pci_dev *dev) 264 { 265 struct xhci_hcd *xhci; 266 267 xhci = hcd_to_xhci(pci_get_drvdata(dev)); 268 if (xhci->shared_hcd) { 269 usb_remove_hcd(xhci->shared_hcd); 270 usb_put_hcd(xhci->shared_hcd); 271 } 272 usb_hcd_pci_remove(dev); 273 274 /* Workaround for spurious wakeups at shutdown with HSW */ 275 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP) 276 pci_set_power_state(dev, PCI_D3hot); 277 278 kfree(xhci); 279 } 280 281 #ifdef CONFIG_PM 282 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup) 283 { 284 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 285 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 286 287 /* 288 * Systems with the TI redriver that loses port status change events 289 * need to have the registers polled during D3, so avoid D3cold. 290 */ 291 if (xhci->quirks & XHCI_COMP_MODE_QUIRK) 292 pdev->no_d3cold = true; 293 294 return xhci_suspend(xhci); 295 } 296 297 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated) 298 { 299 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 300 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 301 int retval = 0; 302 303 /* The BIOS on systems with the Intel Panther Point chipset may or may 304 * not support xHCI natively. That means that during system resume, it 305 * may switch the ports back to EHCI so that users can use their 306 * keyboard to select a kernel from GRUB after resume from hibernate. 307 * 308 * The BIOS is supposed to remember whether the OS had xHCI ports 309 * enabled before resume, and switch the ports back to xHCI when the 310 * BIOS/OS semaphore is written, but we all know we can't trust BIOS 311 * writers. 312 * 313 * Unconditionally switch the ports back to xHCI after a system resume. 314 * It should not matter whether the EHCI or xHCI controller is 315 * resumed first. It's enough to do the switchover in xHCI because 316 * USB core won't notice anything as the hub driver doesn't start 317 * running again until after all the devices (including both EHCI and 318 * xHCI host controllers) have been resumed. 319 */ 320 321 if (pdev->vendor == PCI_VENDOR_ID_INTEL) 322 usb_enable_intel_xhci_ports(pdev); 323 324 retval = xhci_resume(xhci, hibernated); 325 return retval; 326 } 327 #endif /* CONFIG_PM */ 328 329 /*-------------------------------------------------------------------------*/ 330 331 /* PCI driver selection metadata; PCI hotplugging uses this */ 332 static const struct pci_device_id pci_ids[] = { { 333 /* handle any USB 3.0 xHCI controller */ 334 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0), 335 .driver_data = (unsigned long) &xhci_pci_hc_driver, 336 }, 337 { /* end: all zeroes */ } 338 }; 339 MODULE_DEVICE_TABLE(pci, pci_ids); 340 341 /* pci driver glue; this is a "new style" PCI driver module */ 342 static struct pci_driver xhci_pci_driver = { 343 .name = (char *) hcd_name, 344 .id_table = pci_ids, 345 346 .probe = xhci_pci_probe, 347 .remove = xhci_pci_remove, 348 /* suspend and resume implemented later */ 349 350 .shutdown = usb_hcd_pci_shutdown, 351 #ifdef CONFIG_PM 352 .driver = { 353 .pm = &usb_hcd_pci_pm_ops 354 }, 355 #endif 356 }; 357 358 static int __init xhci_pci_init(void) 359 { 360 xhci_init_driver(&xhci_pci_hc_driver, xhci_pci_setup); 361 #ifdef CONFIG_PM 362 xhci_pci_hc_driver.pci_suspend = xhci_pci_suspend; 363 xhci_pci_hc_driver.pci_resume = xhci_pci_resume; 364 #endif 365 return pci_register_driver(&xhci_pci_driver); 366 } 367 module_init(xhci_pci_init); 368 369 static void __exit xhci_pci_exit(void) 370 { 371 pci_unregister_driver(&xhci_pci_driver); 372 } 373 module_exit(xhci_pci_exit); 374 375 MODULE_DESCRIPTION("xHCI PCI Host Controller Driver"); 376 MODULE_LICENSE("GPL"); 377