1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2015 MediaTek Inc. 4 * Author: 5 * Zhigang.Wei <zhigang.wei@mediatek.com> 6 * Chunfeng.Yun <chunfeng.yun@mediatek.com> 7 */ 8 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/slab.h> 12 13 #include "xhci.h" 14 #include "xhci-mtk.h" 15 16 #define SSP_BW_BOUNDARY 130000 17 #define SS_BW_BOUNDARY 51000 18 /* table 5-5. High-speed Isoc Transaction Limits in usb_20 spec */ 19 #define HS_BW_BOUNDARY 6144 20 /* usb2 spec section11.18.1: at most 188 FS bytes per microframe */ 21 #define FS_PAYLOAD_MAX 188 22 /* 23 * max number of microframes for split transfer, 24 * for fs isoc in : 1 ss + 1 idle + 7 cs 25 */ 26 #define TT_MICROFRAMES_MAX 9 27 28 #define DBG_BUF_EN 64 29 30 /* schedule error type */ 31 #define ESCH_SS_Y6 1001 32 #define ESCH_SS_OVERLAP 1002 33 #define ESCH_CS_OVERFLOW 1003 34 #define ESCH_BW_OVERFLOW 1004 35 #define ESCH_FIXME 1005 36 37 /* mtk scheduler bitmasks */ 38 #define EP_BPKTS(p) ((p) & 0x7f) 39 #define EP_BCSCOUNT(p) (((p) & 0x7) << 8) 40 #define EP_BBM(p) ((p) << 11) 41 #define EP_BOFFSET(p) ((p) & 0x3fff) 42 #define EP_BREPEAT(p) (((p) & 0x7fff) << 16) 43 44 static char *sch_error_string(int err_num) 45 { 46 switch (err_num) { 47 case ESCH_SS_Y6: 48 return "Can't schedule Start-Split in Y6"; 49 case ESCH_SS_OVERLAP: 50 return "Can't find a suitable Start-Split location"; 51 case ESCH_CS_OVERFLOW: 52 return "The last Complete-Split is greater than 7"; 53 case ESCH_BW_OVERFLOW: 54 return "Bandwidth exceeds the maximum limit"; 55 case ESCH_FIXME: 56 return "FIXME, to be resolved"; 57 default: 58 return "Unknown"; 59 } 60 } 61 62 static int is_fs_or_ls(enum usb_device_speed speed) 63 { 64 return speed == USB_SPEED_FULL || speed == USB_SPEED_LOW; 65 } 66 67 static const char * 68 decode_ep(struct usb_host_endpoint *ep, enum usb_device_speed speed) 69 { 70 static char buf[DBG_BUF_EN]; 71 struct usb_endpoint_descriptor *epd = &ep->desc; 72 unsigned int interval; 73 const char *unit; 74 75 interval = usb_decode_interval(epd, speed); 76 if (interval % 1000) { 77 unit = "us"; 78 } else { 79 unit = "ms"; 80 interval /= 1000; 81 } 82 83 snprintf(buf, DBG_BUF_EN, "%s ep%d%s %s, mpkt:%d, interval:%d/%d%s\n", 84 usb_speed_string(speed), usb_endpoint_num(epd), 85 usb_endpoint_dir_in(epd) ? "in" : "out", 86 usb_ep_type_string(usb_endpoint_type(epd)), 87 usb_endpoint_maxp(epd), epd->bInterval, interval, unit); 88 89 return buf; 90 } 91 92 static u32 get_bw_boundary(enum usb_device_speed speed) 93 { 94 u32 boundary; 95 96 switch (speed) { 97 case USB_SPEED_SUPER_PLUS: 98 boundary = SSP_BW_BOUNDARY; 99 break; 100 case USB_SPEED_SUPER: 101 boundary = SS_BW_BOUNDARY; 102 break; 103 default: 104 boundary = HS_BW_BOUNDARY; 105 break; 106 } 107 108 return boundary; 109 } 110 111 /* 112 * get the bandwidth domain which @ep belongs to. 113 * 114 * the bandwidth domain array is saved to @sch_array of struct xhci_hcd_mtk, 115 * each HS root port is treated as a single bandwidth domain, 116 * but each SS root port is treated as two bandwidth domains, one for IN eps, 117 * one for OUT eps. 118 * @real_port value is defined as follow according to xHCI spec: 119 * 1 for SSport0, ..., N+1 for SSportN, N+2 for HSport0, N+3 for HSport1, etc 120 * so the bandwidth domain array is organized as follow for simplification: 121 * SSport0-OUT, SSport0-IN, ..., SSportX-OUT, SSportX-IN, HSport0, ..., HSportY 122 */ 123 static struct mu3h_sch_bw_info * 124 get_bw_info(struct xhci_hcd_mtk *mtk, struct usb_device *udev, 125 struct usb_host_endpoint *ep) 126 { 127 struct xhci_hcd *xhci = hcd_to_xhci(mtk->hcd); 128 struct xhci_virt_device *virt_dev; 129 int bw_index; 130 131 virt_dev = xhci->devs[udev->slot_id]; 132 133 if (udev->speed >= USB_SPEED_SUPER) { 134 if (usb_endpoint_dir_out(&ep->desc)) 135 bw_index = (virt_dev->real_port - 1) * 2; 136 else 137 bw_index = (virt_dev->real_port - 1) * 2 + 1; 138 } else { 139 /* add one more for each SS port */ 140 bw_index = virt_dev->real_port + xhci->usb3_rhub.num_ports - 1; 141 } 142 143 return &mtk->sch_array[bw_index]; 144 } 145 146 static u32 get_esit(struct xhci_ep_ctx *ep_ctx) 147 { 148 u32 esit; 149 150 esit = 1 << CTX_TO_EP_INTERVAL(le32_to_cpu(ep_ctx->ep_info)); 151 if (esit > XHCI_MTK_MAX_ESIT) 152 esit = XHCI_MTK_MAX_ESIT; 153 154 return esit; 155 } 156 157 static struct mu3h_sch_tt *find_tt(struct usb_device *udev) 158 { 159 struct usb_tt *utt = udev->tt; 160 struct mu3h_sch_tt *tt, **tt_index, **ptt; 161 bool allocated_index = false; 162 163 if (!utt) 164 return NULL; /* Not below a TT */ 165 166 /* 167 * Find/create our data structure. 168 * For hubs with a single TT, we get it directly. 169 * For hubs with multiple TTs, there's an extra level of pointers. 170 */ 171 tt_index = NULL; 172 if (utt->multi) { 173 tt_index = utt->hcpriv; 174 if (!tt_index) { /* Create the index array */ 175 tt_index = kcalloc(utt->hub->maxchild, 176 sizeof(*tt_index), GFP_KERNEL); 177 if (!tt_index) 178 return ERR_PTR(-ENOMEM); 179 utt->hcpriv = tt_index; 180 allocated_index = true; 181 } 182 ptt = &tt_index[udev->ttport - 1]; 183 } else { 184 ptt = (struct mu3h_sch_tt **) &utt->hcpriv; 185 } 186 187 tt = *ptt; 188 if (!tt) { /* Create the mu3h_sch_tt */ 189 tt = kzalloc(sizeof(*tt), GFP_KERNEL); 190 if (!tt) { 191 if (allocated_index) { 192 utt->hcpriv = NULL; 193 kfree(tt_index); 194 } 195 return ERR_PTR(-ENOMEM); 196 } 197 INIT_LIST_HEAD(&tt->ep_list); 198 *ptt = tt; 199 } 200 201 return tt; 202 } 203 204 /* Release the TT above udev, if it's not in use */ 205 static void drop_tt(struct usb_device *udev) 206 { 207 struct usb_tt *utt = udev->tt; 208 struct mu3h_sch_tt *tt, **tt_index, **ptt; 209 int i, cnt; 210 211 if (!utt || !utt->hcpriv) 212 return; /* Not below a TT, or never allocated */ 213 214 cnt = 0; 215 if (utt->multi) { 216 tt_index = utt->hcpriv; 217 ptt = &tt_index[udev->ttport - 1]; 218 /* How many entries are left in tt_index? */ 219 for (i = 0; i < utt->hub->maxchild; ++i) 220 cnt += !!tt_index[i]; 221 } else { 222 tt_index = NULL; 223 ptt = (struct mu3h_sch_tt **)&utt->hcpriv; 224 } 225 226 tt = *ptt; 227 if (!tt || !list_empty(&tt->ep_list)) 228 return; /* never allocated , or still in use*/ 229 230 *ptt = NULL; 231 kfree(tt); 232 233 if (cnt == 1) { 234 utt->hcpriv = NULL; 235 kfree(tt_index); 236 } 237 } 238 239 static struct mu3h_sch_ep_info *create_sch_ep(struct usb_device *udev, 240 struct usb_host_endpoint *ep, struct xhci_ep_ctx *ep_ctx) 241 { 242 struct mu3h_sch_ep_info *sch_ep; 243 struct mu3h_sch_tt *tt = NULL; 244 u32 len_bw_budget_table; 245 size_t mem_size; 246 247 if (is_fs_or_ls(udev->speed)) 248 len_bw_budget_table = TT_MICROFRAMES_MAX; 249 else if ((udev->speed >= USB_SPEED_SUPER) 250 && usb_endpoint_xfer_isoc(&ep->desc)) 251 len_bw_budget_table = get_esit(ep_ctx); 252 else 253 len_bw_budget_table = 1; 254 255 mem_size = sizeof(struct mu3h_sch_ep_info) + 256 len_bw_budget_table * sizeof(u32); 257 sch_ep = kzalloc(mem_size, GFP_KERNEL); 258 if (!sch_ep) 259 return ERR_PTR(-ENOMEM); 260 261 if (is_fs_or_ls(udev->speed)) { 262 tt = find_tt(udev); 263 if (IS_ERR(tt)) { 264 kfree(sch_ep); 265 return ERR_PTR(-ENOMEM); 266 } 267 } 268 269 sch_ep->sch_tt = tt; 270 sch_ep->ep = ep; 271 sch_ep->speed = udev->speed; 272 INIT_LIST_HEAD(&sch_ep->endpoint); 273 INIT_LIST_HEAD(&sch_ep->tt_endpoint); 274 275 return sch_ep; 276 } 277 278 static void setup_sch_info(struct xhci_ep_ctx *ep_ctx, 279 struct mu3h_sch_ep_info *sch_ep) 280 { 281 u32 ep_type; 282 u32 maxpkt; 283 u32 max_burst; 284 u32 mult; 285 u32 esit_pkts; 286 u32 max_esit_payload; 287 u32 *bwb_table = sch_ep->bw_budget_table; 288 int i; 289 290 ep_type = CTX_TO_EP_TYPE(le32_to_cpu(ep_ctx->ep_info2)); 291 maxpkt = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2)); 292 max_burst = CTX_TO_MAX_BURST(le32_to_cpu(ep_ctx->ep_info2)); 293 mult = CTX_TO_EP_MULT(le32_to_cpu(ep_ctx->ep_info)); 294 max_esit_payload = 295 (CTX_TO_MAX_ESIT_PAYLOAD_HI( 296 le32_to_cpu(ep_ctx->ep_info)) << 16) | 297 CTX_TO_MAX_ESIT_PAYLOAD(le32_to_cpu(ep_ctx->tx_info)); 298 299 sch_ep->esit = get_esit(ep_ctx); 300 sch_ep->ep_type = ep_type; 301 sch_ep->maxpkt = maxpkt; 302 sch_ep->offset = 0; 303 sch_ep->burst_mode = 0; 304 sch_ep->repeat = 0; 305 306 if (sch_ep->speed == USB_SPEED_HIGH) { 307 sch_ep->cs_count = 0; 308 309 /* 310 * usb_20 spec section5.9 311 * a single microframe is enough for HS synchromous endpoints 312 * in a interval 313 */ 314 sch_ep->num_budget_microframes = 1; 315 316 /* 317 * xHCI spec section6.2.3.4 318 * @max_burst is the number of additional transactions 319 * opportunities per microframe 320 */ 321 sch_ep->pkts = max_burst + 1; 322 sch_ep->bw_cost_per_microframe = maxpkt * sch_ep->pkts; 323 bwb_table[0] = sch_ep->bw_cost_per_microframe; 324 } else if (sch_ep->speed >= USB_SPEED_SUPER) { 325 /* usb3_r1 spec section4.4.7 & 4.4.8 */ 326 sch_ep->cs_count = 0; 327 sch_ep->burst_mode = 1; 328 /* 329 * some device's (d)wBytesPerInterval is set as 0, 330 * then max_esit_payload is 0, so evaluate esit_pkts from 331 * mult and burst 332 */ 333 esit_pkts = DIV_ROUND_UP(max_esit_payload, maxpkt); 334 if (esit_pkts == 0) 335 esit_pkts = (mult + 1) * (max_burst + 1); 336 337 if (ep_type == INT_IN_EP || ep_type == INT_OUT_EP) { 338 sch_ep->pkts = esit_pkts; 339 sch_ep->num_budget_microframes = 1; 340 bwb_table[0] = maxpkt * sch_ep->pkts; 341 } 342 343 if (ep_type == ISOC_IN_EP || ep_type == ISOC_OUT_EP) { 344 345 if (sch_ep->esit == 1) 346 sch_ep->pkts = esit_pkts; 347 else if (esit_pkts <= sch_ep->esit) 348 sch_ep->pkts = 1; 349 else 350 sch_ep->pkts = roundup_pow_of_two(esit_pkts) 351 / sch_ep->esit; 352 353 sch_ep->num_budget_microframes = 354 DIV_ROUND_UP(esit_pkts, sch_ep->pkts); 355 356 sch_ep->repeat = !!(sch_ep->num_budget_microframes > 1); 357 sch_ep->bw_cost_per_microframe = maxpkt * sch_ep->pkts; 358 359 for (i = 0; i < sch_ep->num_budget_microframes - 1; i++) 360 bwb_table[i] = sch_ep->bw_cost_per_microframe; 361 362 /* last one <= bw_cost_per_microframe */ 363 bwb_table[i] = maxpkt * esit_pkts 364 - i * sch_ep->bw_cost_per_microframe; 365 } 366 } else if (is_fs_or_ls(sch_ep->speed)) { 367 sch_ep->pkts = 1; /* at most one packet for each microframe */ 368 369 /* 370 * num_budget_microframes and cs_count will be updated when 371 * check TT for INT_OUT_EP, ISOC/INT_IN_EP type 372 */ 373 sch_ep->cs_count = DIV_ROUND_UP(maxpkt, FS_PAYLOAD_MAX); 374 sch_ep->num_budget_microframes = sch_ep->cs_count; 375 sch_ep->bw_cost_per_microframe = 376 (maxpkt < FS_PAYLOAD_MAX) ? maxpkt : FS_PAYLOAD_MAX; 377 378 /* init budget table */ 379 if (ep_type == ISOC_OUT_EP) { 380 for (i = 0; i < sch_ep->num_budget_microframes; i++) 381 bwb_table[i] = sch_ep->bw_cost_per_microframe; 382 } else if (ep_type == INT_OUT_EP) { 383 /* only first one consumes bandwidth, others as zero */ 384 bwb_table[0] = sch_ep->bw_cost_per_microframe; 385 } else { /* INT_IN_EP or ISOC_IN_EP */ 386 bwb_table[0] = 0; /* start split */ 387 bwb_table[1] = 0; /* idle */ 388 /* 389 * due to cs_count will be updated according to cs 390 * position, assign all remainder budget array 391 * elements as @bw_cost_per_microframe, but only first 392 * @num_budget_microframes elements will be used later 393 */ 394 for (i = 2; i < TT_MICROFRAMES_MAX; i++) 395 bwb_table[i] = sch_ep->bw_cost_per_microframe; 396 } 397 } 398 } 399 400 /* Get maximum bandwidth when we schedule at offset slot. */ 401 static u32 get_max_bw(struct mu3h_sch_bw_info *sch_bw, 402 struct mu3h_sch_ep_info *sch_ep, u32 offset) 403 { 404 u32 num_esit; 405 u32 max_bw = 0; 406 u32 bw; 407 int i; 408 int j; 409 410 num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit; 411 for (i = 0; i < num_esit; i++) { 412 u32 base = offset + i * sch_ep->esit; 413 414 for (j = 0; j < sch_ep->num_budget_microframes; j++) { 415 bw = sch_bw->bus_bw[base + j] + 416 sch_ep->bw_budget_table[j]; 417 if (bw > max_bw) 418 max_bw = bw; 419 } 420 } 421 return max_bw; 422 } 423 424 static void update_bus_bw(struct mu3h_sch_bw_info *sch_bw, 425 struct mu3h_sch_ep_info *sch_ep, bool used) 426 { 427 u32 num_esit; 428 u32 base; 429 int i; 430 int j; 431 432 num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit; 433 for (i = 0; i < num_esit; i++) { 434 base = sch_ep->offset + i * sch_ep->esit; 435 for (j = 0; j < sch_ep->num_budget_microframes; j++) { 436 if (used) 437 sch_bw->bus_bw[base + j] += 438 sch_ep->bw_budget_table[j]; 439 else 440 sch_bw->bus_bw[base + j] -= 441 sch_ep->bw_budget_table[j]; 442 } 443 } 444 } 445 446 static int check_fs_bus_bw(struct mu3h_sch_ep_info *sch_ep, int offset) 447 { 448 struct mu3h_sch_tt *tt = sch_ep->sch_tt; 449 u32 num_esit, tmp; 450 int base; 451 int i, j; 452 453 num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit; 454 for (i = 0; i < num_esit; i++) { 455 base = offset + i * sch_ep->esit; 456 457 /* 458 * Compared with hs bus, no matter what ep type, 459 * the hub will always delay one uframe to send data 460 */ 461 for (j = 0; j < sch_ep->cs_count; j++) { 462 tmp = tt->fs_bus_bw[base + j] + sch_ep->bw_cost_per_microframe; 463 if (tmp > FS_PAYLOAD_MAX) 464 return -ESCH_BW_OVERFLOW; 465 } 466 } 467 468 return 0; 469 } 470 471 static int check_sch_tt(struct mu3h_sch_ep_info *sch_ep, u32 offset) 472 { 473 struct mu3h_sch_tt *tt = sch_ep->sch_tt; 474 u32 extra_cs_count; 475 u32 start_ss, last_ss; 476 u32 start_cs, last_cs; 477 int i; 478 479 start_ss = offset % 8; 480 481 if (sch_ep->ep_type == ISOC_OUT_EP) { 482 last_ss = start_ss + sch_ep->cs_count - 1; 483 484 /* 485 * usb_20 spec section11.18: 486 * must never schedule Start-Split in Y6 487 */ 488 if (!(start_ss == 7 || last_ss < 6)) 489 return -ESCH_SS_Y6; 490 491 for (i = 0; i < sch_ep->cs_count; i++) 492 if (test_bit(offset + i, tt->ss_bit_map)) 493 return -ESCH_SS_OVERLAP; 494 495 } else { 496 u32 cs_count = DIV_ROUND_UP(sch_ep->maxpkt, FS_PAYLOAD_MAX); 497 498 /* 499 * usb_20 spec section11.18: 500 * must never schedule Start-Split in Y6 501 */ 502 if (start_ss == 6) 503 return -ESCH_SS_Y6; 504 505 /* one uframe for ss + one uframe for idle */ 506 start_cs = (start_ss + 2) % 8; 507 last_cs = start_cs + cs_count - 1; 508 509 if (last_cs > 7) 510 return -ESCH_CS_OVERFLOW; 511 512 if (sch_ep->ep_type == ISOC_IN_EP) 513 extra_cs_count = (last_cs == 7) ? 1 : 2; 514 else /* ep_type : INTR IN / INTR OUT */ 515 extra_cs_count = 1; 516 517 cs_count += extra_cs_count; 518 if (cs_count > 7) 519 cs_count = 7; /* HW limit */ 520 521 if (test_bit(offset, tt->ss_bit_map)) 522 return -ESCH_SS_OVERLAP; 523 524 sch_ep->cs_count = cs_count; 525 /* one for ss, the other for idle */ 526 sch_ep->num_budget_microframes = cs_count + 2; 527 528 /* 529 * if interval=1, maxp >752, num_budge_micoframe is larger 530 * than sch_ep->esit, will overstep boundary 531 */ 532 if (sch_ep->num_budget_microframes > sch_ep->esit) 533 sch_ep->num_budget_microframes = sch_ep->esit; 534 } 535 536 return check_fs_bus_bw(sch_ep, offset); 537 } 538 539 static void update_sch_tt(struct mu3h_sch_ep_info *sch_ep, bool used) 540 { 541 struct mu3h_sch_tt *tt = sch_ep->sch_tt; 542 u32 base, num_esit; 543 int bw_updated; 544 int bits; 545 int i, j; 546 547 num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit; 548 bits = (sch_ep->ep_type == ISOC_OUT_EP) ? sch_ep->cs_count : 1; 549 550 if (used) 551 bw_updated = sch_ep->bw_cost_per_microframe; 552 else 553 bw_updated = -sch_ep->bw_cost_per_microframe; 554 555 for (i = 0; i < num_esit; i++) { 556 base = sch_ep->offset + i * sch_ep->esit; 557 558 for (j = 0; j < bits; j++) { 559 if (used) 560 set_bit(base + j, tt->ss_bit_map); 561 else 562 clear_bit(base + j, tt->ss_bit_map); 563 } 564 565 for (j = 0; j < sch_ep->cs_count; j++) 566 tt->fs_bus_bw[base + j] += bw_updated; 567 } 568 569 if (used) 570 list_add_tail(&sch_ep->tt_endpoint, &tt->ep_list); 571 else 572 list_del(&sch_ep->tt_endpoint); 573 } 574 575 static int load_ep_bw(struct mu3h_sch_bw_info *sch_bw, 576 struct mu3h_sch_ep_info *sch_ep, bool loaded) 577 { 578 if (sch_ep->sch_tt) 579 update_sch_tt(sch_ep, loaded); 580 581 /* update bus bandwidth info */ 582 update_bus_bw(sch_bw, sch_ep, loaded); 583 sch_ep->allocated = loaded; 584 585 return 0; 586 } 587 588 static u32 get_esit_boundary(struct mu3h_sch_ep_info *sch_ep) 589 { 590 u32 boundary = sch_ep->esit; 591 592 if (sch_ep->sch_tt) { /* LS/FS with TT */ 593 /* tune for CS */ 594 if (sch_ep->ep_type != ISOC_OUT_EP) 595 boundary++; 596 else if (boundary > 1) /* normally esit >= 8 for FS/LS */ 597 boundary--; 598 } 599 600 return boundary; 601 } 602 603 static int check_sch_bw(struct mu3h_sch_bw_info *sch_bw, 604 struct mu3h_sch_ep_info *sch_ep) 605 { 606 u32 offset; 607 u32 min_bw; 608 u32 min_index; 609 u32 worst_bw; 610 u32 bw_boundary; 611 u32 esit_boundary; 612 u32 min_num_budget; 613 u32 min_cs_count; 614 int ret = 0; 615 616 /* 617 * Search through all possible schedule microframes. 618 * and find a microframe where its worst bandwidth is minimum. 619 */ 620 min_bw = ~0; 621 min_index = 0; 622 min_cs_count = sch_ep->cs_count; 623 min_num_budget = sch_ep->num_budget_microframes; 624 esit_boundary = get_esit_boundary(sch_ep); 625 for (offset = 0; offset < sch_ep->esit; offset++) { 626 if (sch_ep->sch_tt) { 627 ret = check_sch_tt(sch_ep, offset); 628 if (ret) 629 continue; 630 } 631 632 if ((offset + sch_ep->num_budget_microframes) > esit_boundary) 633 break; 634 635 worst_bw = get_max_bw(sch_bw, sch_ep, offset); 636 if (min_bw > worst_bw) { 637 min_bw = worst_bw; 638 min_index = offset; 639 min_cs_count = sch_ep->cs_count; 640 min_num_budget = sch_ep->num_budget_microframes; 641 } 642 if (min_bw == 0) 643 break; 644 } 645 646 bw_boundary = get_bw_boundary(sch_ep->speed); 647 /* check bandwidth */ 648 if (min_bw > bw_boundary) 649 return ret ? ret : -ESCH_BW_OVERFLOW; 650 651 sch_ep->offset = min_index; 652 sch_ep->cs_count = min_cs_count; 653 sch_ep->num_budget_microframes = min_num_budget; 654 655 return load_ep_bw(sch_bw, sch_ep, true); 656 } 657 658 static void destroy_sch_ep(struct usb_device *udev, 659 struct mu3h_sch_bw_info *sch_bw, struct mu3h_sch_ep_info *sch_ep) 660 { 661 /* only release ep bw check passed by check_sch_bw() */ 662 if (sch_ep->allocated) 663 load_ep_bw(sch_bw, sch_ep, false); 664 665 if (sch_ep->sch_tt) 666 drop_tt(udev); 667 668 list_del(&sch_ep->endpoint); 669 kfree(sch_ep); 670 } 671 672 static bool need_bw_sch(struct usb_host_endpoint *ep, 673 enum usb_device_speed speed, int has_tt) 674 { 675 /* only for periodic endpoints */ 676 if (usb_endpoint_xfer_control(&ep->desc) 677 || usb_endpoint_xfer_bulk(&ep->desc)) 678 return false; 679 680 /* 681 * for LS & FS periodic endpoints which its device is not behind 682 * a TT are also ignored, root-hub will schedule them directly, 683 * but need set @bpkts field of endpoint context to 1. 684 */ 685 if (is_fs_or_ls(speed) && !has_tt) 686 return false; 687 688 /* skip endpoint with zero maxpkt */ 689 if (usb_endpoint_maxp(&ep->desc) == 0) 690 return false; 691 692 return true; 693 } 694 695 int xhci_mtk_sch_init(struct xhci_hcd_mtk *mtk) 696 { 697 struct xhci_hcd *xhci = hcd_to_xhci(mtk->hcd); 698 struct mu3h_sch_bw_info *sch_array; 699 int num_usb_bus; 700 int i; 701 702 /* ss IN and OUT are separated */ 703 num_usb_bus = xhci->usb3_rhub.num_ports * 2 + xhci->usb2_rhub.num_ports; 704 705 sch_array = kcalloc(num_usb_bus, sizeof(*sch_array), GFP_KERNEL); 706 if (sch_array == NULL) 707 return -ENOMEM; 708 709 for (i = 0; i < num_usb_bus; i++) 710 INIT_LIST_HEAD(&sch_array[i].bw_ep_list); 711 712 mtk->sch_array = sch_array; 713 714 INIT_LIST_HEAD(&mtk->bw_ep_chk_list); 715 716 return 0; 717 } 718 719 void xhci_mtk_sch_exit(struct xhci_hcd_mtk *mtk) 720 { 721 kfree(mtk->sch_array); 722 } 723 724 static int add_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev, 725 struct usb_host_endpoint *ep) 726 { 727 struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd); 728 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 729 struct xhci_ep_ctx *ep_ctx; 730 struct xhci_virt_device *virt_dev; 731 struct mu3h_sch_ep_info *sch_ep; 732 unsigned int ep_index; 733 734 virt_dev = xhci->devs[udev->slot_id]; 735 ep_index = xhci_get_endpoint_index(&ep->desc); 736 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index); 737 738 xhci_dbg(xhci, "%s %s\n", __func__, decode_ep(ep, udev->speed)); 739 740 if (!need_bw_sch(ep, udev->speed, !!virt_dev->tt_info)) { 741 /* 742 * set @bpkts to 1 if it is LS or FS periodic endpoint, and its 743 * device does not connected through an external HS hub 744 */ 745 if (usb_endpoint_xfer_int(&ep->desc) 746 || usb_endpoint_xfer_isoc(&ep->desc)) 747 ep_ctx->reserved[0] = cpu_to_le32(EP_BPKTS(1)); 748 749 return 0; 750 } 751 752 sch_ep = create_sch_ep(udev, ep, ep_ctx); 753 if (IS_ERR_OR_NULL(sch_ep)) 754 return -ENOMEM; 755 756 setup_sch_info(ep_ctx, sch_ep); 757 758 list_add_tail(&sch_ep->endpoint, &mtk->bw_ep_chk_list); 759 760 return 0; 761 } 762 763 static void drop_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev, 764 struct usb_host_endpoint *ep) 765 { 766 struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd); 767 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 768 struct xhci_virt_device *virt_dev; 769 struct mu3h_sch_bw_info *sch_bw; 770 struct mu3h_sch_ep_info *sch_ep, *tmp; 771 772 virt_dev = xhci->devs[udev->slot_id]; 773 774 xhci_dbg(xhci, "%s %s\n", __func__, decode_ep(ep, udev->speed)); 775 776 if (!need_bw_sch(ep, udev->speed, !!virt_dev->tt_info)) 777 return; 778 779 sch_bw = get_bw_info(mtk, udev, ep); 780 781 list_for_each_entry_safe(sch_ep, tmp, &sch_bw->bw_ep_list, endpoint) { 782 if (sch_ep->ep == ep) { 783 destroy_sch_ep(udev, sch_bw, sch_ep); 784 break; 785 } 786 } 787 } 788 789 int xhci_mtk_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev) 790 { 791 struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd); 792 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 793 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id]; 794 struct mu3h_sch_bw_info *sch_bw; 795 struct mu3h_sch_ep_info *sch_ep, *tmp; 796 int ret; 797 798 xhci_dbg(xhci, "%s() udev %s\n", __func__, dev_name(&udev->dev)); 799 800 list_for_each_entry(sch_ep, &mtk->bw_ep_chk_list, endpoint) { 801 sch_bw = get_bw_info(mtk, udev, sch_ep->ep); 802 803 ret = check_sch_bw(sch_bw, sch_ep); 804 if (ret) { 805 xhci_err(xhci, "Not enough bandwidth! (%s)\n", 806 sch_error_string(-ret)); 807 return -ENOSPC; 808 } 809 } 810 811 list_for_each_entry_safe(sch_ep, tmp, &mtk->bw_ep_chk_list, endpoint) { 812 struct xhci_ep_ctx *ep_ctx; 813 struct usb_host_endpoint *ep = sch_ep->ep; 814 unsigned int ep_index = xhci_get_endpoint_index(&ep->desc); 815 816 sch_bw = get_bw_info(mtk, udev, ep); 817 list_move_tail(&sch_ep->endpoint, &sch_bw->bw_ep_list); 818 819 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index); 820 ep_ctx->reserved[0] = cpu_to_le32(EP_BPKTS(sch_ep->pkts) 821 | EP_BCSCOUNT(sch_ep->cs_count) 822 | EP_BBM(sch_ep->burst_mode)); 823 ep_ctx->reserved[1] = cpu_to_le32(EP_BOFFSET(sch_ep->offset) 824 | EP_BREPEAT(sch_ep->repeat)); 825 826 xhci_dbg(xhci, " PKTS:%x, CSCOUNT:%x, BM:%x, OFFSET:%x, REPEAT:%x\n", 827 sch_ep->pkts, sch_ep->cs_count, sch_ep->burst_mode, 828 sch_ep->offset, sch_ep->repeat); 829 } 830 831 return xhci_check_bandwidth(hcd, udev); 832 } 833 834 void xhci_mtk_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev) 835 { 836 struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd); 837 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 838 struct mu3h_sch_bw_info *sch_bw; 839 struct mu3h_sch_ep_info *sch_ep, *tmp; 840 841 xhci_dbg(xhci, "%s() udev %s\n", __func__, dev_name(&udev->dev)); 842 843 list_for_each_entry_safe(sch_ep, tmp, &mtk->bw_ep_chk_list, endpoint) { 844 sch_bw = get_bw_info(mtk, udev, sch_ep->ep); 845 destroy_sch_ep(udev, sch_bw, sch_ep); 846 } 847 848 xhci_reset_bandwidth(hcd, udev); 849 } 850 851 int xhci_mtk_add_ep(struct usb_hcd *hcd, struct usb_device *udev, 852 struct usb_host_endpoint *ep) 853 { 854 int ret; 855 856 ret = xhci_add_endpoint(hcd, udev, ep); 857 if (ret) 858 return ret; 859 860 if (ep->hcpriv) 861 ret = add_ep_quirk(hcd, udev, ep); 862 863 return ret; 864 } 865 866 int xhci_mtk_drop_ep(struct usb_hcd *hcd, struct usb_device *udev, 867 struct usb_host_endpoint *ep) 868 { 869 int ret; 870 871 ret = xhci_drop_endpoint(hcd, udev, ep); 872 if (ret) 873 return ret; 874 875 if (ep->hcpriv) 876 drop_ep_quirk(hcd, udev, ep); 877 878 return 0; 879 } 880