1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * XHCI extended capability handling 4 * 5 * Copyright (c) 2017 Hans de Goede <hdegoede@redhat.com> 6 */ 7 8 #include <linux/platform_device.h> 9 #include <linux/property.h> 10 #include <linux/pci.h> 11 #include "xhci.h" 12 13 #define USB_SW_DRV_NAME "intel_xhci_usb_sw" 14 #define USB_SW_RESOURCE_SIZE 0x400 15 16 #define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI 0x22b5 17 18 static const struct property_entry role_switch_props[] = { 19 PROPERTY_ENTRY_BOOL("sw_switch_disable"), 20 {}, 21 }; 22 23 static void xhci_intel_unregister_pdev(void *arg) 24 { 25 platform_device_unregister(arg); 26 } 27 28 static int xhci_create_intel_xhci_sw_pdev(struct xhci_hcd *xhci, u32 cap_offset) 29 { 30 struct usb_hcd *hcd = xhci_to_hcd(xhci); 31 struct device *dev = hcd->self.controller; 32 struct platform_device *pdev; 33 struct pci_dev *pci = to_pci_dev(dev); 34 struct resource res = { 0, }; 35 int ret; 36 37 pdev = platform_device_alloc(USB_SW_DRV_NAME, PLATFORM_DEVID_NONE); 38 if (!pdev) { 39 xhci_err(xhci, "couldn't allocate %s platform device\n", 40 USB_SW_DRV_NAME); 41 return -ENOMEM; 42 } 43 44 res.start = hcd->rsrc_start + cap_offset; 45 res.end = res.start + USB_SW_RESOURCE_SIZE - 1; 46 res.name = USB_SW_DRV_NAME; 47 res.flags = IORESOURCE_MEM; 48 49 ret = platform_device_add_resources(pdev, &res, 1); 50 if (ret) { 51 dev_err(dev, "couldn't add resources to intel_xhci_usb_sw pdev\n"); 52 platform_device_put(pdev); 53 return ret; 54 } 55 56 if (pci->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) { 57 ret = platform_device_add_properties(pdev, role_switch_props); 58 if (ret) { 59 dev_err(dev, "failed to register device properties\n"); 60 return ret; 61 } 62 } 63 64 pdev->dev.parent = dev; 65 66 ret = platform_device_add(pdev); 67 if (ret) { 68 dev_err(dev, "couldn't register intel_xhci_usb_sw pdev\n"); 69 platform_device_put(pdev); 70 return ret; 71 } 72 73 ret = devm_add_action_or_reset(dev, xhci_intel_unregister_pdev, pdev); 74 if (ret) { 75 dev_err(dev, "couldn't add unregister action for intel_xhci_usb_sw pdev\n"); 76 return ret; 77 } 78 79 return 0; 80 } 81 82 int xhci_ext_cap_init(struct xhci_hcd *xhci) 83 { 84 void __iomem *base = &xhci->cap_regs->hc_capbase; 85 u32 offset, val; 86 int ret; 87 88 offset = xhci_find_next_ext_cap(base, 0, 0); 89 90 while (offset) { 91 val = readl(base + offset); 92 93 switch (XHCI_EXT_CAPS_ID(val)) { 94 case XHCI_EXT_CAPS_VENDOR_INTEL: 95 if (xhci->quirks & XHCI_INTEL_USB_ROLE_SW) { 96 ret = xhci_create_intel_xhci_sw_pdev(xhci, 97 offset); 98 if (ret) 99 return ret; 100 } 101 break; 102 } 103 offset = xhci_find_next_ext_cap(base, offset, 0); 104 } 105 106 return 0; 107 } 108 EXPORT_SYMBOL_GPL(xhci_ext_cap_init); 109