xref: /openbmc/linux/drivers/usb/host/uhci-pci.c (revision 6aa7de05)
1 /*
2  * UHCI HCD (Host Controller Driver) PCI Bus Glue.
3  *
4  * Extracted from uhci-hcd.c:
5  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6  *
7  * (C) Copyright 1999 Linus Torvalds
8  * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
9  * (C) Copyright 1999 Randy Dunlap
10  * (C) Copyright 1999 Georg Acher, acher@in.tum.de
11  * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
12  * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
13  * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
14  * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
15  *               support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
16  * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
17  * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
18  */
19 
20 #include "pci-quirks.h"
21 
22 /*
23  * Make sure the controller is completely inactive, unable to
24  * generate interrupts or do DMA.
25  */
26 static void uhci_pci_reset_hc(struct uhci_hcd *uhci)
27 {
28 	uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
29 }
30 
31 /*
32  * Initialize a controller that was newly discovered or has just been
33  * resumed.  In either case we can't be sure of its previous state.
34  *
35  * Returns: 1 if the controller was reset, 0 otherwise.
36  */
37 static int uhci_pci_check_and_reset_hc(struct uhci_hcd *uhci)
38 {
39 	return uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)),
40 				uhci->io_addr);
41 }
42 
43 /*
44  * Store the basic register settings needed by the controller.
45  * This function is called at the end of configure_hc in uhci-hcd.c.
46  */
47 static void uhci_pci_configure_hc(struct uhci_hcd *uhci)
48 {
49 	struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
50 
51 	/* Enable PIRQ */
52 	pci_write_config_word(pdev, USBLEGSUP, USBLEGSUP_DEFAULT);
53 
54 	/* Disable platform-specific non-PME# wakeup */
55 	if (pdev->vendor == PCI_VENDOR_ID_INTEL)
56 		pci_write_config_byte(pdev, USBRES_INTEL, 0);
57 }
58 
59 static int uhci_pci_resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
60 {
61 	int port;
62 
63 	switch (to_pci_dev(uhci_dev(uhci))->vendor) {
64 	default:
65 		break;
66 
67 	case PCI_VENDOR_ID_GENESYS:
68 		/* Genesys Logic's GL880S controllers don't generate
69 		 * resume-detect interrupts.
70 		 */
71 		return 1;
72 
73 	case PCI_VENDOR_ID_INTEL:
74 		/* Some of Intel's USB controllers have a bug that causes
75 		 * resume-detect interrupts if any port has an over-current
76 		 * condition.  To make matters worse, some motherboards
77 		 * hardwire unused USB ports' over-current inputs active!
78 		 * To prevent problems, we will not enable resume-detect
79 		 * interrupts if any ports are OC.
80 		 */
81 		for (port = 0; port < uhci->rh_numports; ++port) {
82 			if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
83 					USBPORTSC_OC)
84 				return 1;
85 		}
86 		break;
87 	}
88 	return 0;
89 }
90 
91 static int uhci_pci_global_suspend_mode_is_broken(struct uhci_hcd *uhci)
92 {
93 	int port;
94 	const char *sys_info;
95 	static const char bad_Asus_board[] = "A7V8X";
96 
97 	/* One of Asus's motherboards has a bug which causes it to
98 	 * wake up immediately from suspend-to-RAM if any of the ports
99 	 * are connected.  In such cases we will not set EGSM.
100 	 */
101 	sys_info = dmi_get_system_info(DMI_BOARD_NAME);
102 	if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
103 		for (port = 0; port < uhci->rh_numports; ++port) {
104 			if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
105 					USBPORTSC_CCS)
106 				return 1;
107 		}
108 	}
109 
110 	return 0;
111 }
112 
113 static int uhci_pci_init(struct usb_hcd *hcd)
114 {
115 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
116 
117 	uhci->io_addr = (unsigned long) hcd->rsrc_start;
118 
119 	uhci->rh_numports = uhci_count_ports(hcd);
120 
121 	/* Intel controllers report the OverCurrent bit active on.
122 	 * VIA controllers report it active off, so we'll adjust the
123 	 * bit value.  (It's not standardized in the UHCI spec.)
124 	 */
125 	if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_VIA)
126 		uhci->oc_low = 1;
127 
128 	/* HP's server management chip requires a longer port reset delay. */
129 	if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_HP)
130 		uhci->wait_for_hp = 1;
131 
132 	/* Intel controllers use non-PME wakeup signalling */
133 	if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_INTEL)
134 		device_set_wakeup_capable(uhci_dev(uhci), true);
135 
136 	/* Set up pointers to PCI-specific functions */
137 	uhci->reset_hc = uhci_pci_reset_hc;
138 	uhci->check_and_reset_hc = uhci_pci_check_and_reset_hc;
139 	uhci->configure_hc = uhci_pci_configure_hc;
140 	uhci->resume_detect_interrupts_are_broken =
141 		uhci_pci_resume_detect_interrupts_are_broken;
142 	uhci->global_suspend_mode_is_broken =
143 		uhci_pci_global_suspend_mode_is_broken;
144 
145 
146 	/* Kick BIOS off this hardware and reset if the controller
147 	 * isn't already safely quiescent.
148 	 */
149 	check_and_reset_hc(uhci);
150 	return 0;
151 }
152 
153 /* Make sure the controller is quiescent and that we're not using it
154  * any more.  This is mainly for the benefit of programs which, like kexec,
155  * expect the hardware to be idle: not doing DMA or generating IRQs.
156  *
157  * This routine may be called in a damaged or failing kernel.  Hence we
158  * do not acquire the spinlock before shutting down the controller.
159  */
160 static void uhci_shutdown(struct pci_dev *pdev)
161 {
162 	struct usb_hcd *hcd = pci_get_drvdata(pdev);
163 
164 	uhci_hc_died(hcd_to_uhci(hcd));
165 }
166 
167 #ifdef CONFIG_PM
168 
169 static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated);
170 
171 static int uhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
172 {
173 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
174 	struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
175 	int rc = 0;
176 
177 	dev_dbg(uhci_dev(uhci), "%s\n", __func__);
178 
179 	spin_lock_irq(&uhci->lock);
180 	if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
181 		goto done_okay;		/* Already suspended or dead */
182 
183 	/* All PCI host controllers are required to disable IRQ generation
184 	 * at the source, so we must turn off PIRQ.
185 	 */
186 	pci_write_config_word(pdev, USBLEGSUP, 0);
187 	clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
188 
189 	/* Enable platform-specific non-PME# wakeup */
190 	if (do_wakeup) {
191 		if (pdev->vendor == PCI_VENDOR_ID_INTEL)
192 			pci_write_config_byte(pdev, USBRES_INTEL,
193 					USBPORT1EN | USBPORT2EN);
194 	}
195 
196 done_okay:
197 	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
198 	spin_unlock_irq(&uhci->lock);
199 
200 	synchronize_irq(hcd->irq);
201 
202 	/* Check for race with a wakeup request */
203 	if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
204 		uhci_pci_resume(hcd, false);
205 		rc = -EBUSY;
206 	}
207 	return rc;
208 }
209 
210 static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
211 {
212 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
213 
214 	dev_dbg(uhci_dev(uhci), "%s\n", __func__);
215 
216 	/* Since we aren't in D3 any more, it's safe to set this flag
217 	 * even if the controller was dead.
218 	 */
219 	set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
220 
221 	spin_lock_irq(&uhci->lock);
222 
223 	/* Make sure resume from hibernation re-enumerates everything */
224 	if (hibernated) {
225 		uhci->reset_hc(uhci);
226 		finish_reset(uhci);
227 	}
228 
229 	/* The firmware may have changed the controller settings during
230 	 * a system wakeup.  Check it and reconfigure to avoid problems.
231 	 */
232 	else {
233 		check_and_reset_hc(uhci);
234 	}
235 	configure_hc(uhci);
236 
237 	/* Tell the core if the controller had to be reset */
238 	if (uhci->rh_state == UHCI_RH_RESET)
239 		usb_root_hub_lost_power(hcd->self.root_hub);
240 
241 	spin_unlock_irq(&uhci->lock);
242 
243 	/* If interrupts don't work and remote wakeup is enabled then
244 	 * the suspended root hub needs to be polled.
245 	 */
246 	if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup)
247 		set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
248 
249 	/* Does the root hub have a port wakeup pending? */
250 	usb_hcd_poll_rh_status(hcd);
251 	return 0;
252 }
253 
254 #endif
255 
256 static const struct hc_driver uhci_driver = {
257 	.description =		hcd_name,
258 	.product_desc =		"UHCI Host Controller",
259 	.hcd_priv_size =	sizeof(struct uhci_hcd),
260 
261 	/* Generic hardware linkage */
262 	.irq =			uhci_irq,
263 	.flags =		HCD_USB11,
264 
265 	/* Basic lifecycle operations */
266 	.reset =		uhci_pci_init,
267 	.start =		uhci_start,
268 #ifdef CONFIG_PM
269 	.pci_suspend =		uhci_pci_suspend,
270 	.pci_resume =		uhci_pci_resume,
271 	.bus_suspend =		uhci_rh_suspend,
272 	.bus_resume =		uhci_rh_resume,
273 #endif
274 	.stop =			uhci_stop,
275 
276 	.urb_enqueue =		uhci_urb_enqueue,
277 	.urb_dequeue =		uhci_urb_dequeue,
278 
279 	.endpoint_disable =	uhci_hcd_endpoint_disable,
280 	.get_frame_number =	uhci_hcd_get_frame_number,
281 
282 	.hub_status_data =	uhci_hub_status_data,
283 	.hub_control =		uhci_hub_control,
284 };
285 
286 static const struct pci_device_id uhci_pci_ids[] = { {
287 	/* handle any USB UHCI controller */
288 	PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
289 	.driver_data =	(unsigned long) &uhci_driver,
290 	}, { /* end: all zeroes */ }
291 };
292 
293 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
294 
295 static struct pci_driver uhci_pci_driver = {
296 	.name =		(char *)hcd_name,
297 	.id_table =	uhci_pci_ids,
298 
299 	.probe =	usb_hcd_pci_probe,
300 	.remove =	usb_hcd_pci_remove,
301 	.shutdown =	uhci_shutdown,
302 
303 #ifdef CONFIG_PM
304 	.driver =	{
305 		.pm =	&usb_hcd_pci_pm_ops
306 	},
307 #endif
308 };
309 
310 MODULE_SOFTDEP("pre: ehci_pci");
311