1 /* 2 * Universal Host Controller Interface driver for USB. 3 * 4 * Maintainer: Alan Stern <stern@rowland.harvard.edu> 5 * 6 * (C) Copyright 1999 Linus Torvalds 7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com 8 * (C) Copyright 1999 Randy Dunlap 9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de 10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de 11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch 12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at 13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface 14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com). 15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c) 16 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu 17 * 18 * Intel documents this fairly well, and as far as I know there 19 * are no royalties or anything like that, but even so there are 20 * people who decided that they want to do the same thing in a 21 * completely different way. 22 * 23 */ 24 25 #include <linux/module.h> 26 #include <linux/pci.h> 27 #include <linux/kernel.h> 28 #include <linux/init.h> 29 #include <linux/delay.h> 30 #include <linux/ioport.h> 31 #include <linux/slab.h> 32 #include <linux/errno.h> 33 #include <linux/unistd.h> 34 #include <linux/interrupt.h> 35 #include <linux/spinlock.h> 36 #include <linux/debugfs.h> 37 #include <linux/pm.h> 38 #include <linux/dmapool.h> 39 #include <linux/dma-mapping.h> 40 #include <linux/usb.h> 41 #include <linux/bitops.h> 42 #include <linux/dmi.h> 43 44 #include <asm/uaccess.h> 45 #include <asm/io.h> 46 #include <asm/irq.h> 47 #include <asm/system.h> 48 49 #include "../core/hcd.h" 50 #include "uhci-hcd.h" 51 #include "pci-quirks.h" 52 53 /* 54 * Version Information 55 */ 56 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \ 57 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \ 58 Alan Stern" 59 #define DRIVER_DESC "USB Universal Host Controller Interface driver" 60 61 /* for flakey hardware, ignore overcurrent indicators */ 62 static int ignore_oc; 63 module_param(ignore_oc, bool, S_IRUGO); 64 MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications"); 65 66 /* 67 * debug = 0, no debugging messages 68 * debug = 1, dump failed URBs except for stalls 69 * debug = 2, dump all failed URBs (including stalls) 70 * show all queues in /debug/uhci/[pci_addr] 71 * debug = 3, show all TDs in URBs when dumping 72 */ 73 #ifdef DEBUG 74 #define DEBUG_CONFIGURED 1 75 static int debug = 1; 76 module_param(debug, int, S_IRUGO | S_IWUSR); 77 MODULE_PARM_DESC(debug, "Debug level"); 78 79 #else 80 #define DEBUG_CONFIGURED 0 81 #define debug 0 82 #endif 83 84 static char *errbuf; 85 #define ERRBUF_LEN (32 * 1024) 86 87 static struct kmem_cache *uhci_up_cachep; /* urb_priv */ 88 89 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state); 90 static void wakeup_rh(struct uhci_hcd *uhci); 91 static void uhci_get_current_frame_number(struct uhci_hcd *uhci); 92 93 /* 94 * Calculate the link pointer DMA value for the first Skeleton QH in a frame. 95 */ 96 static __le32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame) 97 { 98 int skelnum; 99 100 /* 101 * The interrupt queues will be interleaved as evenly as possible. 102 * There's not much to be done about period-1 interrupts; they have 103 * to occur in every frame. But we can schedule period-2 interrupts 104 * in odd-numbered frames, period-4 interrupts in frames congruent 105 * to 2 (mod 4), and so on. This way each frame only has two 106 * interrupt QHs, which will help spread out bandwidth utilization. 107 * 108 * ffs (Find First bit Set) does exactly what we need: 109 * 1,3,5,... => ffs = 0 => use period-2 QH = skelqh[8], 110 * 2,6,10,... => ffs = 1 => use period-4 QH = skelqh[7], etc. 111 * ffs >= 7 => not on any high-period queue, so use 112 * period-1 QH = skelqh[9]. 113 * Add in UHCI_NUMFRAMES to insure at least one bit is set. 114 */ 115 skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES); 116 if (skelnum <= 1) 117 skelnum = 9; 118 return LINK_TO_QH(uhci->skelqh[skelnum]); 119 } 120 121 #include "uhci-debug.c" 122 #include "uhci-q.c" 123 #include "uhci-hub.c" 124 125 /* 126 * Finish up a host controller reset and update the recorded state. 127 */ 128 static void finish_reset(struct uhci_hcd *uhci) 129 { 130 int port; 131 132 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect 133 * bits in the port status and control registers. 134 * We have to clear them by hand. 135 */ 136 for (port = 0; port < uhci->rh_numports; ++port) 137 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2)); 138 139 uhci->port_c_suspend = uhci->resuming_ports = 0; 140 uhci->rh_state = UHCI_RH_RESET; 141 uhci->is_stopped = UHCI_IS_STOPPED; 142 uhci_to_hcd(uhci)->state = HC_STATE_HALT; 143 uhci_to_hcd(uhci)->poll_rh = 0; 144 145 uhci->dead = 0; /* Full reset resurrects the controller */ 146 } 147 148 /* 149 * Last rites for a defunct/nonfunctional controller 150 * or one we don't want to use any more. 151 */ 152 static void uhci_hc_died(struct uhci_hcd *uhci) 153 { 154 uhci_get_current_frame_number(uhci); 155 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr); 156 finish_reset(uhci); 157 uhci->dead = 1; 158 159 /* The current frame may already be partway finished */ 160 ++uhci->frame_number; 161 } 162 163 /* 164 * Initialize a controller that was newly discovered or has lost power 165 * or otherwise been reset while it was suspended. In none of these cases 166 * can we be sure of its previous state. 167 */ 168 static void check_and_reset_hc(struct uhci_hcd *uhci) 169 { 170 if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr)) 171 finish_reset(uhci); 172 } 173 174 /* 175 * Store the basic register settings needed by the controller. 176 */ 177 static void configure_hc(struct uhci_hcd *uhci) 178 { 179 /* Set the frame length to the default: 1 ms exactly */ 180 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF); 181 182 /* Store the frame list base address */ 183 outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD); 184 185 /* Set the current frame number */ 186 outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER, 187 uhci->io_addr + USBFRNUM); 188 189 /* Mark controller as not halted before we enable interrupts */ 190 uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED; 191 mb(); 192 193 /* Enable PIRQ */ 194 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 195 USBLEGSUP_DEFAULT); 196 } 197 198 199 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci) 200 { 201 int port; 202 203 /* If we have to ignore overcurrent events then almost by definition 204 * we can't depend on resume-detect interrupts. */ 205 if (ignore_oc) 206 return 1; 207 208 switch (to_pci_dev(uhci_dev(uhci))->vendor) { 209 default: 210 break; 211 212 case PCI_VENDOR_ID_GENESYS: 213 /* Genesys Logic's GL880S controllers don't generate 214 * resume-detect interrupts. 215 */ 216 return 1; 217 218 case PCI_VENDOR_ID_INTEL: 219 /* Some of Intel's USB controllers have a bug that causes 220 * resume-detect interrupts if any port has an over-current 221 * condition. To make matters worse, some motherboards 222 * hardwire unused USB ports' over-current inputs active! 223 * To prevent problems, we will not enable resume-detect 224 * interrupts if any ports are OC. 225 */ 226 for (port = 0; port < uhci->rh_numports; ++port) { 227 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) & 228 USBPORTSC_OC) 229 return 1; 230 } 231 break; 232 } 233 return 0; 234 } 235 236 static int global_suspend_mode_is_broken(struct uhci_hcd *uhci) 237 { 238 int port; 239 const char *sys_info; 240 static char bad_Asus_board[] = "A7V8X"; 241 242 /* One of Asus's motherboards has a bug which causes it to 243 * wake up immediately from suspend-to-RAM if any of the ports 244 * are connected. In such cases we will not set EGSM. 245 */ 246 sys_info = dmi_get_system_info(DMI_BOARD_NAME); 247 if (sys_info && !strcmp(sys_info, bad_Asus_board)) { 248 for (port = 0; port < uhci->rh_numports; ++port) { 249 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) & 250 USBPORTSC_CCS) 251 return 1; 252 } 253 } 254 255 return 0; 256 } 257 258 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state) 259 __releases(uhci->lock) 260 __acquires(uhci->lock) 261 { 262 int auto_stop; 263 int int_enable, egsm_enable, wakeup_enable; 264 struct usb_device *rhdev = uhci_to_hcd(uhci)->self.root_hub; 265 266 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED); 267 dev_dbg(&rhdev->dev, "%s%s\n", __func__, 268 (auto_stop ? " (auto-stop)" : "")); 269 270 /* Start off by assuming Resume-Detect interrupts and EGSM work 271 * and that remote wakeups should be enabled. 272 */ 273 egsm_enable = USBCMD_EGSM; 274 uhci->RD_enable = 1; 275 int_enable = USBINTR_RESUME; 276 wakeup_enable = 1; 277 278 /* In auto-stop mode wakeups must always be detected, but 279 * Resume-Detect interrupts may be prohibited. (In the absence 280 * of CONFIG_PM, they are always disallowed.) 281 */ 282 if (auto_stop) { 283 if (!device_may_wakeup(&rhdev->dev)) 284 int_enable = 0; 285 286 /* In bus-suspend mode wakeups may be disabled, but if they are 287 * allowed then so are Resume-Detect interrupts. 288 */ 289 } else { 290 #ifdef CONFIG_PM 291 if (!rhdev->do_remote_wakeup) 292 wakeup_enable = 0; 293 #endif 294 } 295 296 /* EGSM causes the root hub to echo a 'K' signal (resume) out any 297 * port which requests a remote wakeup. According to the USB spec, 298 * every hub is supposed to do this. But if we are ignoring 299 * remote-wakeup requests anyway then there's no point to it. 300 * We also shouldn't enable EGSM if it's broken. 301 */ 302 if (!wakeup_enable || global_suspend_mode_is_broken(uhci)) 303 egsm_enable = 0; 304 305 /* If we're ignoring wakeup events then there's no reason to 306 * enable Resume-Detect interrupts. We also shouldn't enable 307 * them if they are broken or disallowed. 308 * 309 * This logic may lead us to enabling RD but not EGSM. The UHCI 310 * spec foolishly says that RD works only when EGSM is on, but 311 * there's no harm in enabling it anyway -- perhaps some chips 312 * will implement it! 313 */ 314 if (!wakeup_enable || resume_detect_interrupts_are_broken(uhci) || 315 !int_enable) 316 uhci->RD_enable = int_enable = 0; 317 318 outw(int_enable, uhci->io_addr + USBINTR); 319 outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD); 320 mb(); 321 udelay(5); 322 323 /* If we're auto-stopping then no devices have been attached 324 * for a while, so there shouldn't be any active URBs and the 325 * controller should stop after a few microseconds. Otherwise 326 * we will give the controller one frame to stop. 327 */ 328 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) { 329 uhci->rh_state = UHCI_RH_SUSPENDING; 330 spin_unlock_irq(&uhci->lock); 331 msleep(1); 332 spin_lock_irq(&uhci->lock); 333 if (uhci->dead) 334 return; 335 } 336 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) 337 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n"); 338 339 uhci_get_current_frame_number(uhci); 340 341 uhci->rh_state = new_state; 342 uhci->is_stopped = UHCI_IS_STOPPED; 343 344 /* If interrupts don't work and remote wakeup is enabled then 345 * the suspended root hub needs to be polled. 346 */ 347 uhci_to_hcd(uhci)->poll_rh = (!int_enable && wakeup_enable); 348 349 uhci_scan_schedule(uhci); 350 uhci_fsbr_off(uhci); 351 } 352 353 static void start_rh(struct uhci_hcd *uhci) 354 { 355 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING; 356 uhci->is_stopped = 0; 357 358 /* Mark it configured and running with a 64-byte max packet. 359 * All interrupts are enabled, even though RESUME won't do anything. 360 */ 361 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD); 362 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP, 363 uhci->io_addr + USBINTR); 364 mb(); 365 uhci->rh_state = UHCI_RH_RUNNING; 366 uhci_to_hcd(uhci)->poll_rh = 1; 367 } 368 369 static void wakeup_rh(struct uhci_hcd *uhci) 370 __releases(uhci->lock) 371 __acquires(uhci->lock) 372 { 373 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev, 374 "%s%s\n", __func__, 375 uhci->rh_state == UHCI_RH_AUTO_STOPPED ? 376 " (auto-start)" : ""); 377 378 /* If we are auto-stopped then no devices are attached so there's 379 * no need for wakeup signals. Otherwise we send Global Resume 380 * for 20 ms. 381 */ 382 if (uhci->rh_state == UHCI_RH_SUSPENDED) { 383 unsigned egsm; 384 385 /* Keep EGSM on if it was set before */ 386 egsm = inw(uhci->io_addr + USBCMD) & USBCMD_EGSM; 387 uhci->rh_state = UHCI_RH_RESUMING; 388 outw(USBCMD_FGR | USBCMD_CF | egsm, uhci->io_addr + USBCMD); 389 spin_unlock_irq(&uhci->lock); 390 msleep(20); 391 spin_lock_irq(&uhci->lock); 392 if (uhci->dead) 393 return; 394 395 /* End Global Resume and wait for EOP to be sent */ 396 outw(USBCMD_CF, uhci->io_addr + USBCMD); 397 mb(); 398 udelay(4); 399 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR) 400 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n"); 401 } 402 403 start_rh(uhci); 404 405 /* Restart root hub polling */ 406 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies); 407 } 408 409 static irqreturn_t uhci_irq(struct usb_hcd *hcd) 410 { 411 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 412 unsigned short status; 413 414 /* 415 * Read the interrupt status, and write it back to clear the 416 * interrupt cause. Contrary to the UHCI specification, the 417 * "HC Halted" status bit is persistent: it is RO, not R/WC. 418 */ 419 status = inw(uhci->io_addr + USBSTS); 420 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */ 421 return IRQ_NONE; 422 outw(status, uhci->io_addr + USBSTS); /* Clear it */ 423 424 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) { 425 if (status & USBSTS_HSE) 426 dev_err(uhci_dev(uhci), "host system error, " 427 "PCI problems?\n"); 428 if (status & USBSTS_HCPE) 429 dev_err(uhci_dev(uhci), "host controller process " 430 "error, something bad happened!\n"); 431 if (status & USBSTS_HCH) { 432 spin_lock(&uhci->lock); 433 if (uhci->rh_state >= UHCI_RH_RUNNING) { 434 dev_err(uhci_dev(uhci), 435 "host controller halted, " 436 "very bad!\n"); 437 if (debug > 1 && errbuf) { 438 /* Print the schedule for debugging */ 439 uhci_sprint_schedule(uhci, 440 errbuf, ERRBUF_LEN); 441 lprintk(errbuf); 442 } 443 uhci_hc_died(uhci); 444 445 /* Force a callback in case there are 446 * pending unlinks */ 447 mod_timer(&hcd->rh_timer, jiffies); 448 } 449 spin_unlock(&uhci->lock); 450 } 451 } 452 453 if (status & USBSTS_RD) 454 usb_hcd_poll_rh_status(hcd); 455 else { 456 spin_lock(&uhci->lock); 457 uhci_scan_schedule(uhci); 458 spin_unlock(&uhci->lock); 459 } 460 461 return IRQ_HANDLED; 462 } 463 464 /* 465 * Store the current frame number in uhci->frame_number if the controller 466 * is runnning. Expand from 11 bits (of which we use only 10) to a 467 * full-sized integer. 468 * 469 * Like many other parts of the driver, this code relies on being polled 470 * more than once per second as long as the controller is running. 471 */ 472 static void uhci_get_current_frame_number(struct uhci_hcd *uhci) 473 { 474 if (!uhci->is_stopped) { 475 unsigned delta; 476 477 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) & 478 (UHCI_NUMFRAMES - 1); 479 uhci->frame_number += delta; 480 } 481 } 482 483 /* 484 * De-allocate all resources 485 */ 486 static void release_uhci(struct uhci_hcd *uhci) 487 { 488 int i; 489 490 if (DEBUG_CONFIGURED) { 491 spin_lock_irq(&uhci->lock); 492 uhci->is_initialized = 0; 493 spin_unlock_irq(&uhci->lock); 494 495 debugfs_remove(uhci->dentry); 496 } 497 498 for (i = 0; i < UHCI_NUM_SKELQH; i++) 499 uhci_free_qh(uhci, uhci->skelqh[i]); 500 501 uhci_free_td(uhci, uhci->term_td); 502 503 dma_pool_destroy(uhci->qh_pool); 504 505 dma_pool_destroy(uhci->td_pool); 506 507 kfree(uhci->frame_cpu); 508 509 dma_free_coherent(uhci_dev(uhci), 510 UHCI_NUMFRAMES * sizeof(*uhci->frame), 511 uhci->frame, uhci->frame_dma_handle); 512 } 513 514 static int uhci_init(struct usb_hcd *hcd) 515 { 516 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 517 unsigned io_size = (unsigned) hcd->rsrc_len; 518 int port; 519 520 uhci->io_addr = (unsigned long) hcd->rsrc_start; 521 522 /* The UHCI spec says devices must have 2 ports, and goes on to say 523 * they may have more but gives no way to determine how many there 524 * are. However according to the UHCI spec, Bit 7 of the port 525 * status and control register is always set to 1. So we try to 526 * use this to our advantage. Another common failure mode when 527 * a nonexistent register is addressed is to return all ones, so 528 * we test for that also. 529 */ 530 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) { 531 unsigned int portstatus; 532 533 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2)); 534 if (!(portstatus & 0x0080) || portstatus == 0xffff) 535 break; 536 } 537 if (debug) 538 dev_info(uhci_dev(uhci), "detected %d ports\n", port); 539 540 /* Anything greater than 7 is weird so we'll ignore it. */ 541 if (port > UHCI_RH_MAXCHILD) { 542 dev_info(uhci_dev(uhci), "port count misdetected? " 543 "forcing to 2 ports\n"); 544 port = 2; 545 } 546 uhci->rh_numports = port; 547 548 /* Kick BIOS off this hardware and reset if the controller 549 * isn't already safely quiescent. 550 */ 551 check_and_reset_hc(uhci); 552 return 0; 553 } 554 555 /* Make sure the controller is quiescent and that we're not using it 556 * any more. This is mainly for the benefit of programs which, like kexec, 557 * expect the hardware to be idle: not doing DMA or generating IRQs. 558 * 559 * This routine may be called in a damaged or failing kernel. Hence we 560 * do not acquire the spinlock before shutting down the controller. 561 */ 562 static void uhci_shutdown(struct pci_dev *pdev) 563 { 564 struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev); 565 566 uhci_hc_died(hcd_to_uhci(hcd)); 567 } 568 569 /* 570 * Allocate a frame list, and then setup the skeleton 571 * 572 * The hardware doesn't really know any difference 573 * in the queues, but the order does matter for the 574 * protocols higher up. The order in which the queues 575 * are encountered by the hardware is: 576 * 577 * - All isochronous events are handled before any 578 * of the queues. We don't do that here, because 579 * we'll create the actual TD entries on demand. 580 * - The first queue is the high-period interrupt queue. 581 * - The second queue is the period-1 interrupt and async 582 * (low-speed control, full-speed control, then bulk) queue. 583 * - The third queue is the terminating bandwidth reclamation queue, 584 * which contains no members, loops back to itself, and is present 585 * only when FSBR is on and there are no full-speed control or bulk QHs. 586 */ 587 static int uhci_start(struct usb_hcd *hcd) 588 { 589 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 590 int retval = -EBUSY; 591 int i; 592 struct dentry *dentry; 593 594 hcd->uses_new_polling = 1; 595 596 spin_lock_init(&uhci->lock); 597 setup_timer(&uhci->fsbr_timer, uhci_fsbr_timeout, 598 (unsigned long) uhci); 599 INIT_LIST_HEAD(&uhci->idle_qh_list); 600 init_waitqueue_head(&uhci->waitqh); 601 602 if (DEBUG_CONFIGURED) { 603 dentry = debugfs_create_file(hcd->self.bus_name, 604 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, 605 uhci, &uhci_debug_operations); 606 if (!dentry) { 607 dev_err(uhci_dev(uhci), "couldn't create uhci " 608 "debugfs entry\n"); 609 retval = -ENOMEM; 610 goto err_create_debug_entry; 611 } 612 uhci->dentry = dentry; 613 } 614 615 uhci->frame = dma_alloc_coherent(uhci_dev(uhci), 616 UHCI_NUMFRAMES * sizeof(*uhci->frame), 617 &uhci->frame_dma_handle, 0); 618 if (!uhci->frame) { 619 dev_err(uhci_dev(uhci), "unable to allocate " 620 "consistent memory for frame list\n"); 621 goto err_alloc_frame; 622 } 623 memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame)); 624 625 uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu), 626 GFP_KERNEL); 627 if (!uhci->frame_cpu) { 628 dev_err(uhci_dev(uhci), "unable to allocate " 629 "memory for frame pointers\n"); 630 goto err_alloc_frame_cpu; 631 } 632 633 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci), 634 sizeof(struct uhci_td), 16, 0); 635 if (!uhci->td_pool) { 636 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n"); 637 goto err_create_td_pool; 638 } 639 640 uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci), 641 sizeof(struct uhci_qh), 16, 0); 642 if (!uhci->qh_pool) { 643 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n"); 644 goto err_create_qh_pool; 645 } 646 647 uhci->term_td = uhci_alloc_td(uhci); 648 if (!uhci->term_td) { 649 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n"); 650 goto err_alloc_term_td; 651 } 652 653 for (i = 0; i < UHCI_NUM_SKELQH; i++) { 654 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL); 655 if (!uhci->skelqh[i]) { 656 dev_err(uhci_dev(uhci), "unable to allocate QH\n"); 657 goto err_alloc_skelqh; 658 } 659 } 660 661 /* 662 * 8 Interrupt queues; link all higher int queues to int1 = async 663 */ 664 for (i = SKEL_ISO + 1; i < SKEL_ASYNC; ++i) 665 uhci->skelqh[i]->link = LINK_TO_QH(uhci->skel_async_qh); 666 uhci->skel_async_qh->link = UHCI_PTR_TERM; 667 uhci->skel_term_qh->link = LINK_TO_QH(uhci->skel_term_qh); 668 669 /* This dummy TD is to work around a bug in Intel PIIX controllers */ 670 uhci_fill_td(uhci->term_td, 0, uhci_explen(0) | 671 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0); 672 uhci->term_td->link = UHCI_PTR_TERM; 673 uhci->skel_async_qh->element = uhci->skel_term_qh->element = 674 LINK_TO_TD(uhci->term_td); 675 676 /* 677 * Fill the frame list: make all entries point to the proper 678 * interrupt queue. 679 */ 680 for (i = 0; i < UHCI_NUMFRAMES; i++) { 681 682 /* Only place we don't use the frame list routines */ 683 uhci->frame[i] = uhci_frame_skel_link(uhci, i); 684 } 685 686 /* 687 * Some architectures require a full mb() to enforce completion of 688 * the memory writes above before the I/O transfers in configure_hc(). 689 */ 690 mb(); 691 692 configure_hc(uhci); 693 uhci->is_initialized = 1; 694 start_rh(uhci); 695 return 0; 696 697 /* 698 * error exits: 699 */ 700 err_alloc_skelqh: 701 for (i = 0; i < UHCI_NUM_SKELQH; i++) { 702 if (uhci->skelqh[i]) 703 uhci_free_qh(uhci, uhci->skelqh[i]); 704 } 705 706 uhci_free_td(uhci, uhci->term_td); 707 708 err_alloc_term_td: 709 dma_pool_destroy(uhci->qh_pool); 710 711 err_create_qh_pool: 712 dma_pool_destroy(uhci->td_pool); 713 714 err_create_td_pool: 715 kfree(uhci->frame_cpu); 716 717 err_alloc_frame_cpu: 718 dma_free_coherent(uhci_dev(uhci), 719 UHCI_NUMFRAMES * sizeof(*uhci->frame), 720 uhci->frame, uhci->frame_dma_handle); 721 722 err_alloc_frame: 723 debugfs_remove(uhci->dentry); 724 725 err_create_debug_entry: 726 return retval; 727 } 728 729 static void uhci_stop(struct usb_hcd *hcd) 730 { 731 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 732 733 spin_lock_irq(&uhci->lock); 734 if (test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) && !uhci->dead) 735 uhci_hc_died(uhci); 736 uhci_scan_schedule(uhci); 737 spin_unlock_irq(&uhci->lock); 738 739 del_timer_sync(&uhci->fsbr_timer); 740 release_uhci(uhci); 741 } 742 743 #ifdef CONFIG_PM 744 static int uhci_rh_suspend(struct usb_hcd *hcd) 745 { 746 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 747 int rc = 0; 748 749 spin_lock_irq(&uhci->lock); 750 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) 751 rc = -ESHUTDOWN; 752 else if (!uhci->dead) 753 suspend_rh(uhci, UHCI_RH_SUSPENDED); 754 spin_unlock_irq(&uhci->lock); 755 return rc; 756 } 757 758 static int uhci_rh_resume(struct usb_hcd *hcd) 759 { 760 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 761 int rc = 0; 762 763 spin_lock_irq(&uhci->lock); 764 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) 765 rc = -ESHUTDOWN; 766 else if (!uhci->dead) 767 wakeup_rh(uhci); 768 spin_unlock_irq(&uhci->lock); 769 return rc; 770 } 771 772 static int uhci_pci_suspend(struct usb_hcd *hcd, pm_message_t message) 773 { 774 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 775 int rc = 0; 776 777 dev_dbg(uhci_dev(uhci), "%s\n", __func__); 778 779 spin_lock_irq(&uhci->lock); 780 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead) 781 goto done_okay; /* Already suspended or dead */ 782 783 if (uhci->rh_state > UHCI_RH_SUSPENDED) { 784 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n"); 785 rc = -EBUSY; 786 goto done; 787 }; 788 789 /* All PCI host controllers are required to disable IRQ generation 790 * at the source, so we must turn off PIRQ. 791 */ 792 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0); 793 mb(); 794 hcd->poll_rh = 0; 795 796 /* FIXME: Enable non-PME# remote wakeup? */ 797 798 /* make sure snapshot being resumed re-enumerates everything */ 799 if (message.event == PM_EVENT_PRETHAW) 800 uhci_hc_died(uhci); 801 802 done_okay: 803 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 804 done: 805 spin_unlock_irq(&uhci->lock); 806 return rc; 807 } 808 809 static int uhci_pci_resume(struct usb_hcd *hcd) 810 { 811 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 812 813 dev_dbg(uhci_dev(uhci), "%s\n", __func__); 814 815 /* Since we aren't in D3 any more, it's safe to set this flag 816 * even if the controller was dead. 817 */ 818 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 819 mb(); 820 821 spin_lock_irq(&uhci->lock); 822 823 /* FIXME: Disable non-PME# remote wakeup? */ 824 825 /* The firmware or a boot kernel may have changed the controller 826 * settings during a system wakeup. Check it and reconfigure 827 * to avoid problems. 828 */ 829 check_and_reset_hc(uhci); 830 831 /* If the controller was dead before, it's back alive now */ 832 configure_hc(uhci); 833 834 if (uhci->rh_state == UHCI_RH_RESET) { 835 836 /* The controller had to be reset */ 837 usb_root_hub_lost_power(hcd->self.root_hub); 838 suspend_rh(uhci, UHCI_RH_SUSPENDED); 839 } 840 841 spin_unlock_irq(&uhci->lock); 842 843 /* If interrupts don't work and remote wakeup is enabled then 844 * the suspended root hub needs to be polled. 845 */ 846 if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup) { 847 hcd->poll_rh = 1; 848 usb_hcd_poll_rh_status(hcd); 849 } 850 return 0; 851 } 852 #endif 853 854 /* Wait until a particular device/endpoint's QH is idle, and free it */ 855 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd, 856 struct usb_host_endpoint *hep) 857 { 858 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 859 struct uhci_qh *qh; 860 861 spin_lock_irq(&uhci->lock); 862 qh = (struct uhci_qh *) hep->hcpriv; 863 if (qh == NULL) 864 goto done; 865 866 while (qh->state != QH_STATE_IDLE) { 867 ++uhci->num_waiting; 868 spin_unlock_irq(&uhci->lock); 869 wait_event_interruptible(uhci->waitqh, 870 qh->state == QH_STATE_IDLE); 871 spin_lock_irq(&uhci->lock); 872 --uhci->num_waiting; 873 } 874 875 uhci_free_qh(uhci, qh); 876 done: 877 spin_unlock_irq(&uhci->lock); 878 } 879 880 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd) 881 { 882 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 883 unsigned frame_number; 884 unsigned delta; 885 886 /* Minimize latency by avoiding the spinlock */ 887 frame_number = uhci->frame_number; 888 barrier(); 889 delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) & 890 (UHCI_NUMFRAMES - 1); 891 return frame_number + delta; 892 } 893 894 static const char hcd_name[] = "uhci_hcd"; 895 896 static const struct hc_driver uhci_driver = { 897 .description = hcd_name, 898 .product_desc = "UHCI Host Controller", 899 .hcd_priv_size = sizeof(struct uhci_hcd), 900 901 /* Generic hardware linkage */ 902 .irq = uhci_irq, 903 .flags = HCD_USB11, 904 905 /* Basic lifecycle operations */ 906 .reset = uhci_init, 907 .start = uhci_start, 908 #ifdef CONFIG_PM 909 .pci_suspend = uhci_pci_suspend, 910 .pci_resume = uhci_pci_resume, 911 .bus_suspend = uhci_rh_suspend, 912 .bus_resume = uhci_rh_resume, 913 #endif 914 .stop = uhci_stop, 915 916 .urb_enqueue = uhci_urb_enqueue, 917 .urb_dequeue = uhci_urb_dequeue, 918 919 .endpoint_disable = uhci_hcd_endpoint_disable, 920 .get_frame_number = uhci_hcd_get_frame_number, 921 922 .hub_status_data = uhci_hub_status_data, 923 .hub_control = uhci_hub_control, 924 }; 925 926 static const struct pci_device_id uhci_pci_ids[] = { { 927 /* handle any USB UHCI controller */ 928 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0), 929 .driver_data = (unsigned long) &uhci_driver, 930 }, { /* end: all zeroes */ } 931 }; 932 933 MODULE_DEVICE_TABLE(pci, uhci_pci_ids); 934 935 static struct pci_driver uhci_pci_driver = { 936 .name = (char *)hcd_name, 937 .id_table = uhci_pci_ids, 938 939 .probe = usb_hcd_pci_probe, 940 .remove = usb_hcd_pci_remove, 941 .shutdown = uhci_shutdown, 942 943 #ifdef CONFIG_PM 944 .suspend = usb_hcd_pci_suspend, 945 .resume = usb_hcd_pci_resume, 946 #endif /* PM */ 947 }; 948 949 static int __init uhci_hcd_init(void) 950 { 951 int retval = -ENOMEM; 952 953 if (usb_disabled()) 954 return -ENODEV; 955 956 printk(KERN_INFO "uhci_hcd: " DRIVER_DESC "%s\n", 957 ignore_oc ? ", overcurrent ignored" : ""); 958 set_bit(USB_UHCI_LOADED, &usb_hcds_loaded); 959 960 if (DEBUG_CONFIGURED) { 961 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL); 962 if (!errbuf) 963 goto errbuf_failed; 964 uhci_debugfs_root = debugfs_create_dir("uhci", NULL); 965 if (!uhci_debugfs_root) 966 goto debug_failed; 967 } 968 969 uhci_up_cachep = kmem_cache_create("uhci_urb_priv", 970 sizeof(struct urb_priv), 0, 0, NULL); 971 if (!uhci_up_cachep) 972 goto up_failed; 973 974 retval = pci_register_driver(&uhci_pci_driver); 975 if (retval) 976 goto init_failed; 977 978 return 0; 979 980 init_failed: 981 kmem_cache_destroy(uhci_up_cachep); 982 983 up_failed: 984 debugfs_remove(uhci_debugfs_root); 985 986 debug_failed: 987 kfree(errbuf); 988 989 errbuf_failed: 990 991 clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded); 992 return retval; 993 } 994 995 static void __exit uhci_hcd_cleanup(void) 996 { 997 pci_unregister_driver(&uhci_pci_driver); 998 kmem_cache_destroy(uhci_up_cachep); 999 debugfs_remove(uhci_debugfs_root); 1000 kfree(errbuf); 1001 clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded); 1002 } 1003 1004 module_init(uhci_hcd_init); 1005 module_exit(uhci_hcd_cleanup); 1006 1007 MODULE_AUTHOR(DRIVER_AUTHOR); 1008 MODULE_DESCRIPTION(DRIVER_DESC); 1009 MODULE_LICENSE("GPL"); 1010