1 /* 2 * Universal Host Controller Interface driver for USB. 3 * 4 * Maintainer: Alan Stern <stern@rowland.harvard.edu> 5 * 6 * (C) Copyright 1999 Linus Torvalds 7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com 8 * (C) Copyright 1999 Randy Dunlap 9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de 10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de 11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch 12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at 13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface 14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com). 15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c) 16 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu 17 * 18 * Intel documents this fairly well, and as far as I know there 19 * are no royalties or anything like that, but even so there are 20 * people who decided that they want to do the same thing in a 21 * completely different way. 22 * 23 */ 24 25 #include <linux/module.h> 26 #include <linux/pci.h> 27 #include <linux/kernel.h> 28 #include <linux/init.h> 29 #include <linux/delay.h> 30 #include <linux/ioport.h> 31 #include <linux/slab.h> 32 #include <linux/errno.h> 33 #include <linux/unistd.h> 34 #include <linux/interrupt.h> 35 #include <linux/spinlock.h> 36 #include <linux/debugfs.h> 37 #include <linux/pm.h> 38 #include <linux/dmapool.h> 39 #include <linux/dma-mapping.h> 40 #include <linux/usb.h> 41 #include <linux/bitops.h> 42 #include <linux/dmi.h> 43 44 #include <asm/uaccess.h> 45 #include <asm/io.h> 46 #include <asm/irq.h> 47 #include <asm/system.h> 48 49 #include "../core/hcd.h" 50 #include "uhci-hcd.h" 51 #include "pci-quirks.h" 52 53 /* 54 * Version Information 55 */ 56 #define DRIVER_VERSION "v3.0" 57 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \ 58 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \ 59 Alan Stern" 60 #define DRIVER_DESC "USB Universal Host Controller Interface driver" 61 62 /* for flakey hardware, ignore overcurrent indicators */ 63 static int ignore_oc; 64 module_param(ignore_oc, bool, S_IRUGO); 65 MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications"); 66 67 /* 68 * debug = 0, no debugging messages 69 * debug = 1, dump failed URBs except for stalls 70 * debug = 2, dump all failed URBs (including stalls) 71 * show all queues in /debug/uhci/[pci_addr] 72 * debug = 3, show all TDs in URBs when dumping 73 */ 74 #ifdef DEBUG 75 #define DEBUG_CONFIGURED 1 76 static int debug = 1; 77 module_param(debug, int, S_IRUGO | S_IWUSR); 78 MODULE_PARM_DESC(debug, "Debug level"); 79 80 #else 81 #define DEBUG_CONFIGURED 0 82 #define debug 0 83 #endif 84 85 static char *errbuf; 86 #define ERRBUF_LEN (32 * 1024) 87 88 static struct kmem_cache *uhci_up_cachep; /* urb_priv */ 89 90 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state); 91 static void wakeup_rh(struct uhci_hcd *uhci); 92 static void uhci_get_current_frame_number(struct uhci_hcd *uhci); 93 94 /* 95 * Calculate the link pointer DMA value for the first Skeleton QH in a frame. 96 */ 97 static __le32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame) 98 { 99 int skelnum; 100 101 /* 102 * The interrupt queues will be interleaved as evenly as possible. 103 * There's not much to be done about period-1 interrupts; they have 104 * to occur in every frame. But we can schedule period-2 interrupts 105 * in odd-numbered frames, period-4 interrupts in frames congruent 106 * to 2 (mod 4), and so on. This way each frame only has two 107 * interrupt QHs, which will help spread out bandwidth utilization. 108 * 109 * ffs (Find First bit Set) does exactly what we need: 110 * 1,3,5,... => ffs = 0 => use period-2 QH = skelqh[8], 111 * 2,6,10,... => ffs = 1 => use period-4 QH = skelqh[7], etc. 112 * ffs >= 7 => not on any high-period queue, so use 113 * period-1 QH = skelqh[9]. 114 * Add in UHCI_NUMFRAMES to insure at least one bit is set. 115 */ 116 skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES); 117 if (skelnum <= 1) 118 skelnum = 9; 119 return LINK_TO_QH(uhci->skelqh[skelnum]); 120 } 121 122 #include "uhci-debug.c" 123 #include "uhci-q.c" 124 #include "uhci-hub.c" 125 126 /* 127 * Finish up a host controller reset and update the recorded state. 128 */ 129 static void finish_reset(struct uhci_hcd *uhci) 130 { 131 int port; 132 133 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect 134 * bits in the port status and control registers. 135 * We have to clear them by hand. 136 */ 137 for (port = 0; port < uhci->rh_numports; ++port) 138 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2)); 139 140 uhci->port_c_suspend = uhci->resuming_ports = 0; 141 uhci->rh_state = UHCI_RH_RESET; 142 uhci->is_stopped = UHCI_IS_STOPPED; 143 uhci_to_hcd(uhci)->state = HC_STATE_HALT; 144 uhci_to_hcd(uhci)->poll_rh = 0; 145 146 uhci->dead = 0; /* Full reset resurrects the controller */ 147 } 148 149 /* 150 * Last rites for a defunct/nonfunctional controller 151 * or one we don't want to use any more. 152 */ 153 static void uhci_hc_died(struct uhci_hcd *uhci) 154 { 155 uhci_get_current_frame_number(uhci); 156 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr); 157 finish_reset(uhci); 158 uhci->dead = 1; 159 160 /* The current frame may already be partway finished */ 161 ++uhci->frame_number; 162 } 163 164 /* 165 * Initialize a controller that was newly discovered or has lost power 166 * or otherwise been reset while it was suspended. In none of these cases 167 * can we be sure of its previous state. 168 */ 169 static void check_and_reset_hc(struct uhci_hcd *uhci) 170 { 171 if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr)) 172 finish_reset(uhci); 173 } 174 175 /* 176 * Store the basic register settings needed by the controller. 177 */ 178 static void configure_hc(struct uhci_hcd *uhci) 179 { 180 /* Set the frame length to the default: 1 ms exactly */ 181 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF); 182 183 /* Store the frame list base address */ 184 outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD); 185 186 /* Set the current frame number */ 187 outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER, 188 uhci->io_addr + USBFRNUM); 189 190 /* Mark controller as not halted before we enable interrupts */ 191 uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED; 192 mb(); 193 194 /* Enable PIRQ */ 195 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 196 USBLEGSUP_DEFAULT); 197 } 198 199 200 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci) 201 { 202 int port; 203 204 /* If we have to ignore overcurrent events then almost by definition 205 * we can't depend on resume-detect interrupts. */ 206 if (ignore_oc) 207 return 1; 208 209 switch (to_pci_dev(uhci_dev(uhci))->vendor) { 210 default: 211 break; 212 213 case PCI_VENDOR_ID_GENESYS: 214 /* Genesys Logic's GL880S controllers don't generate 215 * resume-detect interrupts. 216 */ 217 return 1; 218 219 case PCI_VENDOR_ID_INTEL: 220 /* Some of Intel's USB controllers have a bug that causes 221 * resume-detect interrupts if any port has an over-current 222 * condition. To make matters worse, some motherboards 223 * hardwire unused USB ports' over-current inputs active! 224 * To prevent problems, we will not enable resume-detect 225 * interrupts if any ports are OC. 226 */ 227 for (port = 0; port < uhci->rh_numports; ++port) { 228 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) & 229 USBPORTSC_OC) 230 return 1; 231 } 232 break; 233 } 234 return 0; 235 } 236 237 static int global_suspend_mode_is_broken(struct uhci_hcd *uhci) 238 { 239 int port; 240 const char *sys_info; 241 static char bad_Asus_board[] = "A7V8X"; 242 243 /* One of Asus's motherboards has a bug which causes it to 244 * wake up immediately from suspend-to-RAM if any of the ports 245 * are connected. In such cases we will not set EGSM. 246 */ 247 sys_info = dmi_get_system_info(DMI_BOARD_NAME); 248 if (sys_info && !strcmp(sys_info, bad_Asus_board)) { 249 for (port = 0; port < uhci->rh_numports; ++port) { 250 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) & 251 USBPORTSC_CCS) 252 return 1; 253 } 254 } 255 256 return 0; 257 } 258 259 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state) 260 __releases(uhci->lock) 261 __acquires(uhci->lock) 262 { 263 int auto_stop; 264 int int_enable, egsm_enable, wakeup_enable; 265 struct usb_device *rhdev = uhci_to_hcd(uhci)->self.root_hub; 266 267 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED); 268 dev_dbg(&rhdev->dev, "%s%s\n", __func__, 269 (auto_stop ? " (auto-stop)" : "")); 270 271 /* Start off by assuming Resume-Detect interrupts and EGSM work 272 * and that remote wakeups should be enabled. 273 */ 274 egsm_enable = USBCMD_EGSM; 275 uhci->RD_enable = 1; 276 int_enable = USBINTR_RESUME; 277 wakeup_enable = 1; 278 279 /* In auto-stop mode wakeups must always be detected, but 280 * Resume-Detect interrupts may be prohibited. (In the absence 281 * of CONFIG_PM, they are always disallowed.) 282 */ 283 if (auto_stop) { 284 if (!device_may_wakeup(&rhdev->dev)) 285 int_enable = 0; 286 287 /* In bus-suspend mode wakeups may be disabled, but if they are 288 * allowed then so are Resume-Detect interrupts. 289 */ 290 } else { 291 #ifdef CONFIG_PM 292 if (!rhdev->do_remote_wakeup) 293 wakeup_enable = 0; 294 #endif 295 } 296 297 /* EGSM causes the root hub to echo a 'K' signal (resume) out any 298 * port which requests a remote wakeup. According to the USB spec, 299 * every hub is supposed to do this. But if we are ignoring 300 * remote-wakeup requests anyway then there's no point to it. 301 * We also shouldn't enable EGSM if it's broken. 302 */ 303 if (!wakeup_enable || global_suspend_mode_is_broken(uhci)) 304 egsm_enable = 0; 305 306 /* If we're ignoring wakeup events then there's no reason to 307 * enable Resume-Detect interrupts. We also shouldn't enable 308 * them if they are broken or disallowed. 309 * 310 * This logic may lead us to enabling RD but not EGSM. The UHCI 311 * spec foolishly says that RD works only when EGSM is on, but 312 * there's no harm in enabling it anyway -- perhaps some chips 313 * will implement it! 314 */ 315 if (!wakeup_enable || resume_detect_interrupts_are_broken(uhci) || 316 !int_enable) 317 uhci->RD_enable = int_enable = 0; 318 319 outw(int_enable, uhci->io_addr + USBINTR); 320 outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD); 321 mb(); 322 udelay(5); 323 324 /* If we're auto-stopping then no devices have been attached 325 * for a while, so there shouldn't be any active URBs and the 326 * controller should stop after a few microseconds. Otherwise 327 * we will give the controller one frame to stop. 328 */ 329 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) { 330 uhci->rh_state = UHCI_RH_SUSPENDING; 331 spin_unlock_irq(&uhci->lock); 332 msleep(1); 333 spin_lock_irq(&uhci->lock); 334 if (uhci->dead) 335 return; 336 } 337 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) 338 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n"); 339 340 uhci_get_current_frame_number(uhci); 341 342 uhci->rh_state = new_state; 343 uhci->is_stopped = UHCI_IS_STOPPED; 344 345 /* If interrupts don't work and remote wakeup is enabled then 346 * the suspended root hub needs to be polled. 347 */ 348 uhci_to_hcd(uhci)->poll_rh = (!int_enable && wakeup_enable); 349 350 uhci_scan_schedule(uhci); 351 uhci_fsbr_off(uhci); 352 } 353 354 static void start_rh(struct uhci_hcd *uhci) 355 { 356 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING; 357 uhci->is_stopped = 0; 358 359 /* Mark it configured and running with a 64-byte max packet. 360 * All interrupts are enabled, even though RESUME won't do anything. 361 */ 362 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD); 363 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP, 364 uhci->io_addr + USBINTR); 365 mb(); 366 uhci->rh_state = UHCI_RH_RUNNING; 367 uhci_to_hcd(uhci)->poll_rh = 1; 368 } 369 370 static void wakeup_rh(struct uhci_hcd *uhci) 371 __releases(uhci->lock) 372 __acquires(uhci->lock) 373 { 374 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev, 375 "%s%s\n", __func__, 376 uhci->rh_state == UHCI_RH_AUTO_STOPPED ? 377 " (auto-start)" : ""); 378 379 /* If we are auto-stopped then no devices are attached so there's 380 * no need for wakeup signals. Otherwise we send Global Resume 381 * for 20 ms. 382 */ 383 if (uhci->rh_state == UHCI_RH_SUSPENDED) { 384 unsigned egsm; 385 386 /* Keep EGSM on if it was set before */ 387 egsm = inw(uhci->io_addr + USBCMD) & USBCMD_EGSM; 388 uhci->rh_state = UHCI_RH_RESUMING; 389 outw(USBCMD_FGR | USBCMD_CF | egsm, uhci->io_addr + USBCMD); 390 spin_unlock_irq(&uhci->lock); 391 msleep(20); 392 spin_lock_irq(&uhci->lock); 393 if (uhci->dead) 394 return; 395 396 /* End Global Resume and wait for EOP to be sent */ 397 outw(USBCMD_CF, uhci->io_addr + USBCMD); 398 mb(); 399 udelay(4); 400 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR) 401 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n"); 402 } 403 404 start_rh(uhci); 405 406 /* Restart root hub polling */ 407 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies); 408 } 409 410 static irqreturn_t uhci_irq(struct usb_hcd *hcd) 411 { 412 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 413 unsigned short status; 414 415 /* 416 * Read the interrupt status, and write it back to clear the 417 * interrupt cause. Contrary to the UHCI specification, the 418 * "HC Halted" status bit is persistent: it is RO, not R/WC. 419 */ 420 status = inw(uhci->io_addr + USBSTS); 421 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */ 422 return IRQ_NONE; 423 outw(status, uhci->io_addr + USBSTS); /* Clear it */ 424 425 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) { 426 if (status & USBSTS_HSE) 427 dev_err(uhci_dev(uhci), "host system error, " 428 "PCI problems?\n"); 429 if (status & USBSTS_HCPE) 430 dev_err(uhci_dev(uhci), "host controller process " 431 "error, something bad happened!\n"); 432 if (status & USBSTS_HCH) { 433 spin_lock(&uhci->lock); 434 if (uhci->rh_state >= UHCI_RH_RUNNING) { 435 dev_err(uhci_dev(uhci), 436 "host controller halted, " 437 "very bad!\n"); 438 if (debug > 1 && errbuf) { 439 /* Print the schedule for debugging */ 440 uhci_sprint_schedule(uhci, 441 errbuf, ERRBUF_LEN); 442 lprintk(errbuf); 443 } 444 uhci_hc_died(uhci); 445 446 /* Force a callback in case there are 447 * pending unlinks */ 448 mod_timer(&hcd->rh_timer, jiffies); 449 } 450 spin_unlock(&uhci->lock); 451 } 452 } 453 454 if (status & USBSTS_RD) 455 usb_hcd_poll_rh_status(hcd); 456 else { 457 spin_lock(&uhci->lock); 458 uhci_scan_schedule(uhci); 459 spin_unlock(&uhci->lock); 460 } 461 462 return IRQ_HANDLED; 463 } 464 465 /* 466 * Store the current frame number in uhci->frame_number if the controller 467 * is runnning. Expand from 11 bits (of which we use only 10) to a 468 * full-sized integer. 469 * 470 * Like many other parts of the driver, this code relies on being polled 471 * more than once per second as long as the controller is running. 472 */ 473 static void uhci_get_current_frame_number(struct uhci_hcd *uhci) 474 { 475 if (!uhci->is_stopped) { 476 unsigned delta; 477 478 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) & 479 (UHCI_NUMFRAMES - 1); 480 uhci->frame_number += delta; 481 } 482 } 483 484 /* 485 * De-allocate all resources 486 */ 487 static void release_uhci(struct uhci_hcd *uhci) 488 { 489 int i; 490 491 if (DEBUG_CONFIGURED) { 492 spin_lock_irq(&uhci->lock); 493 uhci->is_initialized = 0; 494 spin_unlock_irq(&uhci->lock); 495 496 debugfs_remove(uhci->dentry); 497 } 498 499 for (i = 0; i < UHCI_NUM_SKELQH; i++) 500 uhci_free_qh(uhci, uhci->skelqh[i]); 501 502 uhci_free_td(uhci, uhci->term_td); 503 504 dma_pool_destroy(uhci->qh_pool); 505 506 dma_pool_destroy(uhci->td_pool); 507 508 kfree(uhci->frame_cpu); 509 510 dma_free_coherent(uhci_dev(uhci), 511 UHCI_NUMFRAMES * sizeof(*uhci->frame), 512 uhci->frame, uhci->frame_dma_handle); 513 } 514 515 static int uhci_init(struct usb_hcd *hcd) 516 { 517 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 518 unsigned io_size = (unsigned) hcd->rsrc_len; 519 int port; 520 521 uhci->io_addr = (unsigned long) hcd->rsrc_start; 522 523 /* The UHCI spec says devices must have 2 ports, and goes on to say 524 * they may have more but gives no way to determine how many there 525 * are. However according to the UHCI spec, Bit 7 of the port 526 * status and control register is always set to 1. So we try to 527 * use this to our advantage. Another common failure mode when 528 * a nonexistent register is addressed is to return all ones, so 529 * we test for that also. 530 */ 531 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) { 532 unsigned int portstatus; 533 534 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2)); 535 if (!(portstatus & 0x0080) || portstatus == 0xffff) 536 break; 537 } 538 if (debug) 539 dev_info(uhci_dev(uhci), "detected %d ports\n", port); 540 541 /* Anything greater than 7 is weird so we'll ignore it. */ 542 if (port > UHCI_RH_MAXCHILD) { 543 dev_info(uhci_dev(uhci), "port count misdetected? " 544 "forcing to 2 ports\n"); 545 port = 2; 546 } 547 uhci->rh_numports = port; 548 549 /* Kick BIOS off this hardware and reset if the controller 550 * isn't already safely quiescent. 551 */ 552 check_and_reset_hc(uhci); 553 return 0; 554 } 555 556 /* Make sure the controller is quiescent and that we're not using it 557 * any more. This is mainly for the benefit of programs which, like kexec, 558 * expect the hardware to be idle: not doing DMA or generating IRQs. 559 * 560 * This routine may be called in a damaged or failing kernel. Hence we 561 * do not acquire the spinlock before shutting down the controller. 562 */ 563 static void uhci_shutdown(struct pci_dev *pdev) 564 { 565 struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev); 566 567 uhci_hc_died(hcd_to_uhci(hcd)); 568 } 569 570 /* 571 * Allocate a frame list, and then setup the skeleton 572 * 573 * The hardware doesn't really know any difference 574 * in the queues, but the order does matter for the 575 * protocols higher up. The order in which the queues 576 * are encountered by the hardware is: 577 * 578 * - All isochronous events are handled before any 579 * of the queues. We don't do that here, because 580 * we'll create the actual TD entries on demand. 581 * - The first queue is the high-period interrupt queue. 582 * - The second queue is the period-1 interrupt and async 583 * (low-speed control, full-speed control, then bulk) queue. 584 * - The third queue is the terminating bandwidth reclamation queue, 585 * which contains no members, loops back to itself, and is present 586 * only when FSBR is on and there are no full-speed control or bulk QHs. 587 */ 588 static int uhci_start(struct usb_hcd *hcd) 589 { 590 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 591 int retval = -EBUSY; 592 int i; 593 struct dentry *dentry; 594 595 hcd->uses_new_polling = 1; 596 597 spin_lock_init(&uhci->lock); 598 setup_timer(&uhci->fsbr_timer, uhci_fsbr_timeout, 599 (unsigned long) uhci); 600 INIT_LIST_HEAD(&uhci->idle_qh_list); 601 init_waitqueue_head(&uhci->waitqh); 602 603 if (DEBUG_CONFIGURED) { 604 dentry = debugfs_create_file(hcd->self.bus_name, 605 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, 606 uhci, &uhci_debug_operations); 607 if (!dentry) { 608 dev_err(uhci_dev(uhci), "couldn't create uhci " 609 "debugfs entry\n"); 610 retval = -ENOMEM; 611 goto err_create_debug_entry; 612 } 613 uhci->dentry = dentry; 614 } 615 616 uhci->frame = dma_alloc_coherent(uhci_dev(uhci), 617 UHCI_NUMFRAMES * sizeof(*uhci->frame), 618 &uhci->frame_dma_handle, 0); 619 if (!uhci->frame) { 620 dev_err(uhci_dev(uhci), "unable to allocate " 621 "consistent memory for frame list\n"); 622 goto err_alloc_frame; 623 } 624 memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame)); 625 626 uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu), 627 GFP_KERNEL); 628 if (!uhci->frame_cpu) { 629 dev_err(uhci_dev(uhci), "unable to allocate " 630 "memory for frame pointers\n"); 631 goto err_alloc_frame_cpu; 632 } 633 634 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci), 635 sizeof(struct uhci_td), 16, 0); 636 if (!uhci->td_pool) { 637 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n"); 638 goto err_create_td_pool; 639 } 640 641 uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci), 642 sizeof(struct uhci_qh), 16, 0); 643 if (!uhci->qh_pool) { 644 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n"); 645 goto err_create_qh_pool; 646 } 647 648 uhci->term_td = uhci_alloc_td(uhci); 649 if (!uhci->term_td) { 650 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n"); 651 goto err_alloc_term_td; 652 } 653 654 for (i = 0; i < UHCI_NUM_SKELQH; i++) { 655 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL); 656 if (!uhci->skelqh[i]) { 657 dev_err(uhci_dev(uhci), "unable to allocate QH\n"); 658 goto err_alloc_skelqh; 659 } 660 } 661 662 /* 663 * 8 Interrupt queues; link all higher int queues to int1 = async 664 */ 665 for (i = SKEL_ISO + 1; i < SKEL_ASYNC; ++i) 666 uhci->skelqh[i]->link = LINK_TO_QH(uhci->skel_async_qh); 667 uhci->skel_async_qh->link = UHCI_PTR_TERM; 668 uhci->skel_term_qh->link = LINK_TO_QH(uhci->skel_term_qh); 669 670 /* This dummy TD is to work around a bug in Intel PIIX controllers */ 671 uhci_fill_td(uhci->term_td, 0, uhci_explen(0) | 672 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0); 673 uhci->term_td->link = UHCI_PTR_TERM; 674 uhci->skel_async_qh->element = uhci->skel_term_qh->element = 675 LINK_TO_TD(uhci->term_td); 676 677 /* 678 * Fill the frame list: make all entries point to the proper 679 * interrupt queue. 680 */ 681 for (i = 0; i < UHCI_NUMFRAMES; i++) { 682 683 /* Only place we don't use the frame list routines */ 684 uhci->frame[i] = uhci_frame_skel_link(uhci, i); 685 } 686 687 /* 688 * Some architectures require a full mb() to enforce completion of 689 * the memory writes above before the I/O transfers in configure_hc(). 690 */ 691 mb(); 692 693 configure_hc(uhci); 694 uhci->is_initialized = 1; 695 start_rh(uhci); 696 return 0; 697 698 /* 699 * error exits: 700 */ 701 err_alloc_skelqh: 702 for (i = 0; i < UHCI_NUM_SKELQH; i++) { 703 if (uhci->skelqh[i]) 704 uhci_free_qh(uhci, uhci->skelqh[i]); 705 } 706 707 uhci_free_td(uhci, uhci->term_td); 708 709 err_alloc_term_td: 710 dma_pool_destroy(uhci->qh_pool); 711 712 err_create_qh_pool: 713 dma_pool_destroy(uhci->td_pool); 714 715 err_create_td_pool: 716 kfree(uhci->frame_cpu); 717 718 err_alloc_frame_cpu: 719 dma_free_coherent(uhci_dev(uhci), 720 UHCI_NUMFRAMES * sizeof(*uhci->frame), 721 uhci->frame, uhci->frame_dma_handle); 722 723 err_alloc_frame: 724 debugfs_remove(uhci->dentry); 725 726 err_create_debug_entry: 727 return retval; 728 } 729 730 static void uhci_stop(struct usb_hcd *hcd) 731 { 732 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 733 734 spin_lock_irq(&uhci->lock); 735 if (test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) && !uhci->dead) 736 uhci_hc_died(uhci); 737 uhci_scan_schedule(uhci); 738 spin_unlock_irq(&uhci->lock); 739 740 del_timer_sync(&uhci->fsbr_timer); 741 release_uhci(uhci); 742 } 743 744 #ifdef CONFIG_PM 745 static int uhci_rh_suspend(struct usb_hcd *hcd) 746 { 747 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 748 int rc = 0; 749 750 spin_lock_irq(&uhci->lock); 751 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) 752 rc = -ESHUTDOWN; 753 else if (!uhci->dead) 754 suspend_rh(uhci, UHCI_RH_SUSPENDED); 755 spin_unlock_irq(&uhci->lock); 756 return rc; 757 } 758 759 static int uhci_rh_resume(struct usb_hcd *hcd) 760 { 761 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 762 int rc = 0; 763 764 spin_lock_irq(&uhci->lock); 765 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) 766 rc = -ESHUTDOWN; 767 else if (!uhci->dead) 768 wakeup_rh(uhci); 769 spin_unlock_irq(&uhci->lock); 770 return rc; 771 } 772 773 static int uhci_pci_suspend(struct usb_hcd *hcd, pm_message_t message) 774 { 775 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 776 int rc = 0; 777 778 dev_dbg(uhci_dev(uhci), "%s\n", __func__); 779 780 spin_lock_irq(&uhci->lock); 781 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead) 782 goto done_okay; /* Already suspended or dead */ 783 784 if (uhci->rh_state > UHCI_RH_SUSPENDED) { 785 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n"); 786 rc = -EBUSY; 787 goto done; 788 }; 789 790 /* All PCI host controllers are required to disable IRQ generation 791 * at the source, so we must turn off PIRQ. 792 */ 793 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0); 794 mb(); 795 hcd->poll_rh = 0; 796 797 /* FIXME: Enable non-PME# remote wakeup? */ 798 799 /* make sure snapshot being resumed re-enumerates everything */ 800 if (message.event == PM_EVENT_PRETHAW) 801 uhci_hc_died(uhci); 802 803 done_okay: 804 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 805 done: 806 spin_unlock_irq(&uhci->lock); 807 return rc; 808 } 809 810 static int uhci_pci_resume(struct usb_hcd *hcd) 811 { 812 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 813 814 dev_dbg(uhci_dev(uhci), "%s\n", __func__); 815 816 /* Since we aren't in D3 any more, it's safe to set this flag 817 * even if the controller was dead. 818 */ 819 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 820 mb(); 821 822 spin_lock_irq(&uhci->lock); 823 824 /* FIXME: Disable non-PME# remote wakeup? */ 825 826 /* The firmware or a boot kernel may have changed the controller 827 * settings during a system wakeup. Check it and reconfigure 828 * to avoid problems. 829 */ 830 check_and_reset_hc(uhci); 831 832 /* If the controller was dead before, it's back alive now */ 833 configure_hc(uhci); 834 835 if (uhci->rh_state == UHCI_RH_RESET) { 836 837 /* The controller had to be reset */ 838 usb_root_hub_lost_power(hcd->self.root_hub); 839 suspend_rh(uhci, UHCI_RH_SUSPENDED); 840 } 841 842 spin_unlock_irq(&uhci->lock); 843 844 /* If interrupts don't work and remote wakeup is enabled then 845 * the suspended root hub needs to be polled. 846 */ 847 if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup) { 848 hcd->poll_rh = 1; 849 usb_hcd_poll_rh_status(hcd); 850 } 851 return 0; 852 } 853 #endif 854 855 /* Wait until a particular device/endpoint's QH is idle, and free it */ 856 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd, 857 struct usb_host_endpoint *hep) 858 { 859 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 860 struct uhci_qh *qh; 861 862 spin_lock_irq(&uhci->lock); 863 qh = (struct uhci_qh *) hep->hcpriv; 864 if (qh == NULL) 865 goto done; 866 867 while (qh->state != QH_STATE_IDLE) { 868 ++uhci->num_waiting; 869 spin_unlock_irq(&uhci->lock); 870 wait_event_interruptible(uhci->waitqh, 871 qh->state == QH_STATE_IDLE); 872 spin_lock_irq(&uhci->lock); 873 --uhci->num_waiting; 874 } 875 876 uhci_free_qh(uhci, qh); 877 done: 878 spin_unlock_irq(&uhci->lock); 879 } 880 881 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd) 882 { 883 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 884 unsigned frame_number; 885 unsigned delta; 886 887 /* Minimize latency by avoiding the spinlock */ 888 frame_number = uhci->frame_number; 889 barrier(); 890 delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) & 891 (UHCI_NUMFRAMES - 1); 892 return frame_number + delta; 893 } 894 895 static const char hcd_name[] = "uhci_hcd"; 896 897 static const struct hc_driver uhci_driver = { 898 .description = hcd_name, 899 .product_desc = "UHCI Host Controller", 900 .hcd_priv_size = sizeof(struct uhci_hcd), 901 902 /* Generic hardware linkage */ 903 .irq = uhci_irq, 904 .flags = HCD_USB11, 905 906 /* Basic lifecycle operations */ 907 .reset = uhci_init, 908 .start = uhci_start, 909 #ifdef CONFIG_PM 910 .pci_suspend = uhci_pci_suspend, 911 .pci_resume = uhci_pci_resume, 912 .bus_suspend = uhci_rh_suspend, 913 .bus_resume = uhci_rh_resume, 914 #endif 915 .stop = uhci_stop, 916 917 .urb_enqueue = uhci_urb_enqueue, 918 .urb_dequeue = uhci_urb_dequeue, 919 920 .endpoint_disable = uhci_hcd_endpoint_disable, 921 .get_frame_number = uhci_hcd_get_frame_number, 922 923 .hub_status_data = uhci_hub_status_data, 924 .hub_control = uhci_hub_control, 925 }; 926 927 static const struct pci_device_id uhci_pci_ids[] = { { 928 /* handle any USB UHCI controller */ 929 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0), 930 .driver_data = (unsigned long) &uhci_driver, 931 }, { /* end: all zeroes */ } 932 }; 933 934 MODULE_DEVICE_TABLE(pci, uhci_pci_ids); 935 936 static struct pci_driver uhci_pci_driver = { 937 .name = (char *)hcd_name, 938 .id_table = uhci_pci_ids, 939 940 .probe = usb_hcd_pci_probe, 941 .remove = usb_hcd_pci_remove, 942 .shutdown = uhci_shutdown, 943 944 #ifdef CONFIG_PM 945 .suspend = usb_hcd_pci_suspend, 946 .resume = usb_hcd_pci_resume, 947 #endif /* PM */ 948 }; 949 950 static int __init uhci_hcd_init(void) 951 { 952 int retval = -ENOMEM; 953 954 printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "%s\n", 955 ignore_oc ? ", overcurrent ignored" : ""); 956 957 if (usb_disabled()) 958 return -ENODEV; 959 960 if (DEBUG_CONFIGURED) { 961 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL); 962 if (!errbuf) 963 goto errbuf_failed; 964 uhci_debugfs_root = debugfs_create_dir("uhci", NULL); 965 if (!uhci_debugfs_root) 966 goto debug_failed; 967 } 968 969 uhci_up_cachep = kmem_cache_create("uhci_urb_priv", 970 sizeof(struct urb_priv), 0, 0, NULL); 971 if (!uhci_up_cachep) 972 goto up_failed; 973 974 retval = pci_register_driver(&uhci_pci_driver); 975 if (retval) 976 goto init_failed; 977 978 return 0; 979 980 init_failed: 981 kmem_cache_destroy(uhci_up_cachep); 982 983 up_failed: 984 debugfs_remove(uhci_debugfs_root); 985 986 debug_failed: 987 kfree(errbuf); 988 989 errbuf_failed: 990 991 return retval; 992 } 993 994 static void __exit uhci_hcd_cleanup(void) 995 { 996 pci_unregister_driver(&uhci_pci_driver); 997 kmem_cache_destroy(uhci_up_cachep); 998 debugfs_remove(uhci_debugfs_root); 999 kfree(errbuf); 1000 } 1001 1002 module_init(uhci_hcd_init); 1003 module_exit(uhci_hcd_cleanup); 1004 1005 MODULE_AUTHOR(DRIVER_AUTHOR); 1006 MODULE_DESCRIPTION(DRIVER_DESC); 1007 MODULE_LICENSE("GPL"); 1008