1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * SL811HS HCD (Host Controller Driver) for USB. 4 * 5 * Copyright (C) 2004 Psion Teklogix (for NetBook PRO) 6 * Copyright (C) 2004-2005 David Brownell 7 * 8 * Periodic scheduling is based on Roman's OHCI code 9 * Copyright (C) 1999 Roman Weissgaerber 10 * 11 * The SL811HS controller handles host side USB (like the SL11H, but with 12 * another register set and SOF generation) as well as peripheral side USB 13 * (like the SL811S). This driver version doesn't implement the Gadget API 14 * for the peripheral role; or OTG (that'd need much external circuitry). 15 * 16 * For documentation, see the SL811HS spec and the "SL811HS Embedded Host" 17 * document (providing significant pieces missing from that spec); plus 18 * the SL811S spec if you want peripheral side info. 19 */ 20 21 /* 22 * Status: Passed basic stress testing, works with hubs, mice, keyboards, 23 * and usb-storage. 24 * 25 * TODO: 26 * - usb suspend/resume triggered by sl811 27 * - various issues noted in the code 28 * - performance work; use both register banks; ... 29 * - use urb->iso_frame_desc[] with ISO transfers 30 */ 31 32 #undef VERBOSE 33 #undef PACKET_TRACE 34 35 #include <linux/module.h> 36 #include <linux/moduleparam.h> 37 #include <linux/kernel.h> 38 #include <linux/delay.h> 39 #include <linux/ioport.h> 40 #include <linux/sched.h> 41 #include <linux/slab.h> 42 #include <linux/errno.h> 43 #include <linux/timer.h> 44 #include <linux/list.h> 45 #include <linux/interrupt.h> 46 #include <linux/usb.h> 47 #include <linux/usb/sl811.h> 48 #include <linux/usb/hcd.h> 49 #include <linux/platform_device.h> 50 #include <linux/prefetch.h> 51 #include <linux/debugfs.h> 52 #include <linux/seq_file.h> 53 54 #include <asm/io.h> 55 #include <asm/irq.h> 56 #include <asm/byteorder.h> 57 #include <asm/unaligned.h> 58 59 #include "sl811.h" 60 61 62 MODULE_DESCRIPTION("SL811HS USB Host Controller Driver"); 63 MODULE_LICENSE("GPL"); 64 MODULE_ALIAS("platform:sl811-hcd"); 65 66 #define DRIVER_VERSION "19 May 2005" 67 68 /* for now, use only one transfer register bank */ 69 #undef USE_B 70 71 // #define QUIRK2 72 #define QUIRK3 73 74 static const char hcd_name[] = "sl811-hcd"; 75 76 /*-------------------------------------------------------------------------*/ 77 78 static void port_power(struct sl811 *sl811, int is_on) 79 { 80 struct usb_hcd *hcd = sl811_to_hcd(sl811); 81 82 /* hub is inactive unless the port is powered */ 83 if (is_on) { 84 if (sl811->port1 & USB_PORT_STAT_POWER) 85 return; 86 87 sl811->port1 = USB_PORT_STAT_POWER; 88 sl811->irq_enable = SL11H_INTMASK_INSRMV; 89 } else { 90 sl811->port1 = 0; 91 sl811->irq_enable = 0; 92 hcd->state = HC_STATE_HALT; 93 } 94 sl811->ctrl1 = 0; 95 sl811_write(sl811, SL11H_IRQ_ENABLE, 0); 96 sl811_write(sl811, SL11H_IRQ_STATUS, ~0); 97 98 if (sl811->board && sl811->board->port_power) { 99 /* switch VBUS, at 500mA unless hub power budget gets set */ 100 dev_dbg(hcd->self.controller, "power %s\n", 101 is_on ? "on" : "off"); 102 sl811->board->port_power(hcd->self.controller, is_on); 103 } 104 105 /* reset as thoroughly as we can */ 106 if (sl811->board && sl811->board->reset) 107 sl811->board->reset(hcd->self.controller); 108 else { 109 sl811_write(sl811, SL11H_CTLREG1, SL11H_CTL1MASK_SE0); 110 mdelay(20); 111 } 112 113 sl811_write(sl811, SL11H_IRQ_ENABLE, 0); 114 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); 115 sl811_write(sl811, SL811HS_CTLREG2, SL811HS_CTL2_INIT); 116 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); 117 118 // if !is_on, put into lowpower mode now 119 } 120 121 /*-------------------------------------------------------------------------*/ 122 123 /* This is a PIO-only HCD. Queueing appends URBs to the endpoint's queue, 124 * and may start I/O. Endpoint queues are scanned during completion irq 125 * handlers (one per packet: ACK, NAK, faults, etc) and urb cancellation. 126 * 127 * Using an external DMA engine to copy a packet at a time could work, 128 * though setup/teardown costs may be too big to make it worthwhile. 129 */ 130 131 /* SETUP starts a new control request. Devices are not allowed to 132 * STALL or NAK these; they must cancel any pending control requests. 133 */ 134 static void setup_packet( 135 struct sl811 *sl811, 136 struct sl811h_ep *ep, 137 struct urb *urb, 138 u8 bank, 139 u8 control 140 ) 141 { 142 u8 addr; 143 u8 len; 144 void __iomem *data_reg; 145 146 addr = SL811HS_PACKET_BUF(bank == 0); 147 len = sizeof(struct usb_ctrlrequest); 148 data_reg = sl811->data_reg; 149 sl811_write_buf(sl811, addr, urb->setup_packet, len); 150 151 /* autoincrementing */ 152 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr); 153 writeb(len, data_reg); 154 writeb(SL_SETUP /* | ep->epnum */, data_reg); 155 writeb(usb_pipedevice(urb->pipe), data_reg); 156 157 /* always OUT/data0 */ 158 sl811_write(sl811, bank + SL11H_HOSTCTLREG, 159 control | SL11H_HCTLMASK_OUT); 160 ep->length = 0; 161 PACKET("SETUP qh%p\n", ep); 162 } 163 164 /* STATUS finishes control requests, often after IN or OUT data packets */ 165 static void status_packet( 166 struct sl811 *sl811, 167 struct sl811h_ep *ep, 168 struct urb *urb, 169 u8 bank, 170 u8 control 171 ) 172 { 173 int do_out; 174 void __iomem *data_reg; 175 176 do_out = urb->transfer_buffer_length && usb_pipein(urb->pipe); 177 data_reg = sl811->data_reg; 178 179 /* autoincrementing */ 180 sl811_write(sl811, bank + SL11H_BUFADDRREG, 0); 181 writeb(0, data_reg); 182 writeb((do_out ? SL_OUT : SL_IN) /* | ep->epnum */, data_reg); 183 writeb(usb_pipedevice(urb->pipe), data_reg); 184 185 /* always data1; sometimes IN */ 186 control |= SL11H_HCTLMASK_TOGGLE; 187 if (do_out) 188 control |= SL11H_HCTLMASK_OUT; 189 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control); 190 ep->length = 0; 191 PACKET("STATUS%s/%s qh%p\n", ep->nak_count ? "/retry" : "", 192 do_out ? "out" : "in", ep); 193 } 194 195 /* IN packets can be used with any type of endpoint. here we just 196 * start the transfer, data from the peripheral may arrive later. 197 * urb->iso_frame_desc is currently ignored here... 198 */ 199 static void in_packet( 200 struct sl811 *sl811, 201 struct sl811h_ep *ep, 202 struct urb *urb, 203 u8 bank, 204 u8 control 205 ) 206 { 207 u8 addr; 208 u8 len; 209 void __iomem *data_reg; 210 211 /* avoid losing data on overflow */ 212 len = ep->maxpacket; 213 addr = SL811HS_PACKET_BUF(bank == 0); 214 if (!(control & SL11H_HCTLMASK_ISOCH) 215 && usb_gettoggle(urb->dev, ep->epnum, 0)) 216 control |= SL11H_HCTLMASK_TOGGLE; 217 data_reg = sl811->data_reg; 218 219 /* autoincrementing */ 220 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr); 221 writeb(len, data_reg); 222 writeb(SL_IN | ep->epnum, data_reg); 223 writeb(usb_pipedevice(urb->pipe), data_reg); 224 225 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control); 226 ep->length = min_t(u32, len, 227 urb->transfer_buffer_length - urb->actual_length); 228 PACKET("IN%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "", 229 !!usb_gettoggle(urb->dev, ep->epnum, 0), ep, len); 230 } 231 232 /* OUT packets can be used with any type of endpoint. 233 * urb->iso_frame_desc is currently ignored here... 234 */ 235 static void out_packet( 236 struct sl811 *sl811, 237 struct sl811h_ep *ep, 238 struct urb *urb, 239 u8 bank, 240 u8 control 241 ) 242 { 243 void *buf; 244 u8 addr; 245 u8 len; 246 void __iomem *data_reg; 247 248 buf = urb->transfer_buffer + urb->actual_length; 249 prefetch(buf); 250 251 len = min_t(u32, ep->maxpacket, 252 urb->transfer_buffer_length - urb->actual_length); 253 254 if (!(control & SL11H_HCTLMASK_ISOCH) 255 && usb_gettoggle(urb->dev, ep->epnum, 1)) 256 control |= SL11H_HCTLMASK_TOGGLE; 257 addr = SL811HS_PACKET_BUF(bank == 0); 258 data_reg = sl811->data_reg; 259 260 sl811_write_buf(sl811, addr, buf, len); 261 262 /* autoincrementing */ 263 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr); 264 writeb(len, data_reg); 265 writeb(SL_OUT | ep->epnum, data_reg); 266 writeb(usb_pipedevice(urb->pipe), data_reg); 267 268 sl811_write(sl811, bank + SL11H_HOSTCTLREG, 269 control | SL11H_HCTLMASK_OUT); 270 ep->length = len; 271 PACKET("OUT%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "", 272 !!usb_gettoggle(urb->dev, ep->epnum, 1), ep, len); 273 } 274 275 /*-------------------------------------------------------------------------*/ 276 277 /* caller updates on-chip enables later */ 278 279 static inline void sofirq_on(struct sl811 *sl811) 280 { 281 if (sl811->irq_enable & SL11H_INTMASK_SOFINTR) 282 return; 283 dev_dbg(sl811_to_hcd(sl811)->self.controller, "sof irq on\n"); 284 sl811->irq_enable |= SL11H_INTMASK_SOFINTR; 285 } 286 287 static inline void sofirq_off(struct sl811 *sl811) 288 { 289 if (!(sl811->irq_enable & SL11H_INTMASK_SOFINTR)) 290 return; 291 dev_dbg(sl811_to_hcd(sl811)->self.controller, "sof irq off\n"); 292 sl811->irq_enable &= ~SL11H_INTMASK_SOFINTR; 293 } 294 295 /*-------------------------------------------------------------------------*/ 296 297 /* pick the next endpoint for a transaction, and issue it. 298 * frames start with periodic transfers (after whatever is pending 299 * from the previous frame), and the rest of the time is async 300 * transfers, scheduled round-robin. 301 */ 302 static struct sl811h_ep *start(struct sl811 *sl811, u8 bank) 303 { 304 struct sl811h_ep *ep; 305 struct urb *urb; 306 int fclock; 307 u8 control; 308 309 /* use endpoint at schedule head */ 310 if (sl811->next_periodic) { 311 ep = sl811->next_periodic; 312 sl811->next_periodic = ep->next; 313 } else { 314 if (sl811->next_async) 315 ep = sl811->next_async; 316 else if (!list_empty(&sl811->async)) 317 ep = container_of(sl811->async.next, 318 struct sl811h_ep, schedule); 319 else { 320 /* could set up the first fullspeed periodic 321 * transfer for the next frame ... 322 */ 323 return NULL; 324 } 325 326 #ifdef USE_B 327 if ((bank && sl811->active_b == ep) || sl811->active_a == ep) 328 return NULL; 329 #endif 330 331 if (ep->schedule.next == &sl811->async) 332 sl811->next_async = NULL; 333 else 334 sl811->next_async = container_of(ep->schedule.next, 335 struct sl811h_ep, schedule); 336 } 337 338 if (unlikely(list_empty(&ep->hep->urb_list))) { 339 dev_dbg(sl811_to_hcd(sl811)->self.controller, 340 "empty %p queue?\n", ep); 341 return NULL; 342 } 343 344 urb = container_of(ep->hep->urb_list.next, struct urb, urb_list); 345 control = ep->defctrl; 346 347 /* if this frame doesn't have enough time left to transfer this 348 * packet, wait till the next frame. too-simple algorithm... 349 */ 350 fclock = sl811_read(sl811, SL11H_SOFTMRREG) << 6; 351 fclock -= 100; /* setup takes not much time */ 352 if (urb->dev->speed == USB_SPEED_LOW) { 353 if (control & SL11H_HCTLMASK_PREAMBLE) { 354 /* also note erratum 1: some hubs won't work */ 355 fclock -= 800; 356 } 357 fclock -= ep->maxpacket << 8; 358 359 /* erratum 2: AFTERSOF only works for fullspeed */ 360 if (fclock < 0) { 361 if (ep->period) 362 sl811->stat_overrun++; 363 sofirq_on(sl811); 364 return NULL; 365 } 366 } else { 367 fclock -= 12000 / 19; /* 19 64byte packets/msec */ 368 if (fclock < 0) { 369 if (ep->period) 370 sl811->stat_overrun++; 371 control |= SL11H_HCTLMASK_AFTERSOF; 372 373 /* throttle bulk/control irq noise */ 374 } else if (ep->nak_count) 375 control |= SL11H_HCTLMASK_AFTERSOF; 376 } 377 378 379 switch (ep->nextpid) { 380 case USB_PID_IN: 381 in_packet(sl811, ep, urb, bank, control); 382 break; 383 case USB_PID_OUT: 384 out_packet(sl811, ep, urb, bank, control); 385 break; 386 case USB_PID_SETUP: 387 setup_packet(sl811, ep, urb, bank, control); 388 break; 389 case USB_PID_ACK: /* for control status */ 390 status_packet(sl811, ep, urb, bank, control); 391 break; 392 default: 393 dev_dbg(sl811_to_hcd(sl811)->self.controller, 394 "bad ep%p pid %02x\n", ep, ep->nextpid); 395 ep = NULL; 396 } 397 return ep; 398 } 399 400 #define MIN_JIFFIES ((msecs_to_jiffies(2) > 1) ? msecs_to_jiffies(2) : 2) 401 402 static inline void start_transfer(struct sl811 *sl811) 403 { 404 if (sl811->port1 & USB_PORT_STAT_SUSPEND) 405 return; 406 if (sl811->active_a == NULL) { 407 sl811->active_a = start(sl811, SL811_EP_A(SL811_HOST_BUF)); 408 if (sl811->active_a != NULL) 409 sl811->jiffies_a = jiffies + MIN_JIFFIES; 410 } 411 #ifdef USE_B 412 if (sl811->active_b == NULL) { 413 sl811->active_b = start(sl811, SL811_EP_B(SL811_HOST_BUF)); 414 if (sl811->active_b != NULL) 415 sl811->jiffies_b = jiffies + MIN_JIFFIES; 416 } 417 #endif 418 } 419 420 static void finish_request( 421 struct sl811 *sl811, 422 struct sl811h_ep *ep, 423 struct urb *urb, 424 int status 425 ) __releases(sl811->lock) __acquires(sl811->lock) 426 { 427 unsigned i; 428 429 if (usb_pipecontrol(urb->pipe)) 430 ep->nextpid = USB_PID_SETUP; 431 432 usb_hcd_unlink_urb_from_ep(sl811_to_hcd(sl811), urb); 433 spin_unlock(&sl811->lock); 434 usb_hcd_giveback_urb(sl811_to_hcd(sl811), urb, status); 435 spin_lock(&sl811->lock); 436 437 /* leave active endpoints in the schedule */ 438 if (!list_empty(&ep->hep->urb_list)) 439 return; 440 441 /* async deschedule? */ 442 if (!list_empty(&ep->schedule)) { 443 list_del_init(&ep->schedule); 444 if (ep == sl811->next_async) 445 sl811->next_async = NULL; 446 return; 447 } 448 449 /* periodic deschedule */ 450 dev_dbg(sl811_to_hcd(sl811)->self.controller, 451 "deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch); 452 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) { 453 struct sl811h_ep *temp; 454 struct sl811h_ep **prev = &sl811->periodic[i]; 455 456 while (*prev && ((temp = *prev) != ep)) 457 prev = &temp->next; 458 if (*prev) 459 *prev = ep->next; 460 sl811->load[i] -= ep->load; 461 } 462 ep->branch = PERIODIC_SIZE; 463 sl811->periodic_count--; 464 sl811_to_hcd(sl811)->self.bandwidth_allocated 465 -= ep->load / ep->period; 466 if (ep == sl811->next_periodic) 467 sl811->next_periodic = ep->next; 468 469 /* we might turn SOFs back on again for the async schedule */ 470 if (sl811->periodic_count == 0) 471 sofirq_off(sl811); 472 } 473 474 static void 475 done(struct sl811 *sl811, struct sl811h_ep *ep, u8 bank) 476 { 477 u8 status; 478 struct urb *urb; 479 int urbstat = -EINPROGRESS; 480 481 if (unlikely(!ep)) 482 return; 483 484 status = sl811_read(sl811, bank + SL11H_PKTSTATREG); 485 486 urb = container_of(ep->hep->urb_list.next, struct urb, urb_list); 487 488 /* we can safely ignore NAKs */ 489 if (status & SL11H_STATMASK_NAK) { 490 // PACKET("...NAK_%02x qh%p\n", bank, ep); 491 if (!ep->period) 492 ep->nak_count++; 493 ep->error_count = 0; 494 495 /* ACK advances transfer, toggle, and maybe queue */ 496 } else if (status & SL11H_STATMASK_ACK) { 497 struct usb_device *udev = urb->dev; 498 int len; 499 unsigned char *buf; 500 501 /* urb->iso_frame_desc is currently ignored here... */ 502 503 ep->nak_count = ep->error_count = 0; 504 switch (ep->nextpid) { 505 case USB_PID_OUT: 506 // PACKET("...ACK/out_%02x qh%p\n", bank, ep); 507 urb->actual_length += ep->length; 508 usb_dotoggle(udev, ep->epnum, 1); 509 if (urb->actual_length 510 == urb->transfer_buffer_length) { 511 if (usb_pipecontrol(urb->pipe)) 512 ep->nextpid = USB_PID_ACK; 513 514 /* some bulk protocols terminate OUT transfers 515 * by a short packet, using ZLPs not padding. 516 */ 517 else if (ep->length < ep->maxpacket 518 || !(urb->transfer_flags 519 & URB_ZERO_PACKET)) 520 urbstat = 0; 521 } 522 break; 523 case USB_PID_IN: 524 // PACKET("...ACK/in_%02x qh%p\n", bank, ep); 525 buf = urb->transfer_buffer + urb->actual_length; 526 prefetchw(buf); 527 len = ep->maxpacket - sl811_read(sl811, 528 bank + SL11H_XFERCNTREG); 529 if (len > ep->length) { 530 len = ep->length; 531 urbstat = -EOVERFLOW; 532 } 533 urb->actual_length += len; 534 sl811_read_buf(sl811, SL811HS_PACKET_BUF(bank == 0), 535 buf, len); 536 usb_dotoggle(udev, ep->epnum, 0); 537 if (urbstat == -EINPROGRESS && 538 (len < ep->maxpacket || 539 urb->actual_length == 540 urb->transfer_buffer_length)) { 541 if (usb_pipecontrol(urb->pipe)) 542 ep->nextpid = USB_PID_ACK; 543 else 544 urbstat = 0; 545 } 546 break; 547 case USB_PID_SETUP: 548 // PACKET("...ACK/setup_%02x qh%p\n", bank, ep); 549 if (urb->transfer_buffer_length == urb->actual_length) 550 ep->nextpid = USB_PID_ACK; 551 else if (usb_pipeout(urb->pipe)) { 552 usb_settoggle(udev, 0, 1, 1); 553 ep->nextpid = USB_PID_OUT; 554 } else { 555 usb_settoggle(udev, 0, 0, 1); 556 ep->nextpid = USB_PID_IN; 557 } 558 break; 559 case USB_PID_ACK: 560 // PACKET("...ACK/status_%02x qh%p\n", bank, ep); 561 urbstat = 0; 562 break; 563 } 564 565 /* STALL stops all transfers */ 566 } else if (status & SL11H_STATMASK_STALL) { 567 PACKET("...STALL_%02x qh%p\n", bank, ep); 568 ep->nak_count = ep->error_count = 0; 569 urbstat = -EPIPE; 570 571 /* error? retry, until "3 strikes" */ 572 } else if (++ep->error_count >= 3) { 573 if (status & SL11H_STATMASK_TMOUT) 574 urbstat = -ETIME; 575 else if (status & SL11H_STATMASK_OVF) 576 urbstat = -EOVERFLOW; 577 else 578 urbstat = -EPROTO; 579 ep->error_count = 0; 580 PACKET("...3STRIKES_%02x %02x qh%p stat %d\n", 581 bank, status, ep, urbstat); 582 } 583 584 if (urbstat != -EINPROGRESS || urb->unlinked) 585 finish_request(sl811, ep, urb, urbstat); 586 } 587 588 static inline u8 checkdone(struct sl811 *sl811) 589 { 590 u8 ctl; 591 u8 irqstat = 0; 592 593 if (sl811->active_a && time_before_eq(sl811->jiffies_a, jiffies)) { 594 ctl = sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)); 595 if (ctl & SL11H_HCTLMASK_ARM) 596 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0); 597 dev_dbg(sl811_to_hcd(sl811)->self.controller, 598 "%s DONE_A: ctrl %02x sts %02x\n", 599 (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost", 600 ctl, 601 sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG))); 602 irqstat |= SL11H_INTMASK_DONE_A; 603 } 604 #ifdef USE_B 605 if (sl811->active_b && time_before_eq(sl811->jiffies_b, jiffies)) { 606 ctl = sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)); 607 if (ctl & SL11H_HCTLMASK_ARM) 608 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0); 609 dev_dbg(sl811_to_hcd(sl811)->self.controller, 610 "%s DONE_B: ctrl %02x sts %02x\n", 611 (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost", 612 ctl, 613 sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG))); 614 irqstat |= SL11H_INTMASK_DONE_A; 615 } 616 #endif 617 return irqstat; 618 } 619 620 static irqreturn_t sl811h_irq(struct usb_hcd *hcd) 621 { 622 struct sl811 *sl811 = hcd_to_sl811(hcd); 623 u8 irqstat; 624 irqreturn_t ret = IRQ_NONE; 625 unsigned retries = 5; 626 627 spin_lock(&sl811->lock); 628 629 retry: 630 irqstat = sl811_read(sl811, SL11H_IRQ_STATUS) & ~SL11H_INTMASK_DP; 631 if (irqstat) { 632 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat); 633 irqstat &= sl811->irq_enable; 634 } 635 636 #ifdef QUIRK2 637 /* this may no longer be necessary ... */ 638 if (irqstat == 0) { 639 irqstat = checkdone(sl811); 640 if (irqstat) 641 sl811->stat_lost++; 642 } 643 #endif 644 645 /* USB packets, not necessarily handled in the order they're 646 * issued ... that's fine if they're different endpoints. 647 */ 648 if (irqstat & SL11H_INTMASK_DONE_A) { 649 done(sl811, sl811->active_a, SL811_EP_A(SL811_HOST_BUF)); 650 sl811->active_a = NULL; 651 sl811->stat_a++; 652 } 653 #ifdef USE_B 654 if (irqstat & SL11H_INTMASK_DONE_B) { 655 done(sl811, sl811->active_b, SL811_EP_B(SL811_HOST_BUF)); 656 sl811->active_b = NULL; 657 sl811->stat_b++; 658 } 659 #endif 660 if (irqstat & SL11H_INTMASK_SOFINTR) { 661 unsigned index; 662 663 index = sl811->frame++ % (PERIODIC_SIZE - 1); 664 sl811->stat_sof++; 665 666 /* be graceful about almost-inevitable periodic schedule 667 * overruns: continue the previous frame's transfers iff 668 * this one has nothing scheduled. 669 */ 670 if (sl811->next_periodic) { 671 // dev_err(hcd->self.controller, "overrun to slot %d\n", index); 672 sl811->stat_overrun++; 673 } 674 if (sl811->periodic[index]) 675 sl811->next_periodic = sl811->periodic[index]; 676 } 677 678 /* hub_wq manages debouncing and wakeup */ 679 if (irqstat & SL11H_INTMASK_INSRMV) { 680 sl811->stat_insrmv++; 681 682 /* most stats are reset for each VBUS session */ 683 sl811->stat_wake = 0; 684 sl811->stat_sof = 0; 685 sl811->stat_a = 0; 686 sl811->stat_b = 0; 687 sl811->stat_lost = 0; 688 689 sl811->ctrl1 = 0; 690 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); 691 692 sl811->irq_enable = SL11H_INTMASK_INSRMV; 693 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); 694 695 /* usbcore nukes other pending transactions on disconnect */ 696 if (sl811->active_a) { 697 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0); 698 finish_request(sl811, sl811->active_a, 699 container_of(sl811->active_a 700 ->hep->urb_list.next, 701 struct urb, urb_list), 702 -ESHUTDOWN); 703 sl811->active_a = NULL; 704 } 705 #ifdef USE_B 706 if (sl811->active_b) { 707 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0); 708 finish_request(sl811, sl811->active_b, 709 container_of(sl811->active_b 710 ->hep->urb_list.next, 711 struct urb, urb_list), 712 NULL, -ESHUTDOWN); 713 sl811->active_b = NULL; 714 } 715 #endif 716 717 /* port status seems weird until after reset, so 718 * force the reset and make hub_wq clean up later. 719 */ 720 if (irqstat & SL11H_INTMASK_RD) 721 sl811->port1 &= ~USB_PORT_STAT_CONNECTION; 722 else 723 sl811->port1 |= USB_PORT_STAT_CONNECTION; 724 725 sl811->port1 |= USB_PORT_STAT_C_CONNECTION << 16; 726 727 } else if (irqstat & SL11H_INTMASK_RD) { 728 if (sl811->port1 & USB_PORT_STAT_SUSPEND) { 729 dev_dbg(hcd->self.controller, "wakeup\n"); 730 sl811->port1 |= USB_PORT_STAT_C_SUSPEND << 16; 731 sl811->stat_wake++; 732 } else 733 irqstat &= ~SL11H_INTMASK_RD; 734 } 735 736 if (irqstat) { 737 if (sl811->port1 & USB_PORT_STAT_ENABLE) 738 start_transfer(sl811); 739 ret = IRQ_HANDLED; 740 if (retries--) 741 goto retry; 742 } 743 744 if (sl811->periodic_count == 0 && list_empty(&sl811->async)) 745 sofirq_off(sl811); 746 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); 747 748 spin_unlock(&sl811->lock); 749 750 return ret; 751 } 752 753 /*-------------------------------------------------------------------------*/ 754 755 /* usb 1.1 says max 90% of a frame is available for periodic transfers. 756 * this driver doesn't promise that much since it's got to handle an 757 * IRQ per packet; irq handling latencies also use up that time. 758 * 759 * NOTE: the periodic schedule is a sparse tree, with the load for 760 * each branch minimized. see fig 3.5 in the OHCI spec for example. 761 */ 762 #define MAX_PERIODIC_LOAD 500 /* out of 1000 usec */ 763 764 static int balance(struct sl811 *sl811, u16 period, u16 load) 765 { 766 int i, branch = -ENOSPC; 767 768 /* search for the least loaded schedule branch of that period 769 * which has enough bandwidth left unreserved. 770 */ 771 for (i = 0; i < period ; i++) { 772 if (branch < 0 || sl811->load[branch] > sl811->load[i]) { 773 int j; 774 775 for (j = i; j < PERIODIC_SIZE; j += period) { 776 if ((sl811->load[j] + load) 777 > MAX_PERIODIC_LOAD) 778 break; 779 } 780 if (j < PERIODIC_SIZE) 781 continue; 782 branch = i; 783 } 784 } 785 return branch; 786 } 787 788 /*-------------------------------------------------------------------------*/ 789 790 static int sl811h_urb_enqueue( 791 struct usb_hcd *hcd, 792 struct urb *urb, 793 gfp_t mem_flags 794 ) { 795 struct sl811 *sl811 = hcd_to_sl811(hcd); 796 struct usb_device *udev = urb->dev; 797 unsigned int pipe = urb->pipe; 798 int is_out = !usb_pipein(pipe); 799 int type = usb_pipetype(pipe); 800 int epnum = usb_pipeendpoint(pipe); 801 struct sl811h_ep *ep = NULL; 802 unsigned long flags; 803 int i; 804 int retval; 805 struct usb_host_endpoint *hep = urb->ep; 806 807 #ifndef CONFIG_USB_SL811_HCD_ISO 808 if (type == PIPE_ISOCHRONOUS) 809 return -ENOSPC; 810 #endif 811 812 /* avoid all allocations within spinlocks */ 813 if (!hep->hcpriv) { 814 ep = kzalloc(sizeof *ep, mem_flags); 815 if (ep == NULL) 816 return -ENOMEM; 817 } 818 819 spin_lock_irqsave(&sl811->lock, flags); 820 821 /* don't submit to a dead or disabled port */ 822 if (!(sl811->port1 & USB_PORT_STAT_ENABLE) 823 || !HC_IS_RUNNING(hcd->state)) { 824 retval = -ENODEV; 825 kfree(ep); 826 goto fail_not_linked; 827 } 828 retval = usb_hcd_link_urb_to_ep(hcd, urb); 829 if (retval) { 830 kfree(ep); 831 goto fail_not_linked; 832 } 833 834 if (hep->hcpriv) { 835 kfree(ep); 836 ep = hep->hcpriv; 837 } else if (!ep) { 838 retval = -ENOMEM; 839 goto fail; 840 841 } else { 842 INIT_LIST_HEAD(&ep->schedule); 843 ep->udev = udev; 844 ep->epnum = epnum; 845 ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out); 846 ep->defctrl = SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENABLE; 847 usb_settoggle(udev, epnum, is_out, 0); 848 849 if (type == PIPE_CONTROL) 850 ep->nextpid = USB_PID_SETUP; 851 else if (is_out) 852 ep->nextpid = USB_PID_OUT; 853 else 854 ep->nextpid = USB_PID_IN; 855 856 if (ep->maxpacket > H_MAXPACKET) { 857 /* iso packets up to 240 bytes could work... */ 858 dev_dbg(hcd->self.controller, 859 "dev %d ep%d maxpacket %d\n", udev->devnum, 860 epnum, ep->maxpacket); 861 retval = -EINVAL; 862 kfree(ep); 863 goto fail; 864 } 865 866 if (udev->speed == USB_SPEED_LOW) { 867 /* send preamble for external hub? */ 868 if (!(sl811->ctrl1 & SL11H_CTL1MASK_LSPD)) 869 ep->defctrl |= SL11H_HCTLMASK_PREAMBLE; 870 } 871 switch (type) { 872 case PIPE_ISOCHRONOUS: 873 case PIPE_INTERRUPT: 874 if (urb->interval > PERIODIC_SIZE) 875 urb->interval = PERIODIC_SIZE; 876 ep->period = urb->interval; 877 ep->branch = PERIODIC_SIZE; 878 if (type == PIPE_ISOCHRONOUS) 879 ep->defctrl |= SL11H_HCTLMASK_ISOCH; 880 ep->load = usb_calc_bus_time(udev->speed, !is_out, 881 (type == PIPE_ISOCHRONOUS), 882 usb_maxpacket(udev, pipe, is_out)) 883 / 1000; 884 break; 885 } 886 887 ep->hep = hep; 888 hep->hcpriv = ep; 889 } 890 891 /* maybe put endpoint into schedule */ 892 switch (type) { 893 case PIPE_CONTROL: 894 case PIPE_BULK: 895 if (list_empty(&ep->schedule)) 896 list_add_tail(&ep->schedule, &sl811->async); 897 break; 898 case PIPE_ISOCHRONOUS: 899 case PIPE_INTERRUPT: 900 urb->interval = ep->period; 901 if (ep->branch < PERIODIC_SIZE) { 902 /* NOTE: the phase is correct here, but the value 903 * needs offsetting by the transfer queue depth. 904 * All current drivers ignore start_frame, so this 905 * is unlikely to ever matter... 906 */ 907 urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1)) 908 + ep->branch; 909 break; 910 } 911 912 retval = balance(sl811, ep->period, ep->load); 913 if (retval < 0) 914 goto fail; 915 ep->branch = retval; 916 retval = 0; 917 urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1)) 918 + ep->branch; 919 920 /* sort each schedule branch by period (slow before fast) 921 * to share the faster parts of the tree without needing 922 * dummy/placeholder nodes 923 */ 924 dev_dbg(hcd->self.controller, "schedule qh%d/%p branch %d\n", 925 ep->period, ep, ep->branch); 926 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) { 927 struct sl811h_ep **prev = &sl811->periodic[i]; 928 struct sl811h_ep *here = *prev; 929 930 while (here && ep != here) { 931 if (ep->period > here->period) 932 break; 933 prev = &here->next; 934 here = *prev; 935 } 936 if (ep != here) { 937 ep->next = here; 938 *prev = ep; 939 } 940 sl811->load[i] += ep->load; 941 } 942 sl811->periodic_count++; 943 hcd->self.bandwidth_allocated += ep->load / ep->period; 944 sofirq_on(sl811); 945 } 946 947 urb->hcpriv = hep; 948 start_transfer(sl811); 949 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); 950 fail: 951 if (retval) 952 usb_hcd_unlink_urb_from_ep(hcd, urb); 953 fail_not_linked: 954 spin_unlock_irqrestore(&sl811->lock, flags); 955 return retval; 956 } 957 958 static int sl811h_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) 959 { 960 struct sl811 *sl811 = hcd_to_sl811(hcd); 961 struct usb_host_endpoint *hep; 962 unsigned long flags; 963 struct sl811h_ep *ep; 964 int retval; 965 966 spin_lock_irqsave(&sl811->lock, flags); 967 retval = usb_hcd_check_unlink_urb(hcd, urb, status); 968 if (retval) 969 goto fail; 970 971 hep = urb->hcpriv; 972 ep = hep->hcpriv; 973 if (ep) { 974 /* finish right away if this urb can't be active ... 975 * note that some drivers wrongly expect delays 976 */ 977 if (ep->hep->urb_list.next != &urb->urb_list) { 978 /* not front of queue? never active */ 979 980 /* for active transfers, we expect an IRQ */ 981 } else if (sl811->active_a == ep) { 982 if (time_before_eq(sl811->jiffies_a, jiffies)) { 983 /* happens a lot with lowspeed?? */ 984 dev_dbg(hcd->self.controller, 985 "giveup on DONE_A: ctrl %02x sts %02x\n", 986 sl811_read(sl811, 987 SL811_EP_A(SL11H_HOSTCTLREG)), 988 sl811_read(sl811, 989 SL811_EP_A(SL11H_PKTSTATREG))); 990 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 991 0); 992 sl811->active_a = NULL; 993 } else 994 urb = NULL; 995 #ifdef USE_B 996 } else if (sl811->active_b == ep) { 997 if (time_before_eq(sl811->jiffies_a, jiffies)) { 998 /* happens a lot with lowspeed?? */ 999 dev_dbg(hcd->self.controller, 1000 "giveup on DONE_B: ctrl %02x sts %02x\n", 1001 sl811_read(sl811, 1002 SL811_EP_B(SL11H_HOSTCTLREG)), 1003 sl811_read(sl811, 1004 SL811_EP_B(SL11H_PKTSTATREG))); 1005 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 1006 0); 1007 sl811->active_b = NULL; 1008 } else 1009 urb = NULL; 1010 #endif 1011 } else { 1012 /* front of queue for inactive endpoint */ 1013 } 1014 1015 if (urb) 1016 finish_request(sl811, ep, urb, 0); 1017 else 1018 dev_dbg(sl811_to_hcd(sl811)->self.controller, 1019 "dequeue, urb %p active %s; wait4irq\n", urb, 1020 (sl811->active_a == ep) ? "A" : "B"); 1021 } else 1022 retval = -EINVAL; 1023 fail: 1024 spin_unlock_irqrestore(&sl811->lock, flags); 1025 return retval; 1026 } 1027 1028 static void 1029 sl811h_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep) 1030 { 1031 struct sl811h_ep *ep = hep->hcpriv; 1032 1033 if (!ep) 1034 return; 1035 1036 /* assume we'd just wait for the irq */ 1037 if (!list_empty(&hep->urb_list)) 1038 msleep(3); 1039 if (!list_empty(&hep->urb_list)) 1040 dev_warn(hcd->self.controller, "ep %p not empty?\n", ep); 1041 1042 kfree(ep); 1043 hep->hcpriv = NULL; 1044 } 1045 1046 static int 1047 sl811h_get_frame(struct usb_hcd *hcd) 1048 { 1049 struct sl811 *sl811 = hcd_to_sl811(hcd); 1050 1051 /* wrong except while periodic transfers are scheduled; 1052 * never matches the on-the-wire frame; 1053 * subject to overruns. 1054 */ 1055 return sl811->frame; 1056 } 1057 1058 1059 /*-------------------------------------------------------------------------*/ 1060 1061 /* the virtual root hub timer IRQ checks for hub status */ 1062 static int 1063 sl811h_hub_status_data(struct usb_hcd *hcd, char *buf) 1064 { 1065 struct sl811 *sl811 = hcd_to_sl811(hcd); 1066 #ifdef QUIRK3 1067 unsigned long flags; 1068 1069 /* non-SMP HACK: use root hub timer as i/o watchdog 1070 * this seems essential when SOF IRQs aren't in use... 1071 */ 1072 local_irq_save(flags); 1073 if (!timer_pending(&sl811->timer)) { 1074 if (sl811h_irq( /* ~0, */ hcd) != IRQ_NONE) 1075 sl811->stat_lost++; 1076 } 1077 local_irq_restore(flags); 1078 #endif 1079 1080 if (!(sl811->port1 & (0xffff << 16))) 1081 return 0; 1082 1083 /* tell hub_wq port 1 changed */ 1084 *buf = (1 << 1); 1085 return 1; 1086 } 1087 1088 static void 1089 sl811h_hub_descriptor ( 1090 struct sl811 *sl811, 1091 struct usb_hub_descriptor *desc 1092 ) { 1093 u16 temp = 0; 1094 1095 desc->bDescriptorType = USB_DT_HUB; 1096 desc->bHubContrCurrent = 0; 1097 1098 desc->bNbrPorts = 1; 1099 desc->bDescLength = 9; 1100 1101 /* per-port power switching (gang of one!), or none */ 1102 desc->bPwrOn2PwrGood = 0; 1103 if (sl811->board && sl811->board->port_power) { 1104 desc->bPwrOn2PwrGood = sl811->board->potpg; 1105 if (!desc->bPwrOn2PwrGood) 1106 desc->bPwrOn2PwrGood = 10; 1107 temp = HUB_CHAR_INDV_PORT_LPSM; 1108 } else 1109 temp = HUB_CHAR_NO_LPSM; 1110 1111 /* no overcurrent errors detection/handling */ 1112 temp |= HUB_CHAR_NO_OCPM; 1113 1114 desc->wHubCharacteristics = cpu_to_le16(temp); 1115 1116 /* ports removable, and legacy PortPwrCtrlMask */ 1117 desc->u.hs.DeviceRemovable[0] = 0 << 1; 1118 desc->u.hs.DeviceRemovable[1] = ~0; 1119 } 1120 1121 static void 1122 sl811h_timer(struct timer_list *t) 1123 { 1124 struct sl811 *sl811 = from_timer(sl811, t, timer); 1125 unsigned long flags; 1126 u8 irqstat; 1127 u8 signaling = sl811->ctrl1 & SL11H_CTL1MASK_FORCE; 1128 const u32 mask = USB_PORT_STAT_CONNECTION 1129 | USB_PORT_STAT_ENABLE 1130 | USB_PORT_STAT_LOW_SPEED; 1131 1132 spin_lock_irqsave(&sl811->lock, flags); 1133 1134 /* stop special signaling */ 1135 sl811->ctrl1 &= ~SL11H_CTL1MASK_FORCE; 1136 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); 1137 udelay(3); 1138 1139 irqstat = sl811_read(sl811, SL11H_IRQ_STATUS); 1140 1141 switch (signaling) { 1142 case SL11H_CTL1MASK_SE0: 1143 dev_dbg(sl811_to_hcd(sl811)->self.controller, "end reset\n"); 1144 sl811->port1 = (USB_PORT_STAT_C_RESET << 16) 1145 | USB_PORT_STAT_POWER; 1146 sl811->ctrl1 = 0; 1147 /* don't wrongly ack RD */ 1148 if (irqstat & SL11H_INTMASK_INSRMV) 1149 irqstat &= ~SL11H_INTMASK_RD; 1150 break; 1151 case SL11H_CTL1MASK_K: 1152 dev_dbg(sl811_to_hcd(sl811)->self.controller, "end resume\n"); 1153 sl811->port1 &= ~USB_PORT_STAT_SUSPEND; 1154 break; 1155 default: 1156 dev_dbg(sl811_to_hcd(sl811)->self.controller, 1157 "odd timer signaling: %02x\n", signaling); 1158 break; 1159 } 1160 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat); 1161 1162 if (irqstat & SL11H_INTMASK_RD) { 1163 /* usbcore nukes all pending transactions on disconnect */ 1164 if (sl811->port1 & USB_PORT_STAT_CONNECTION) 1165 sl811->port1 |= (USB_PORT_STAT_C_CONNECTION << 16) 1166 | (USB_PORT_STAT_C_ENABLE << 16); 1167 sl811->port1 &= ~mask; 1168 sl811->irq_enable = SL11H_INTMASK_INSRMV; 1169 } else { 1170 sl811->port1 |= mask; 1171 if (irqstat & SL11H_INTMASK_DP) 1172 sl811->port1 &= ~USB_PORT_STAT_LOW_SPEED; 1173 sl811->irq_enable = SL11H_INTMASK_INSRMV | SL11H_INTMASK_RD; 1174 } 1175 1176 if (sl811->port1 & USB_PORT_STAT_CONNECTION) { 1177 u8 ctrl2 = SL811HS_CTL2_INIT; 1178 1179 sl811->irq_enable |= SL11H_INTMASK_DONE_A; 1180 #ifdef USE_B 1181 sl811->irq_enable |= SL11H_INTMASK_DONE_B; 1182 #endif 1183 if (sl811->port1 & USB_PORT_STAT_LOW_SPEED) { 1184 sl811->ctrl1 |= SL11H_CTL1MASK_LSPD; 1185 ctrl2 |= SL811HS_CTL2MASK_DSWAP; 1186 } 1187 1188 /* start SOFs flowing, kickstarting with A registers */ 1189 sl811->ctrl1 |= SL11H_CTL1MASK_SOF_ENA; 1190 sl811_write(sl811, SL11H_SOFLOWREG, 0xe0); 1191 sl811_write(sl811, SL811HS_CTLREG2, ctrl2); 1192 1193 /* autoincrementing */ 1194 sl811_write(sl811, SL811_EP_A(SL11H_BUFLNTHREG), 0); 1195 writeb(SL_SOF, sl811->data_reg); 1196 writeb(0, sl811->data_reg); 1197 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 1198 SL11H_HCTLMASK_ARM); 1199 1200 /* hub_wq provides debounce delay */ 1201 } else { 1202 sl811->ctrl1 = 0; 1203 } 1204 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); 1205 1206 /* reenable irqs */ 1207 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); 1208 spin_unlock_irqrestore(&sl811->lock, flags); 1209 } 1210 1211 static int 1212 sl811h_hub_control( 1213 struct usb_hcd *hcd, 1214 u16 typeReq, 1215 u16 wValue, 1216 u16 wIndex, 1217 char *buf, 1218 u16 wLength 1219 ) { 1220 struct sl811 *sl811 = hcd_to_sl811(hcd); 1221 int retval = 0; 1222 unsigned long flags; 1223 1224 spin_lock_irqsave(&sl811->lock, flags); 1225 1226 switch (typeReq) { 1227 case ClearHubFeature: 1228 case SetHubFeature: 1229 switch (wValue) { 1230 case C_HUB_OVER_CURRENT: 1231 case C_HUB_LOCAL_POWER: 1232 break; 1233 default: 1234 goto error; 1235 } 1236 break; 1237 case ClearPortFeature: 1238 if (wIndex != 1 || wLength != 0) 1239 goto error; 1240 1241 switch (wValue) { 1242 case USB_PORT_FEAT_ENABLE: 1243 sl811->port1 &= USB_PORT_STAT_POWER; 1244 sl811->ctrl1 = 0; 1245 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); 1246 sl811->irq_enable = SL11H_INTMASK_INSRMV; 1247 sl811_write(sl811, SL11H_IRQ_ENABLE, 1248 sl811->irq_enable); 1249 break; 1250 case USB_PORT_FEAT_SUSPEND: 1251 if (!(sl811->port1 & USB_PORT_STAT_SUSPEND)) 1252 break; 1253 1254 /* 20 msec of resume/K signaling, other irqs blocked */ 1255 dev_dbg(hcd->self.controller, "start resume...\n"); 1256 sl811->irq_enable = 0; 1257 sl811_write(sl811, SL11H_IRQ_ENABLE, 1258 sl811->irq_enable); 1259 sl811->ctrl1 |= SL11H_CTL1MASK_K; 1260 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); 1261 1262 mod_timer(&sl811->timer, jiffies 1263 + msecs_to_jiffies(USB_RESUME_TIMEOUT)); 1264 break; 1265 case USB_PORT_FEAT_POWER: 1266 port_power(sl811, 0); 1267 break; 1268 case USB_PORT_FEAT_C_ENABLE: 1269 case USB_PORT_FEAT_C_SUSPEND: 1270 case USB_PORT_FEAT_C_CONNECTION: 1271 case USB_PORT_FEAT_C_OVER_CURRENT: 1272 case USB_PORT_FEAT_C_RESET: 1273 break; 1274 default: 1275 goto error; 1276 } 1277 sl811->port1 &= ~(1 << wValue); 1278 break; 1279 case GetHubDescriptor: 1280 sl811h_hub_descriptor(sl811, (struct usb_hub_descriptor *) buf); 1281 break; 1282 case GetHubStatus: 1283 put_unaligned_le32(0, buf); 1284 break; 1285 case GetPortStatus: 1286 if (wIndex != 1) 1287 goto error; 1288 put_unaligned_le32(sl811->port1, buf); 1289 1290 #ifndef VERBOSE 1291 if (*(u16*)(buf+2)) /* only if wPortChange is interesting */ 1292 #endif 1293 dev_dbg(hcd->self.controller, "GetPortStatus %08x\n", 1294 sl811->port1); 1295 break; 1296 case SetPortFeature: 1297 if (wIndex != 1 || wLength != 0) 1298 goto error; 1299 switch (wValue) { 1300 case USB_PORT_FEAT_SUSPEND: 1301 if (sl811->port1 & USB_PORT_STAT_RESET) 1302 goto error; 1303 if (!(sl811->port1 & USB_PORT_STAT_ENABLE)) 1304 goto error; 1305 1306 dev_dbg(hcd->self.controller,"suspend...\n"); 1307 sl811->ctrl1 &= ~SL11H_CTL1MASK_SOF_ENA; 1308 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); 1309 break; 1310 case USB_PORT_FEAT_POWER: 1311 port_power(sl811, 1); 1312 break; 1313 case USB_PORT_FEAT_RESET: 1314 if (sl811->port1 & USB_PORT_STAT_SUSPEND) 1315 goto error; 1316 if (!(sl811->port1 & USB_PORT_STAT_POWER)) 1317 break; 1318 1319 /* 50 msec of reset/SE0 signaling, irqs blocked */ 1320 sl811->irq_enable = 0; 1321 sl811_write(sl811, SL11H_IRQ_ENABLE, 1322 sl811->irq_enable); 1323 sl811->ctrl1 = SL11H_CTL1MASK_SE0; 1324 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); 1325 sl811->port1 |= USB_PORT_STAT_RESET; 1326 mod_timer(&sl811->timer, jiffies 1327 + msecs_to_jiffies(50)); 1328 break; 1329 default: 1330 goto error; 1331 } 1332 sl811->port1 |= 1 << wValue; 1333 break; 1334 1335 default: 1336 error: 1337 /* "protocol stall" on error */ 1338 retval = -EPIPE; 1339 } 1340 1341 spin_unlock_irqrestore(&sl811->lock, flags); 1342 return retval; 1343 } 1344 1345 #ifdef CONFIG_PM 1346 1347 static int 1348 sl811h_bus_suspend(struct usb_hcd *hcd) 1349 { 1350 // SOFs off 1351 dev_dbg(hcd->self.controller, "%s\n", __func__); 1352 return 0; 1353 } 1354 1355 static int 1356 sl811h_bus_resume(struct usb_hcd *hcd) 1357 { 1358 // SOFs on 1359 dev_dbg(hcd->self.controller, "%s\n", __func__); 1360 return 0; 1361 } 1362 1363 #else 1364 1365 #define sl811h_bus_suspend NULL 1366 #define sl811h_bus_resume NULL 1367 1368 #endif 1369 1370 1371 /*-------------------------------------------------------------------------*/ 1372 1373 static void dump_irq(struct seq_file *s, char *label, u8 mask) 1374 { 1375 seq_printf(s, "%s %02x%s%s%s%s%s%s\n", label, mask, 1376 (mask & SL11H_INTMASK_DONE_A) ? " done_a" : "", 1377 (mask & SL11H_INTMASK_DONE_B) ? " done_b" : "", 1378 (mask & SL11H_INTMASK_SOFINTR) ? " sof" : "", 1379 (mask & SL11H_INTMASK_INSRMV) ? " ins/rmv" : "", 1380 (mask & SL11H_INTMASK_RD) ? " rd" : "", 1381 (mask & SL11H_INTMASK_DP) ? " dp" : ""); 1382 } 1383 1384 static int sl811h_debug_show(struct seq_file *s, void *unused) 1385 { 1386 struct sl811 *sl811 = s->private; 1387 struct sl811h_ep *ep; 1388 unsigned i; 1389 1390 seq_printf(s, "%s\n%s version %s\nportstatus[1] = %08x\n", 1391 sl811_to_hcd(sl811)->product_desc, 1392 hcd_name, DRIVER_VERSION, 1393 sl811->port1); 1394 1395 seq_printf(s, "insert/remove: %ld\n", sl811->stat_insrmv); 1396 seq_printf(s, "current session: done_a %ld done_b %ld " 1397 "wake %ld sof %ld overrun %ld lost %ld\n\n", 1398 sl811->stat_a, sl811->stat_b, 1399 sl811->stat_wake, sl811->stat_sof, 1400 sl811->stat_overrun, sl811->stat_lost); 1401 1402 spin_lock_irq(&sl811->lock); 1403 1404 if (sl811->ctrl1 & SL11H_CTL1MASK_SUSPEND) 1405 seq_printf(s, "(suspended)\n\n"); 1406 else { 1407 u8 t = sl811_read(sl811, SL11H_CTLREG1); 1408 1409 seq_printf(s, "ctrl1 %02x%s%s%s%s\n", t, 1410 (t & SL11H_CTL1MASK_SOF_ENA) ? " sofgen" : "", 1411 ({char *s; switch (t & SL11H_CTL1MASK_FORCE) { 1412 case SL11H_CTL1MASK_NORMAL: s = ""; break; 1413 case SL11H_CTL1MASK_SE0: s = " se0/reset"; break; 1414 case SL11H_CTL1MASK_K: s = " k/resume"; break; 1415 default: s = "j"; break; 1416 } s; }), 1417 (t & SL11H_CTL1MASK_LSPD) ? " lowspeed" : "", 1418 (t & SL11H_CTL1MASK_SUSPEND) ? " suspend" : ""); 1419 1420 dump_irq(s, "irq_enable", 1421 sl811_read(sl811, SL11H_IRQ_ENABLE)); 1422 dump_irq(s, "irq_status", 1423 sl811_read(sl811, SL11H_IRQ_STATUS)); 1424 seq_printf(s, "frame clocks remaining: %d\n", 1425 sl811_read(sl811, SL11H_SOFTMRREG) << 6); 1426 } 1427 1428 seq_printf(s, "A: qh%p ctl %02x sts %02x\n", sl811->active_a, 1429 sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)), 1430 sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG))); 1431 seq_printf(s, "B: qh%p ctl %02x sts %02x\n", sl811->active_b, 1432 sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)), 1433 sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG))); 1434 seq_printf(s, "\n"); 1435 list_for_each_entry (ep, &sl811->async, schedule) { 1436 struct urb *urb; 1437 1438 seq_printf(s, "%s%sqh%p, ep%d%s, maxpacket %d" 1439 " nak %d err %d\n", 1440 (ep == sl811->active_a) ? "(A) " : "", 1441 (ep == sl811->active_b) ? "(B) " : "", 1442 ep, ep->epnum, 1443 ({ char *s; switch (ep->nextpid) { 1444 case USB_PID_IN: s = "in"; break; 1445 case USB_PID_OUT: s = "out"; break; 1446 case USB_PID_SETUP: s = "setup"; break; 1447 case USB_PID_ACK: s = "status"; break; 1448 default: s = "?"; break; 1449 } s;}), 1450 ep->maxpacket, 1451 ep->nak_count, ep->error_count); 1452 list_for_each_entry (urb, &ep->hep->urb_list, urb_list) { 1453 seq_printf(s, " urb%p, %d/%d\n", urb, 1454 urb->actual_length, 1455 urb->transfer_buffer_length); 1456 } 1457 } 1458 if (!list_empty(&sl811->async)) 1459 seq_printf(s, "\n"); 1460 1461 seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE); 1462 1463 for (i = 0; i < PERIODIC_SIZE; i++) { 1464 ep = sl811->periodic[i]; 1465 if (!ep) 1466 continue; 1467 seq_printf(s, "%2d [%3d]:\n", i, sl811->load[i]); 1468 1469 /* DUMB: prints shared entries multiple times */ 1470 do { 1471 seq_printf(s, 1472 " %s%sqh%d/%p (%sdev%d ep%d%s max %d) " 1473 "err %d\n", 1474 (ep == sl811->active_a) ? "(A) " : "", 1475 (ep == sl811->active_b) ? "(B) " : "", 1476 ep->period, ep, 1477 (ep->udev->speed == USB_SPEED_FULL) 1478 ? "" : "ls ", 1479 ep->udev->devnum, ep->epnum, 1480 (ep->epnum == 0) ? "" 1481 : ((ep->nextpid == USB_PID_IN) 1482 ? "in" 1483 : "out"), 1484 ep->maxpacket, ep->error_count); 1485 ep = ep->next; 1486 } while (ep); 1487 } 1488 1489 spin_unlock_irq(&sl811->lock); 1490 seq_printf(s, "\n"); 1491 1492 return 0; 1493 } 1494 DEFINE_SHOW_ATTRIBUTE(sl811h_debug); 1495 1496 /* expect just one sl811 per system */ 1497 static void create_debug_file(struct sl811 *sl811) 1498 { 1499 sl811->debug_file = debugfs_create_file("sl811h", S_IRUGO, 1500 usb_debug_root, sl811, 1501 &sl811h_debug_fops); 1502 } 1503 1504 static void remove_debug_file(struct sl811 *sl811) 1505 { 1506 debugfs_remove(sl811->debug_file); 1507 } 1508 1509 /*-------------------------------------------------------------------------*/ 1510 1511 static void 1512 sl811h_stop(struct usb_hcd *hcd) 1513 { 1514 struct sl811 *sl811 = hcd_to_sl811(hcd); 1515 unsigned long flags; 1516 1517 del_timer_sync(&hcd->rh_timer); 1518 1519 spin_lock_irqsave(&sl811->lock, flags); 1520 port_power(sl811, 0); 1521 spin_unlock_irqrestore(&sl811->lock, flags); 1522 } 1523 1524 static int 1525 sl811h_start(struct usb_hcd *hcd) 1526 { 1527 struct sl811 *sl811 = hcd_to_sl811(hcd); 1528 1529 /* chip has been reset, VBUS power is off */ 1530 hcd->state = HC_STATE_RUNNING; 1531 1532 if (sl811->board) { 1533 if (!device_can_wakeup(hcd->self.controller)) 1534 device_init_wakeup(hcd->self.controller, 1535 sl811->board->can_wakeup); 1536 hcd->power_budget = sl811->board->power * 2; 1537 } 1538 1539 /* enable power and interrupts */ 1540 port_power(sl811, 1); 1541 1542 return 0; 1543 } 1544 1545 /*-------------------------------------------------------------------------*/ 1546 1547 static const struct hc_driver sl811h_hc_driver = { 1548 .description = hcd_name, 1549 .hcd_priv_size = sizeof(struct sl811), 1550 1551 /* 1552 * generic hardware linkage 1553 */ 1554 .irq = sl811h_irq, 1555 .flags = HCD_USB11 | HCD_MEMORY, 1556 1557 /* Basic lifecycle operations */ 1558 .start = sl811h_start, 1559 .stop = sl811h_stop, 1560 1561 /* 1562 * managing i/o requests and associated device resources 1563 */ 1564 .urb_enqueue = sl811h_urb_enqueue, 1565 .urb_dequeue = sl811h_urb_dequeue, 1566 .endpoint_disable = sl811h_endpoint_disable, 1567 1568 /* 1569 * periodic schedule support 1570 */ 1571 .get_frame_number = sl811h_get_frame, 1572 1573 /* 1574 * root hub support 1575 */ 1576 .hub_status_data = sl811h_hub_status_data, 1577 .hub_control = sl811h_hub_control, 1578 .bus_suspend = sl811h_bus_suspend, 1579 .bus_resume = sl811h_bus_resume, 1580 }; 1581 1582 /*-------------------------------------------------------------------------*/ 1583 1584 static int 1585 sl811h_remove(struct platform_device *dev) 1586 { 1587 struct usb_hcd *hcd = platform_get_drvdata(dev); 1588 struct sl811 *sl811 = hcd_to_sl811(hcd); 1589 struct resource *res; 1590 1591 remove_debug_file(sl811); 1592 usb_remove_hcd(hcd); 1593 1594 /* some platforms may use IORESOURCE_IO */ 1595 res = platform_get_resource(dev, IORESOURCE_MEM, 1); 1596 if (res) 1597 iounmap(sl811->data_reg); 1598 1599 res = platform_get_resource(dev, IORESOURCE_MEM, 0); 1600 if (res) 1601 iounmap(sl811->addr_reg); 1602 1603 usb_put_hcd(hcd); 1604 return 0; 1605 } 1606 1607 static int 1608 sl811h_probe(struct platform_device *dev) 1609 { 1610 struct usb_hcd *hcd; 1611 struct sl811 *sl811; 1612 struct resource *addr, *data, *ires; 1613 int irq; 1614 void __iomem *addr_reg; 1615 void __iomem *data_reg; 1616 int retval; 1617 u8 tmp, ioaddr = 0; 1618 unsigned long irqflags; 1619 1620 if (usb_disabled()) 1621 return -ENODEV; 1622 1623 /* basic sanity checks first. board-specific init logic should 1624 * have initialized these three resources and probably board 1625 * specific platform_data. we don't probe for IRQs, and do only 1626 * minimal sanity checking. 1627 */ 1628 ires = platform_get_resource(dev, IORESOURCE_IRQ, 0); 1629 if (dev->num_resources < 3 || !ires) 1630 return -ENODEV; 1631 1632 irq = ires->start; 1633 irqflags = ires->flags & IRQF_TRIGGER_MASK; 1634 1635 /* refuse to confuse usbcore */ 1636 if (dev->dev.dma_mask) { 1637 dev_dbg(&dev->dev, "no we won't dma\n"); 1638 return -EINVAL; 1639 } 1640 1641 /* the chip may be wired for either kind of addressing */ 1642 addr = platform_get_resource(dev, IORESOURCE_MEM, 0); 1643 data = platform_get_resource(dev, IORESOURCE_MEM, 1); 1644 retval = -EBUSY; 1645 if (!addr || !data) { 1646 addr = platform_get_resource(dev, IORESOURCE_IO, 0); 1647 data = platform_get_resource(dev, IORESOURCE_IO, 1); 1648 if (!addr || !data) 1649 return -ENODEV; 1650 ioaddr = 1; 1651 /* 1652 * NOTE: 64-bit resource->start is getting truncated 1653 * to avoid compiler warning, assuming that ->start 1654 * is always 32-bit for this case 1655 */ 1656 addr_reg = (void __iomem *) (unsigned long) addr->start; 1657 data_reg = (void __iomem *) (unsigned long) data->start; 1658 } else { 1659 addr_reg = ioremap(addr->start, 1); 1660 if (addr_reg == NULL) { 1661 retval = -ENOMEM; 1662 goto err2; 1663 } 1664 1665 data_reg = ioremap(data->start, 1); 1666 if (data_reg == NULL) { 1667 retval = -ENOMEM; 1668 goto err4; 1669 } 1670 } 1671 1672 /* allocate and initialize hcd */ 1673 hcd = usb_create_hcd(&sl811h_hc_driver, &dev->dev, dev_name(&dev->dev)); 1674 if (!hcd) { 1675 retval = -ENOMEM; 1676 goto err5; 1677 } 1678 hcd->rsrc_start = addr->start; 1679 sl811 = hcd_to_sl811(hcd); 1680 1681 spin_lock_init(&sl811->lock); 1682 INIT_LIST_HEAD(&sl811->async); 1683 sl811->board = dev_get_platdata(&dev->dev); 1684 timer_setup(&sl811->timer, sl811h_timer, 0); 1685 sl811->addr_reg = addr_reg; 1686 sl811->data_reg = data_reg; 1687 1688 spin_lock_irq(&sl811->lock); 1689 port_power(sl811, 0); 1690 spin_unlock_irq(&sl811->lock); 1691 msleep(200); 1692 1693 tmp = sl811_read(sl811, SL11H_HWREVREG); 1694 switch (tmp >> 4) { 1695 case 1: 1696 hcd->product_desc = "SL811HS v1.2"; 1697 break; 1698 case 2: 1699 hcd->product_desc = "SL811HS v1.5"; 1700 break; 1701 default: 1702 /* reject case 0, SL11S is less functional */ 1703 dev_dbg(&dev->dev, "chiprev %02x\n", tmp); 1704 retval = -ENXIO; 1705 goto err6; 1706 } 1707 1708 /* The chip's IRQ is level triggered, active high. A requirement 1709 * for platform device setup is to cope with things like signal 1710 * inverters (e.g. CF is active low) or working only with edge 1711 * triggers (e.g. most ARM CPUs). Initial driver stress testing 1712 * was on a system with single edge triggering, so most sorts of 1713 * triggering arrangement should work. 1714 * 1715 * Use resource IRQ flags if set by platform device setup. 1716 */ 1717 irqflags |= IRQF_SHARED; 1718 retval = usb_add_hcd(hcd, irq, irqflags); 1719 if (retval != 0) 1720 goto err6; 1721 1722 device_wakeup_enable(hcd->self.controller); 1723 1724 create_debug_file(sl811); 1725 return retval; 1726 1727 err6: 1728 usb_put_hcd(hcd); 1729 err5: 1730 if (!ioaddr) 1731 iounmap(data_reg); 1732 err4: 1733 if (!ioaddr) 1734 iounmap(addr_reg); 1735 err2: 1736 dev_dbg(&dev->dev, "init error, %d\n", retval); 1737 return retval; 1738 } 1739 1740 #ifdef CONFIG_PM 1741 1742 /* for this device there's no useful distinction between the controller 1743 * and its root hub. 1744 */ 1745 1746 static int 1747 sl811h_suspend(struct platform_device *dev, pm_message_t state) 1748 { 1749 struct usb_hcd *hcd = platform_get_drvdata(dev); 1750 struct sl811 *sl811 = hcd_to_sl811(hcd); 1751 int retval = 0; 1752 1753 switch (state.event) { 1754 case PM_EVENT_FREEZE: 1755 retval = sl811h_bus_suspend(hcd); 1756 break; 1757 case PM_EVENT_SUSPEND: 1758 case PM_EVENT_HIBERNATE: 1759 case PM_EVENT_PRETHAW: /* explicitly discard hw state */ 1760 port_power(sl811, 0); 1761 break; 1762 } 1763 return retval; 1764 } 1765 1766 static int 1767 sl811h_resume(struct platform_device *dev) 1768 { 1769 struct usb_hcd *hcd = platform_get_drvdata(dev); 1770 struct sl811 *sl811 = hcd_to_sl811(hcd); 1771 1772 /* with no "check to see if VBUS is still powered" board hook, 1773 * let's assume it'd only be powered to enable remote wakeup. 1774 */ 1775 if (!sl811->port1 || !device_can_wakeup(&hcd->self.root_hub->dev)) { 1776 sl811->port1 = 0; 1777 port_power(sl811, 1); 1778 usb_root_hub_lost_power(hcd->self.root_hub); 1779 return 0; 1780 } 1781 1782 return sl811h_bus_resume(hcd); 1783 } 1784 1785 #else 1786 1787 #define sl811h_suspend NULL 1788 #define sl811h_resume NULL 1789 1790 #endif 1791 1792 1793 /* this driver is exported so sl811_cs can depend on it */ 1794 struct platform_driver sl811h_driver = { 1795 .probe = sl811h_probe, 1796 .remove = sl811h_remove, 1797 1798 .suspend = sl811h_suspend, 1799 .resume = sl811h_resume, 1800 .driver = { 1801 .name = (char *) hcd_name, 1802 }, 1803 }; 1804 EXPORT_SYMBOL(sl811h_driver); 1805 1806 module_platform_driver(sl811h_driver); 1807