xref: /openbmc/linux/drivers/usb/host/sl811-hcd.c (revision 7dd65feb)
1 /*
2  * SL811HS HCD (Host Controller Driver) for USB.
3  *
4  * Copyright (C) 2004 Psion Teklogix (for NetBook PRO)
5  * Copyright (C) 2004-2005 David Brownell
6  *
7  * Periodic scheduling is based on Roman's OHCI code
8  * 	Copyright (C) 1999 Roman Weissgaerber
9  *
10  * The SL811HS controller handles host side USB (like the SL11H, but with
11  * another register set and SOF generation) as well as peripheral side USB
12  * (like the SL811S).  This driver version doesn't implement the Gadget API
13  * for the peripheral role; or OTG (that'd need much external circuitry).
14  *
15  * For documentation, see the SL811HS spec and the "SL811HS Embedded Host"
16  * document (providing significant pieces missing from that spec); plus
17  * the SL811S spec if you want peripheral side info.
18  */
19 
20 /*
21  * Status:  Passed basic stress testing, works with hubs, mice, keyboards,
22  * and usb-storage.
23  *
24  * TODO:
25  * - usb suspend/resume triggered by sl811 (with USB_SUSPEND)
26  * - various issues noted in the code
27  * - performance work; use both register banks; ...
28  * - use urb->iso_frame_desc[] with ISO transfers
29  */
30 
31 #undef	VERBOSE
32 #undef	PACKET_TRACE
33 
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/kernel.h>
37 #include <linux/delay.h>
38 #include <linux/ioport.h>
39 #include <linux/sched.h>
40 #include <linux/slab.h>
41 #include <linux/errno.h>
42 #include <linux/init.h>
43 #include <linux/timer.h>
44 #include <linux/list.h>
45 #include <linux/interrupt.h>
46 #include <linux/usb.h>
47 #include <linux/usb/sl811.h>
48 #include <linux/platform_device.h>
49 
50 #include <asm/io.h>
51 #include <asm/irq.h>
52 #include <asm/system.h>
53 #include <asm/byteorder.h>
54 
55 #include "../core/hcd.h"
56 #include "sl811.h"
57 
58 
59 MODULE_DESCRIPTION("SL811HS USB Host Controller Driver");
60 MODULE_LICENSE("GPL");
61 MODULE_ALIAS("platform:sl811-hcd");
62 
63 #define DRIVER_VERSION	"19 May 2005"
64 
65 
66 #ifndef DEBUG
67 #	define	STUB_DEBUG_FILE
68 #endif
69 
70 /* for now, use only one transfer register bank */
71 #undef	USE_B
72 
73 /* this doesn't understand urb->iso_frame_desc[], but if you had a driver
74  * that just queued one ISO frame per URB then iso transfers "should" work
75  * using the normal urb status fields.
76  */
77 #define	DISABLE_ISO
78 
79 // #define	QUIRK2
80 #define	QUIRK3
81 
82 static const char hcd_name[] = "sl811-hcd";
83 
84 /*-------------------------------------------------------------------------*/
85 
86 static void port_power(struct sl811 *sl811, int is_on)
87 {
88 	struct usb_hcd	*hcd = sl811_to_hcd(sl811);
89 
90 	/* hub is inactive unless the port is powered */
91 	if (is_on) {
92 		if (sl811->port1 & (1 << USB_PORT_FEAT_POWER))
93 			return;
94 
95 		sl811->port1 = (1 << USB_PORT_FEAT_POWER);
96 		sl811->irq_enable = SL11H_INTMASK_INSRMV;
97 	} else {
98 		sl811->port1 = 0;
99 		sl811->irq_enable = 0;
100 		hcd->state = HC_STATE_HALT;
101 	}
102 	sl811->ctrl1 = 0;
103 	sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
104 	sl811_write(sl811, SL11H_IRQ_STATUS, ~0);
105 
106 	if (sl811->board && sl811->board->port_power) {
107 		/* switch VBUS, at 500mA unless hub power budget gets set */
108 		DBG("power %s\n", is_on ? "on" : "off");
109 		sl811->board->port_power(hcd->self.controller, is_on);
110 	}
111 
112 	/* reset as thoroughly as we can */
113 	if (sl811->board && sl811->board->reset)
114 		sl811->board->reset(hcd->self.controller);
115 	else {
116 		sl811_write(sl811, SL11H_CTLREG1, SL11H_CTL1MASK_SE0);
117 		mdelay(20);
118 	}
119 
120 	sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
121 	sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
122 	sl811_write(sl811, SL811HS_CTLREG2, SL811HS_CTL2_INIT);
123 	sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
124 
125 	// if !is_on, put into lowpower mode now
126 }
127 
128 /*-------------------------------------------------------------------------*/
129 
130 /* This is a PIO-only HCD.  Queueing appends URBs to the endpoint's queue,
131  * and may start I/O.  Endpoint queues are scanned during completion irq
132  * handlers (one per packet: ACK, NAK, faults, etc) and urb cancellation.
133  *
134  * Using an external DMA engine to copy a packet at a time could work,
135  * though setup/teardown costs may be too big to make it worthwhile.
136  */
137 
138 /* SETUP starts a new control request.  Devices are not allowed to
139  * STALL or NAK these; they must cancel any pending control requests.
140  */
141 static void setup_packet(
142 	struct sl811		*sl811,
143 	struct sl811h_ep	*ep,
144 	struct urb		*urb,
145 	u8			bank,
146 	u8			control
147 )
148 {
149 	u8			addr;
150 	u8			len;
151 	void __iomem		*data_reg;
152 
153 	addr = SL811HS_PACKET_BUF(bank == 0);
154 	len = sizeof(struct usb_ctrlrequest);
155 	data_reg = sl811->data_reg;
156 	sl811_write_buf(sl811, addr, urb->setup_packet, len);
157 
158 	/* autoincrementing */
159 	sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
160 	writeb(len, data_reg);
161 	writeb(SL_SETUP /* | ep->epnum */, data_reg);
162 	writeb(usb_pipedevice(urb->pipe), data_reg);
163 
164 	/* always OUT/data0 */ ;
165 	sl811_write(sl811, bank + SL11H_HOSTCTLREG,
166 			control | SL11H_HCTLMASK_OUT);
167 	ep->length = 0;
168 	PACKET("SETUP qh%p\n", ep);
169 }
170 
171 /* STATUS finishes control requests, often after IN or OUT data packets */
172 static void status_packet(
173 	struct sl811		*sl811,
174 	struct sl811h_ep	*ep,
175 	struct urb		*urb,
176 	u8			bank,
177 	u8			control
178 )
179 {
180 	int			do_out;
181 	void __iomem		*data_reg;
182 
183 	do_out = urb->transfer_buffer_length && usb_pipein(urb->pipe);
184 	data_reg = sl811->data_reg;
185 
186 	/* autoincrementing */
187 	sl811_write(sl811, bank + SL11H_BUFADDRREG, 0);
188 	writeb(0, data_reg);
189 	writeb((do_out ? SL_OUT : SL_IN) /* | ep->epnum */, data_reg);
190 	writeb(usb_pipedevice(urb->pipe), data_reg);
191 
192 	/* always data1; sometimes IN */
193 	control |= SL11H_HCTLMASK_TOGGLE;
194 	if (do_out)
195 		control |= SL11H_HCTLMASK_OUT;
196 	sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
197 	ep->length = 0;
198 	PACKET("STATUS%s/%s qh%p\n", ep->nak_count ? "/retry" : "",
199 			do_out ? "out" : "in", ep);
200 }
201 
202 /* IN packets can be used with any type of endpoint. here we just
203  * start the transfer, data from the peripheral may arrive later.
204  * urb->iso_frame_desc is currently ignored here...
205  */
206 static void in_packet(
207 	struct sl811		*sl811,
208 	struct sl811h_ep	*ep,
209 	struct urb		*urb,
210 	u8			bank,
211 	u8			control
212 )
213 {
214 	u8			addr;
215 	u8			len;
216 	void __iomem		*data_reg;
217 
218 	/* avoid losing data on overflow */
219 	len = ep->maxpacket;
220 	addr = SL811HS_PACKET_BUF(bank == 0);
221 	if (!(control & SL11H_HCTLMASK_ISOCH)
222 			&& usb_gettoggle(urb->dev, ep->epnum, 0))
223 		control |= SL11H_HCTLMASK_TOGGLE;
224 	data_reg = sl811->data_reg;
225 
226 	/* autoincrementing */
227 	sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
228 	writeb(len, data_reg);
229 	writeb(SL_IN | ep->epnum, data_reg);
230 	writeb(usb_pipedevice(urb->pipe), data_reg);
231 
232 	sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
233 	ep->length = min_t(u32, len,
234 			urb->transfer_buffer_length - urb->actual_length);
235 	PACKET("IN%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "",
236 			!!usb_gettoggle(urb->dev, ep->epnum, 0), ep, len);
237 }
238 
239 /* OUT packets can be used with any type of endpoint.
240  * urb->iso_frame_desc is currently ignored here...
241  */
242 static void out_packet(
243 	struct sl811		*sl811,
244 	struct sl811h_ep	*ep,
245 	struct urb		*urb,
246 	u8			bank,
247 	u8			control
248 )
249 {
250 	void			*buf;
251 	u8			addr;
252 	u8			len;
253 	void __iomem		*data_reg;
254 
255 	buf = urb->transfer_buffer + urb->actual_length;
256 	prefetch(buf);
257 
258 	len = min_t(u32, ep->maxpacket,
259 			urb->transfer_buffer_length - urb->actual_length);
260 
261 	if (!(control & SL11H_HCTLMASK_ISOCH)
262 			&& usb_gettoggle(urb->dev, ep->epnum, 1))
263 		control |= SL11H_HCTLMASK_TOGGLE;
264 	addr = SL811HS_PACKET_BUF(bank == 0);
265 	data_reg = sl811->data_reg;
266 
267 	sl811_write_buf(sl811, addr, buf, len);
268 
269 	/* autoincrementing */
270 	sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
271 	writeb(len, data_reg);
272 	writeb(SL_OUT | ep->epnum, data_reg);
273 	writeb(usb_pipedevice(urb->pipe), data_reg);
274 
275 	sl811_write(sl811, bank + SL11H_HOSTCTLREG,
276 			control | SL11H_HCTLMASK_OUT);
277 	ep->length = len;
278 	PACKET("OUT%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "",
279 			!!usb_gettoggle(urb->dev, ep->epnum, 1), ep, len);
280 }
281 
282 /*-------------------------------------------------------------------------*/
283 
284 /* caller updates on-chip enables later */
285 
286 static inline void sofirq_on(struct sl811 *sl811)
287 {
288 	if (sl811->irq_enable & SL11H_INTMASK_SOFINTR)
289 		return;
290 	VDBG("sof irq on\n");
291 	sl811->irq_enable |= SL11H_INTMASK_SOFINTR;
292 }
293 
294 static inline void sofirq_off(struct sl811 *sl811)
295 {
296 	if (!(sl811->irq_enable & SL11H_INTMASK_SOFINTR))
297 		return;
298 	VDBG("sof irq off\n");
299 	sl811->irq_enable &= ~SL11H_INTMASK_SOFINTR;
300 }
301 
302 /*-------------------------------------------------------------------------*/
303 
304 /* pick the next endpoint for a transaction, and issue it.
305  * frames start with periodic transfers (after whatever is pending
306  * from the previous frame), and the rest of the time is async
307  * transfers, scheduled round-robin.
308  */
309 static struct sl811h_ep	*start(struct sl811 *sl811, u8 bank)
310 {
311 	struct sl811h_ep	*ep;
312 	struct urb		*urb;
313 	int			fclock;
314 	u8			control;
315 
316 	/* use endpoint at schedule head */
317 	if (sl811->next_periodic) {
318 		ep = sl811->next_periodic;
319 		sl811->next_periodic = ep->next;
320 	} else {
321 		if (sl811->next_async)
322 			ep = sl811->next_async;
323 		else if (!list_empty(&sl811->async))
324 			ep = container_of(sl811->async.next,
325 					struct sl811h_ep, schedule);
326 		else {
327 			/* could set up the first fullspeed periodic
328 			 * transfer for the next frame ...
329 			 */
330 			return NULL;
331 		}
332 
333 #ifdef USE_B
334 		if ((bank && sl811->active_b == ep) || sl811->active_a == ep)
335 			return NULL;
336 #endif
337 
338 		if (ep->schedule.next == &sl811->async)
339 			sl811->next_async = NULL;
340 		else
341 			sl811->next_async = container_of(ep->schedule.next,
342 					struct sl811h_ep, schedule);
343 	}
344 
345 	if (unlikely(list_empty(&ep->hep->urb_list))) {
346 		DBG("empty %p queue?\n", ep);
347 		return NULL;
348 	}
349 
350 	urb = container_of(ep->hep->urb_list.next, struct urb, urb_list);
351 	control = ep->defctrl;
352 
353 	/* if this frame doesn't have enough time left to transfer this
354 	 * packet, wait till the next frame.  too-simple algorithm...
355 	 */
356 	fclock = sl811_read(sl811, SL11H_SOFTMRREG) << 6;
357 	fclock -= 100;		/* setup takes not much time */
358 	if (urb->dev->speed == USB_SPEED_LOW) {
359 		if (control & SL11H_HCTLMASK_PREAMBLE) {
360 			/* also note erratum 1: some hubs won't work */
361 			fclock -= 800;
362 		}
363 		fclock -= ep->maxpacket << 8;
364 
365 		/* erratum 2: AFTERSOF only works for fullspeed */
366 		if (fclock < 0) {
367 			if (ep->period)
368 				sl811->stat_overrun++;
369 			sofirq_on(sl811);
370 			return NULL;
371 		}
372 	} else {
373 		fclock -= 12000 / 19;	/* 19 64byte packets/msec */
374 		if (fclock < 0) {
375 			if (ep->period)
376 				sl811->stat_overrun++;
377 			control |= SL11H_HCTLMASK_AFTERSOF;
378 
379 		/* throttle bulk/control irq noise */
380 		} else if (ep->nak_count)
381 			control |= SL11H_HCTLMASK_AFTERSOF;
382 	}
383 
384 
385 	switch (ep->nextpid) {
386 	case USB_PID_IN:
387 		in_packet(sl811, ep, urb, bank, control);
388 		break;
389 	case USB_PID_OUT:
390 		out_packet(sl811, ep, urb, bank, control);
391 		break;
392 	case USB_PID_SETUP:
393 		setup_packet(sl811, ep, urb, bank, control);
394 		break;
395 	case USB_PID_ACK:		/* for control status */
396 		status_packet(sl811, ep, urb, bank, control);
397 		break;
398 	default:
399 		DBG("bad ep%p pid %02x\n", ep, ep->nextpid);
400 		ep = NULL;
401 	}
402 	return ep;
403 }
404 
405 #define MIN_JIFFIES	((msecs_to_jiffies(2) > 1) ? msecs_to_jiffies(2) : 2)
406 
407 static inline void start_transfer(struct sl811 *sl811)
408 {
409 	if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND))
410 		return;
411 	if (sl811->active_a == NULL) {
412 		sl811->active_a = start(sl811, SL811_EP_A(SL811_HOST_BUF));
413 		if (sl811->active_a != NULL)
414 			sl811->jiffies_a = jiffies + MIN_JIFFIES;
415 	}
416 #ifdef USE_B
417 	if (sl811->active_b == NULL) {
418 		sl811->active_b = start(sl811, SL811_EP_B(SL811_HOST_BUF));
419 		if (sl811->active_b != NULL)
420 			sl811->jiffies_b = jiffies + MIN_JIFFIES;
421 	}
422 #endif
423 }
424 
425 static void finish_request(
426 	struct sl811		*sl811,
427 	struct sl811h_ep	*ep,
428 	struct urb		*urb,
429 	int			status
430 ) __releases(sl811->lock) __acquires(sl811->lock)
431 {
432 	unsigned		i;
433 
434 	if (usb_pipecontrol(urb->pipe))
435 		ep->nextpid = USB_PID_SETUP;
436 
437 	usb_hcd_unlink_urb_from_ep(sl811_to_hcd(sl811), urb);
438 	spin_unlock(&sl811->lock);
439 	usb_hcd_giveback_urb(sl811_to_hcd(sl811), urb, status);
440 	spin_lock(&sl811->lock);
441 
442 	/* leave active endpoints in the schedule */
443 	if (!list_empty(&ep->hep->urb_list))
444 		return;
445 
446 	/* async deschedule? */
447 	if (!list_empty(&ep->schedule)) {
448 		list_del_init(&ep->schedule);
449 		if (ep == sl811->next_async)
450 			sl811->next_async = NULL;
451 		return;
452 	}
453 
454 	/* periodic deschedule */
455 	DBG("deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
456 	for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
457 		struct sl811h_ep	*temp;
458 		struct sl811h_ep	**prev = &sl811->periodic[i];
459 
460 		while (*prev && ((temp = *prev) != ep))
461 			prev = &temp->next;
462 		if (*prev)
463 			*prev = ep->next;
464 		sl811->load[i] -= ep->load;
465 	}
466 	ep->branch = PERIODIC_SIZE;
467 	sl811->periodic_count--;
468 	sl811_to_hcd(sl811)->self.bandwidth_allocated
469 		-= ep->load / ep->period;
470 	if (ep == sl811->next_periodic)
471 		sl811->next_periodic = ep->next;
472 
473 	/* we might turn SOFs back on again for the async schedule */
474 	if (sl811->periodic_count == 0)
475 		sofirq_off(sl811);
476 }
477 
478 static void
479 done(struct sl811 *sl811, struct sl811h_ep *ep, u8 bank)
480 {
481 	u8			status;
482 	struct urb		*urb;
483 	int			urbstat = -EINPROGRESS;
484 
485 	if (unlikely(!ep))
486 		return;
487 
488 	status = sl811_read(sl811, bank + SL11H_PKTSTATREG);
489 
490 	urb = container_of(ep->hep->urb_list.next, struct urb, urb_list);
491 
492 	/* we can safely ignore NAKs */
493 	if (status & SL11H_STATMASK_NAK) {
494 		// PACKET("...NAK_%02x qh%p\n", bank, ep);
495 		if (!ep->period)
496 			ep->nak_count++;
497 		ep->error_count = 0;
498 
499 	/* ACK advances transfer, toggle, and maybe queue */
500 	} else if (status & SL11H_STATMASK_ACK) {
501 		struct usb_device	*udev = urb->dev;
502 		int			len;
503 		unsigned char		*buf;
504 
505 		/* urb->iso_frame_desc is currently ignored here... */
506 
507 		ep->nak_count = ep->error_count = 0;
508 		switch (ep->nextpid) {
509 		case USB_PID_OUT:
510 			// PACKET("...ACK/out_%02x qh%p\n", bank, ep);
511 			urb->actual_length += ep->length;
512 			usb_dotoggle(udev, ep->epnum, 1);
513 			if (urb->actual_length
514 					== urb->transfer_buffer_length) {
515 				if (usb_pipecontrol(urb->pipe))
516 					ep->nextpid = USB_PID_ACK;
517 
518 				/* some bulk protocols terminate OUT transfers
519 				 * by a short packet, using ZLPs not padding.
520 				 */
521 				else if (ep->length < ep->maxpacket
522 						|| !(urb->transfer_flags
523 							& URB_ZERO_PACKET))
524 					urbstat = 0;
525 			}
526 			break;
527 		case USB_PID_IN:
528 			// PACKET("...ACK/in_%02x qh%p\n", bank, ep);
529 			buf = urb->transfer_buffer + urb->actual_length;
530 			prefetchw(buf);
531 			len = ep->maxpacket - sl811_read(sl811,
532 						bank + SL11H_XFERCNTREG);
533 			if (len > ep->length) {
534 				len = ep->length;
535 				urbstat = -EOVERFLOW;
536 			}
537 			urb->actual_length += len;
538 			sl811_read_buf(sl811, SL811HS_PACKET_BUF(bank == 0),
539 					buf, len);
540 			usb_dotoggle(udev, ep->epnum, 0);
541 			if (urbstat == -EINPROGRESS &&
542 					(len < ep->maxpacket ||
543 						urb->actual_length ==
544 						urb->transfer_buffer_length)) {
545 				if (usb_pipecontrol(urb->pipe))
546 					ep->nextpid = USB_PID_ACK;
547 				else
548 					urbstat = 0;
549 			}
550 			break;
551 		case USB_PID_SETUP:
552 			// PACKET("...ACK/setup_%02x qh%p\n", bank, ep);
553 			if (urb->transfer_buffer_length == urb->actual_length)
554 				ep->nextpid = USB_PID_ACK;
555 			else if (usb_pipeout(urb->pipe)) {
556 				usb_settoggle(udev, 0, 1, 1);
557 				ep->nextpid = USB_PID_OUT;
558 			} else {
559 				usb_settoggle(udev, 0, 0, 1);
560 				ep->nextpid = USB_PID_IN;
561 			}
562 			break;
563 		case USB_PID_ACK:
564 			// PACKET("...ACK/status_%02x qh%p\n", bank, ep);
565 			urbstat = 0;
566 			break;
567 		}
568 
569 	/* STALL stops all transfers */
570 	} else if (status & SL11H_STATMASK_STALL) {
571 		PACKET("...STALL_%02x qh%p\n", bank, ep);
572 		ep->nak_count = ep->error_count = 0;
573 		urbstat = -EPIPE;
574 
575 	/* error? retry, until "3 strikes" */
576 	} else if (++ep->error_count >= 3) {
577 		if (status & SL11H_STATMASK_TMOUT)
578 			urbstat = -ETIME;
579 		else if (status & SL11H_STATMASK_OVF)
580 			urbstat = -EOVERFLOW;
581 		else
582 			urbstat = -EPROTO;
583 		ep->error_count = 0;
584 		PACKET("...3STRIKES_%02x %02x qh%p stat %d\n",
585 				bank, status, ep, urbstat);
586 	}
587 
588 	if (urbstat != -EINPROGRESS || urb->unlinked)
589 		finish_request(sl811, ep, urb, urbstat);
590 }
591 
592 static inline u8 checkdone(struct sl811 *sl811)
593 {
594 	u8	ctl;
595 	u8	irqstat = 0;
596 
597 	if (sl811->active_a && time_before_eq(sl811->jiffies_a, jiffies)) {
598 		ctl = sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG));
599 		if (ctl & SL11H_HCTLMASK_ARM)
600 			sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
601 		DBG("%s DONE_A: ctrl %02x sts %02x\n",
602 			(ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost",
603 			ctl,
604 			sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG)));
605 		irqstat |= SL11H_INTMASK_DONE_A;
606 	}
607 #ifdef	USE_B
608 	if (sl811->active_b && time_before_eq(sl811->jiffies_b, jiffies)) {
609 		ctl = sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG));
610 		if (ctl & SL11H_HCTLMASK_ARM)
611 			sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
612 		DBG("%s DONE_B: ctrl %02x sts %02x\n",
613 			(ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost",
614 			ctl,
615 			sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG)));
616 		irqstat |= SL11H_INTMASK_DONE_A;
617 	}
618 #endif
619 	return irqstat;
620 }
621 
622 static irqreturn_t sl811h_irq(struct usb_hcd *hcd)
623 {
624 	struct sl811	*sl811 = hcd_to_sl811(hcd);
625 	u8		irqstat;
626 	irqreturn_t	ret = IRQ_NONE;
627 	unsigned	retries = 5;
628 
629 	spin_lock(&sl811->lock);
630 
631 retry:
632 	irqstat = sl811_read(sl811, SL11H_IRQ_STATUS) & ~SL11H_INTMASK_DP;
633 	if (irqstat) {
634 		sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
635 		irqstat &= sl811->irq_enable;
636 	}
637 
638 #ifdef	QUIRK2
639 	/* this may no longer be necessary ... */
640 	if (irqstat == 0) {
641 		irqstat = checkdone(sl811);
642 		if (irqstat)
643 			sl811->stat_lost++;
644 	}
645 #endif
646 
647 	/* USB packets, not necessarily handled in the order they're
648 	 * issued ... that's fine if they're different endpoints.
649 	 */
650 	if (irqstat & SL11H_INTMASK_DONE_A) {
651 		done(sl811, sl811->active_a, SL811_EP_A(SL811_HOST_BUF));
652 		sl811->active_a = NULL;
653 		sl811->stat_a++;
654 	}
655 #ifdef USE_B
656 	if (irqstat & SL11H_INTMASK_DONE_B) {
657 		done(sl811, sl811->active_b, SL811_EP_B(SL811_HOST_BUF));
658 		sl811->active_b = NULL;
659 		sl811->stat_b++;
660 	}
661 #endif
662 	if (irqstat & SL11H_INTMASK_SOFINTR) {
663 		unsigned index;
664 
665 		index = sl811->frame++ % (PERIODIC_SIZE - 1);
666 		sl811->stat_sof++;
667 
668 		/* be graceful about almost-inevitable periodic schedule
669 		 * overruns:  continue the previous frame's transfers iff
670 		 * this one has nothing scheduled.
671 		 */
672 		if (sl811->next_periodic) {
673 			// ERR("overrun to slot %d\n", index);
674 			sl811->stat_overrun++;
675 		}
676 		if (sl811->periodic[index])
677 			sl811->next_periodic = sl811->periodic[index];
678 	}
679 
680 	/* khubd manages debouncing and wakeup */
681 	if (irqstat & SL11H_INTMASK_INSRMV) {
682 		sl811->stat_insrmv++;
683 
684 		/* most stats are reset for each VBUS session */
685 		sl811->stat_wake = 0;
686 		sl811->stat_sof = 0;
687 		sl811->stat_a = 0;
688 		sl811->stat_b = 0;
689 		sl811->stat_lost = 0;
690 
691 		sl811->ctrl1 = 0;
692 		sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
693 
694 		sl811->irq_enable = SL11H_INTMASK_INSRMV;
695 		sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
696 
697 		/* usbcore nukes other pending transactions on disconnect */
698 		if (sl811->active_a) {
699 			sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
700 			finish_request(sl811, sl811->active_a,
701 				container_of(sl811->active_a
702 						->hep->urb_list.next,
703 					struct urb, urb_list),
704 				-ESHUTDOWN);
705 			sl811->active_a = NULL;
706 		}
707 #ifdef	USE_B
708 		if (sl811->active_b) {
709 			sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
710 			finish_request(sl811, sl811->active_b,
711 				container_of(sl811->active_b
712 						->hep->urb_list.next,
713 					struct urb, urb_list),
714 				NULL, -ESHUTDOWN);
715 			sl811->active_b = NULL;
716 		}
717 #endif
718 
719 		/* port status seems weird until after reset, so
720 		 * force the reset and make khubd clean up later.
721 		 */
722 		if (sl811->stat_insrmv & 1)
723 			sl811->port1 |= 1 << USB_PORT_FEAT_CONNECTION;
724 		else
725 			sl811->port1 &= ~(1 << USB_PORT_FEAT_CONNECTION);
726 
727 		sl811->port1 |= 1 << USB_PORT_FEAT_C_CONNECTION;
728 
729 	} else if (irqstat & SL11H_INTMASK_RD) {
730 		if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)) {
731 			DBG("wakeup\n");
732 			sl811->port1 |= 1 << USB_PORT_FEAT_C_SUSPEND;
733 			sl811->stat_wake++;
734 		} else
735 			irqstat &= ~SL11H_INTMASK_RD;
736 	}
737 
738 	if (irqstat) {
739 		if (sl811->port1 & (1 << USB_PORT_FEAT_ENABLE))
740 			start_transfer(sl811);
741 		ret = IRQ_HANDLED;
742 		if (retries--)
743 			goto retry;
744 	}
745 
746 	if (sl811->periodic_count == 0 && list_empty(&sl811->async))
747 		sofirq_off(sl811);
748 	sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
749 
750 	spin_unlock(&sl811->lock);
751 
752 	return ret;
753 }
754 
755 /*-------------------------------------------------------------------------*/
756 
757 /* usb 1.1 says max 90% of a frame is available for periodic transfers.
758  * this driver doesn't promise that much since it's got to handle an
759  * IRQ per packet; irq handling latencies also use up that time.
760  *
761  * NOTE:  the periodic schedule is a sparse tree, with the load for
762  * each branch minimized.  see fig 3.5 in the OHCI spec for example.
763  */
764 #define	MAX_PERIODIC_LOAD	500	/* out of 1000 usec */
765 
766 static int balance(struct sl811 *sl811, u16 period, u16 load)
767 {
768 	int	i, branch = -ENOSPC;
769 
770 	/* search for the least loaded schedule branch of that period
771 	 * which has enough bandwidth left unreserved.
772 	 */
773 	for (i = 0; i < period ; i++) {
774 		if (branch < 0 || sl811->load[branch] > sl811->load[i]) {
775 			int	j;
776 
777 			for (j = i; j < PERIODIC_SIZE; j += period) {
778 				if ((sl811->load[j] + load)
779 						> MAX_PERIODIC_LOAD)
780 					break;
781 			}
782 			if (j < PERIODIC_SIZE)
783 				continue;
784 			branch = i;
785 		}
786 	}
787 	return branch;
788 }
789 
790 /*-------------------------------------------------------------------------*/
791 
792 static int sl811h_urb_enqueue(
793 	struct usb_hcd		*hcd,
794 	struct urb		*urb,
795 	gfp_t			mem_flags
796 ) {
797 	struct sl811		*sl811 = hcd_to_sl811(hcd);
798 	struct usb_device	*udev = urb->dev;
799 	unsigned int		pipe = urb->pipe;
800 	int			is_out = !usb_pipein(pipe);
801 	int			type = usb_pipetype(pipe);
802 	int			epnum = usb_pipeendpoint(pipe);
803 	struct sl811h_ep	*ep = NULL;
804 	unsigned long		flags;
805 	int			i;
806 	int			retval;
807 	struct usb_host_endpoint	*hep = urb->ep;
808 
809 #ifdef	DISABLE_ISO
810 	if (type == PIPE_ISOCHRONOUS)
811 		return -ENOSPC;
812 #endif
813 
814 	/* avoid all allocations within spinlocks */
815 	if (!hep->hcpriv)
816 		ep = kzalloc(sizeof *ep, mem_flags);
817 
818 	spin_lock_irqsave(&sl811->lock, flags);
819 
820 	/* don't submit to a dead or disabled port */
821 	if (!(sl811->port1 & (1 << USB_PORT_FEAT_ENABLE))
822 			|| !HC_IS_RUNNING(hcd->state)) {
823 		retval = -ENODEV;
824 		kfree(ep);
825 		goto fail_not_linked;
826 	}
827 	retval = usb_hcd_link_urb_to_ep(hcd, urb);
828 	if (retval) {
829 		kfree(ep);
830 		goto fail_not_linked;
831 	}
832 
833 	if (hep->hcpriv) {
834 		kfree(ep);
835 		ep = hep->hcpriv;
836 	} else if (!ep) {
837 		retval = -ENOMEM;
838 		goto fail;
839 
840 	} else {
841 		INIT_LIST_HEAD(&ep->schedule);
842 		ep->udev = udev;
843 		ep->epnum = epnum;
844 		ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out);
845 		ep->defctrl = SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENABLE;
846 		usb_settoggle(udev, epnum, is_out, 0);
847 
848 		if (type == PIPE_CONTROL)
849 			ep->nextpid = USB_PID_SETUP;
850 		else if (is_out)
851 			ep->nextpid = USB_PID_OUT;
852 		else
853 			ep->nextpid = USB_PID_IN;
854 
855 		if (ep->maxpacket > H_MAXPACKET) {
856 			/* iso packets up to 240 bytes could work... */
857 			DBG("dev %d ep%d maxpacket %d\n",
858 				udev->devnum, epnum, ep->maxpacket);
859 			retval = -EINVAL;
860 			goto fail;
861 		}
862 
863 		if (udev->speed == USB_SPEED_LOW) {
864 			/* send preamble for external hub? */
865 			if (!(sl811->ctrl1 & SL11H_CTL1MASK_LSPD))
866 				ep->defctrl |= SL11H_HCTLMASK_PREAMBLE;
867 		}
868 		switch (type) {
869 		case PIPE_ISOCHRONOUS:
870 		case PIPE_INTERRUPT:
871 			if (urb->interval > PERIODIC_SIZE)
872 				urb->interval = PERIODIC_SIZE;
873 			ep->period = urb->interval;
874 			ep->branch = PERIODIC_SIZE;
875 			if (type == PIPE_ISOCHRONOUS)
876 				ep->defctrl |= SL11H_HCTLMASK_ISOCH;
877 			ep->load = usb_calc_bus_time(udev->speed, !is_out,
878 				(type == PIPE_ISOCHRONOUS),
879 				usb_maxpacket(udev, pipe, is_out))
880 					/ 1000;
881 			break;
882 		}
883 
884 		ep->hep = hep;
885 		hep->hcpriv = ep;
886 	}
887 
888 	/* maybe put endpoint into schedule */
889 	switch (type) {
890 	case PIPE_CONTROL:
891 	case PIPE_BULK:
892 		if (list_empty(&ep->schedule))
893 			list_add_tail(&ep->schedule, &sl811->async);
894 		break;
895 	case PIPE_ISOCHRONOUS:
896 	case PIPE_INTERRUPT:
897 		urb->interval = ep->period;
898 		if (ep->branch < PERIODIC_SIZE) {
899 			/* NOTE:  the phase is correct here, but the value
900 			 * needs offsetting by the transfer queue depth.
901 			 * All current drivers ignore start_frame, so this
902 			 * is unlikely to ever matter...
903 			 */
904 			urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1))
905 						+ ep->branch;
906 			break;
907 		}
908 
909 		retval = balance(sl811, ep->period, ep->load);
910 		if (retval < 0)
911 			goto fail;
912 		ep->branch = retval;
913 		retval = 0;
914 		urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1))
915 					+ ep->branch;
916 
917 		/* sort each schedule branch by period (slow before fast)
918 		 * to share the faster parts of the tree without needing
919 		 * dummy/placeholder nodes
920 		 */
921 		DBG("schedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
922 		for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
923 			struct sl811h_ep	**prev = &sl811->periodic[i];
924 			struct sl811h_ep	*here = *prev;
925 
926 			while (here && ep != here) {
927 				if (ep->period > here->period)
928 					break;
929 				prev = &here->next;
930 				here = *prev;
931 			}
932 			if (ep != here) {
933 				ep->next = here;
934 				*prev = ep;
935 			}
936 			sl811->load[i] += ep->load;
937 		}
938 		sl811->periodic_count++;
939 		hcd->self.bandwidth_allocated += ep->load / ep->period;
940 		sofirq_on(sl811);
941 	}
942 
943 	urb->hcpriv = hep;
944 	start_transfer(sl811);
945 	sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
946 fail:
947 	if (retval)
948 		usb_hcd_unlink_urb_from_ep(hcd, urb);
949 fail_not_linked:
950 	spin_unlock_irqrestore(&sl811->lock, flags);
951 	return retval;
952 }
953 
954 static int sl811h_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
955 {
956 	struct sl811		*sl811 = hcd_to_sl811(hcd);
957 	struct usb_host_endpoint *hep;
958 	unsigned long		flags;
959 	struct sl811h_ep	*ep;
960 	int			retval;
961 
962 	spin_lock_irqsave(&sl811->lock, flags);
963 	retval = usb_hcd_check_unlink_urb(hcd, urb, status);
964 	if (retval)
965 		goto fail;
966 
967 	hep = urb->hcpriv;
968 	ep = hep->hcpriv;
969 	if (ep) {
970 		/* finish right away if this urb can't be active ...
971 		 * note that some drivers wrongly expect delays
972 		 */
973 		if (ep->hep->urb_list.next != &urb->urb_list) {
974 			/* not front of queue?  never active */
975 
976 		/* for active transfers, we expect an IRQ */
977 		} else if (sl811->active_a == ep) {
978 			if (time_before_eq(sl811->jiffies_a, jiffies)) {
979 				/* happens a lot with lowspeed?? */
980 				DBG("giveup on DONE_A: ctrl %02x sts %02x\n",
981 					sl811_read(sl811,
982 						SL811_EP_A(SL11H_HOSTCTLREG)),
983 					sl811_read(sl811,
984 						SL811_EP_A(SL11H_PKTSTATREG)));
985 				sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
986 						0);
987 				sl811->active_a = NULL;
988 			} else
989 				urb = NULL;
990 #ifdef	USE_B
991 		} else if (sl811->active_b == ep) {
992 			if (time_before_eq(sl811->jiffies_a, jiffies)) {
993 				/* happens a lot with lowspeed?? */
994 				DBG("giveup on DONE_B: ctrl %02x sts %02x\n",
995 					sl811_read(sl811,
996 						SL811_EP_B(SL11H_HOSTCTLREG)),
997 					sl811_read(sl811,
998 						SL811_EP_B(SL11H_PKTSTATREG)));
999 				sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG),
1000 						0);
1001 				sl811->active_b = NULL;
1002 			} else
1003 				urb = NULL;
1004 #endif
1005 		} else {
1006 			/* front of queue for inactive endpoint */
1007 		}
1008 
1009 		if (urb)
1010 			finish_request(sl811, ep, urb, 0);
1011 		else
1012 			VDBG("dequeue, urb %p active %s; wait4irq\n", urb,
1013 				(sl811->active_a == ep) ? "A" : "B");
1014 	} else
1015 		retval = -EINVAL;
1016  fail:
1017 	spin_unlock_irqrestore(&sl811->lock, flags);
1018 	return retval;
1019 }
1020 
1021 static void
1022 sl811h_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep)
1023 {
1024 	struct sl811h_ep	*ep = hep->hcpriv;
1025 
1026 	if (!ep)
1027 		return;
1028 
1029 	/* assume we'd just wait for the irq */
1030 	if (!list_empty(&hep->urb_list))
1031 		msleep(3);
1032 	if (!list_empty(&hep->urb_list))
1033 		WARNING("ep %p not empty?\n", ep);
1034 
1035 	kfree(ep);
1036 	hep->hcpriv = NULL;
1037 }
1038 
1039 static int
1040 sl811h_get_frame(struct usb_hcd *hcd)
1041 {
1042 	struct sl811 *sl811 = hcd_to_sl811(hcd);
1043 
1044 	/* wrong except while periodic transfers are scheduled;
1045 	 * never matches the on-the-wire frame;
1046 	 * subject to overruns.
1047 	 */
1048 	return sl811->frame;
1049 }
1050 
1051 
1052 /*-------------------------------------------------------------------------*/
1053 
1054 /* the virtual root hub timer IRQ checks for hub status */
1055 static int
1056 sl811h_hub_status_data(struct usb_hcd *hcd, char *buf)
1057 {
1058 	struct sl811 *sl811 = hcd_to_sl811(hcd);
1059 #ifdef	QUIRK3
1060 	unsigned long flags;
1061 
1062 	/* non-SMP HACK: use root hub timer as i/o watchdog
1063 	 * this seems essential when SOF IRQs aren't in use...
1064 	 */
1065 	local_irq_save(flags);
1066 	if (!timer_pending(&sl811->timer)) {
1067 		if (sl811h_irq( /* ~0, */ hcd) != IRQ_NONE)
1068 			sl811->stat_lost++;
1069 	}
1070 	local_irq_restore(flags);
1071 #endif
1072 
1073 	if (!(sl811->port1 & (0xffff << 16)))
1074 		return 0;
1075 
1076 	/* tell khubd port 1 changed */
1077 	*buf = (1 << 1);
1078 	return 1;
1079 }
1080 
1081 static void
1082 sl811h_hub_descriptor (
1083 	struct sl811			*sl811,
1084 	struct usb_hub_descriptor	*desc
1085 ) {
1086 	u16		temp = 0;
1087 
1088 	desc->bDescriptorType = 0x29;
1089 	desc->bHubContrCurrent = 0;
1090 
1091 	desc->bNbrPorts = 1;
1092 	desc->bDescLength = 9;
1093 
1094 	/* per-port power switching (gang of one!), or none */
1095 	desc->bPwrOn2PwrGood = 0;
1096 	if (sl811->board && sl811->board->port_power) {
1097 		desc->bPwrOn2PwrGood = sl811->board->potpg;
1098 		if (!desc->bPwrOn2PwrGood)
1099 			desc->bPwrOn2PwrGood = 10;
1100 		temp = 0x0001;
1101 	} else
1102 		temp = 0x0002;
1103 
1104 	/* no overcurrent errors detection/handling */
1105 	temp |= 0x0010;
1106 
1107 	desc->wHubCharacteristics = cpu_to_le16(temp);
1108 
1109 	/* two bitmaps:  ports removable, and legacy PortPwrCtrlMask */
1110 	desc->bitmap[0] = 0 << 1;
1111 	desc->bitmap[1] = ~0;
1112 }
1113 
1114 static void
1115 sl811h_timer(unsigned long _sl811)
1116 {
1117 	struct sl811 	*sl811 = (void *) _sl811;
1118 	unsigned long	flags;
1119 	u8		irqstat;
1120 	u8		signaling = sl811->ctrl1 & SL11H_CTL1MASK_FORCE;
1121 	const u32	mask = (1 << USB_PORT_FEAT_CONNECTION)
1122 				| (1 << USB_PORT_FEAT_ENABLE)
1123 				| (1 << USB_PORT_FEAT_LOWSPEED);
1124 
1125 	spin_lock_irqsave(&sl811->lock, flags);
1126 
1127 	/* stop special signaling */
1128 	sl811->ctrl1 &= ~SL11H_CTL1MASK_FORCE;
1129 	sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1130 	udelay(3);
1131 
1132 	irqstat = sl811_read(sl811, SL11H_IRQ_STATUS);
1133 
1134 	switch (signaling) {
1135 	case SL11H_CTL1MASK_SE0:
1136 		DBG("end reset\n");
1137 		sl811->port1 = (1 << USB_PORT_FEAT_C_RESET)
1138 				| (1 << USB_PORT_FEAT_POWER);
1139 		sl811->ctrl1 = 0;
1140 		/* don't wrongly ack RD */
1141 		if (irqstat & SL11H_INTMASK_INSRMV)
1142 			irqstat &= ~SL11H_INTMASK_RD;
1143 		break;
1144 	case SL11H_CTL1MASK_K:
1145 		DBG("end resume\n");
1146 		sl811->port1 &= ~(1 << USB_PORT_FEAT_SUSPEND);
1147 		break;
1148 	default:
1149 		DBG("odd timer signaling: %02x\n", signaling);
1150 		break;
1151 	}
1152 	sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
1153 
1154 	if (irqstat & SL11H_INTMASK_RD) {
1155 		/* usbcore nukes all pending transactions on disconnect */
1156 		if (sl811->port1 & (1 << USB_PORT_FEAT_CONNECTION))
1157 			sl811->port1 |= (1 << USB_PORT_FEAT_C_CONNECTION)
1158 					| (1 << USB_PORT_FEAT_C_ENABLE);
1159 		sl811->port1 &= ~mask;
1160 		sl811->irq_enable = SL11H_INTMASK_INSRMV;
1161 	} else {
1162 		sl811->port1 |= mask;
1163 		if (irqstat & SL11H_INTMASK_DP)
1164 			sl811->port1 &= ~(1 << USB_PORT_FEAT_LOWSPEED);
1165 		sl811->irq_enable = SL11H_INTMASK_INSRMV | SL11H_INTMASK_RD;
1166 	}
1167 
1168 	if (sl811->port1 & (1 << USB_PORT_FEAT_CONNECTION)) {
1169 		u8	ctrl2 = SL811HS_CTL2_INIT;
1170 
1171 		sl811->irq_enable |= SL11H_INTMASK_DONE_A;
1172 #ifdef USE_B
1173 		sl811->irq_enable |= SL11H_INTMASK_DONE_B;
1174 #endif
1175 		if (sl811->port1 & (1 << USB_PORT_FEAT_LOWSPEED)) {
1176 			sl811->ctrl1 |= SL11H_CTL1MASK_LSPD;
1177 			ctrl2 |= SL811HS_CTL2MASK_DSWAP;
1178 		}
1179 
1180 		/* start SOFs flowing, kickstarting with A registers */
1181 		sl811->ctrl1 |= SL11H_CTL1MASK_SOF_ENA;
1182 		sl811_write(sl811, SL11H_SOFLOWREG, 0xe0);
1183 		sl811_write(sl811, SL811HS_CTLREG2, ctrl2);
1184 
1185 		/* autoincrementing */
1186 		sl811_write(sl811, SL811_EP_A(SL11H_BUFLNTHREG), 0);
1187 		writeb(SL_SOF, sl811->data_reg);
1188 		writeb(0, sl811->data_reg);
1189 		sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
1190 				SL11H_HCTLMASK_ARM);
1191 
1192 		/* khubd provides debounce delay */
1193 	} else {
1194 		sl811->ctrl1 = 0;
1195 	}
1196 	sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1197 
1198 	/* reenable irqs */
1199 	sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
1200 	spin_unlock_irqrestore(&sl811->lock, flags);
1201 }
1202 
1203 static int
1204 sl811h_hub_control(
1205 	struct usb_hcd	*hcd,
1206 	u16		typeReq,
1207 	u16		wValue,
1208 	u16		wIndex,
1209 	char		*buf,
1210 	u16		wLength
1211 ) {
1212 	struct sl811	*sl811 = hcd_to_sl811(hcd);
1213 	int		retval = 0;
1214 	unsigned long	flags;
1215 
1216 	spin_lock_irqsave(&sl811->lock, flags);
1217 
1218 	switch (typeReq) {
1219 	case ClearHubFeature:
1220 	case SetHubFeature:
1221 		switch (wValue) {
1222 		case C_HUB_OVER_CURRENT:
1223 		case C_HUB_LOCAL_POWER:
1224 			break;
1225 		default:
1226 			goto error;
1227 		}
1228 		break;
1229 	case ClearPortFeature:
1230 		if (wIndex != 1 || wLength != 0)
1231 			goto error;
1232 
1233 		switch (wValue) {
1234 		case USB_PORT_FEAT_ENABLE:
1235 			sl811->port1 &= (1 << USB_PORT_FEAT_POWER);
1236 			sl811->ctrl1 = 0;
1237 			sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1238 			sl811->irq_enable = SL11H_INTMASK_INSRMV;
1239 			sl811_write(sl811, SL11H_IRQ_ENABLE,
1240 						sl811->irq_enable);
1241 			break;
1242 		case USB_PORT_FEAT_SUSPEND:
1243 			if (!(sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)))
1244 				break;
1245 
1246 			/* 20 msec of resume/K signaling, other irqs blocked */
1247 			DBG("start resume...\n");
1248 			sl811->irq_enable = 0;
1249 			sl811_write(sl811, SL11H_IRQ_ENABLE,
1250 						sl811->irq_enable);
1251 			sl811->ctrl1 |= SL11H_CTL1MASK_K;
1252 			sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1253 
1254 			mod_timer(&sl811->timer, jiffies
1255 					+ msecs_to_jiffies(20));
1256 			break;
1257 		case USB_PORT_FEAT_POWER:
1258 			port_power(sl811, 0);
1259 			break;
1260 		case USB_PORT_FEAT_C_ENABLE:
1261 		case USB_PORT_FEAT_C_SUSPEND:
1262 		case USB_PORT_FEAT_C_CONNECTION:
1263 		case USB_PORT_FEAT_C_OVER_CURRENT:
1264 		case USB_PORT_FEAT_C_RESET:
1265 			break;
1266 		default:
1267 			goto error;
1268 		}
1269 		sl811->port1 &= ~(1 << wValue);
1270 		break;
1271 	case GetHubDescriptor:
1272 		sl811h_hub_descriptor(sl811, (struct usb_hub_descriptor *) buf);
1273 		break;
1274 	case GetHubStatus:
1275 		*(__le32 *) buf = cpu_to_le32(0);
1276 		break;
1277 	case GetPortStatus:
1278 		if (wIndex != 1)
1279 			goto error;
1280 		*(__le32 *) buf = cpu_to_le32(sl811->port1);
1281 
1282 #ifndef	VERBOSE
1283 	if (*(u16*)(buf+2))	/* only if wPortChange is interesting */
1284 #endif
1285 		DBG("GetPortStatus %08x\n", sl811->port1);
1286 		break;
1287 	case SetPortFeature:
1288 		if (wIndex != 1 || wLength != 0)
1289 			goto error;
1290 		switch (wValue) {
1291 		case USB_PORT_FEAT_SUSPEND:
1292 			if (sl811->port1 & (1 << USB_PORT_FEAT_RESET))
1293 				goto error;
1294 			if (!(sl811->port1 & (1 << USB_PORT_FEAT_ENABLE)))
1295 				goto error;
1296 
1297 			DBG("suspend...\n");
1298 			sl811->ctrl1 &= ~SL11H_CTL1MASK_SOF_ENA;
1299 			sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1300 			break;
1301 		case USB_PORT_FEAT_POWER:
1302 			port_power(sl811, 1);
1303 			break;
1304 		case USB_PORT_FEAT_RESET:
1305 			if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND))
1306 				goto error;
1307 			if (!(sl811->port1 & (1 << USB_PORT_FEAT_POWER)))
1308 				break;
1309 
1310 			/* 50 msec of reset/SE0 signaling, irqs blocked */
1311 			sl811->irq_enable = 0;
1312 			sl811_write(sl811, SL11H_IRQ_ENABLE,
1313 						sl811->irq_enable);
1314 			sl811->ctrl1 = SL11H_CTL1MASK_SE0;
1315 			sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1316 			sl811->port1 |= (1 << USB_PORT_FEAT_RESET);
1317 			mod_timer(&sl811->timer, jiffies
1318 					+ msecs_to_jiffies(50));
1319 			break;
1320 		default:
1321 			goto error;
1322 		}
1323 		sl811->port1 |= 1 << wValue;
1324 		break;
1325 
1326 	default:
1327 error:
1328 		/* "protocol stall" on error */
1329 		retval = -EPIPE;
1330 	}
1331 
1332 	spin_unlock_irqrestore(&sl811->lock, flags);
1333 	return retval;
1334 }
1335 
1336 #ifdef	CONFIG_PM
1337 
1338 static int
1339 sl811h_bus_suspend(struct usb_hcd *hcd)
1340 {
1341 	// SOFs off
1342 	DBG("%s\n", __func__);
1343 	return 0;
1344 }
1345 
1346 static int
1347 sl811h_bus_resume(struct usb_hcd *hcd)
1348 {
1349 	// SOFs on
1350 	DBG("%s\n", __func__);
1351 	return 0;
1352 }
1353 
1354 #else
1355 
1356 #define	sl811h_bus_suspend	NULL
1357 #define	sl811h_bus_resume	NULL
1358 
1359 #endif
1360 
1361 
1362 /*-------------------------------------------------------------------------*/
1363 
1364 #ifdef STUB_DEBUG_FILE
1365 
1366 static inline void create_debug_file(struct sl811 *sl811) { }
1367 static inline void remove_debug_file(struct sl811 *sl811) { }
1368 
1369 #else
1370 
1371 #include <linux/proc_fs.h>
1372 #include <linux/seq_file.h>
1373 
1374 static void dump_irq(struct seq_file *s, char *label, u8 mask)
1375 {
1376 	seq_printf(s, "%s %02x%s%s%s%s%s%s\n", label, mask,
1377 		(mask & SL11H_INTMASK_DONE_A) ? " done_a" : "",
1378 		(mask & SL11H_INTMASK_DONE_B) ? " done_b" : "",
1379 		(mask & SL11H_INTMASK_SOFINTR) ? " sof" : "",
1380 		(mask & SL11H_INTMASK_INSRMV) ? " ins/rmv" : "",
1381 		(mask & SL11H_INTMASK_RD) ? " rd" : "",
1382 		(mask & SL11H_INTMASK_DP) ? " dp" : "");
1383 }
1384 
1385 static int proc_sl811h_show(struct seq_file *s, void *unused)
1386 {
1387 	struct sl811		*sl811 = s->private;
1388 	struct sl811h_ep	*ep;
1389 	unsigned		i;
1390 
1391 	seq_printf(s, "%s\n%s version %s\nportstatus[1] = %08x\n",
1392 		sl811_to_hcd(sl811)->product_desc,
1393 		hcd_name, DRIVER_VERSION,
1394 		sl811->port1);
1395 
1396 	seq_printf(s, "insert/remove: %ld\n", sl811->stat_insrmv);
1397 	seq_printf(s, "current session:  done_a %ld done_b %ld "
1398 			"wake %ld sof %ld overrun %ld lost %ld\n\n",
1399 		sl811->stat_a, sl811->stat_b,
1400 		sl811->stat_wake, sl811->stat_sof,
1401 		sl811->stat_overrun, sl811->stat_lost);
1402 
1403 	spin_lock_irq(&sl811->lock);
1404 
1405 	if (sl811->ctrl1 & SL11H_CTL1MASK_SUSPEND)
1406 		seq_printf(s, "(suspended)\n\n");
1407 	else {
1408 		u8	t = sl811_read(sl811, SL11H_CTLREG1);
1409 
1410 		seq_printf(s, "ctrl1 %02x%s%s%s%s\n", t,
1411 			(t & SL11H_CTL1MASK_SOF_ENA) ? " sofgen" : "",
1412 			({char *s; switch (t & SL11H_CTL1MASK_FORCE) {
1413 			case SL11H_CTL1MASK_NORMAL: s = ""; break;
1414 			case SL11H_CTL1MASK_SE0: s = " se0/reset"; break;
1415 			case SL11H_CTL1MASK_K: s = " k/resume"; break;
1416 			default: s = "j"; break;
1417 			}; s; }),
1418 			(t & SL11H_CTL1MASK_LSPD) ? " lowspeed" : "",
1419 			(t & SL11H_CTL1MASK_SUSPEND) ? " suspend" : "");
1420 
1421 		dump_irq(s, "irq_enable",
1422 				sl811_read(sl811, SL11H_IRQ_ENABLE));
1423 		dump_irq(s, "irq_status",
1424 				sl811_read(sl811, SL11H_IRQ_STATUS));
1425 		seq_printf(s, "frame clocks remaining:  %d\n",
1426 				sl811_read(sl811, SL11H_SOFTMRREG) << 6);
1427 	}
1428 
1429 	seq_printf(s, "A: qh%p ctl %02x sts %02x\n", sl811->active_a,
1430 		sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)),
1431 		sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG)));
1432 	seq_printf(s, "B: qh%p ctl %02x sts %02x\n", sl811->active_b,
1433 		sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)),
1434 		sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG)));
1435 	seq_printf(s, "\n");
1436 	list_for_each_entry (ep, &sl811->async, schedule) {
1437 		struct urb		*urb;
1438 
1439 		seq_printf(s, "%s%sqh%p, ep%d%s, maxpacket %d"
1440 					" nak %d err %d\n",
1441 			(ep == sl811->active_a) ? "(A) " : "",
1442 			(ep == sl811->active_b) ? "(B) " : "",
1443 			ep, ep->epnum,
1444 			({ char *s; switch (ep->nextpid) {
1445 			case USB_PID_IN: s = "in"; break;
1446 			case USB_PID_OUT: s = "out"; break;
1447 			case USB_PID_SETUP: s = "setup"; break;
1448 			case USB_PID_ACK: s = "status"; break;
1449 			default: s = "?"; break;
1450 			}; s;}),
1451 			ep->maxpacket,
1452 			ep->nak_count, ep->error_count);
1453 		list_for_each_entry (urb, &ep->hep->urb_list, urb_list) {
1454 			seq_printf(s, "  urb%p, %d/%d\n", urb,
1455 				urb->actual_length,
1456 				urb->transfer_buffer_length);
1457 		}
1458 	}
1459 	if (!list_empty(&sl811->async))
1460 		seq_printf(s, "\n");
1461 
1462 	seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE);
1463 
1464 	for (i = 0; i < PERIODIC_SIZE; i++) {
1465 		ep = sl811->periodic[i];
1466 		if (!ep)
1467 			continue;
1468 		seq_printf(s, "%2d [%3d]:\n", i, sl811->load[i]);
1469 
1470 		/* DUMB: prints shared entries multiple times */
1471 		do {
1472 			seq_printf(s,
1473 				"   %s%sqh%d/%p (%sdev%d ep%d%s max %d) "
1474 					"err %d\n",
1475 				(ep == sl811->active_a) ? "(A) " : "",
1476 				(ep == sl811->active_b) ? "(B) " : "",
1477 				ep->period, ep,
1478 				(ep->udev->speed == USB_SPEED_FULL)
1479 					? "" : "ls ",
1480 				ep->udev->devnum, ep->epnum,
1481 				(ep->epnum == 0) ? ""
1482 					: ((ep->nextpid == USB_PID_IN)
1483 						? "in"
1484 						: "out"),
1485 				ep->maxpacket, ep->error_count);
1486 			ep = ep->next;
1487 		} while (ep);
1488 	}
1489 
1490 	spin_unlock_irq(&sl811->lock);
1491 	seq_printf(s, "\n");
1492 
1493 	return 0;
1494 }
1495 
1496 static int proc_sl811h_open(struct inode *inode, struct file *file)
1497 {
1498 	return single_open(file, proc_sl811h_show, PDE(inode)->data);
1499 }
1500 
1501 static const struct file_operations proc_ops = {
1502 	.open		= proc_sl811h_open,
1503 	.read		= seq_read,
1504 	.llseek		= seq_lseek,
1505 	.release	= single_release,
1506 };
1507 
1508 /* expect just one sl811 per system */
1509 static const char proc_filename[] = "driver/sl811h";
1510 
1511 static void create_debug_file(struct sl811 *sl811)
1512 {
1513 	sl811->pde = proc_create_data(proc_filename, 0, NULL, &proc_ops, sl811);
1514 }
1515 
1516 static void remove_debug_file(struct sl811 *sl811)
1517 {
1518 	if (sl811->pde)
1519 		remove_proc_entry(proc_filename, NULL);
1520 }
1521 
1522 #endif
1523 
1524 /*-------------------------------------------------------------------------*/
1525 
1526 static void
1527 sl811h_stop(struct usb_hcd *hcd)
1528 {
1529 	struct sl811	*sl811 = hcd_to_sl811(hcd);
1530 	unsigned long	flags;
1531 
1532 	del_timer_sync(&hcd->rh_timer);
1533 
1534 	spin_lock_irqsave(&sl811->lock, flags);
1535 	port_power(sl811, 0);
1536 	spin_unlock_irqrestore(&sl811->lock, flags);
1537 }
1538 
1539 static int
1540 sl811h_start(struct usb_hcd *hcd)
1541 {
1542 	struct sl811		*sl811 = hcd_to_sl811(hcd);
1543 
1544 	/* chip has been reset, VBUS power is off */
1545 	hcd->state = HC_STATE_RUNNING;
1546 
1547 	if (sl811->board) {
1548 		if (!device_can_wakeup(hcd->self.controller))
1549 			device_init_wakeup(hcd->self.controller,
1550 				sl811->board->can_wakeup);
1551 		hcd->power_budget = sl811->board->power * 2;
1552 	}
1553 
1554 	/* enable power and interrupts */
1555 	port_power(sl811, 1);
1556 
1557 	return 0;
1558 }
1559 
1560 /*-------------------------------------------------------------------------*/
1561 
1562 static struct hc_driver sl811h_hc_driver = {
1563 	.description =		hcd_name,
1564 	.hcd_priv_size =	sizeof(struct sl811),
1565 
1566 	/*
1567 	 * generic hardware linkage
1568 	 */
1569 	.irq =			sl811h_irq,
1570 	.flags =		HCD_USB11 | HCD_MEMORY,
1571 
1572 	/* Basic lifecycle operations */
1573 	.start =		sl811h_start,
1574 	.stop =			sl811h_stop,
1575 
1576 	/*
1577 	 * managing i/o requests and associated device resources
1578 	 */
1579 	.urb_enqueue =		sl811h_urb_enqueue,
1580 	.urb_dequeue =		sl811h_urb_dequeue,
1581 	.endpoint_disable =	sl811h_endpoint_disable,
1582 
1583 	/*
1584 	 * periodic schedule support
1585 	 */
1586 	.get_frame_number =	sl811h_get_frame,
1587 
1588 	/*
1589 	 * root hub support
1590 	 */
1591 	.hub_status_data =	sl811h_hub_status_data,
1592 	.hub_control =		sl811h_hub_control,
1593 	.bus_suspend =		sl811h_bus_suspend,
1594 	.bus_resume =		sl811h_bus_resume,
1595 };
1596 
1597 /*-------------------------------------------------------------------------*/
1598 
1599 static int __devexit
1600 sl811h_remove(struct platform_device *dev)
1601 {
1602 	struct usb_hcd		*hcd = platform_get_drvdata(dev);
1603 	struct sl811		*sl811 = hcd_to_sl811(hcd);
1604 	struct resource		*res;
1605 
1606 	remove_debug_file(sl811);
1607 	usb_remove_hcd(hcd);
1608 
1609 	/* some platforms may use IORESOURCE_IO */
1610 	res = platform_get_resource(dev, IORESOURCE_MEM, 1);
1611 	if (res)
1612 		iounmap(sl811->data_reg);
1613 
1614 	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
1615 	if (res)
1616 		iounmap(sl811->addr_reg);
1617 
1618 	usb_put_hcd(hcd);
1619 	return 0;
1620 }
1621 
1622 static int __devinit
1623 sl811h_probe(struct platform_device *dev)
1624 {
1625 	struct usb_hcd		*hcd;
1626 	struct sl811		*sl811;
1627 	struct resource		*addr, *data, *ires;
1628 	int			irq;
1629 	void __iomem		*addr_reg;
1630 	void __iomem		*data_reg;
1631 	int			retval;
1632 	u8			tmp, ioaddr = 0;
1633 	unsigned long		irqflags;
1634 
1635 	/* basic sanity checks first.  board-specific init logic should
1636 	 * have initialized these three resources and probably board
1637 	 * specific platform_data.  we don't probe for IRQs, and do only
1638 	 * minimal sanity checking.
1639 	 */
1640 	ires = platform_get_resource(dev, IORESOURCE_IRQ, 0);
1641 	if (dev->num_resources < 3 || !ires)
1642 		return -ENODEV;
1643 
1644 	irq = ires->start;
1645 	irqflags = ires->flags & IRQF_TRIGGER_MASK;
1646 
1647 	/* refuse to confuse usbcore */
1648 	if (dev->dev.dma_mask) {
1649 		DBG("no we won't dma\n");
1650 		return -EINVAL;
1651 	}
1652 
1653 	/* the chip may be wired for either kind of addressing */
1654 	addr = platform_get_resource(dev, IORESOURCE_MEM, 0);
1655 	data = platform_get_resource(dev, IORESOURCE_MEM, 1);
1656 	retval = -EBUSY;
1657 	if (!addr || !data) {
1658 		addr = platform_get_resource(dev, IORESOURCE_IO, 0);
1659 		data = platform_get_resource(dev, IORESOURCE_IO, 1);
1660 		if (!addr || !data)
1661 			return -ENODEV;
1662 		ioaddr = 1;
1663 		/*
1664 		 * NOTE: 64-bit resource->start is getting truncated
1665 		 * to avoid compiler warning, assuming that ->start
1666 		 * is always 32-bit for this case
1667 		 */
1668 		addr_reg = (void __iomem *) (unsigned long) addr->start;
1669 		data_reg = (void __iomem *) (unsigned long) data->start;
1670 	} else {
1671 		addr_reg = ioremap(addr->start, 1);
1672 		if (addr_reg == NULL) {
1673 			retval = -ENOMEM;
1674 			goto err2;
1675 		}
1676 
1677 		data_reg = ioremap(data->start, 1);
1678 		if (data_reg == NULL) {
1679 			retval = -ENOMEM;
1680 			goto err4;
1681 		}
1682 	}
1683 
1684 	/* allocate and initialize hcd */
1685 	hcd = usb_create_hcd(&sl811h_hc_driver, &dev->dev, dev_name(&dev->dev));
1686 	if (!hcd) {
1687 		retval = -ENOMEM;
1688 		goto err5;
1689 	}
1690 	hcd->rsrc_start = addr->start;
1691 	sl811 = hcd_to_sl811(hcd);
1692 
1693 	spin_lock_init(&sl811->lock);
1694 	INIT_LIST_HEAD(&sl811->async);
1695 	sl811->board = dev->dev.platform_data;
1696 	init_timer(&sl811->timer);
1697 	sl811->timer.function = sl811h_timer;
1698 	sl811->timer.data = (unsigned long) sl811;
1699 	sl811->addr_reg = addr_reg;
1700 	sl811->data_reg = data_reg;
1701 
1702 	spin_lock_irq(&sl811->lock);
1703 	port_power(sl811, 0);
1704 	spin_unlock_irq(&sl811->lock);
1705 	msleep(200);
1706 
1707 	tmp = sl811_read(sl811, SL11H_HWREVREG);
1708 	switch (tmp >> 4) {
1709 	case 1:
1710 		hcd->product_desc = "SL811HS v1.2";
1711 		break;
1712 	case 2:
1713 		hcd->product_desc = "SL811HS v1.5";
1714 		break;
1715 	default:
1716 		/* reject case 0, SL11S is less functional */
1717 		DBG("chiprev %02x\n", tmp);
1718 		retval = -ENXIO;
1719 		goto err6;
1720 	}
1721 
1722 	/* The chip's IRQ is level triggered, active high.  A requirement
1723 	 * for platform device setup is to cope with things like signal
1724 	 * inverters (e.g. CF is active low) or working only with edge
1725 	 * triggers (e.g. most ARM CPUs).  Initial driver stress testing
1726 	 * was on a system with single edge triggering, so most sorts of
1727 	 * triggering arrangement should work.
1728 	 *
1729 	 * Use resource IRQ flags if set by platform device setup.
1730 	 */
1731 	irqflags |= IRQF_SHARED;
1732 	retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | irqflags);
1733 	if (retval != 0)
1734 		goto err6;
1735 
1736 	create_debug_file(sl811);
1737 	return retval;
1738 
1739  err6:
1740 	usb_put_hcd(hcd);
1741  err5:
1742 	if (!ioaddr)
1743 		iounmap(data_reg);
1744  err4:
1745 	if (!ioaddr)
1746 		iounmap(addr_reg);
1747  err2:
1748 	DBG("init error, %d\n", retval);
1749 	return retval;
1750 }
1751 
1752 #ifdef	CONFIG_PM
1753 
1754 /* for this device there's no useful distinction between the controller
1755  * and its root hub, except that the root hub only gets direct PM calls
1756  * when CONFIG_USB_SUSPEND is enabled.
1757  */
1758 
1759 static int
1760 sl811h_suspend(struct platform_device *dev, pm_message_t state)
1761 {
1762 	struct usb_hcd	*hcd = platform_get_drvdata(dev);
1763 	struct sl811	*sl811 = hcd_to_sl811(hcd);
1764 	int		retval = 0;
1765 
1766 	switch (state.event) {
1767 	case PM_EVENT_FREEZE:
1768 		retval = sl811h_bus_suspend(hcd);
1769 		break;
1770 	case PM_EVENT_SUSPEND:
1771 	case PM_EVENT_HIBERNATE:
1772 	case PM_EVENT_PRETHAW:		/* explicitly discard hw state */
1773 		port_power(sl811, 0);
1774 		break;
1775 	}
1776 	return retval;
1777 }
1778 
1779 static int
1780 sl811h_resume(struct platform_device *dev)
1781 {
1782 	struct usb_hcd	*hcd = platform_get_drvdata(dev);
1783 	struct sl811	*sl811 = hcd_to_sl811(hcd);
1784 
1785 	/* with no "check to see if VBUS is still powered" board hook,
1786 	 * let's assume it'd only be powered to enable remote wakeup.
1787 	 */
1788 	if (!sl811->port1 || !device_can_wakeup(&hcd->self.root_hub->dev)) {
1789 		sl811->port1 = 0;
1790 		port_power(sl811, 1);
1791 		usb_root_hub_lost_power(hcd->self.root_hub);
1792 		return 0;
1793 	}
1794 
1795 	return sl811h_bus_resume(hcd);
1796 }
1797 
1798 #else
1799 
1800 #define	sl811h_suspend	NULL
1801 #define	sl811h_resume	NULL
1802 
1803 #endif
1804 
1805 
1806 /* this driver is exported so sl811_cs can depend on it */
1807 struct platform_driver sl811h_driver = {
1808 	.probe =	sl811h_probe,
1809 	.remove =	__devexit_p(sl811h_remove),
1810 
1811 	.suspend =	sl811h_suspend,
1812 	.resume =	sl811h_resume,
1813 	.driver = {
1814 		.name =	(char *) hcd_name,
1815 		.owner = THIS_MODULE,
1816 	},
1817 };
1818 EXPORT_SYMBOL(sl811h_driver);
1819 
1820 /*-------------------------------------------------------------------------*/
1821 
1822 static int __init sl811h_init(void)
1823 {
1824 	if (usb_disabled())
1825 		return -ENODEV;
1826 
1827 	INFO("driver %s, %s\n", hcd_name, DRIVER_VERSION);
1828 	return platform_driver_register(&sl811h_driver);
1829 }
1830 module_init(sl811h_init);
1831 
1832 static void __exit sl811h_cleanup(void)
1833 {
1834 	platform_driver_unregister(&sl811h_driver);
1835 }
1836 module_exit(sl811h_cleanup);
1837