xref: /openbmc/linux/drivers/usb/host/oxu210hp-hcd.c (revision a06c488d)
1 /*
2  * Copyright (c) 2008 Rodolfo Giometti <giometti@linux.it>
3  * Copyright (c) 2008 Eurotech S.p.A. <info@eurtech.it>
4  *
5  * This code is *strongly* based on EHCI-HCD code by David Brownell since
6  * the chip is a quasi-EHCI compatible.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of the GNU General Public License as published by the
10  * Free Software Foundation; either version 2 of the License, or (at your
11  * option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22 
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/dmapool.h>
26 #include <linux/kernel.h>
27 #include <linux/delay.h>
28 #include <linux/ioport.h>
29 #include <linux/sched.h>
30 #include <linux/slab.h>
31 #include <linux/errno.h>
32 #include <linux/timer.h>
33 #include <linux/list.h>
34 #include <linux/interrupt.h>
35 #include <linux/usb.h>
36 #include <linux/usb/hcd.h>
37 #include <linux/moduleparam.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/io.h>
40 
41 #include <asm/irq.h>
42 #include <asm/unaligned.h>
43 
44 #include <linux/irq.h>
45 #include <linux/platform_device.h>
46 
47 #include "oxu210hp.h"
48 
49 #define DRIVER_VERSION "0.0.50"
50 
51 /*
52  * Main defines
53  */
54 
55 #define oxu_dbg(oxu, fmt, args...) \
56 		dev_dbg(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
57 #define oxu_err(oxu, fmt, args...) \
58 		dev_err(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
59 #define oxu_info(oxu, fmt, args...) \
60 		dev_info(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
61 
62 #ifdef CONFIG_DYNAMIC_DEBUG
63 #define DEBUG
64 #endif
65 
66 static inline struct usb_hcd *oxu_to_hcd(struct oxu_hcd *oxu)
67 {
68 	return container_of((void *) oxu, struct usb_hcd, hcd_priv);
69 }
70 
71 static inline struct oxu_hcd *hcd_to_oxu(struct usb_hcd *hcd)
72 {
73 	return (struct oxu_hcd *) (hcd->hcd_priv);
74 }
75 
76 /*
77  * Debug stuff
78  */
79 
80 #undef OXU_URB_TRACE
81 #undef OXU_VERBOSE_DEBUG
82 
83 #ifdef OXU_VERBOSE_DEBUG
84 #define oxu_vdbg			oxu_dbg
85 #else
86 #define oxu_vdbg(oxu, fmt, args...)	/* Nop */
87 #endif
88 
89 #ifdef DEBUG
90 
91 static int __attribute__((__unused__))
92 dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
93 {
94 	return scnprintf(buf, len, "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
95 		label, label[0] ? " " : "", status,
96 		(status & STS_ASS) ? " Async" : "",
97 		(status & STS_PSS) ? " Periodic" : "",
98 		(status & STS_RECL) ? " Recl" : "",
99 		(status & STS_HALT) ? " Halt" : "",
100 		(status & STS_IAA) ? " IAA" : "",
101 		(status & STS_FATAL) ? " FATAL" : "",
102 		(status & STS_FLR) ? " FLR" : "",
103 		(status & STS_PCD) ? " PCD" : "",
104 		(status & STS_ERR) ? " ERR" : "",
105 		(status & STS_INT) ? " INT" : ""
106 		);
107 }
108 
109 static int __attribute__((__unused__))
110 dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
111 {
112 	return scnprintf(buf, len, "%s%sintrenable %02x%s%s%s%s%s%s",
113 		label, label[0] ? " " : "", enable,
114 		(enable & STS_IAA) ? " IAA" : "",
115 		(enable & STS_FATAL) ? " FATAL" : "",
116 		(enable & STS_FLR) ? " FLR" : "",
117 		(enable & STS_PCD) ? " PCD" : "",
118 		(enable & STS_ERR) ? " ERR" : "",
119 		(enable & STS_INT) ? " INT" : ""
120 		);
121 }
122 
123 static const char *const fls_strings[] =
124     { "1024", "512", "256", "??" };
125 
126 static int dbg_command_buf(char *buf, unsigned len,
127 				const char *label, u32 command)
128 {
129 	return scnprintf(buf, len,
130 		"%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
131 		label, label[0] ? " " : "", command,
132 		(command & CMD_PARK) ? "park" : "(park)",
133 		CMD_PARK_CNT(command),
134 		(command >> 16) & 0x3f,
135 		(command & CMD_LRESET) ? " LReset" : "",
136 		(command & CMD_IAAD) ? " IAAD" : "",
137 		(command & CMD_ASE) ? " Async" : "",
138 		(command & CMD_PSE) ? " Periodic" : "",
139 		fls_strings[(command >> 2) & 0x3],
140 		(command & CMD_RESET) ? " Reset" : "",
141 		(command & CMD_RUN) ? "RUN" : "HALT"
142 		);
143 }
144 
145 static int dbg_port_buf(char *buf, unsigned len, const char *label,
146 				int port, u32 status)
147 {
148 	char	*sig;
149 
150 	/* signaling state */
151 	switch (status & (3 << 10)) {
152 	case 0 << 10:
153 		sig = "se0";
154 		break;
155 	case 1 << 10:
156 		sig = "k";	/* low speed */
157 		break;
158 	case 2 << 10:
159 		sig = "j";
160 		break;
161 	default:
162 		sig = "?";
163 		break;
164 	}
165 
166 	return scnprintf(buf, len,
167 		"%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
168 		label, label[0] ? " " : "", port, status,
169 		(status & PORT_POWER) ? " POWER" : "",
170 		(status & PORT_OWNER) ? " OWNER" : "",
171 		sig,
172 		(status & PORT_RESET) ? " RESET" : "",
173 		(status & PORT_SUSPEND) ? " SUSPEND" : "",
174 		(status & PORT_RESUME) ? " RESUME" : "",
175 		(status & PORT_OCC) ? " OCC" : "",
176 		(status & PORT_OC) ? " OC" : "",
177 		(status & PORT_PEC) ? " PEC" : "",
178 		(status & PORT_PE) ? " PE" : "",
179 		(status & PORT_CSC) ? " CSC" : "",
180 		(status & PORT_CONNECT) ? " CONNECT" : ""
181 	    );
182 }
183 
184 #else
185 
186 static inline int __attribute__((__unused__))
187 dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
188 { return 0; }
189 
190 static inline int __attribute__((__unused__))
191 dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
192 { return 0; }
193 
194 static inline int __attribute__((__unused__))
195 dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
196 { return 0; }
197 
198 static inline int __attribute__((__unused__))
199 dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
200 { return 0; }
201 
202 #endif /* DEBUG */
203 
204 /* functions have the "wrong" filename when they're output... */
205 #define dbg_status(oxu, label, status) { \
206 	char _buf[80]; \
207 	dbg_status_buf(_buf, sizeof _buf, label, status); \
208 	oxu_dbg(oxu, "%s\n", _buf); \
209 }
210 
211 #define dbg_cmd(oxu, label, command) { \
212 	char _buf[80]; \
213 	dbg_command_buf(_buf, sizeof _buf, label, command); \
214 	oxu_dbg(oxu, "%s\n", _buf); \
215 }
216 
217 #define dbg_port(oxu, label, port, status) { \
218 	char _buf[80]; \
219 	dbg_port_buf(_buf, sizeof _buf, label, port, status); \
220 	oxu_dbg(oxu, "%s\n", _buf); \
221 }
222 
223 /*
224  * Module parameters
225  */
226 
227 /* Initial IRQ latency: faster than hw default */
228 static int log2_irq_thresh;			/* 0 to 6 */
229 module_param(log2_irq_thresh, int, S_IRUGO);
230 MODULE_PARM_DESC(log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
231 
232 /* Initial park setting: slower than hw default */
233 static unsigned park;
234 module_param(park, uint, S_IRUGO);
235 MODULE_PARM_DESC(park, "park setting; 1-3 back-to-back async packets");
236 
237 /* For flakey hardware, ignore overcurrent indicators */
238 static bool ignore_oc;
239 module_param(ignore_oc, bool, S_IRUGO);
240 MODULE_PARM_DESC(ignore_oc, "ignore bogus hardware overcurrent indications");
241 
242 
243 static void ehci_work(struct oxu_hcd *oxu);
244 static int oxu_hub_control(struct usb_hcd *hcd,
245 				u16 typeReq, u16 wValue, u16 wIndex,
246 				char *buf, u16 wLength);
247 
248 /*
249  * Local functions
250  */
251 
252 /* Low level read/write registers functions */
253 static inline u32 oxu_readl(void *base, u32 reg)
254 {
255 	return readl(base + reg);
256 }
257 
258 static inline void oxu_writel(void *base, u32 reg, u32 val)
259 {
260 	writel(val, base + reg);
261 }
262 
263 static inline void timer_action_done(struct oxu_hcd *oxu,
264 					enum ehci_timer_action action)
265 {
266 	clear_bit(action, &oxu->actions);
267 }
268 
269 static inline void timer_action(struct oxu_hcd *oxu,
270 					enum ehci_timer_action action)
271 {
272 	if (!test_and_set_bit(action, &oxu->actions)) {
273 		unsigned long t;
274 
275 		switch (action) {
276 		case TIMER_IAA_WATCHDOG:
277 			t = EHCI_IAA_JIFFIES;
278 			break;
279 		case TIMER_IO_WATCHDOG:
280 			t = EHCI_IO_JIFFIES;
281 			break;
282 		case TIMER_ASYNC_OFF:
283 			t = EHCI_ASYNC_JIFFIES;
284 			break;
285 		case TIMER_ASYNC_SHRINK:
286 		default:
287 			t = EHCI_SHRINK_JIFFIES;
288 			break;
289 		}
290 		t += jiffies;
291 		/* all timings except IAA watchdog can be overridden.
292 		 * async queue SHRINK often precedes IAA.  while it's ready
293 		 * to go OFF neither can matter, and afterwards the IO
294 		 * watchdog stops unless there's still periodic traffic.
295 		 */
296 		if (action != TIMER_IAA_WATCHDOG
297 				&& t > oxu->watchdog.expires
298 				&& timer_pending(&oxu->watchdog))
299 			return;
300 		mod_timer(&oxu->watchdog, t);
301 	}
302 }
303 
304 /*
305  * handshake - spin reading hc until handshake completes or fails
306  * @ptr: address of hc register to be read
307  * @mask: bits to look at in result of read
308  * @done: value of those bits when handshake succeeds
309  * @usec: timeout in microseconds
310  *
311  * Returns negative errno, or zero on success
312  *
313  * Success happens when the "mask" bits have the specified value (hardware
314  * handshake done).  There are two failure modes:  "usec" have passed (major
315  * hardware flakeout), or the register reads as all-ones (hardware removed).
316  *
317  * That last failure should_only happen in cases like physical cardbus eject
318  * before driver shutdown. But it also seems to be caused by bugs in cardbus
319  * bridge shutdown:  shutting down the bridge before the devices using it.
320  */
321 static int handshake(struct oxu_hcd *oxu, void __iomem *ptr,
322 					u32 mask, u32 done, int usec)
323 {
324 	u32 result;
325 
326 	do {
327 		result = readl(ptr);
328 		if (result == ~(u32)0)		/* card removed */
329 			return -ENODEV;
330 		result &= mask;
331 		if (result == done)
332 			return 0;
333 		udelay(1);
334 		usec--;
335 	} while (usec > 0);
336 	return -ETIMEDOUT;
337 }
338 
339 /* Force HC to halt state from unknown (EHCI spec section 2.3) */
340 static int ehci_halt(struct oxu_hcd *oxu)
341 {
342 	u32	temp = readl(&oxu->regs->status);
343 
344 	/* disable any irqs left enabled by previous code */
345 	writel(0, &oxu->regs->intr_enable);
346 
347 	if ((temp & STS_HALT) != 0)
348 		return 0;
349 
350 	temp = readl(&oxu->regs->command);
351 	temp &= ~CMD_RUN;
352 	writel(temp, &oxu->regs->command);
353 	return handshake(oxu, &oxu->regs->status,
354 			  STS_HALT, STS_HALT, 16 * 125);
355 }
356 
357 /* Put TDI/ARC silicon into EHCI mode */
358 static void tdi_reset(struct oxu_hcd *oxu)
359 {
360 	u32 __iomem *reg_ptr;
361 	u32 tmp;
362 
363 	reg_ptr = (u32 __iomem *)(((u8 __iomem *)oxu->regs) + 0x68);
364 	tmp = readl(reg_ptr);
365 	tmp |= 0x3;
366 	writel(tmp, reg_ptr);
367 }
368 
369 /* Reset a non-running (STS_HALT == 1) controller */
370 static int ehci_reset(struct oxu_hcd *oxu)
371 {
372 	int	retval;
373 	u32	command = readl(&oxu->regs->command);
374 
375 	command |= CMD_RESET;
376 	dbg_cmd(oxu, "reset", command);
377 	writel(command, &oxu->regs->command);
378 	oxu_to_hcd(oxu)->state = HC_STATE_HALT;
379 	oxu->next_statechange = jiffies;
380 	retval = handshake(oxu, &oxu->regs->command,
381 			    CMD_RESET, 0, 250 * 1000);
382 
383 	if (retval)
384 		return retval;
385 
386 	tdi_reset(oxu);
387 
388 	return retval;
389 }
390 
391 /* Idle the controller (from running) */
392 static void ehci_quiesce(struct oxu_hcd *oxu)
393 {
394 	u32	temp;
395 
396 #ifdef DEBUG
397 	BUG_ON(!HC_IS_RUNNING(oxu_to_hcd(oxu)->state));
398 #endif
399 
400 	/* wait for any schedule enables/disables to take effect */
401 	temp = readl(&oxu->regs->command) << 10;
402 	temp &= STS_ASS | STS_PSS;
403 	if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
404 				temp, 16 * 125) != 0) {
405 		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
406 		return;
407 	}
408 
409 	/* then disable anything that's still active */
410 	temp = readl(&oxu->regs->command);
411 	temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
412 	writel(temp, &oxu->regs->command);
413 
414 	/* hardware can take 16 microframes to turn off ... */
415 	if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
416 				0, 16 * 125) != 0) {
417 		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
418 		return;
419 	}
420 }
421 
422 static int check_reset_complete(struct oxu_hcd *oxu, int index,
423 				u32 __iomem *status_reg, int port_status)
424 {
425 	if (!(port_status & PORT_CONNECT)) {
426 		oxu->reset_done[index] = 0;
427 		return port_status;
428 	}
429 
430 	/* if reset finished and it's still not enabled -- handoff */
431 	if (!(port_status & PORT_PE)) {
432 		oxu_dbg(oxu, "Failed to enable port %d on root hub TT\n",
433 				index+1);
434 		return port_status;
435 	} else
436 		oxu_dbg(oxu, "port %d high speed\n", index + 1);
437 
438 	return port_status;
439 }
440 
441 static void ehci_hub_descriptor(struct oxu_hcd *oxu,
442 				struct usb_hub_descriptor *desc)
443 {
444 	int ports = HCS_N_PORTS(oxu->hcs_params);
445 	u16 temp;
446 
447 	desc->bDescriptorType = USB_DT_HUB;
448 	desc->bPwrOn2PwrGood = 10;	/* oxu 1.0, 2.3.9 says 20ms max */
449 	desc->bHubContrCurrent = 0;
450 
451 	desc->bNbrPorts = ports;
452 	temp = 1 + (ports / 8);
453 	desc->bDescLength = 7 + 2 * temp;
454 
455 	/* ports removable, and usb 1.0 legacy PortPwrCtrlMask */
456 	memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
457 	memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
458 
459 	temp = HUB_CHAR_INDV_PORT_OCPM;	/* per-port overcurrent reporting */
460 	if (HCS_PPC(oxu->hcs_params))
461 		temp |= HUB_CHAR_INDV_PORT_LPSM; /* per-port power control */
462 	else
463 		temp |= HUB_CHAR_NO_LPSM; /* no power switching */
464 	desc->wHubCharacteristics = (__force __u16)cpu_to_le16(temp);
465 }
466 
467 
468 /* Allocate an OXU210HP on-chip memory data buffer
469  *
470  * An on-chip memory data buffer is required for each OXU210HP USB transfer.
471  * Each transfer descriptor has one or more on-chip memory data buffers.
472  *
473  * Data buffers are allocated from a fix sized pool of data blocks.
474  * To minimise fragmentation and give reasonable memory utlisation,
475  * data buffers are allocated with sizes the power of 2 multiples of
476  * the block size, starting on an address a multiple of the allocated size.
477  *
478  * FIXME: callers of this function require a buffer to be allocated for
479  * len=0. This is a waste of on-chip memory and should be fix. Then this
480  * function should be changed to not allocate a buffer for len=0.
481  */
482 static int oxu_buf_alloc(struct oxu_hcd *oxu, struct ehci_qtd *qtd, int len)
483 {
484 	int n_blocks;	/* minium blocks needed to hold len */
485 	int a_blocks;	/* blocks allocated */
486 	int i, j;
487 
488 	/* Don't allocte bigger than supported */
489 	if (len > BUFFER_SIZE * BUFFER_NUM) {
490 		oxu_err(oxu, "buffer too big (%d)\n", len);
491 		return -ENOMEM;
492 	}
493 
494 	spin_lock(&oxu->mem_lock);
495 
496 	/* Number of blocks needed to hold len */
497 	n_blocks = (len + BUFFER_SIZE - 1) / BUFFER_SIZE;
498 
499 	/* Round the number of blocks up to the power of 2 */
500 	for (a_blocks = 1; a_blocks < n_blocks; a_blocks <<= 1)
501 		;
502 
503 	/* Find a suitable available data buffer */
504 	for (i = 0; i < BUFFER_NUM;
505 			i += max(a_blocks, (int)oxu->db_used[i])) {
506 
507 		/* Check all the required blocks are available */
508 		for (j = 0; j < a_blocks; j++)
509 			if (oxu->db_used[i + j])
510 				break;
511 
512 		if (j != a_blocks)
513 			continue;
514 
515 		/* Allocate blocks found! */
516 		qtd->buffer = (void *) &oxu->mem->db_pool[i];
517 		qtd->buffer_dma = virt_to_phys(qtd->buffer);
518 
519 		qtd->qtd_buffer_len = BUFFER_SIZE * a_blocks;
520 		oxu->db_used[i] = a_blocks;
521 
522 		spin_unlock(&oxu->mem_lock);
523 
524 		return 0;
525 	}
526 
527 	/* Failed */
528 
529 	spin_unlock(&oxu->mem_lock);
530 
531 	return -ENOMEM;
532 }
533 
534 static void oxu_buf_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
535 {
536 	int index;
537 
538 	spin_lock(&oxu->mem_lock);
539 
540 	index = (qtd->buffer - (void *) &oxu->mem->db_pool[0])
541 							 / BUFFER_SIZE;
542 	oxu->db_used[index] = 0;
543 	qtd->qtd_buffer_len = 0;
544 	qtd->buffer_dma = 0;
545 	qtd->buffer = NULL;
546 
547 	spin_unlock(&oxu->mem_lock);
548 }
549 
550 static inline void ehci_qtd_init(struct ehci_qtd *qtd, dma_addr_t dma)
551 {
552 	memset(qtd, 0, sizeof *qtd);
553 	qtd->qtd_dma = dma;
554 	qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
555 	qtd->hw_next = EHCI_LIST_END;
556 	qtd->hw_alt_next = EHCI_LIST_END;
557 	INIT_LIST_HEAD(&qtd->qtd_list);
558 }
559 
560 static inline void oxu_qtd_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
561 {
562 	int index;
563 
564 	if (qtd->buffer)
565 		oxu_buf_free(oxu, qtd);
566 
567 	spin_lock(&oxu->mem_lock);
568 
569 	index = qtd - &oxu->mem->qtd_pool[0];
570 	oxu->qtd_used[index] = 0;
571 
572 	spin_unlock(&oxu->mem_lock);
573 }
574 
575 static struct ehci_qtd *ehci_qtd_alloc(struct oxu_hcd *oxu)
576 {
577 	int i;
578 	struct ehci_qtd *qtd = NULL;
579 
580 	spin_lock(&oxu->mem_lock);
581 
582 	for (i = 0; i < QTD_NUM; i++)
583 		if (!oxu->qtd_used[i])
584 			break;
585 
586 	if (i < QTD_NUM) {
587 		qtd = (struct ehci_qtd *) &oxu->mem->qtd_pool[i];
588 		memset(qtd, 0, sizeof *qtd);
589 
590 		qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
591 		qtd->hw_next = EHCI_LIST_END;
592 		qtd->hw_alt_next = EHCI_LIST_END;
593 		INIT_LIST_HEAD(&qtd->qtd_list);
594 
595 		qtd->qtd_dma = virt_to_phys(qtd);
596 
597 		oxu->qtd_used[i] = 1;
598 	}
599 
600 	spin_unlock(&oxu->mem_lock);
601 
602 	return qtd;
603 }
604 
605 static void oxu_qh_free(struct oxu_hcd *oxu, struct ehci_qh *qh)
606 {
607 	int index;
608 
609 	spin_lock(&oxu->mem_lock);
610 
611 	index = qh - &oxu->mem->qh_pool[0];
612 	oxu->qh_used[index] = 0;
613 
614 	spin_unlock(&oxu->mem_lock);
615 }
616 
617 static void qh_destroy(struct kref *kref)
618 {
619 	struct ehci_qh *qh = container_of(kref, struct ehci_qh, kref);
620 	struct oxu_hcd *oxu = qh->oxu;
621 
622 	/* clean qtds first, and know this is not linked */
623 	if (!list_empty(&qh->qtd_list) || qh->qh_next.ptr) {
624 		oxu_dbg(oxu, "unused qh not empty!\n");
625 		BUG();
626 	}
627 	if (qh->dummy)
628 		oxu_qtd_free(oxu, qh->dummy);
629 	oxu_qh_free(oxu, qh);
630 }
631 
632 static struct ehci_qh *oxu_qh_alloc(struct oxu_hcd *oxu)
633 {
634 	int i;
635 	struct ehci_qh *qh = NULL;
636 
637 	spin_lock(&oxu->mem_lock);
638 
639 	for (i = 0; i < QHEAD_NUM; i++)
640 		if (!oxu->qh_used[i])
641 			break;
642 
643 	if (i < QHEAD_NUM) {
644 		qh = (struct ehci_qh *) &oxu->mem->qh_pool[i];
645 		memset(qh, 0, sizeof *qh);
646 
647 		kref_init(&qh->kref);
648 		qh->oxu = oxu;
649 		qh->qh_dma = virt_to_phys(qh);
650 		INIT_LIST_HEAD(&qh->qtd_list);
651 
652 		/* dummy td enables safe urb queuing */
653 		qh->dummy = ehci_qtd_alloc(oxu);
654 		if (qh->dummy == NULL) {
655 			oxu_dbg(oxu, "no dummy td\n");
656 			oxu->qh_used[i] = 0;
657 			qh = NULL;
658 			goto unlock;
659 		}
660 
661 		oxu->qh_used[i] = 1;
662 	}
663 unlock:
664 	spin_unlock(&oxu->mem_lock);
665 
666 	return qh;
667 }
668 
669 /* to share a qh (cpu threads, or hc) */
670 static inline struct ehci_qh *qh_get(struct ehci_qh *qh)
671 {
672 	kref_get(&qh->kref);
673 	return qh;
674 }
675 
676 static inline void qh_put(struct ehci_qh *qh)
677 {
678 	kref_put(&qh->kref, qh_destroy);
679 }
680 
681 static void oxu_murb_free(struct oxu_hcd *oxu, struct oxu_murb *murb)
682 {
683 	int index;
684 
685 	spin_lock(&oxu->mem_lock);
686 
687 	index = murb - &oxu->murb_pool[0];
688 	oxu->murb_used[index] = 0;
689 
690 	spin_unlock(&oxu->mem_lock);
691 }
692 
693 static struct oxu_murb *oxu_murb_alloc(struct oxu_hcd *oxu)
694 
695 {
696 	int i;
697 	struct oxu_murb *murb = NULL;
698 
699 	spin_lock(&oxu->mem_lock);
700 
701 	for (i = 0; i < MURB_NUM; i++)
702 		if (!oxu->murb_used[i])
703 			break;
704 
705 	if (i < MURB_NUM) {
706 		murb = &(oxu->murb_pool)[i];
707 
708 		oxu->murb_used[i] = 1;
709 	}
710 
711 	spin_unlock(&oxu->mem_lock);
712 
713 	return murb;
714 }
715 
716 /* The queue heads and transfer descriptors are managed from pools tied
717  * to each of the "per device" structures.
718  * This is the initialisation and cleanup code.
719  */
720 static void ehci_mem_cleanup(struct oxu_hcd *oxu)
721 {
722 	kfree(oxu->murb_pool);
723 	oxu->murb_pool = NULL;
724 
725 	if (oxu->async)
726 		qh_put(oxu->async);
727 	oxu->async = NULL;
728 
729 	del_timer(&oxu->urb_timer);
730 
731 	oxu->periodic = NULL;
732 
733 	/* shadow periodic table */
734 	kfree(oxu->pshadow);
735 	oxu->pshadow = NULL;
736 }
737 
738 /* Remember to add cleanup code (above) if you add anything here.
739  */
740 static int ehci_mem_init(struct oxu_hcd *oxu, gfp_t flags)
741 {
742 	int i;
743 
744 	for (i = 0; i < oxu->periodic_size; i++)
745 		oxu->mem->frame_list[i] = EHCI_LIST_END;
746 	for (i = 0; i < QHEAD_NUM; i++)
747 		oxu->qh_used[i] = 0;
748 	for (i = 0; i < QTD_NUM; i++)
749 		oxu->qtd_used[i] = 0;
750 
751 	oxu->murb_pool = kcalloc(MURB_NUM, sizeof(struct oxu_murb), flags);
752 	if (!oxu->murb_pool)
753 		goto fail;
754 
755 	for (i = 0; i < MURB_NUM; i++)
756 		oxu->murb_used[i] = 0;
757 
758 	oxu->async = oxu_qh_alloc(oxu);
759 	if (!oxu->async)
760 		goto fail;
761 
762 	oxu->periodic = (__le32 *) &oxu->mem->frame_list;
763 	oxu->periodic_dma = virt_to_phys(oxu->periodic);
764 
765 	for (i = 0; i < oxu->periodic_size; i++)
766 		oxu->periodic[i] = EHCI_LIST_END;
767 
768 	/* software shadow of hardware table */
769 	oxu->pshadow = kcalloc(oxu->periodic_size, sizeof(void *), flags);
770 	if (oxu->pshadow != NULL)
771 		return 0;
772 
773 fail:
774 	oxu_dbg(oxu, "couldn't init memory\n");
775 	ehci_mem_cleanup(oxu);
776 	return -ENOMEM;
777 }
778 
779 /* Fill a qtd, returning how much of the buffer we were able to queue up.
780  */
781 static int qtd_fill(struct ehci_qtd *qtd, dma_addr_t buf, size_t len,
782 				int token, int maxpacket)
783 {
784 	int i, count;
785 	u64 addr = buf;
786 
787 	/* one buffer entry per 4K ... first might be short or unaligned */
788 	qtd->hw_buf[0] = cpu_to_le32((u32)addr);
789 	qtd->hw_buf_hi[0] = cpu_to_le32((u32)(addr >> 32));
790 	count = 0x1000 - (buf & 0x0fff);	/* rest of that page */
791 	if (likely(len < count))		/* ... iff needed */
792 		count = len;
793 	else {
794 		buf +=  0x1000;
795 		buf &= ~0x0fff;
796 
797 		/* per-qtd limit: from 16K to 20K (best alignment) */
798 		for (i = 1; count < len && i < 5; i++) {
799 			addr = buf;
800 			qtd->hw_buf[i] = cpu_to_le32((u32)addr);
801 			qtd->hw_buf_hi[i] = cpu_to_le32((u32)(addr >> 32));
802 			buf += 0x1000;
803 			if ((count + 0x1000) < len)
804 				count += 0x1000;
805 			else
806 				count = len;
807 		}
808 
809 		/* short packets may only terminate transfers */
810 		if (count != len)
811 			count -= (count % maxpacket);
812 	}
813 	qtd->hw_token = cpu_to_le32((count << 16) | token);
814 	qtd->length = count;
815 
816 	return count;
817 }
818 
819 static inline void qh_update(struct oxu_hcd *oxu,
820 				struct ehci_qh *qh, struct ehci_qtd *qtd)
821 {
822 	/* writes to an active overlay are unsafe */
823 	BUG_ON(qh->qh_state != QH_STATE_IDLE);
824 
825 	qh->hw_qtd_next = QTD_NEXT(qtd->qtd_dma);
826 	qh->hw_alt_next = EHCI_LIST_END;
827 
828 	/* Except for control endpoints, we make hardware maintain data
829 	 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
830 	 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
831 	 * ever clear it.
832 	 */
833 	if (!(qh->hw_info1 & cpu_to_le32(1 << 14))) {
834 		unsigned	is_out, epnum;
835 
836 		is_out = !(qtd->hw_token & cpu_to_le32(1 << 8));
837 		epnum = (le32_to_cpup(&qh->hw_info1) >> 8) & 0x0f;
838 		if (unlikely(!usb_gettoggle(qh->dev, epnum, is_out))) {
839 			qh->hw_token &= ~cpu_to_le32(QTD_TOGGLE);
840 			usb_settoggle(qh->dev, epnum, is_out, 1);
841 		}
842 	}
843 
844 	/* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
845 	wmb();
846 	qh->hw_token &= cpu_to_le32(QTD_TOGGLE | QTD_STS_PING);
847 }
848 
849 /* If it weren't for a common silicon quirk (writing the dummy into the qh
850  * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
851  * recovery (including urb dequeue) would need software changes to a QH...
852  */
853 static void qh_refresh(struct oxu_hcd *oxu, struct ehci_qh *qh)
854 {
855 	struct ehci_qtd *qtd;
856 
857 	if (list_empty(&qh->qtd_list))
858 		qtd = qh->dummy;
859 	else {
860 		qtd = list_entry(qh->qtd_list.next,
861 				struct ehci_qtd, qtd_list);
862 		/* first qtd may already be partially processed */
863 		if (cpu_to_le32(qtd->qtd_dma) == qh->hw_current)
864 			qtd = NULL;
865 	}
866 
867 	if (qtd)
868 		qh_update(oxu, qh, qtd);
869 }
870 
871 static void qtd_copy_status(struct oxu_hcd *oxu, struct urb *urb,
872 				size_t length, u32 token)
873 {
874 	/* count IN/OUT bytes, not SETUP (even short packets) */
875 	if (likely(QTD_PID(token) != 2))
876 		urb->actual_length += length - QTD_LENGTH(token);
877 
878 	/* don't modify error codes */
879 	if (unlikely(urb->status != -EINPROGRESS))
880 		return;
881 
882 	/* force cleanup after short read; not always an error */
883 	if (unlikely(IS_SHORT_READ(token)))
884 		urb->status = -EREMOTEIO;
885 
886 	/* serious "can't proceed" faults reported by the hardware */
887 	if (token & QTD_STS_HALT) {
888 		if (token & QTD_STS_BABBLE) {
889 			/* FIXME "must" disable babbling device's port too */
890 			urb->status = -EOVERFLOW;
891 		} else if (token & QTD_STS_MMF) {
892 			/* fs/ls interrupt xfer missed the complete-split */
893 			urb->status = -EPROTO;
894 		} else if (token & QTD_STS_DBE) {
895 			urb->status = (QTD_PID(token) == 1) /* IN ? */
896 				? -ENOSR  /* hc couldn't read data */
897 				: -ECOMM; /* hc couldn't write data */
898 		} else if (token & QTD_STS_XACT) {
899 			/* timeout, bad crc, wrong PID, etc; retried */
900 			if (QTD_CERR(token))
901 				urb->status = -EPIPE;
902 			else {
903 				oxu_dbg(oxu, "devpath %s ep%d%s 3strikes\n",
904 					urb->dev->devpath,
905 					usb_pipeendpoint(urb->pipe),
906 					usb_pipein(urb->pipe) ? "in" : "out");
907 				urb->status = -EPROTO;
908 			}
909 		/* CERR nonzero + no errors + halt --> stall */
910 		} else if (QTD_CERR(token))
911 			urb->status = -EPIPE;
912 		else	/* unknown */
913 			urb->status = -EPROTO;
914 
915 		oxu_vdbg(oxu, "dev%d ep%d%s qtd token %08x --> status %d\n",
916 			usb_pipedevice(urb->pipe),
917 			usb_pipeendpoint(urb->pipe),
918 			usb_pipein(urb->pipe) ? "in" : "out",
919 			token, urb->status);
920 	}
921 }
922 
923 static void ehci_urb_done(struct oxu_hcd *oxu, struct urb *urb)
924 __releases(oxu->lock)
925 __acquires(oxu->lock)
926 {
927 	if (likely(urb->hcpriv != NULL)) {
928 		struct ehci_qh	*qh = (struct ehci_qh *) urb->hcpriv;
929 
930 		/* S-mask in a QH means it's an interrupt urb */
931 		if ((qh->hw_info2 & cpu_to_le32(QH_SMASK)) != 0) {
932 
933 			/* ... update hc-wide periodic stats (for usbfs) */
934 			oxu_to_hcd(oxu)->self.bandwidth_int_reqs--;
935 		}
936 		qh_put(qh);
937 	}
938 
939 	urb->hcpriv = NULL;
940 	switch (urb->status) {
941 	case -EINPROGRESS:		/* success */
942 		urb->status = 0;
943 	default:			/* fault */
944 		break;
945 	case -EREMOTEIO:		/* fault or normal */
946 		if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
947 			urb->status = 0;
948 		break;
949 	case -ECONNRESET:		/* canceled */
950 	case -ENOENT:
951 		break;
952 	}
953 
954 #ifdef OXU_URB_TRACE
955 	oxu_dbg(oxu, "%s %s urb %p ep%d%s status %d len %d/%d\n",
956 		__func__, urb->dev->devpath, urb,
957 		usb_pipeendpoint(urb->pipe),
958 		usb_pipein(urb->pipe) ? "in" : "out",
959 		urb->status,
960 		urb->actual_length, urb->transfer_buffer_length);
961 #endif
962 
963 	/* complete() can reenter this HCD */
964 	spin_unlock(&oxu->lock);
965 	usb_hcd_giveback_urb(oxu_to_hcd(oxu), urb, urb->status);
966 	spin_lock(&oxu->lock);
967 }
968 
969 static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
970 static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
971 
972 static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
973 static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
974 
975 #define HALT_BIT cpu_to_le32(QTD_STS_HALT)
976 
977 /* Process and free completed qtds for a qh, returning URBs to drivers.
978  * Chases up to qh->hw_current.  Returns number of completions called,
979  * indicating how much "real" work we did.
980  */
981 static unsigned qh_completions(struct oxu_hcd *oxu, struct ehci_qh *qh)
982 {
983 	struct ehci_qtd *last = NULL, *end = qh->dummy;
984 	struct list_head *entry, *tmp;
985 	int stopped;
986 	unsigned count = 0;
987 	int do_status = 0;
988 	u8 state;
989 	struct oxu_murb *murb = NULL;
990 
991 	if (unlikely(list_empty(&qh->qtd_list)))
992 		return count;
993 
994 	/* completions (or tasks on other cpus) must never clobber HALT
995 	 * till we've gone through and cleaned everything up, even when
996 	 * they add urbs to this qh's queue or mark them for unlinking.
997 	 *
998 	 * NOTE:  unlinking expects to be done in queue order.
999 	 */
1000 	state = qh->qh_state;
1001 	qh->qh_state = QH_STATE_COMPLETING;
1002 	stopped = (state == QH_STATE_IDLE);
1003 
1004 	/* remove de-activated QTDs from front of queue.
1005 	 * after faults (including short reads), cleanup this urb
1006 	 * then let the queue advance.
1007 	 * if queue is stopped, handles unlinks.
1008 	 */
1009 	list_for_each_safe(entry, tmp, &qh->qtd_list) {
1010 		struct ehci_qtd	*qtd;
1011 		struct urb *urb;
1012 		u32 token = 0;
1013 
1014 		qtd = list_entry(entry, struct ehci_qtd, qtd_list);
1015 		urb = qtd->urb;
1016 
1017 		/* Clean up any state from previous QTD ...*/
1018 		if (last) {
1019 			if (likely(last->urb != urb)) {
1020 				if (last->urb->complete == NULL) {
1021 					murb = (struct oxu_murb *) last->urb;
1022 					last->urb = murb->main;
1023 					if (murb->last) {
1024 						ehci_urb_done(oxu, last->urb);
1025 						count++;
1026 					}
1027 					oxu_murb_free(oxu, murb);
1028 				} else {
1029 					ehci_urb_done(oxu, last->urb);
1030 					count++;
1031 				}
1032 			}
1033 			oxu_qtd_free(oxu, last);
1034 			last = NULL;
1035 		}
1036 
1037 		/* ignore urbs submitted during completions we reported */
1038 		if (qtd == end)
1039 			break;
1040 
1041 		/* hardware copies qtd out of qh overlay */
1042 		rmb();
1043 		token = le32_to_cpu(qtd->hw_token);
1044 
1045 		/* always clean up qtds the hc de-activated */
1046 		if ((token & QTD_STS_ACTIVE) == 0) {
1047 
1048 			if ((token & QTD_STS_HALT) != 0) {
1049 				stopped = 1;
1050 
1051 			/* magic dummy for some short reads; qh won't advance.
1052 			 * that silicon quirk can kick in with this dummy too.
1053 			 */
1054 			} else if (IS_SHORT_READ(token) &&
1055 					!(qtd->hw_alt_next & EHCI_LIST_END)) {
1056 				stopped = 1;
1057 				goto halt;
1058 			}
1059 
1060 		/* stop scanning when we reach qtds the hc is using */
1061 		} else if (likely(!stopped &&
1062 				HC_IS_RUNNING(oxu_to_hcd(oxu)->state))) {
1063 			break;
1064 
1065 		} else {
1066 			stopped = 1;
1067 
1068 			if (unlikely(!HC_IS_RUNNING(oxu_to_hcd(oxu)->state)))
1069 				urb->status = -ESHUTDOWN;
1070 
1071 			/* ignore active urbs unless some previous qtd
1072 			 * for the urb faulted (including short read) or
1073 			 * its urb was canceled.  we may patch qh or qtds.
1074 			 */
1075 			if (likely(urb->status == -EINPROGRESS))
1076 				continue;
1077 
1078 			/* issue status after short control reads */
1079 			if (unlikely(do_status != 0)
1080 					&& QTD_PID(token) == 0 /* OUT */) {
1081 				do_status = 0;
1082 				continue;
1083 			}
1084 
1085 			/* token in overlay may be most current */
1086 			if (state == QH_STATE_IDLE
1087 					&& cpu_to_le32(qtd->qtd_dma)
1088 						== qh->hw_current)
1089 				token = le32_to_cpu(qh->hw_token);
1090 
1091 			/* force halt for unlinked or blocked qh, so we'll
1092 			 * patch the qh later and so that completions can't
1093 			 * activate it while we "know" it's stopped.
1094 			 */
1095 			if ((HALT_BIT & qh->hw_token) == 0) {
1096 halt:
1097 				qh->hw_token |= HALT_BIT;
1098 				wmb();
1099 			}
1100 		}
1101 
1102 		/* Remove it from the queue */
1103 		qtd_copy_status(oxu, urb->complete ?
1104 					urb : ((struct oxu_murb *) urb)->main,
1105 				qtd->length, token);
1106 		if ((usb_pipein(qtd->urb->pipe)) &&
1107 				(NULL != qtd->transfer_buffer))
1108 			memcpy(qtd->transfer_buffer, qtd->buffer, qtd->length);
1109 		do_status = (urb->status == -EREMOTEIO)
1110 				&& usb_pipecontrol(urb->pipe);
1111 
1112 		if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
1113 			last = list_entry(qtd->qtd_list.prev,
1114 					struct ehci_qtd, qtd_list);
1115 			last->hw_next = qtd->hw_next;
1116 		}
1117 		list_del(&qtd->qtd_list);
1118 		last = qtd;
1119 	}
1120 
1121 	/* last urb's completion might still need calling */
1122 	if (likely(last != NULL)) {
1123 		if (last->urb->complete == NULL) {
1124 			murb = (struct oxu_murb *) last->urb;
1125 			last->urb = murb->main;
1126 			if (murb->last) {
1127 				ehci_urb_done(oxu, last->urb);
1128 				count++;
1129 			}
1130 			oxu_murb_free(oxu, murb);
1131 		} else {
1132 			ehci_urb_done(oxu, last->urb);
1133 			count++;
1134 		}
1135 		oxu_qtd_free(oxu, last);
1136 	}
1137 
1138 	/* restore original state; caller must unlink or relink */
1139 	qh->qh_state = state;
1140 
1141 	/* be sure the hardware's done with the qh before refreshing
1142 	 * it after fault cleanup, or recovering from silicon wrongly
1143 	 * overlaying the dummy qtd (which reduces DMA chatter).
1144 	 */
1145 	if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END) {
1146 		switch (state) {
1147 		case QH_STATE_IDLE:
1148 			qh_refresh(oxu, qh);
1149 			break;
1150 		case QH_STATE_LINKED:
1151 			/* should be rare for periodic transfers,
1152 			 * except maybe high bandwidth ...
1153 			 */
1154 			if ((cpu_to_le32(QH_SMASK)
1155 					& qh->hw_info2) != 0) {
1156 				intr_deschedule(oxu, qh);
1157 				(void) qh_schedule(oxu, qh);
1158 			} else
1159 				unlink_async(oxu, qh);
1160 			break;
1161 		/* otherwise, unlink already started */
1162 		}
1163 	}
1164 
1165 	return count;
1166 }
1167 
1168 /* High bandwidth multiplier, as encoded in highspeed endpoint descriptors */
1169 #define hb_mult(wMaxPacketSize)		(1 + (((wMaxPacketSize) >> 11) & 0x03))
1170 /* ... and packet size, for any kind of endpoint descriptor */
1171 #define max_packet(wMaxPacketSize)	((wMaxPacketSize) & 0x07ff)
1172 
1173 /* Reverse of qh_urb_transaction: free a list of TDs.
1174  * used for cleanup after errors, before HC sees an URB's TDs.
1175  */
1176 static void qtd_list_free(struct oxu_hcd *oxu,
1177 				struct urb *urb, struct list_head *qtd_list)
1178 {
1179 	struct list_head *entry, *temp;
1180 
1181 	list_for_each_safe(entry, temp, qtd_list) {
1182 		struct ehci_qtd	*qtd;
1183 
1184 		qtd = list_entry(entry, struct ehci_qtd, qtd_list);
1185 		list_del(&qtd->qtd_list);
1186 		oxu_qtd_free(oxu, qtd);
1187 	}
1188 }
1189 
1190 /* Create a list of filled qtds for this URB; won't link into qh.
1191  */
1192 static struct list_head *qh_urb_transaction(struct oxu_hcd *oxu,
1193 						struct urb *urb,
1194 						struct list_head *head,
1195 						gfp_t flags)
1196 {
1197 	struct ehci_qtd	*qtd, *qtd_prev;
1198 	dma_addr_t buf;
1199 	int len, maxpacket;
1200 	int is_input;
1201 	u32 token;
1202 	void *transfer_buf = NULL;
1203 	int ret;
1204 
1205 	/*
1206 	 * URBs map to sequences of QTDs: one logical transaction
1207 	 */
1208 	qtd = ehci_qtd_alloc(oxu);
1209 	if (unlikely(!qtd))
1210 		return NULL;
1211 	list_add_tail(&qtd->qtd_list, head);
1212 	qtd->urb = urb;
1213 
1214 	token = QTD_STS_ACTIVE;
1215 	token |= (EHCI_TUNE_CERR << 10);
1216 	/* for split transactions, SplitXState initialized to zero */
1217 
1218 	len = urb->transfer_buffer_length;
1219 	is_input = usb_pipein(urb->pipe);
1220 	if (!urb->transfer_buffer && urb->transfer_buffer_length && is_input)
1221 		urb->transfer_buffer = phys_to_virt(urb->transfer_dma);
1222 
1223 	if (usb_pipecontrol(urb->pipe)) {
1224 		/* SETUP pid */
1225 		ret = oxu_buf_alloc(oxu, qtd, sizeof(struct usb_ctrlrequest));
1226 		if (ret)
1227 			goto cleanup;
1228 
1229 		qtd_fill(qtd, qtd->buffer_dma, sizeof(struct usb_ctrlrequest),
1230 				token | (2 /* "setup" */ << 8), 8);
1231 		memcpy(qtd->buffer, qtd->urb->setup_packet,
1232 				sizeof(struct usb_ctrlrequest));
1233 
1234 		/* ... and always at least one more pid */
1235 		token ^= QTD_TOGGLE;
1236 		qtd_prev = qtd;
1237 		qtd = ehci_qtd_alloc(oxu);
1238 		if (unlikely(!qtd))
1239 			goto cleanup;
1240 		qtd->urb = urb;
1241 		qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1242 		list_add_tail(&qtd->qtd_list, head);
1243 
1244 		/* for zero length DATA stages, STATUS is always IN */
1245 		if (len == 0)
1246 			token |= (1 /* "in" */ << 8);
1247 	}
1248 
1249 	/*
1250 	 * Data transfer stage: buffer setup
1251 	 */
1252 
1253 	ret = oxu_buf_alloc(oxu, qtd, len);
1254 	if (ret)
1255 		goto cleanup;
1256 
1257 	buf = qtd->buffer_dma;
1258 	transfer_buf = urb->transfer_buffer;
1259 
1260 	if (!is_input)
1261 		memcpy(qtd->buffer, qtd->urb->transfer_buffer, len);
1262 
1263 	if (is_input)
1264 		token |= (1 /* "in" */ << 8);
1265 	/* else it's already initted to "out" pid (0 << 8) */
1266 
1267 	maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
1268 
1269 	/*
1270 	 * buffer gets wrapped in one or more qtds;
1271 	 * last one may be "short" (including zero len)
1272 	 * and may serve as a control status ack
1273 	 */
1274 	for (;;) {
1275 		int this_qtd_len;
1276 
1277 		this_qtd_len = qtd_fill(qtd, buf, len, token, maxpacket);
1278 		qtd->transfer_buffer = transfer_buf;
1279 		len -= this_qtd_len;
1280 		buf += this_qtd_len;
1281 		transfer_buf += this_qtd_len;
1282 		if (is_input)
1283 			qtd->hw_alt_next = oxu->async->hw_alt_next;
1284 
1285 		/* qh makes control packets use qtd toggle; maybe switch it */
1286 		if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
1287 			token ^= QTD_TOGGLE;
1288 
1289 		if (likely(len <= 0))
1290 			break;
1291 
1292 		qtd_prev = qtd;
1293 		qtd = ehci_qtd_alloc(oxu);
1294 		if (unlikely(!qtd))
1295 			goto cleanup;
1296 		if (likely(len > 0)) {
1297 			ret = oxu_buf_alloc(oxu, qtd, len);
1298 			if (ret)
1299 				goto cleanup;
1300 		}
1301 		qtd->urb = urb;
1302 		qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1303 		list_add_tail(&qtd->qtd_list, head);
1304 	}
1305 
1306 	/* unless the bulk/interrupt caller wants a chance to clean
1307 	 * up after short reads, hc should advance qh past this urb
1308 	 */
1309 	if (likely((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
1310 				|| usb_pipecontrol(urb->pipe)))
1311 		qtd->hw_alt_next = EHCI_LIST_END;
1312 
1313 	/*
1314 	 * control requests may need a terminating data "status" ack;
1315 	 * bulk ones may need a terminating short packet (zero length).
1316 	 */
1317 	if (likely(urb->transfer_buffer_length != 0)) {
1318 		int	one_more = 0;
1319 
1320 		if (usb_pipecontrol(urb->pipe)) {
1321 			one_more = 1;
1322 			token ^= 0x0100;	/* "in" <--> "out"  */
1323 			token |= QTD_TOGGLE;	/* force DATA1 */
1324 		} else if (usb_pipebulk(urb->pipe)
1325 				&& (urb->transfer_flags & URB_ZERO_PACKET)
1326 				&& !(urb->transfer_buffer_length % maxpacket)) {
1327 			one_more = 1;
1328 		}
1329 		if (one_more) {
1330 			qtd_prev = qtd;
1331 			qtd = ehci_qtd_alloc(oxu);
1332 			if (unlikely(!qtd))
1333 				goto cleanup;
1334 			qtd->urb = urb;
1335 			qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1336 			list_add_tail(&qtd->qtd_list, head);
1337 
1338 			/* never any data in such packets */
1339 			qtd_fill(qtd, 0, 0, token, 0);
1340 		}
1341 	}
1342 
1343 	/* by default, enable interrupt on urb completion */
1344 		qtd->hw_token |= cpu_to_le32(QTD_IOC);
1345 	return head;
1346 
1347 cleanup:
1348 	qtd_list_free(oxu, urb, head);
1349 	return NULL;
1350 }
1351 
1352 /* Each QH holds a qtd list; a QH is used for everything except iso.
1353  *
1354  * For interrupt urbs, the scheduler must set the microframe scheduling
1355  * mask(s) each time the QH gets scheduled.  For highspeed, that's
1356  * just one microframe in the s-mask.  For split interrupt transactions
1357  * there are additional complications: c-mask, maybe FSTNs.
1358  */
1359 static struct ehci_qh *qh_make(struct oxu_hcd *oxu,
1360 				struct urb *urb, gfp_t flags)
1361 {
1362 	struct ehci_qh *qh = oxu_qh_alloc(oxu);
1363 	u32 info1 = 0, info2 = 0;
1364 	int is_input, type;
1365 	int maxp = 0;
1366 
1367 	if (!qh)
1368 		return qh;
1369 
1370 	/*
1371 	 * init endpoint/device data for this QH
1372 	 */
1373 	info1 |= usb_pipeendpoint(urb->pipe) << 8;
1374 	info1 |= usb_pipedevice(urb->pipe) << 0;
1375 
1376 	is_input = usb_pipein(urb->pipe);
1377 	type = usb_pipetype(urb->pipe);
1378 	maxp = usb_maxpacket(urb->dev, urb->pipe, !is_input);
1379 
1380 	/* Compute interrupt scheduling parameters just once, and save.
1381 	 * - allowing for high bandwidth, how many nsec/uframe are used?
1382 	 * - split transactions need a second CSPLIT uframe; same question
1383 	 * - splits also need a schedule gap (for full/low speed I/O)
1384 	 * - qh has a polling interval
1385 	 *
1386 	 * For control/bulk requests, the HC or TT handles these.
1387 	 */
1388 	if (type == PIPE_INTERRUPT) {
1389 		qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
1390 								is_input, 0,
1391 				hb_mult(maxp) * max_packet(maxp)));
1392 		qh->start = NO_FRAME;
1393 
1394 		if (urb->dev->speed == USB_SPEED_HIGH) {
1395 			qh->c_usecs = 0;
1396 			qh->gap_uf = 0;
1397 
1398 			qh->period = urb->interval >> 3;
1399 			if (qh->period == 0 && urb->interval != 1) {
1400 				/* NOTE interval 2 or 4 uframes could work.
1401 				 * But interval 1 scheduling is simpler, and
1402 				 * includes high bandwidth.
1403 				 */
1404 				oxu_dbg(oxu, "intr period %d uframes, NYET!\n",
1405 					urb->interval);
1406 				goto done;
1407 			}
1408 		} else {
1409 			struct usb_tt	*tt = urb->dev->tt;
1410 			int		think_time;
1411 
1412 			/* gap is f(FS/LS transfer times) */
1413 			qh->gap_uf = 1 + usb_calc_bus_time(urb->dev->speed,
1414 					is_input, 0, maxp) / (125 * 1000);
1415 
1416 			/* FIXME this just approximates SPLIT/CSPLIT times */
1417 			if (is_input) {		/* SPLIT, gap, CSPLIT+DATA */
1418 				qh->c_usecs = qh->usecs + HS_USECS(0);
1419 				qh->usecs = HS_USECS(1);
1420 			} else {		/* SPLIT+DATA, gap, CSPLIT */
1421 				qh->usecs += HS_USECS(1);
1422 				qh->c_usecs = HS_USECS(0);
1423 			}
1424 
1425 			think_time = tt ? tt->think_time : 0;
1426 			qh->tt_usecs = NS_TO_US(think_time +
1427 					usb_calc_bus_time(urb->dev->speed,
1428 					is_input, 0, max_packet(maxp)));
1429 			qh->period = urb->interval;
1430 		}
1431 	}
1432 
1433 	/* support for tt scheduling, and access to toggles */
1434 	qh->dev = urb->dev;
1435 
1436 	/* using TT? */
1437 	switch (urb->dev->speed) {
1438 	case USB_SPEED_LOW:
1439 		info1 |= (1 << 12);	/* EPS "low" */
1440 		/* FALL THROUGH */
1441 
1442 	case USB_SPEED_FULL:
1443 		/* EPS 0 means "full" */
1444 		if (type != PIPE_INTERRUPT)
1445 			info1 |= (EHCI_TUNE_RL_TT << 28);
1446 		if (type == PIPE_CONTROL) {
1447 			info1 |= (1 << 27);	/* for TT */
1448 			info1 |= 1 << 14;	/* toggle from qtd */
1449 		}
1450 		info1 |= maxp << 16;
1451 
1452 		info2 |= (EHCI_TUNE_MULT_TT << 30);
1453 		info2 |= urb->dev->ttport << 23;
1454 
1455 		/* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
1456 
1457 		break;
1458 
1459 	case USB_SPEED_HIGH:		/* no TT involved */
1460 		info1 |= (2 << 12);	/* EPS "high" */
1461 		if (type == PIPE_CONTROL) {
1462 			info1 |= (EHCI_TUNE_RL_HS << 28);
1463 			info1 |= 64 << 16;	/* usb2 fixed maxpacket */
1464 			info1 |= 1 << 14;	/* toggle from qtd */
1465 			info2 |= (EHCI_TUNE_MULT_HS << 30);
1466 		} else if (type == PIPE_BULK) {
1467 			info1 |= (EHCI_TUNE_RL_HS << 28);
1468 			info1 |= 512 << 16;	/* usb2 fixed maxpacket */
1469 			info2 |= (EHCI_TUNE_MULT_HS << 30);
1470 		} else {		/* PIPE_INTERRUPT */
1471 			info1 |= max_packet(maxp) << 16;
1472 			info2 |= hb_mult(maxp) << 30;
1473 		}
1474 		break;
1475 	default:
1476 		oxu_dbg(oxu, "bogus dev %p speed %d\n", urb->dev, urb->dev->speed);
1477 done:
1478 		qh_put(qh);
1479 		return NULL;
1480 	}
1481 
1482 	/* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
1483 
1484 	/* init as live, toggle clear, advance to dummy */
1485 	qh->qh_state = QH_STATE_IDLE;
1486 	qh->hw_info1 = cpu_to_le32(info1);
1487 	qh->hw_info2 = cpu_to_le32(info2);
1488 	usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input, 1);
1489 	qh_refresh(oxu, qh);
1490 	return qh;
1491 }
1492 
1493 /* Move qh (and its qtds) onto async queue; maybe enable queue.
1494  */
1495 static void qh_link_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
1496 {
1497 	__le32 dma = QH_NEXT(qh->qh_dma);
1498 	struct ehci_qh *head;
1499 
1500 	/* (re)start the async schedule? */
1501 	head = oxu->async;
1502 	timer_action_done(oxu, TIMER_ASYNC_OFF);
1503 	if (!head->qh_next.qh) {
1504 		u32	cmd = readl(&oxu->regs->command);
1505 
1506 		if (!(cmd & CMD_ASE)) {
1507 			/* in case a clear of CMD_ASE didn't take yet */
1508 			(void)handshake(oxu, &oxu->regs->status,
1509 					STS_ASS, 0, 150);
1510 			cmd |= CMD_ASE | CMD_RUN;
1511 			writel(cmd, &oxu->regs->command);
1512 			oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
1513 			/* posted write need not be known to HC yet ... */
1514 		}
1515 	}
1516 
1517 	/* clear halt and/or toggle; and maybe recover from silicon quirk */
1518 	if (qh->qh_state == QH_STATE_IDLE)
1519 		qh_refresh(oxu, qh);
1520 
1521 	/* splice right after start */
1522 	qh->qh_next = head->qh_next;
1523 	qh->hw_next = head->hw_next;
1524 	wmb();
1525 
1526 	head->qh_next.qh = qh;
1527 	head->hw_next = dma;
1528 
1529 	qh->qh_state = QH_STATE_LINKED;
1530 	/* qtd completions reported later by interrupt */
1531 }
1532 
1533 #define	QH_ADDR_MASK	cpu_to_le32(0x7f)
1534 
1535 /*
1536  * For control/bulk/interrupt, return QH with these TDs appended.
1537  * Allocates and initializes the QH if necessary.
1538  * Returns null if it can't allocate a QH it needs to.
1539  * If the QH has TDs (urbs) already, that's great.
1540  */
1541 static struct ehci_qh *qh_append_tds(struct oxu_hcd *oxu,
1542 				struct urb *urb, struct list_head *qtd_list,
1543 				int epnum, void	**ptr)
1544 {
1545 	struct ehci_qh *qh = NULL;
1546 
1547 	qh = (struct ehci_qh *) *ptr;
1548 	if (unlikely(qh == NULL)) {
1549 		/* can't sleep here, we have oxu->lock... */
1550 		qh = qh_make(oxu, urb, GFP_ATOMIC);
1551 		*ptr = qh;
1552 	}
1553 	if (likely(qh != NULL)) {
1554 		struct ehci_qtd	*qtd;
1555 
1556 		if (unlikely(list_empty(qtd_list)))
1557 			qtd = NULL;
1558 		else
1559 			qtd = list_entry(qtd_list->next, struct ehci_qtd,
1560 					qtd_list);
1561 
1562 		/* control qh may need patching ... */
1563 		if (unlikely(epnum == 0)) {
1564 
1565 			/* usb_reset_device() briefly reverts to address 0 */
1566 			if (usb_pipedevice(urb->pipe) == 0)
1567 				qh->hw_info1 &= ~QH_ADDR_MASK;
1568 		}
1569 
1570 		/* just one way to queue requests: swap with the dummy qtd.
1571 		 * only hc or qh_refresh() ever modify the overlay.
1572 		 */
1573 		if (likely(qtd != NULL)) {
1574 			struct ehci_qtd	*dummy;
1575 			dma_addr_t dma;
1576 			__le32 token;
1577 
1578 			/* to avoid racing the HC, use the dummy td instead of
1579 			 * the first td of our list (becomes new dummy).  both
1580 			 * tds stay deactivated until we're done, when the
1581 			 * HC is allowed to fetch the old dummy (4.10.2).
1582 			 */
1583 			token = qtd->hw_token;
1584 			qtd->hw_token = HALT_BIT;
1585 			wmb();
1586 			dummy = qh->dummy;
1587 
1588 			dma = dummy->qtd_dma;
1589 			*dummy = *qtd;
1590 			dummy->qtd_dma = dma;
1591 
1592 			list_del(&qtd->qtd_list);
1593 			list_add(&dummy->qtd_list, qtd_list);
1594 			list_splice(qtd_list, qh->qtd_list.prev);
1595 
1596 			ehci_qtd_init(qtd, qtd->qtd_dma);
1597 			qh->dummy = qtd;
1598 
1599 			/* hc must see the new dummy at list end */
1600 			dma = qtd->qtd_dma;
1601 			qtd = list_entry(qh->qtd_list.prev,
1602 					struct ehci_qtd, qtd_list);
1603 			qtd->hw_next = QTD_NEXT(dma);
1604 
1605 			/* let the hc process these next qtds */
1606 			dummy->hw_token = (token & ~(0x80));
1607 			wmb();
1608 			dummy->hw_token = token;
1609 
1610 			urb->hcpriv = qh_get(qh);
1611 		}
1612 	}
1613 	return qh;
1614 }
1615 
1616 static int submit_async(struct oxu_hcd	*oxu, struct urb *urb,
1617 			struct list_head *qtd_list, gfp_t mem_flags)
1618 {
1619 	struct ehci_qtd	*qtd;
1620 	int epnum;
1621 	unsigned long flags;
1622 	struct ehci_qh *qh = NULL;
1623 	int rc = 0;
1624 
1625 	qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
1626 	epnum = urb->ep->desc.bEndpointAddress;
1627 
1628 #ifdef OXU_URB_TRACE
1629 	oxu_dbg(oxu, "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1630 		__func__, urb->dev->devpath, urb,
1631 		epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1632 		urb->transfer_buffer_length,
1633 		qtd, urb->ep->hcpriv);
1634 #endif
1635 
1636 	spin_lock_irqsave(&oxu->lock, flags);
1637 	if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu)))) {
1638 		rc = -ESHUTDOWN;
1639 		goto done;
1640 	}
1641 
1642 	qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
1643 	if (unlikely(qh == NULL)) {
1644 		rc = -ENOMEM;
1645 		goto done;
1646 	}
1647 
1648 	/* Control/bulk operations through TTs don't need scheduling,
1649 	 * the HC and TT handle it when the TT has a buffer ready.
1650 	 */
1651 	if (likely(qh->qh_state == QH_STATE_IDLE))
1652 		qh_link_async(oxu, qh_get(qh));
1653 done:
1654 	spin_unlock_irqrestore(&oxu->lock, flags);
1655 	if (unlikely(qh == NULL))
1656 		qtd_list_free(oxu, urb, qtd_list);
1657 	return rc;
1658 }
1659 
1660 /* The async qh for the qtds being reclaimed are now unlinked from the HC */
1661 
1662 static void end_unlink_async(struct oxu_hcd *oxu)
1663 {
1664 	struct ehci_qh *qh = oxu->reclaim;
1665 	struct ehci_qh *next;
1666 
1667 	timer_action_done(oxu, TIMER_IAA_WATCHDOG);
1668 
1669 	qh->qh_state = QH_STATE_IDLE;
1670 	qh->qh_next.qh = NULL;
1671 	qh_put(qh);			/* refcount from reclaim */
1672 
1673 	/* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1674 	next = qh->reclaim;
1675 	oxu->reclaim = next;
1676 	oxu->reclaim_ready = 0;
1677 	qh->reclaim = NULL;
1678 
1679 	qh_completions(oxu, qh);
1680 
1681 	if (!list_empty(&qh->qtd_list)
1682 			&& HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
1683 		qh_link_async(oxu, qh);
1684 	else {
1685 		qh_put(qh);		/* refcount from async list */
1686 
1687 		/* it's not free to turn the async schedule on/off; leave it
1688 		 * active but idle for a while once it empties.
1689 		 */
1690 		if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state)
1691 				&& oxu->async->qh_next.qh == NULL)
1692 			timer_action(oxu, TIMER_ASYNC_OFF);
1693 	}
1694 
1695 	if (next) {
1696 		oxu->reclaim = NULL;
1697 		start_unlink_async(oxu, next);
1698 	}
1699 }
1700 
1701 /* makes sure the async qh will become idle */
1702 /* caller must own oxu->lock */
1703 
1704 static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
1705 {
1706 	int cmd = readl(&oxu->regs->command);
1707 	struct ehci_qh *prev;
1708 
1709 #ifdef DEBUG
1710 	assert_spin_locked(&oxu->lock);
1711 	BUG_ON(oxu->reclaim || (qh->qh_state != QH_STATE_LINKED
1712 				&& qh->qh_state != QH_STATE_UNLINK_WAIT));
1713 #endif
1714 
1715 	/* stop async schedule right now? */
1716 	if (unlikely(qh == oxu->async)) {
1717 		/* can't get here without STS_ASS set */
1718 		if (oxu_to_hcd(oxu)->state != HC_STATE_HALT
1719 				&& !oxu->reclaim) {
1720 			/* ... and CMD_IAAD clear */
1721 			writel(cmd & ~CMD_ASE, &oxu->regs->command);
1722 			wmb();
1723 			/* handshake later, if we need to */
1724 			timer_action_done(oxu, TIMER_ASYNC_OFF);
1725 		}
1726 		return;
1727 	}
1728 
1729 	qh->qh_state = QH_STATE_UNLINK;
1730 	oxu->reclaim = qh = qh_get(qh);
1731 
1732 	prev = oxu->async;
1733 	while (prev->qh_next.qh != qh)
1734 		prev = prev->qh_next.qh;
1735 
1736 	prev->hw_next = qh->hw_next;
1737 	prev->qh_next = qh->qh_next;
1738 	wmb();
1739 
1740 	if (unlikely(oxu_to_hcd(oxu)->state == HC_STATE_HALT)) {
1741 		/* if (unlikely(qh->reclaim != 0))
1742 		 *	this will recurse, probably not much
1743 		 */
1744 		end_unlink_async(oxu);
1745 		return;
1746 	}
1747 
1748 	oxu->reclaim_ready = 0;
1749 	cmd |= CMD_IAAD;
1750 	writel(cmd, &oxu->regs->command);
1751 	(void) readl(&oxu->regs->command);
1752 	timer_action(oxu, TIMER_IAA_WATCHDOG);
1753 }
1754 
1755 static void scan_async(struct oxu_hcd *oxu)
1756 {
1757 	struct ehci_qh *qh;
1758 	enum ehci_timer_action action = TIMER_IO_WATCHDOG;
1759 
1760 	if (!++(oxu->stamp))
1761 		oxu->stamp++;
1762 	timer_action_done(oxu, TIMER_ASYNC_SHRINK);
1763 rescan:
1764 	qh = oxu->async->qh_next.qh;
1765 	if (likely(qh != NULL)) {
1766 		do {
1767 			/* clean any finished work for this qh */
1768 			if (!list_empty(&qh->qtd_list)
1769 					&& qh->stamp != oxu->stamp) {
1770 				int temp;
1771 
1772 				/* unlinks could happen here; completion
1773 				 * reporting drops the lock.  rescan using
1774 				 * the latest schedule, but don't rescan
1775 				 * qhs we already finished (no looping).
1776 				 */
1777 				qh = qh_get(qh);
1778 				qh->stamp = oxu->stamp;
1779 				temp = qh_completions(oxu, qh);
1780 				qh_put(qh);
1781 				if (temp != 0)
1782 					goto rescan;
1783 			}
1784 
1785 			/* unlink idle entries, reducing HC PCI usage as well
1786 			 * as HCD schedule-scanning costs.  delay for any qh
1787 			 * we just scanned, there's a not-unusual case that it
1788 			 * doesn't stay idle for long.
1789 			 * (plus, avoids some kind of re-activation race.)
1790 			 */
1791 			if (list_empty(&qh->qtd_list)) {
1792 				if (qh->stamp == oxu->stamp)
1793 					action = TIMER_ASYNC_SHRINK;
1794 				else if (!oxu->reclaim
1795 					    && qh->qh_state == QH_STATE_LINKED)
1796 					start_unlink_async(oxu, qh);
1797 			}
1798 
1799 			qh = qh->qh_next.qh;
1800 		} while (qh);
1801 	}
1802 	if (action == TIMER_ASYNC_SHRINK)
1803 		timer_action(oxu, TIMER_ASYNC_SHRINK);
1804 }
1805 
1806 /*
1807  * periodic_next_shadow - return "next" pointer on shadow list
1808  * @periodic: host pointer to qh/itd/sitd
1809  * @tag: hardware tag for type of this record
1810  */
1811 static union ehci_shadow *periodic_next_shadow(union ehci_shadow *periodic,
1812 						__le32 tag)
1813 {
1814 	switch (tag) {
1815 	default:
1816 	case Q_TYPE_QH:
1817 		return &periodic->qh->qh_next;
1818 	}
1819 }
1820 
1821 /* caller must hold oxu->lock */
1822 static void periodic_unlink(struct oxu_hcd *oxu, unsigned frame, void *ptr)
1823 {
1824 	union ehci_shadow *prev_p = &oxu->pshadow[frame];
1825 	__le32 *hw_p = &oxu->periodic[frame];
1826 	union ehci_shadow here = *prev_p;
1827 
1828 	/* find predecessor of "ptr"; hw and shadow lists are in sync */
1829 	while (here.ptr && here.ptr != ptr) {
1830 		prev_p = periodic_next_shadow(prev_p, Q_NEXT_TYPE(*hw_p));
1831 		hw_p = here.hw_next;
1832 		here = *prev_p;
1833 	}
1834 	/* an interrupt entry (at list end) could have been shared */
1835 	if (!here.ptr)
1836 		return;
1837 
1838 	/* update shadow and hardware lists ... the old "next" pointers
1839 	 * from ptr may still be in use, the caller updates them.
1840 	 */
1841 	*prev_p = *periodic_next_shadow(&here, Q_NEXT_TYPE(*hw_p));
1842 	*hw_p = *here.hw_next;
1843 }
1844 
1845 /* how many of the uframe's 125 usecs are allocated? */
1846 static unsigned short periodic_usecs(struct oxu_hcd *oxu,
1847 					unsigned frame, unsigned uframe)
1848 {
1849 	__le32 *hw_p = &oxu->periodic[frame];
1850 	union ehci_shadow *q = &oxu->pshadow[frame];
1851 	unsigned usecs = 0;
1852 
1853 	while (q->ptr) {
1854 		switch (Q_NEXT_TYPE(*hw_p)) {
1855 		case Q_TYPE_QH:
1856 		default:
1857 			/* is it in the S-mask? */
1858 			if (q->qh->hw_info2 & cpu_to_le32(1 << uframe))
1859 				usecs += q->qh->usecs;
1860 			/* ... or C-mask? */
1861 			if (q->qh->hw_info2 & cpu_to_le32(1 << (8 + uframe)))
1862 				usecs += q->qh->c_usecs;
1863 			hw_p = &q->qh->hw_next;
1864 			q = &q->qh->qh_next;
1865 			break;
1866 		}
1867 	}
1868 #ifdef DEBUG
1869 	if (usecs > 100)
1870 		oxu_err(oxu, "uframe %d sched overrun: %d usecs\n",
1871 						frame * 8 + uframe, usecs);
1872 #endif
1873 	return usecs;
1874 }
1875 
1876 static int enable_periodic(struct oxu_hcd *oxu)
1877 {
1878 	u32 cmd;
1879 	int status;
1880 
1881 	/* did clearing PSE did take effect yet?
1882 	 * takes effect only at frame boundaries...
1883 	 */
1884 	status = handshake(oxu, &oxu->regs->status, STS_PSS, 0, 9 * 125);
1885 	if (status != 0) {
1886 		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
1887 		usb_hc_died(oxu_to_hcd(oxu));
1888 		return status;
1889 	}
1890 
1891 	cmd = readl(&oxu->regs->command) | CMD_PSE;
1892 	writel(cmd, &oxu->regs->command);
1893 	/* posted write ... PSS happens later */
1894 	oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
1895 
1896 	/* make sure ehci_work scans these */
1897 	oxu->next_uframe = readl(&oxu->regs->frame_index)
1898 		% (oxu->periodic_size << 3);
1899 	return 0;
1900 }
1901 
1902 static int disable_periodic(struct oxu_hcd *oxu)
1903 {
1904 	u32 cmd;
1905 	int status;
1906 
1907 	/* did setting PSE not take effect yet?
1908 	 * takes effect only at frame boundaries...
1909 	 */
1910 	status = handshake(oxu, &oxu->regs->status, STS_PSS, STS_PSS, 9 * 125);
1911 	if (status != 0) {
1912 		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
1913 		usb_hc_died(oxu_to_hcd(oxu));
1914 		return status;
1915 	}
1916 
1917 	cmd = readl(&oxu->regs->command) & ~CMD_PSE;
1918 	writel(cmd, &oxu->regs->command);
1919 	/* posted write ... */
1920 
1921 	oxu->next_uframe = -1;
1922 	return 0;
1923 }
1924 
1925 /* periodic schedule slots have iso tds (normal or split) first, then a
1926  * sparse tree for active interrupt transfers.
1927  *
1928  * this just links in a qh; caller guarantees uframe masks are set right.
1929  * no FSTN support (yet; oxu 0.96+)
1930  */
1931 static int qh_link_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
1932 {
1933 	unsigned i;
1934 	unsigned period = qh->period;
1935 
1936 	dev_dbg(&qh->dev->dev,
1937 		"link qh%d-%04x/%p start %d [%d/%d us]\n",
1938 		period, le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
1939 		qh, qh->start, qh->usecs, qh->c_usecs);
1940 
1941 	/* high bandwidth, or otherwise every microframe */
1942 	if (period == 0)
1943 		period = 1;
1944 
1945 	for (i = qh->start; i < oxu->periodic_size; i += period) {
1946 		union ehci_shadow	*prev = &oxu->pshadow[i];
1947 		__le32			*hw_p = &oxu->periodic[i];
1948 		union ehci_shadow	here = *prev;
1949 		__le32			type = 0;
1950 
1951 		/* skip the iso nodes at list head */
1952 		while (here.ptr) {
1953 			type = Q_NEXT_TYPE(*hw_p);
1954 			if (type == Q_TYPE_QH)
1955 				break;
1956 			prev = periodic_next_shadow(prev, type);
1957 			hw_p = &here.qh->hw_next;
1958 			here = *prev;
1959 		}
1960 
1961 		/* sorting each branch by period (slow-->fast)
1962 		 * enables sharing interior tree nodes
1963 		 */
1964 		while (here.ptr && qh != here.qh) {
1965 			if (qh->period > here.qh->period)
1966 				break;
1967 			prev = &here.qh->qh_next;
1968 			hw_p = &here.qh->hw_next;
1969 			here = *prev;
1970 		}
1971 		/* link in this qh, unless some earlier pass did that */
1972 		if (qh != here.qh) {
1973 			qh->qh_next = here;
1974 			if (here.qh)
1975 				qh->hw_next = *hw_p;
1976 			wmb();
1977 			prev->qh = qh;
1978 			*hw_p = QH_NEXT(qh->qh_dma);
1979 		}
1980 	}
1981 	qh->qh_state = QH_STATE_LINKED;
1982 	qh_get(qh);
1983 
1984 	/* update per-qh bandwidth for usbfs */
1985 	oxu_to_hcd(oxu)->self.bandwidth_allocated += qh->period
1986 		? ((qh->usecs + qh->c_usecs) / qh->period)
1987 		: (qh->usecs * 8);
1988 
1989 	/* maybe enable periodic schedule processing */
1990 	if (!oxu->periodic_sched++)
1991 		return enable_periodic(oxu);
1992 
1993 	return 0;
1994 }
1995 
1996 static void qh_unlink_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
1997 {
1998 	unsigned i;
1999 	unsigned period;
2000 
2001 	/* FIXME:
2002 	 *   IF this isn't high speed
2003 	 *   and this qh is active in the current uframe
2004 	 *   (and overlay token SplitXstate is false?)
2005 	 * THEN
2006 	 *   qh->hw_info1 |= cpu_to_le32(1 << 7 "ignore");
2007 	 */
2008 
2009 	/* high bandwidth, or otherwise part of every microframe */
2010 	period = qh->period;
2011 	if (period == 0)
2012 		period = 1;
2013 
2014 	for (i = qh->start; i < oxu->periodic_size; i += period)
2015 		periodic_unlink(oxu, i, qh);
2016 
2017 	/* update per-qh bandwidth for usbfs */
2018 	oxu_to_hcd(oxu)->self.bandwidth_allocated -= qh->period
2019 		? ((qh->usecs + qh->c_usecs) / qh->period)
2020 		: (qh->usecs * 8);
2021 
2022 	dev_dbg(&qh->dev->dev,
2023 		"unlink qh%d-%04x/%p start %d [%d/%d us]\n",
2024 		qh->period,
2025 		le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
2026 		qh, qh->start, qh->usecs, qh->c_usecs);
2027 
2028 	/* qh->qh_next still "live" to HC */
2029 	qh->qh_state = QH_STATE_UNLINK;
2030 	qh->qh_next.ptr = NULL;
2031 	qh_put(qh);
2032 
2033 	/* maybe turn off periodic schedule */
2034 	oxu->periodic_sched--;
2035 	if (!oxu->periodic_sched)
2036 		(void) disable_periodic(oxu);
2037 }
2038 
2039 static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2040 {
2041 	unsigned wait;
2042 
2043 	qh_unlink_periodic(oxu, qh);
2044 
2045 	/* simple/paranoid:  always delay, expecting the HC needs to read
2046 	 * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
2047 	 * expect hub_wq to clean up after any CSPLITs we won't issue.
2048 	 * active high speed queues may need bigger delays...
2049 	 */
2050 	if (list_empty(&qh->qtd_list)
2051 		|| (cpu_to_le32(QH_CMASK) & qh->hw_info2) != 0)
2052 		wait = 2;
2053 	else
2054 		wait = 55;	/* worst case: 3 * 1024 */
2055 
2056 	udelay(wait);
2057 	qh->qh_state = QH_STATE_IDLE;
2058 	qh->hw_next = EHCI_LIST_END;
2059 	wmb();
2060 }
2061 
2062 static int check_period(struct oxu_hcd *oxu,
2063 			unsigned frame, unsigned uframe,
2064 			unsigned period, unsigned usecs)
2065 {
2066 	int claimed;
2067 
2068 	/* complete split running into next frame?
2069 	 * given FSTN support, we could sometimes check...
2070 	 */
2071 	if (uframe >= 8)
2072 		return 0;
2073 
2074 	/*
2075 	 * 80% periodic == 100 usec/uframe available
2076 	 * convert "usecs we need" to "max already claimed"
2077 	 */
2078 	usecs = 100 - usecs;
2079 
2080 	/* we "know" 2 and 4 uframe intervals were rejected; so
2081 	 * for period 0, check _every_ microframe in the schedule.
2082 	 */
2083 	if (unlikely(period == 0)) {
2084 		do {
2085 			for (uframe = 0; uframe < 7; uframe++) {
2086 				claimed = periodic_usecs(oxu, frame, uframe);
2087 				if (claimed > usecs)
2088 					return 0;
2089 			}
2090 		} while ((frame += 1) < oxu->periodic_size);
2091 
2092 	/* just check the specified uframe, at that period */
2093 	} else {
2094 		do {
2095 			claimed = periodic_usecs(oxu, frame, uframe);
2096 			if (claimed > usecs)
2097 				return 0;
2098 		} while ((frame += period) < oxu->periodic_size);
2099 	}
2100 
2101 	return 1;
2102 }
2103 
2104 static int check_intr_schedule(struct oxu_hcd	*oxu,
2105 				unsigned frame, unsigned uframe,
2106 				const struct ehci_qh *qh, __le32 *c_maskp)
2107 {
2108 	int retval = -ENOSPC;
2109 
2110 	if (qh->c_usecs && uframe >= 6)		/* FSTN territory? */
2111 		goto done;
2112 
2113 	if (!check_period(oxu, frame, uframe, qh->period, qh->usecs))
2114 		goto done;
2115 	if (!qh->c_usecs) {
2116 		retval = 0;
2117 		*c_maskp = 0;
2118 		goto done;
2119 	}
2120 
2121 done:
2122 	return retval;
2123 }
2124 
2125 /* "first fit" scheduling policy used the first time through,
2126  * or when the previous schedule slot can't be re-used.
2127  */
2128 static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2129 {
2130 	int		status;
2131 	unsigned	uframe;
2132 	__le32		c_mask;
2133 	unsigned	frame;		/* 0..(qh->period - 1), or NO_FRAME */
2134 
2135 	qh_refresh(oxu, qh);
2136 	qh->hw_next = EHCI_LIST_END;
2137 	frame = qh->start;
2138 
2139 	/* reuse the previous schedule slots, if we can */
2140 	if (frame < qh->period) {
2141 		uframe = ffs(le32_to_cpup(&qh->hw_info2) & QH_SMASK);
2142 		status = check_intr_schedule(oxu, frame, --uframe,
2143 				qh, &c_mask);
2144 	} else {
2145 		uframe = 0;
2146 		c_mask = 0;
2147 		status = -ENOSPC;
2148 	}
2149 
2150 	/* else scan the schedule to find a group of slots such that all
2151 	 * uframes have enough periodic bandwidth available.
2152 	 */
2153 	if (status) {
2154 		/* "normal" case, uframing flexible except with splits */
2155 		if (qh->period) {
2156 			frame = qh->period - 1;
2157 			do {
2158 				for (uframe = 0; uframe < 8; uframe++) {
2159 					status = check_intr_schedule(oxu,
2160 							frame, uframe, qh,
2161 							&c_mask);
2162 					if (status == 0)
2163 						break;
2164 				}
2165 			} while (status && frame--);
2166 
2167 		/* qh->period == 0 means every uframe */
2168 		} else {
2169 			frame = 0;
2170 			status = check_intr_schedule(oxu, 0, 0, qh, &c_mask);
2171 		}
2172 		if (status)
2173 			goto done;
2174 		qh->start = frame;
2175 
2176 		/* reset S-frame and (maybe) C-frame masks */
2177 		qh->hw_info2 &= cpu_to_le32(~(QH_CMASK | QH_SMASK));
2178 		qh->hw_info2 |= qh->period
2179 			? cpu_to_le32(1 << uframe)
2180 			: cpu_to_le32(QH_SMASK);
2181 		qh->hw_info2 |= c_mask;
2182 	} else
2183 		oxu_dbg(oxu, "reused qh %p schedule\n", qh);
2184 
2185 	/* stuff into the periodic schedule */
2186 	status = qh_link_periodic(oxu, qh);
2187 done:
2188 	return status;
2189 }
2190 
2191 static int intr_submit(struct oxu_hcd *oxu, struct urb *urb,
2192 			struct list_head *qtd_list, gfp_t mem_flags)
2193 {
2194 	unsigned epnum;
2195 	unsigned long flags;
2196 	struct ehci_qh *qh;
2197 	int status = 0;
2198 	struct list_head	empty;
2199 
2200 	/* get endpoint and transfer/schedule data */
2201 	epnum = urb->ep->desc.bEndpointAddress;
2202 
2203 	spin_lock_irqsave(&oxu->lock, flags);
2204 
2205 	if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu)))) {
2206 		status = -ESHUTDOWN;
2207 		goto done;
2208 	}
2209 
2210 	/* get qh and force any scheduling errors */
2211 	INIT_LIST_HEAD(&empty);
2212 	qh = qh_append_tds(oxu, urb, &empty, epnum, &urb->ep->hcpriv);
2213 	if (qh == NULL) {
2214 		status = -ENOMEM;
2215 		goto done;
2216 	}
2217 	if (qh->qh_state == QH_STATE_IDLE) {
2218 		status = qh_schedule(oxu, qh);
2219 		if (status != 0)
2220 			goto done;
2221 	}
2222 
2223 	/* then queue the urb's tds to the qh */
2224 	qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
2225 	BUG_ON(qh == NULL);
2226 
2227 	/* ... update usbfs periodic stats */
2228 	oxu_to_hcd(oxu)->self.bandwidth_int_reqs++;
2229 
2230 done:
2231 	spin_unlock_irqrestore(&oxu->lock, flags);
2232 	if (status)
2233 		qtd_list_free(oxu, urb, qtd_list);
2234 
2235 	return status;
2236 }
2237 
2238 static inline int itd_submit(struct oxu_hcd *oxu, struct urb *urb,
2239 						gfp_t mem_flags)
2240 {
2241 	oxu_dbg(oxu, "iso support is missing!\n");
2242 	return -ENOSYS;
2243 }
2244 
2245 static inline int sitd_submit(struct oxu_hcd *oxu, struct urb *urb,
2246 						gfp_t mem_flags)
2247 {
2248 	oxu_dbg(oxu, "split iso support is missing!\n");
2249 	return -ENOSYS;
2250 }
2251 
2252 static void scan_periodic(struct oxu_hcd *oxu)
2253 {
2254 	unsigned frame, clock, now_uframe, mod;
2255 	unsigned modified;
2256 
2257 	mod = oxu->periodic_size << 3;
2258 
2259 	/*
2260 	 * When running, scan from last scan point up to "now"
2261 	 * else clean up by scanning everything that's left.
2262 	 * Touches as few pages as possible:  cache-friendly.
2263 	 */
2264 	now_uframe = oxu->next_uframe;
2265 	if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2266 		clock = readl(&oxu->regs->frame_index);
2267 	else
2268 		clock = now_uframe + mod - 1;
2269 	clock %= mod;
2270 
2271 	for (;;) {
2272 		union ehci_shadow	q, *q_p;
2273 		__le32			type, *hw_p;
2274 		unsigned		uframes;
2275 
2276 		/* don't scan past the live uframe */
2277 		frame = now_uframe >> 3;
2278 		if (frame == (clock >> 3))
2279 			uframes = now_uframe & 0x07;
2280 		else {
2281 			/* safe to scan the whole frame at once */
2282 			now_uframe |= 0x07;
2283 			uframes = 8;
2284 		}
2285 
2286 restart:
2287 		/* scan each element in frame's queue for completions */
2288 		q_p = &oxu->pshadow[frame];
2289 		hw_p = &oxu->periodic[frame];
2290 		q.ptr = q_p->ptr;
2291 		type = Q_NEXT_TYPE(*hw_p);
2292 		modified = 0;
2293 
2294 		while (q.ptr != NULL) {
2295 			union ehci_shadow temp;
2296 			int live;
2297 
2298 			live = HC_IS_RUNNING(oxu_to_hcd(oxu)->state);
2299 			switch (type) {
2300 			case Q_TYPE_QH:
2301 				/* handle any completions */
2302 				temp.qh = qh_get(q.qh);
2303 				type = Q_NEXT_TYPE(q.qh->hw_next);
2304 				q = q.qh->qh_next;
2305 				modified = qh_completions(oxu, temp.qh);
2306 				if (unlikely(list_empty(&temp.qh->qtd_list)))
2307 					intr_deschedule(oxu, temp.qh);
2308 				qh_put(temp.qh);
2309 				break;
2310 			default:
2311 				oxu_dbg(oxu, "corrupt type %d frame %d shadow %p\n",
2312 					type, frame, q.ptr);
2313 				q.ptr = NULL;
2314 			}
2315 
2316 			/* assume completion callbacks modify the queue */
2317 			if (unlikely(modified))
2318 				goto restart;
2319 		}
2320 
2321 		/* Stop when we catch up to the HC */
2322 
2323 		/* FIXME:  this assumes we won't get lapped when
2324 		 * latencies climb; that should be rare, but...
2325 		 * detect it, and just go all the way around.
2326 		 * FLR might help detect this case, so long as latencies
2327 		 * don't exceed periodic_size msec (default 1.024 sec).
2328 		 */
2329 
2330 		/* FIXME: likewise assumes HC doesn't halt mid-scan */
2331 
2332 		if (now_uframe == clock) {
2333 			unsigned	now;
2334 
2335 			if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2336 				break;
2337 			oxu->next_uframe = now_uframe;
2338 			now = readl(&oxu->regs->frame_index) % mod;
2339 			if (now_uframe == now)
2340 				break;
2341 
2342 			/* rescan the rest of this frame, then ... */
2343 			clock = now;
2344 		} else {
2345 			now_uframe++;
2346 			now_uframe %= mod;
2347 		}
2348 	}
2349 }
2350 
2351 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
2352  * The firmware seems to think that powering off is a wakeup event!
2353  * This routine turns off remote wakeup and everything else, on all ports.
2354  */
2355 static void ehci_turn_off_all_ports(struct oxu_hcd *oxu)
2356 {
2357 	int port = HCS_N_PORTS(oxu->hcs_params);
2358 
2359 	while (port--)
2360 		writel(PORT_RWC_BITS, &oxu->regs->port_status[port]);
2361 }
2362 
2363 static void ehci_port_power(struct oxu_hcd *oxu, int is_on)
2364 {
2365 	unsigned port;
2366 
2367 	if (!HCS_PPC(oxu->hcs_params))
2368 		return;
2369 
2370 	oxu_dbg(oxu, "...power%s ports...\n", is_on ? "up" : "down");
2371 	for (port = HCS_N_PORTS(oxu->hcs_params); port > 0; )
2372 		(void) oxu_hub_control(oxu_to_hcd(oxu),
2373 				is_on ? SetPortFeature : ClearPortFeature,
2374 				USB_PORT_FEAT_POWER,
2375 				port--, NULL, 0);
2376 	msleep(20);
2377 }
2378 
2379 /* Called from some interrupts, timers, and so on.
2380  * It calls driver completion functions, after dropping oxu->lock.
2381  */
2382 static void ehci_work(struct oxu_hcd *oxu)
2383 {
2384 	timer_action_done(oxu, TIMER_IO_WATCHDOG);
2385 	if (oxu->reclaim_ready)
2386 		end_unlink_async(oxu);
2387 
2388 	/* another CPU may drop oxu->lock during a schedule scan while
2389 	 * it reports urb completions.  this flag guards against bogus
2390 	 * attempts at re-entrant schedule scanning.
2391 	 */
2392 	if (oxu->scanning)
2393 		return;
2394 	oxu->scanning = 1;
2395 	scan_async(oxu);
2396 	if (oxu->next_uframe != -1)
2397 		scan_periodic(oxu);
2398 	oxu->scanning = 0;
2399 
2400 	/* the IO watchdog guards against hardware or driver bugs that
2401 	 * misplace IRQs, and should let us run completely without IRQs.
2402 	 * such lossage has been observed on both VT6202 and VT8235.
2403 	 */
2404 	if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state) &&
2405 			(oxu->async->qh_next.ptr != NULL ||
2406 			 oxu->periodic_sched != 0))
2407 		timer_action(oxu, TIMER_IO_WATCHDOG);
2408 }
2409 
2410 static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
2411 {
2412 	/* if we need to use IAA and it's busy, defer */
2413 	if (qh->qh_state == QH_STATE_LINKED
2414 			&& oxu->reclaim
2415 			&& HC_IS_RUNNING(oxu_to_hcd(oxu)->state)) {
2416 		struct ehci_qh		*last;
2417 
2418 		for (last = oxu->reclaim;
2419 				last->reclaim;
2420 				last = last->reclaim)
2421 			continue;
2422 		qh->qh_state = QH_STATE_UNLINK_WAIT;
2423 		last->reclaim = qh;
2424 
2425 	/* bypass IAA if the hc can't care */
2426 	} else if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state) && oxu->reclaim)
2427 		end_unlink_async(oxu);
2428 
2429 	/* something else might have unlinked the qh by now */
2430 	if (qh->qh_state == QH_STATE_LINKED)
2431 		start_unlink_async(oxu, qh);
2432 }
2433 
2434 /*
2435  * USB host controller methods
2436  */
2437 
2438 static irqreturn_t oxu210_hcd_irq(struct usb_hcd *hcd)
2439 {
2440 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2441 	u32 status, pcd_status = 0;
2442 	int bh;
2443 
2444 	spin_lock(&oxu->lock);
2445 
2446 	status = readl(&oxu->regs->status);
2447 
2448 	/* e.g. cardbus physical eject */
2449 	if (status == ~(u32) 0) {
2450 		oxu_dbg(oxu, "device removed\n");
2451 		goto dead;
2452 	}
2453 
2454 	/* Shared IRQ? */
2455 	status &= INTR_MASK;
2456 	if (!status || unlikely(hcd->state == HC_STATE_HALT)) {
2457 		spin_unlock(&oxu->lock);
2458 		return IRQ_NONE;
2459 	}
2460 
2461 	/* clear (just) interrupts */
2462 	writel(status, &oxu->regs->status);
2463 	readl(&oxu->regs->command);	/* unblock posted write */
2464 	bh = 0;
2465 
2466 #ifdef OXU_VERBOSE_DEBUG
2467 	/* unrequested/ignored: Frame List Rollover */
2468 	dbg_status(oxu, "irq", status);
2469 #endif
2470 
2471 	/* INT, ERR, and IAA interrupt rates can be throttled */
2472 
2473 	/* normal [4.15.1.2] or error [4.15.1.1] completion */
2474 	if (likely((status & (STS_INT|STS_ERR)) != 0))
2475 		bh = 1;
2476 
2477 	/* complete the unlinking of some qh [4.15.2.3] */
2478 	if (status & STS_IAA) {
2479 		oxu->reclaim_ready = 1;
2480 		bh = 1;
2481 	}
2482 
2483 	/* remote wakeup [4.3.1] */
2484 	if (status & STS_PCD) {
2485 		unsigned i = HCS_N_PORTS(oxu->hcs_params);
2486 		pcd_status = status;
2487 
2488 		/* resume root hub? */
2489 		if (!(readl(&oxu->regs->command) & CMD_RUN))
2490 			usb_hcd_resume_root_hub(hcd);
2491 
2492 		while (i--) {
2493 			int pstatus = readl(&oxu->regs->port_status[i]);
2494 
2495 			if (pstatus & PORT_OWNER)
2496 				continue;
2497 			if (!(pstatus & PORT_RESUME)
2498 					|| oxu->reset_done[i] != 0)
2499 				continue;
2500 
2501 			/* start USB_RESUME_TIMEOUT resume signaling from this
2502 			 * port, and make hub_wq collect PORT_STAT_C_SUSPEND to
2503 			 * stop that signaling.
2504 			 */
2505 			oxu->reset_done[i] = jiffies +
2506 				msecs_to_jiffies(USB_RESUME_TIMEOUT);
2507 			oxu_dbg(oxu, "port %d remote wakeup\n", i + 1);
2508 			mod_timer(&hcd->rh_timer, oxu->reset_done[i]);
2509 		}
2510 	}
2511 
2512 	/* PCI errors [4.15.2.4] */
2513 	if (unlikely((status & STS_FATAL) != 0)) {
2514 		/* bogus "fatal" IRQs appear on some chips... why?  */
2515 		status = readl(&oxu->regs->status);
2516 		dbg_cmd(oxu, "fatal", readl(&oxu->regs->command));
2517 		dbg_status(oxu, "fatal", status);
2518 		if (status & STS_HALT) {
2519 			oxu_err(oxu, "fatal error\n");
2520 dead:
2521 			ehci_reset(oxu);
2522 			writel(0, &oxu->regs->configured_flag);
2523 			usb_hc_died(hcd);
2524 			/* generic layer kills/unlinks all urbs, then
2525 			 * uses oxu_stop to clean up the rest
2526 			 */
2527 			bh = 1;
2528 		}
2529 	}
2530 
2531 	if (bh)
2532 		ehci_work(oxu);
2533 	spin_unlock(&oxu->lock);
2534 	if (pcd_status & STS_PCD)
2535 		usb_hcd_poll_rh_status(hcd);
2536 	return IRQ_HANDLED;
2537 }
2538 
2539 static irqreturn_t oxu_irq(struct usb_hcd *hcd)
2540 {
2541 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2542 	int ret = IRQ_HANDLED;
2543 
2544 	u32 status = oxu_readl(hcd->regs, OXU_CHIPIRQSTATUS);
2545 	u32 enable = oxu_readl(hcd->regs, OXU_CHIPIRQEN_SET);
2546 
2547 	/* Disable all interrupt */
2548 	oxu_writel(hcd->regs, OXU_CHIPIRQEN_CLR, enable);
2549 
2550 	if ((oxu->is_otg && (status & OXU_USBOTGI)) ||
2551 		(!oxu->is_otg && (status & OXU_USBSPHI)))
2552 		oxu210_hcd_irq(hcd);
2553 	else
2554 		ret = IRQ_NONE;
2555 
2556 	/* Enable all interrupt back */
2557 	oxu_writel(hcd->regs, OXU_CHIPIRQEN_SET, enable);
2558 
2559 	return ret;
2560 }
2561 
2562 static void oxu_watchdog(unsigned long param)
2563 {
2564 	struct oxu_hcd	*oxu = (struct oxu_hcd *) param;
2565 	unsigned long flags;
2566 
2567 	spin_lock_irqsave(&oxu->lock, flags);
2568 
2569 	/* lost IAA irqs wedge things badly; seen with a vt8235 */
2570 	if (oxu->reclaim) {
2571 		u32 status = readl(&oxu->regs->status);
2572 		if (status & STS_IAA) {
2573 			oxu_vdbg(oxu, "lost IAA\n");
2574 			writel(STS_IAA, &oxu->regs->status);
2575 			oxu->reclaim_ready = 1;
2576 		}
2577 	}
2578 
2579 	/* stop async processing after it's idled a bit */
2580 	if (test_bit(TIMER_ASYNC_OFF, &oxu->actions))
2581 		start_unlink_async(oxu, oxu->async);
2582 
2583 	/* oxu could run by timer, without IRQs ... */
2584 	ehci_work(oxu);
2585 
2586 	spin_unlock_irqrestore(&oxu->lock, flags);
2587 }
2588 
2589 /* One-time init, only for memory state.
2590  */
2591 static int oxu_hcd_init(struct usb_hcd *hcd)
2592 {
2593 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2594 	u32 temp;
2595 	int retval;
2596 	u32 hcc_params;
2597 
2598 	spin_lock_init(&oxu->lock);
2599 
2600 	setup_timer(&oxu->watchdog, oxu_watchdog, (unsigned long)oxu);
2601 
2602 	/*
2603 	 * hw default: 1K periodic list heads, one per frame.
2604 	 * periodic_size can shrink by USBCMD update if hcc_params allows.
2605 	 */
2606 	oxu->periodic_size = DEFAULT_I_TDPS;
2607 	retval = ehci_mem_init(oxu, GFP_KERNEL);
2608 	if (retval < 0)
2609 		return retval;
2610 
2611 	/* controllers may cache some of the periodic schedule ... */
2612 	hcc_params = readl(&oxu->caps->hcc_params);
2613 	if (HCC_ISOC_CACHE(hcc_params))		/* full frame cache */
2614 		oxu->i_thresh = 8;
2615 	else					/* N microframes cached */
2616 		oxu->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
2617 
2618 	oxu->reclaim = NULL;
2619 	oxu->reclaim_ready = 0;
2620 	oxu->next_uframe = -1;
2621 
2622 	/*
2623 	 * dedicate a qh for the async ring head, since we couldn't unlink
2624 	 * a 'real' qh without stopping the async schedule [4.8].  use it
2625 	 * as the 'reclamation list head' too.
2626 	 * its dummy is used in hw_alt_next of many tds, to prevent the qh
2627 	 * from automatically advancing to the next td after short reads.
2628 	 */
2629 	oxu->async->qh_next.qh = NULL;
2630 	oxu->async->hw_next = QH_NEXT(oxu->async->qh_dma);
2631 	oxu->async->hw_info1 = cpu_to_le32(QH_HEAD);
2632 	oxu->async->hw_token = cpu_to_le32(QTD_STS_HALT);
2633 	oxu->async->hw_qtd_next = EHCI_LIST_END;
2634 	oxu->async->qh_state = QH_STATE_LINKED;
2635 	oxu->async->hw_alt_next = QTD_NEXT(oxu->async->dummy->qtd_dma);
2636 
2637 	/* clear interrupt enables, set irq latency */
2638 	if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
2639 		log2_irq_thresh = 0;
2640 	temp = 1 << (16 + log2_irq_thresh);
2641 	if (HCC_CANPARK(hcc_params)) {
2642 		/* HW default park == 3, on hardware that supports it (like
2643 		 * NVidia and ALI silicon), maximizes throughput on the async
2644 		 * schedule by avoiding QH fetches between transfers.
2645 		 *
2646 		 * With fast usb storage devices and NForce2, "park" seems to
2647 		 * make problems:  throughput reduction (!), data errors...
2648 		 */
2649 		if (park) {
2650 			park = min(park, (unsigned) 3);
2651 			temp |= CMD_PARK;
2652 			temp |= park << 8;
2653 		}
2654 		oxu_dbg(oxu, "park %d\n", park);
2655 	}
2656 	if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
2657 		/* periodic schedule size can be smaller than default */
2658 		temp &= ~(3 << 2);
2659 		temp |= (EHCI_TUNE_FLS << 2);
2660 	}
2661 	oxu->command = temp;
2662 
2663 	return 0;
2664 }
2665 
2666 /* Called during probe() after chip reset completes.
2667  */
2668 static int oxu_reset(struct usb_hcd *hcd)
2669 {
2670 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2671 
2672 	spin_lock_init(&oxu->mem_lock);
2673 	INIT_LIST_HEAD(&oxu->urb_list);
2674 	oxu->urb_len = 0;
2675 
2676 	/* FIMXE */
2677 	hcd->self.controller->dma_mask = NULL;
2678 
2679 	if (oxu->is_otg) {
2680 		oxu->caps = hcd->regs + OXU_OTG_CAP_OFFSET;
2681 		oxu->regs = hcd->regs + OXU_OTG_CAP_OFFSET + \
2682 			HC_LENGTH(readl(&oxu->caps->hc_capbase));
2683 
2684 		oxu->mem = hcd->regs + OXU_SPH_MEM;
2685 	} else {
2686 		oxu->caps = hcd->regs + OXU_SPH_CAP_OFFSET;
2687 		oxu->regs = hcd->regs + OXU_SPH_CAP_OFFSET + \
2688 			HC_LENGTH(readl(&oxu->caps->hc_capbase));
2689 
2690 		oxu->mem = hcd->regs + OXU_OTG_MEM;
2691 	}
2692 
2693 	oxu->hcs_params = readl(&oxu->caps->hcs_params);
2694 	oxu->sbrn = 0x20;
2695 
2696 	return oxu_hcd_init(hcd);
2697 }
2698 
2699 static int oxu_run(struct usb_hcd *hcd)
2700 {
2701 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2702 	int retval;
2703 	u32 temp, hcc_params;
2704 
2705 	hcd->uses_new_polling = 1;
2706 
2707 	/* EHCI spec section 4.1 */
2708 	retval = ehci_reset(oxu);
2709 	if (retval != 0) {
2710 		ehci_mem_cleanup(oxu);
2711 		return retval;
2712 	}
2713 	writel(oxu->periodic_dma, &oxu->regs->frame_list);
2714 	writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
2715 
2716 	/* hcc_params controls whether oxu->regs->segment must (!!!)
2717 	 * be used; it constrains QH/ITD/SITD and QTD locations.
2718 	 * pci_pool consistent memory always uses segment zero.
2719 	 * streaming mappings for I/O buffers, like pci_map_single(),
2720 	 * can return segments above 4GB, if the device allows.
2721 	 *
2722 	 * NOTE:  the dma mask is visible through dev->dma_mask, so
2723 	 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
2724 	 * Scsi_Host.highmem_io, and so forth.  It's readonly to all
2725 	 * host side drivers though.
2726 	 */
2727 	hcc_params = readl(&oxu->caps->hcc_params);
2728 	if (HCC_64BIT_ADDR(hcc_params))
2729 		writel(0, &oxu->regs->segment);
2730 
2731 	oxu->command &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE |
2732 				CMD_ASE | CMD_RESET);
2733 	oxu->command |= CMD_RUN;
2734 	writel(oxu->command, &oxu->regs->command);
2735 	dbg_cmd(oxu, "init", oxu->command);
2736 
2737 	/*
2738 	 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
2739 	 * are explicitly handed to companion controller(s), so no TT is
2740 	 * involved with the root hub.  (Except where one is integrated,
2741 	 * and there's no companion controller unless maybe for USB OTG.)
2742 	 */
2743 	hcd->state = HC_STATE_RUNNING;
2744 	writel(FLAG_CF, &oxu->regs->configured_flag);
2745 	readl(&oxu->regs->command);	/* unblock posted writes */
2746 
2747 	temp = HC_VERSION(readl(&oxu->caps->hc_capbase));
2748 	oxu_info(oxu, "USB %x.%x started, quasi-EHCI %x.%02x, driver %s%s\n",
2749 		((oxu->sbrn & 0xf0)>>4), (oxu->sbrn & 0x0f),
2750 		temp >> 8, temp & 0xff, DRIVER_VERSION,
2751 		ignore_oc ? ", overcurrent ignored" : "");
2752 
2753 	writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */
2754 
2755 	return 0;
2756 }
2757 
2758 static void oxu_stop(struct usb_hcd *hcd)
2759 {
2760 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2761 
2762 	/* Turn off port power on all root hub ports. */
2763 	ehci_port_power(oxu, 0);
2764 
2765 	/* no more interrupts ... */
2766 	del_timer_sync(&oxu->watchdog);
2767 
2768 	spin_lock_irq(&oxu->lock);
2769 	if (HC_IS_RUNNING(hcd->state))
2770 		ehci_quiesce(oxu);
2771 
2772 	ehci_reset(oxu);
2773 	writel(0, &oxu->regs->intr_enable);
2774 	spin_unlock_irq(&oxu->lock);
2775 
2776 	/* let companion controllers work when we aren't */
2777 	writel(0, &oxu->regs->configured_flag);
2778 
2779 	/* root hub is shut down separately (first, when possible) */
2780 	spin_lock_irq(&oxu->lock);
2781 	if (oxu->async)
2782 		ehci_work(oxu);
2783 	spin_unlock_irq(&oxu->lock);
2784 	ehci_mem_cleanup(oxu);
2785 
2786 	dbg_status(oxu, "oxu_stop completed", readl(&oxu->regs->status));
2787 }
2788 
2789 /* Kick in for silicon on any bus (not just pci, etc).
2790  * This forcibly disables dma and IRQs, helping kexec and other cases
2791  * where the next system software may expect clean state.
2792  */
2793 static void oxu_shutdown(struct usb_hcd *hcd)
2794 {
2795 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2796 
2797 	(void) ehci_halt(oxu);
2798 	ehci_turn_off_all_ports(oxu);
2799 
2800 	/* make BIOS/etc use companion controller during reboot */
2801 	writel(0, &oxu->regs->configured_flag);
2802 
2803 	/* unblock posted writes */
2804 	readl(&oxu->regs->configured_flag);
2805 }
2806 
2807 /* Non-error returns are a promise to giveback() the urb later
2808  * we drop ownership so next owner (or urb unlink) can get it
2809  *
2810  * urb + dev is in hcd.self.controller.urb_list
2811  * we're queueing TDs onto software and hardware lists
2812  *
2813  * hcd-specific init for hcpriv hasn't been done yet
2814  *
2815  * NOTE:  control, bulk, and interrupt share the same code to append TDs
2816  * to a (possibly active) QH, and the same QH scanning code.
2817  */
2818 static int __oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
2819 				gfp_t mem_flags)
2820 {
2821 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2822 	struct list_head qtd_list;
2823 
2824 	INIT_LIST_HEAD(&qtd_list);
2825 
2826 	switch (usb_pipetype(urb->pipe)) {
2827 	case PIPE_CONTROL:
2828 	case PIPE_BULK:
2829 	default:
2830 		if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
2831 			return -ENOMEM;
2832 		return submit_async(oxu, urb, &qtd_list, mem_flags);
2833 
2834 	case PIPE_INTERRUPT:
2835 		if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
2836 			return -ENOMEM;
2837 		return intr_submit(oxu, urb, &qtd_list, mem_flags);
2838 
2839 	case PIPE_ISOCHRONOUS:
2840 		if (urb->dev->speed == USB_SPEED_HIGH)
2841 			return itd_submit(oxu, urb, mem_flags);
2842 		else
2843 			return sitd_submit(oxu, urb, mem_flags);
2844 	}
2845 }
2846 
2847 /* This function is responsible for breaking URBs with big data size
2848  * into smaller size and processing small urbs in sequence.
2849  */
2850 static int oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
2851 				gfp_t mem_flags)
2852 {
2853 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2854 	int num, rem;
2855 	int transfer_buffer_length;
2856 	void *transfer_buffer;
2857 	struct urb *murb;
2858 	int i, ret;
2859 
2860 	/* If not bulk pipe just enqueue the URB */
2861 	if (!usb_pipebulk(urb->pipe))
2862 		return __oxu_urb_enqueue(hcd, urb, mem_flags);
2863 
2864 	/* Otherwise we should verify the USB transfer buffer size! */
2865 	transfer_buffer = urb->transfer_buffer;
2866 	transfer_buffer_length = urb->transfer_buffer_length;
2867 
2868 	num = urb->transfer_buffer_length / 4096;
2869 	rem = urb->transfer_buffer_length % 4096;
2870 	if (rem != 0)
2871 		num++;
2872 
2873 	/* If URB is smaller than 4096 bytes just enqueue it! */
2874 	if (num == 1)
2875 		return __oxu_urb_enqueue(hcd, urb, mem_flags);
2876 
2877 	/* Ok, we have more job to do! :) */
2878 
2879 	for (i = 0; i < num - 1; i++) {
2880 		/* Get free micro URB poll till a free urb is received */
2881 
2882 		do {
2883 			murb = (struct urb *) oxu_murb_alloc(oxu);
2884 			if (!murb)
2885 				schedule();
2886 		} while (!murb);
2887 
2888 		/* Coping the urb */
2889 		memcpy(murb, urb, sizeof(struct urb));
2890 
2891 		murb->transfer_buffer_length = 4096;
2892 		murb->transfer_buffer = transfer_buffer + i * 4096;
2893 
2894 		/* Null pointer for the encodes that this is a micro urb */
2895 		murb->complete = NULL;
2896 
2897 		((struct oxu_murb *) murb)->main = urb;
2898 		((struct oxu_murb *) murb)->last = 0;
2899 
2900 		/* This loop is to guarantee urb to be processed when there's
2901 		 * not enough resources at a particular time by retrying.
2902 		 */
2903 		do {
2904 			ret  = __oxu_urb_enqueue(hcd, murb, mem_flags);
2905 			if (ret)
2906 				schedule();
2907 		} while (ret);
2908 	}
2909 
2910 	/* Last urb requires special handling  */
2911 
2912 	/* Get free micro URB poll till a free urb is received */
2913 	do {
2914 		murb = (struct urb *) oxu_murb_alloc(oxu);
2915 		if (!murb)
2916 			schedule();
2917 	} while (!murb);
2918 
2919 	/* Coping the urb */
2920 	memcpy(murb, urb, sizeof(struct urb));
2921 
2922 	murb->transfer_buffer_length = rem > 0 ? rem : 4096;
2923 	murb->transfer_buffer = transfer_buffer + (num - 1) * 4096;
2924 
2925 	/* Null pointer for the encodes that this is a micro urb */
2926 	murb->complete = NULL;
2927 
2928 	((struct oxu_murb *) murb)->main = urb;
2929 	((struct oxu_murb *) murb)->last = 1;
2930 
2931 	do {
2932 		ret = __oxu_urb_enqueue(hcd, murb, mem_flags);
2933 		if (ret)
2934 			schedule();
2935 	} while (ret);
2936 
2937 	return ret;
2938 }
2939 
2940 /* Remove from hardware lists.
2941  * Completions normally happen asynchronously
2942  */
2943 static int oxu_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
2944 {
2945 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2946 	struct ehci_qh *qh;
2947 	unsigned long flags;
2948 
2949 	spin_lock_irqsave(&oxu->lock, flags);
2950 	switch (usb_pipetype(urb->pipe)) {
2951 	case PIPE_CONTROL:
2952 	case PIPE_BULK:
2953 	default:
2954 		qh = (struct ehci_qh *) urb->hcpriv;
2955 		if (!qh)
2956 			break;
2957 		unlink_async(oxu, qh);
2958 		break;
2959 
2960 	case PIPE_INTERRUPT:
2961 		qh = (struct ehci_qh *) urb->hcpriv;
2962 		if (!qh)
2963 			break;
2964 		switch (qh->qh_state) {
2965 		case QH_STATE_LINKED:
2966 			intr_deschedule(oxu, qh);
2967 			/* FALL THROUGH */
2968 		case QH_STATE_IDLE:
2969 			qh_completions(oxu, qh);
2970 			break;
2971 		default:
2972 			oxu_dbg(oxu, "bogus qh %p state %d\n",
2973 					qh, qh->qh_state);
2974 			goto done;
2975 		}
2976 
2977 		/* reschedule QH iff another request is queued */
2978 		if (!list_empty(&qh->qtd_list)
2979 				&& HC_IS_RUNNING(hcd->state)) {
2980 			int status;
2981 
2982 			status = qh_schedule(oxu, qh);
2983 			spin_unlock_irqrestore(&oxu->lock, flags);
2984 
2985 			if (status != 0) {
2986 				/* shouldn't happen often, but ...
2987 				 * FIXME kill those tds' urbs
2988 				 */
2989 				dev_err(hcd->self.controller,
2990 					"can't reschedule qh %p, err %d\n", qh,
2991 					status);
2992 			}
2993 			return status;
2994 		}
2995 		break;
2996 	}
2997 done:
2998 	spin_unlock_irqrestore(&oxu->lock, flags);
2999 	return 0;
3000 }
3001 
3002 /* Bulk qh holds the data toggle */
3003 static void oxu_endpoint_disable(struct usb_hcd *hcd,
3004 					struct usb_host_endpoint *ep)
3005 {
3006 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3007 	unsigned long		flags;
3008 	struct ehci_qh		*qh, *tmp;
3009 
3010 	/* ASSERT:  any requests/urbs are being unlinked */
3011 	/* ASSERT:  nobody can be submitting urbs for this any more */
3012 
3013 rescan:
3014 	spin_lock_irqsave(&oxu->lock, flags);
3015 	qh = ep->hcpriv;
3016 	if (!qh)
3017 		goto done;
3018 
3019 	/* endpoints can be iso streams.  for now, we don't
3020 	 * accelerate iso completions ... so spin a while.
3021 	 */
3022 	if (qh->hw_info1 == 0) {
3023 		oxu_vdbg(oxu, "iso delay\n");
3024 		goto idle_timeout;
3025 	}
3026 
3027 	if (!HC_IS_RUNNING(hcd->state))
3028 		qh->qh_state = QH_STATE_IDLE;
3029 	switch (qh->qh_state) {
3030 	case QH_STATE_LINKED:
3031 		for (tmp = oxu->async->qh_next.qh;
3032 				tmp && tmp != qh;
3033 				tmp = tmp->qh_next.qh)
3034 			continue;
3035 		/* periodic qh self-unlinks on empty */
3036 		if (!tmp)
3037 			goto nogood;
3038 		unlink_async(oxu, qh);
3039 		/* FALL THROUGH */
3040 	case QH_STATE_UNLINK:		/* wait for hw to finish? */
3041 idle_timeout:
3042 		spin_unlock_irqrestore(&oxu->lock, flags);
3043 		schedule_timeout_uninterruptible(1);
3044 		goto rescan;
3045 	case QH_STATE_IDLE:		/* fully unlinked */
3046 		if (list_empty(&qh->qtd_list)) {
3047 			qh_put(qh);
3048 			break;
3049 		}
3050 		/* else FALL THROUGH */
3051 	default:
3052 nogood:
3053 		/* caller was supposed to have unlinked any requests;
3054 		 * that's not our job.  just leak this memory.
3055 		 */
3056 		oxu_err(oxu, "qh %p (#%02x) state %d%s\n",
3057 			qh, ep->desc.bEndpointAddress, qh->qh_state,
3058 			list_empty(&qh->qtd_list) ? "" : "(has tds)");
3059 		break;
3060 	}
3061 	ep->hcpriv = NULL;
3062 done:
3063 	spin_unlock_irqrestore(&oxu->lock, flags);
3064 }
3065 
3066 static int oxu_get_frame(struct usb_hcd *hcd)
3067 {
3068 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3069 
3070 	return (readl(&oxu->regs->frame_index) >> 3) %
3071 		oxu->periodic_size;
3072 }
3073 
3074 /* Build "status change" packet (one or two bytes) from HC registers */
3075 static int oxu_hub_status_data(struct usb_hcd *hcd, char *buf)
3076 {
3077 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3078 	u32 temp, mask, status = 0;
3079 	int ports, i, retval = 1;
3080 	unsigned long flags;
3081 
3082 	/* if !PM, root hub timers won't get shut down ... */
3083 	if (!HC_IS_RUNNING(hcd->state))
3084 		return 0;
3085 
3086 	/* init status to no-changes */
3087 	buf[0] = 0;
3088 	ports = HCS_N_PORTS(oxu->hcs_params);
3089 	if (ports > 7) {
3090 		buf[1] = 0;
3091 		retval++;
3092 	}
3093 
3094 	/* Some boards (mostly VIA?) report bogus overcurrent indications,
3095 	 * causing massive log spam unless we completely ignore them.  It
3096 	 * may be relevant that VIA VT8235 controllers, where PORT_POWER is
3097 	 * always set, seem to clear PORT_OCC and PORT_CSC when writing to
3098 	 * PORT_POWER; that's surprising, but maybe within-spec.
3099 	 */
3100 	if (!ignore_oc)
3101 		mask = PORT_CSC | PORT_PEC | PORT_OCC;
3102 	else
3103 		mask = PORT_CSC | PORT_PEC;
3104 
3105 	/* no hub change reports (bit 0) for now (power, ...) */
3106 
3107 	/* port N changes (bit N)? */
3108 	spin_lock_irqsave(&oxu->lock, flags);
3109 	for (i = 0; i < ports; i++) {
3110 		temp = readl(&oxu->regs->port_status[i]);
3111 
3112 		/*
3113 		 * Return status information even for ports with OWNER set.
3114 		 * Otherwise hub_wq wouldn't see the disconnect event when a
3115 		 * high-speed device is switched over to the companion
3116 		 * controller by the user.
3117 		 */
3118 
3119 		if (!(temp & PORT_CONNECT))
3120 			oxu->reset_done[i] = 0;
3121 		if ((temp & mask) != 0 || ((temp & PORT_RESUME) != 0 &&
3122 				time_after_eq(jiffies, oxu->reset_done[i]))) {
3123 			if (i < 7)
3124 				buf[0] |= 1 << (i + 1);
3125 			else
3126 				buf[1] |= 1 << (i - 7);
3127 			status = STS_PCD;
3128 		}
3129 	}
3130 	/* FIXME autosuspend idle root hubs */
3131 	spin_unlock_irqrestore(&oxu->lock, flags);
3132 	return status ? retval : 0;
3133 }
3134 
3135 /* Returns the speed of a device attached to a port on the root hub. */
3136 static inline unsigned int oxu_port_speed(struct oxu_hcd *oxu,
3137 						unsigned int portsc)
3138 {
3139 	switch ((portsc >> 26) & 3) {
3140 	case 0:
3141 		return 0;
3142 	case 1:
3143 		return USB_PORT_STAT_LOW_SPEED;
3144 	case 2:
3145 	default:
3146 		return USB_PORT_STAT_HIGH_SPEED;
3147 	}
3148 }
3149 
3150 #define	PORT_WAKE_BITS	(PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
3151 static int oxu_hub_control(struct usb_hcd *hcd, u16 typeReq,
3152 				u16 wValue, u16 wIndex, char *buf, u16 wLength)
3153 {
3154 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3155 	int ports = HCS_N_PORTS(oxu->hcs_params);
3156 	u32 __iomem *status_reg = &oxu->regs->port_status[wIndex - 1];
3157 	u32 temp, status;
3158 	unsigned long	flags;
3159 	int retval = 0;
3160 	unsigned selector;
3161 
3162 	/*
3163 	 * FIXME:  support SetPortFeatures USB_PORT_FEAT_INDICATOR.
3164 	 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
3165 	 * (track current state ourselves) ... blink for diagnostics,
3166 	 * power, "this is the one", etc.  EHCI spec supports this.
3167 	 */
3168 
3169 	spin_lock_irqsave(&oxu->lock, flags);
3170 	switch (typeReq) {
3171 	case ClearHubFeature:
3172 		switch (wValue) {
3173 		case C_HUB_LOCAL_POWER:
3174 		case C_HUB_OVER_CURRENT:
3175 			/* no hub-wide feature/status flags */
3176 			break;
3177 		default:
3178 			goto error;
3179 		}
3180 		break;
3181 	case ClearPortFeature:
3182 		if (!wIndex || wIndex > ports)
3183 			goto error;
3184 		wIndex--;
3185 		temp = readl(status_reg);
3186 
3187 		/*
3188 		 * Even if OWNER is set, so the port is owned by the
3189 		 * companion controller, hub_wq needs to be able to clear
3190 		 * the port-change status bits (especially
3191 		 * USB_PORT_STAT_C_CONNECTION).
3192 		 */
3193 
3194 		switch (wValue) {
3195 		case USB_PORT_FEAT_ENABLE:
3196 			writel(temp & ~PORT_PE, status_reg);
3197 			break;
3198 		case USB_PORT_FEAT_C_ENABLE:
3199 			writel((temp & ~PORT_RWC_BITS) | PORT_PEC, status_reg);
3200 			break;
3201 		case USB_PORT_FEAT_SUSPEND:
3202 			if (temp & PORT_RESET)
3203 				goto error;
3204 			if (temp & PORT_SUSPEND) {
3205 				if ((temp & PORT_PE) == 0)
3206 					goto error;
3207 				/* resume signaling for 20 msec */
3208 				temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
3209 				writel(temp | PORT_RESUME, status_reg);
3210 				oxu->reset_done[wIndex] = jiffies
3211 						+ msecs_to_jiffies(20);
3212 			}
3213 			break;
3214 		case USB_PORT_FEAT_C_SUSPEND:
3215 			/* we auto-clear this feature */
3216 			break;
3217 		case USB_PORT_FEAT_POWER:
3218 			if (HCS_PPC(oxu->hcs_params))
3219 				writel(temp & ~(PORT_RWC_BITS | PORT_POWER),
3220 					  status_reg);
3221 			break;
3222 		case USB_PORT_FEAT_C_CONNECTION:
3223 			writel((temp & ~PORT_RWC_BITS) | PORT_CSC, status_reg);
3224 			break;
3225 		case USB_PORT_FEAT_C_OVER_CURRENT:
3226 			writel((temp & ~PORT_RWC_BITS) | PORT_OCC, status_reg);
3227 			break;
3228 		case USB_PORT_FEAT_C_RESET:
3229 			/* GetPortStatus clears reset */
3230 			break;
3231 		default:
3232 			goto error;
3233 		}
3234 		readl(&oxu->regs->command);	/* unblock posted write */
3235 		break;
3236 	case GetHubDescriptor:
3237 		ehci_hub_descriptor(oxu, (struct usb_hub_descriptor *)
3238 			buf);
3239 		break;
3240 	case GetHubStatus:
3241 		/* no hub-wide feature/status flags */
3242 		memset(buf, 0, 4);
3243 		break;
3244 	case GetPortStatus:
3245 		if (!wIndex || wIndex > ports)
3246 			goto error;
3247 		wIndex--;
3248 		status = 0;
3249 		temp = readl(status_reg);
3250 
3251 		/* wPortChange bits */
3252 		if (temp & PORT_CSC)
3253 			status |= USB_PORT_STAT_C_CONNECTION << 16;
3254 		if (temp & PORT_PEC)
3255 			status |= USB_PORT_STAT_C_ENABLE << 16;
3256 		if ((temp & PORT_OCC) && !ignore_oc)
3257 			status |= USB_PORT_STAT_C_OVERCURRENT << 16;
3258 
3259 		/* whoever resumes must GetPortStatus to complete it!! */
3260 		if (temp & PORT_RESUME) {
3261 
3262 			/* Remote Wakeup received? */
3263 			if (!oxu->reset_done[wIndex]) {
3264 				/* resume signaling for 20 msec */
3265 				oxu->reset_done[wIndex] = jiffies
3266 						+ msecs_to_jiffies(20);
3267 				/* check the port again */
3268 				mod_timer(&oxu_to_hcd(oxu)->rh_timer,
3269 						oxu->reset_done[wIndex]);
3270 			}
3271 
3272 			/* resume completed? */
3273 			else if (time_after_eq(jiffies,
3274 					oxu->reset_done[wIndex])) {
3275 				status |= USB_PORT_STAT_C_SUSPEND << 16;
3276 				oxu->reset_done[wIndex] = 0;
3277 
3278 				/* stop resume signaling */
3279 				temp = readl(status_reg);
3280 				writel(temp & ~(PORT_RWC_BITS | PORT_RESUME),
3281 					status_reg);
3282 				retval = handshake(oxu, status_reg,
3283 					   PORT_RESUME, 0, 2000 /* 2msec */);
3284 				if (retval != 0) {
3285 					oxu_err(oxu,
3286 						"port %d resume error %d\n",
3287 						wIndex + 1, retval);
3288 					goto error;
3289 				}
3290 				temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
3291 			}
3292 		}
3293 
3294 		/* whoever resets must GetPortStatus to complete it!! */
3295 		if ((temp & PORT_RESET)
3296 				&& time_after_eq(jiffies,
3297 					oxu->reset_done[wIndex])) {
3298 			status |= USB_PORT_STAT_C_RESET << 16;
3299 			oxu->reset_done[wIndex] = 0;
3300 
3301 			/* force reset to complete */
3302 			writel(temp & ~(PORT_RWC_BITS | PORT_RESET),
3303 					status_reg);
3304 			/* REVISIT:  some hardware needs 550+ usec to clear
3305 			 * this bit; seems too long to spin routinely...
3306 			 */
3307 			retval = handshake(oxu, status_reg,
3308 					PORT_RESET, 0, 750);
3309 			if (retval != 0) {
3310 				oxu_err(oxu, "port %d reset error %d\n",
3311 					wIndex + 1, retval);
3312 				goto error;
3313 			}
3314 
3315 			/* see what we found out */
3316 			temp = check_reset_complete(oxu, wIndex, status_reg,
3317 					readl(status_reg));
3318 		}
3319 
3320 		/* transfer dedicated ports to the companion hc */
3321 		if ((temp & PORT_CONNECT) &&
3322 				test_bit(wIndex, &oxu->companion_ports)) {
3323 			temp &= ~PORT_RWC_BITS;
3324 			temp |= PORT_OWNER;
3325 			writel(temp, status_reg);
3326 			oxu_dbg(oxu, "port %d --> companion\n", wIndex + 1);
3327 			temp = readl(status_reg);
3328 		}
3329 
3330 		/*
3331 		 * Even if OWNER is set, there's no harm letting hub_wq
3332 		 * see the wPortStatus values (they should all be 0 except
3333 		 * for PORT_POWER anyway).
3334 		 */
3335 
3336 		if (temp & PORT_CONNECT) {
3337 			status |= USB_PORT_STAT_CONNECTION;
3338 			/* status may be from integrated TT */
3339 			status |= oxu_port_speed(oxu, temp);
3340 		}
3341 		if (temp & PORT_PE)
3342 			status |= USB_PORT_STAT_ENABLE;
3343 		if (temp & (PORT_SUSPEND|PORT_RESUME))
3344 			status |= USB_PORT_STAT_SUSPEND;
3345 		if (temp & PORT_OC)
3346 			status |= USB_PORT_STAT_OVERCURRENT;
3347 		if (temp & PORT_RESET)
3348 			status |= USB_PORT_STAT_RESET;
3349 		if (temp & PORT_POWER)
3350 			status |= USB_PORT_STAT_POWER;
3351 
3352 #ifndef	OXU_VERBOSE_DEBUG
3353 	if (status & ~0xffff)	/* only if wPortChange is interesting */
3354 #endif
3355 		dbg_port(oxu, "GetStatus", wIndex + 1, temp);
3356 		put_unaligned(cpu_to_le32(status), (__le32 *) buf);
3357 		break;
3358 	case SetHubFeature:
3359 		switch (wValue) {
3360 		case C_HUB_LOCAL_POWER:
3361 		case C_HUB_OVER_CURRENT:
3362 			/* no hub-wide feature/status flags */
3363 			break;
3364 		default:
3365 			goto error;
3366 		}
3367 		break;
3368 	case SetPortFeature:
3369 		selector = wIndex >> 8;
3370 		wIndex &= 0xff;
3371 		if (!wIndex || wIndex > ports)
3372 			goto error;
3373 		wIndex--;
3374 		temp = readl(status_reg);
3375 		if (temp & PORT_OWNER)
3376 			break;
3377 
3378 		temp &= ~PORT_RWC_BITS;
3379 		switch (wValue) {
3380 		case USB_PORT_FEAT_SUSPEND:
3381 			if ((temp & PORT_PE) == 0
3382 					|| (temp & PORT_RESET) != 0)
3383 				goto error;
3384 			if (device_may_wakeup(&hcd->self.root_hub->dev))
3385 				temp |= PORT_WAKE_BITS;
3386 			writel(temp | PORT_SUSPEND, status_reg);
3387 			break;
3388 		case USB_PORT_FEAT_POWER:
3389 			if (HCS_PPC(oxu->hcs_params))
3390 				writel(temp | PORT_POWER, status_reg);
3391 			break;
3392 		case USB_PORT_FEAT_RESET:
3393 			if (temp & PORT_RESUME)
3394 				goto error;
3395 			/* line status bits may report this as low speed,
3396 			 * which can be fine if this root hub has a
3397 			 * transaction translator built in.
3398 			 */
3399 			oxu_vdbg(oxu, "port %d reset\n", wIndex + 1);
3400 			temp |= PORT_RESET;
3401 			temp &= ~PORT_PE;
3402 
3403 			/*
3404 			 * caller must wait, then call GetPortStatus
3405 			 * usb 2.0 spec says 50 ms resets on root
3406 			 */
3407 			oxu->reset_done[wIndex] = jiffies
3408 					+ msecs_to_jiffies(50);
3409 			writel(temp, status_reg);
3410 			break;
3411 
3412 		/* For downstream facing ports (these):  one hub port is put
3413 		 * into test mode according to USB2 11.24.2.13, then the hub
3414 		 * must be reset (which for root hub now means rmmod+modprobe,
3415 		 * or else system reboot).  See EHCI 2.3.9 and 4.14 for info
3416 		 * about the EHCI-specific stuff.
3417 		 */
3418 		case USB_PORT_FEAT_TEST:
3419 			if (!selector || selector > 5)
3420 				goto error;
3421 			ehci_quiesce(oxu);
3422 			ehci_halt(oxu);
3423 			temp |= selector << 16;
3424 			writel(temp, status_reg);
3425 			break;
3426 
3427 		default:
3428 			goto error;
3429 		}
3430 		readl(&oxu->regs->command);	/* unblock posted writes */
3431 		break;
3432 
3433 	default:
3434 error:
3435 		/* "stall" on error */
3436 		retval = -EPIPE;
3437 	}
3438 	spin_unlock_irqrestore(&oxu->lock, flags);
3439 	return retval;
3440 }
3441 
3442 #ifdef CONFIG_PM
3443 
3444 static int oxu_bus_suspend(struct usb_hcd *hcd)
3445 {
3446 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3447 	int port;
3448 	int mask;
3449 
3450 	oxu_dbg(oxu, "suspend root hub\n");
3451 
3452 	if (time_before(jiffies, oxu->next_statechange))
3453 		msleep(5);
3454 
3455 	port = HCS_N_PORTS(oxu->hcs_params);
3456 	spin_lock_irq(&oxu->lock);
3457 
3458 	/* stop schedules, clean any completed work */
3459 	if (HC_IS_RUNNING(hcd->state)) {
3460 		ehci_quiesce(oxu);
3461 		hcd->state = HC_STATE_QUIESCING;
3462 	}
3463 	oxu->command = readl(&oxu->regs->command);
3464 	if (oxu->reclaim)
3465 		oxu->reclaim_ready = 1;
3466 	ehci_work(oxu);
3467 
3468 	/* Unlike other USB host controller types, EHCI doesn't have
3469 	 * any notion of "global" or bus-wide suspend.  The driver has
3470 	 * to manually suspend all the active unsuspended ports, and
3471 	 * then manually resume them in the bus_resume() routine.
3472 	 */
3473 	oxu->bus_suspended = 0;
3474 	while (port--) {
3475 		u32 __iomem *reg = &oxu->regs->port_status[port];
3476 		u32 t1 = readl(reg) & ~PORT_RWC_BITS;
3477 		u32 t2 = t1;
3478 
3479 		/* keep track of which ports we suspend */
3480 		if ((t1 & PORT_PE) && !(t1 & PORT_OWNER) &&
3481 				!(t1 & PORT_SUSPEND)) {
3482 			t2 |= PORT_SUSPEND;
3483 			set_bit(port, &oxu->bus_suspended);
3484 		}
3485 
3486 		/* enable remote wakeup on all ports */
3487 		if (device_may_wakeup(&hcd->self.root_hub->dev))
3488 			t2 |= PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E;
3489 		else
3490 			t2 &= ~(PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E);
3491 
3492 		if (t1 != t2) {
3493 			oxu_vdbg(oxu, "port %d, %08x -> %08x\n",
3494 				port + 1, t1, t2);
3495 			writel(t2, reg);
3496 		}
3497 	}
3498 
3499 	/* turn off now-idle HC */
3500 	del_timer_sync(&oxu->watchdog);
3501 	ehci_halt(oxu);
3502 	hcd->state = HC_STATE_SUSPENDED;
3503 
3504 	/* allow remote wakeup */
3505 	mask = INTR_MASK;
3506 	if (!device_may_wakeup(&hcd->self.root_hub->dev))
3507 		mask &= ~STS_PCD;
3508 	writel(mask, &oxu->regs->intr_enable);
3509 	readl(&oxu->regs->intr_enable);
3510 
3511 	oxu->next_statechange = jiffies + msecs_to_jiffies(10);
3512 	spin_unlock_irq(&oxu->lock);
3513 	return 0;
3514 }
3515 
3516 /* Caller has locked the root hub, and should reset/reinit on error */
3517 static int oxu_bus_resume(struct usb_hcd *hcd)
3518 {
3519 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3520 	u32 temp;
3521 	int i;
3522 
3523 	if (time_before(jiffies, oxu->next_statechange))
3524 		msleep(5);
3525 	spin_lock_irq(&oxu->lock);
3526 
3527 	/* Ideally and we've got a real resume here, and no port's power
3528 	 * was lost.  (For PCI, that means Vaux was maintained.)  But we
3529 	 * could instead be restoring a swsusp snapshot -- so that BIOS was
3530 	 * the last user of the controller, not reset/pm hardware keeping
3531 	 * state we gave to it.
3532 	 */
3533 	temp = readl(&oxu->regs->intr_enable);
3534 	oxu_dbg(oxu, "resume root hub%s\n", temp ? "" : " after power loss");
3535 
3536 	/* at least some APM implementations will try to deliver
3537 	 * IRQs right away, so delay them until we're ready.
3538 	 */
3539 	writel(0, &oxu->regs->intr_enable);
3540 
3541 	/* re-init operational registers */
3542 	writel(0, &oxu->regs->segment);
3543 	writel(oxu->periodic_dma, &oxu->regs->frame_list);
3544 	writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
3545 
3546 	/* restore CMD_RUN, framelist size, and irq threshold */
3547 	writel(oxu->command, &oxu->regs->command);
3548 
3549 	/* Some controller/firmware combinations need a delay during which
3550 	 * they set up the port statuses.  See Bugzilla #8190. */
3551 	mdelay(8);
3552 
3553 	/* manually resume the ports we suspended during bus_suspend() */
3554 	i = HCS_N_PORTS(oxu->hcs_params);
3555 	while (i--) {
3556 		temp = readl(&oxu->regs->port_status[i]);
3557 		temp &= ~(PORT_RWC_BITS
3558 			| PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E);
3559 		if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3560 			oxu->reset_done[i] = jiffies + msecs_to_jiffies(20);
3561 			temp |= PORT_RESUME;
3562 		}
3563 		writel(temp, &oxu->regs->port_status[i]);
3564 	}
3565 	i = HCS_N_PORTS(oxu->hcs_params);
3566 	mdelay(20);
3567 	while (i--) {
3568 		temp = readl(&oxu->regs->port_status[i]);
3569 		if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3570 			temp &= ~(PORT_RWC_BITS | PORT_RESUME);
3571 			writel(temp, &oxu->regs->port_status[i]);
3572 			oxu_vdbg(oxu, "resumed port %d\n", i + 1);
3573 		}
3574 	}
3575 	(void) readl(&oxu->regs->command);
3576 
3577 	/* maybe re-activate the schedule(s) */
3578 	temp = 0;
3579 	if (oxu->async->qh_next.qh)
3580 		temp |= CMD_ASE;
3581 	if (oxu->periodic_sched)
3582 		temp |= CMD_PSE;
3583 	if (temp) {
3584 		oxu->command |= temp;
3585 		writel(oxu->command, &oxu->regs->command);
3586 	}
3587 
3588 	oxu->next_statechange = jiffies + msecs_to_jiffies(5);
3589 	hcd->state = HC_STATE_RUNNING;
3590 
3591 	/* Now we can safely re-enable irqs */
3592 	writel(INTR_MASK, &oxu->regs->intr_enable);
3593 
3594 	spin_unlock_irq(&oxu->lock);
3595 	return 0;
3596 }
3597 
3598 #else
3599 
3600 static int oxu_bus_suspend(struct usb_hcd *hcd)
3601 {
3602 	return 0;
3603 }
3604 
3605 static int oxu_bus_resume(struct usb_hcd *hcd)
3606 {
3607 	return 0;
3608 }
3609 
3610 #endif	/* CONFIG_PM */
3611 
3612 static const struct hc_driver oxu_hc_driver = {
3613 	.description =		"oxu210hp_hcd",
3614 	.product_desc =		"oxu210hp HCD",
3615 	.hcd_priv_size =	sizeof(struct oxu_hcd),
3616 
3617 	/*
3618 	 * Generic hardware linkage
3619 	 */
3620 	.irq =			oxu_irq,
3621 	.flags =		HCD_MEMORY | HCD_USB2,
3622 
3623 	/*
3624 	 * Basic lifecycle operations
3625 	 */
3626 	.reset =		oxu_reset,
3627 	.start =		oxu_run,
3628 	.stop =			oxu_stop,
3629 	.shutdown =		oxu_shutdown,
3630 
3631 	/*
3632 	 * Managing i/o requests and associated device resources
3633 	 */
3634 	.urb_enqueue =		oxu_urb_enqueue,
3635 	.urb_dequeue =		oxu_urb_dequeue,
3636 	.endpoint_disable =	oxu_endpoint_disable,
3637 
3638 	/*
3639 	 * Scheduling support
3640 	 */
3641 	.get_frame_number =	oxu_get_frame,
3642 
3643 	/*
3644 	 * Root hub support
3645 	 */
3646 	.hub_status_data =	oxu_hub_status_data,
3647 	.hub_control =		oxu_hub_control,
3648 	.bus_suspend =		oxu_bus_suspend,
3649 	.bus_resume =		oxu_bus_resume,
3650 };
3651 
3652 /*
3653  * Module stuff
3654  */
3655 
3656 static void oxu_configuration(struct platform_device *pdev, void *base)
3657 {
3658 	u32 tmp;
3659 
3660 	/* Initialize top level registers.
3661 	 * First write ever
3662 	 */
3663 	oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
3664 	oxu_writel(base, OXU_SOFTRESET, OXU_SRESET);
3665 	oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
3666 
3667 	tmp = oxu_readl(base, OXU_PIOBURSTREADCTRL);
3668 	oxu_writel(base, OXU_PIOBURSTREADCTRL, tmp | 0x0040);
3669 
3670 	oxu_writel(base, OXU_ASO, OXU_SPHPOEN | OXU_OVRCCURPUPDEN |
3671 					OXU_COMPARATOR | OXU_ASO_OP);
3672 
3673 	tmp = oxu_readl(base, OXU_CLKCTRL_SET);
3674 	oxu_writel(base, OXU_CLKCTRL_SET, tmp | OXU_SYSCLKEN | OXU_USBOTGCLKEN);
3675 
3676 	/* Clear all top interrupt enable */
3677 	oxu_writel(base, OXU_CHIPIRQEN_CLR, 0xff);
3678 
3679 	/* Clear all top interrupt status */
3680 	oxu_writel(base, OXU_CHIPIRQSTATUS, 0xff);
3681 
3682 	/* Enable all needed top interrupt except OTG SPH core */
3683 	oxu_writel(base, OXU_CHIPIRQEN_SET, OXU_USBSPHLPWUI | OXU_USBOTGLPWUI);
3684 }
3685 
3686 static int oxu_verify_id(struct platform_device *pdev, void *base)
3687 {
3688 	u32 id;
3689 	static const char * const bo[] = {
3690 		"reserved",
3691 		"128-pin LQFP",
3692 		"84-pin TFBGA",
3693 		"reserved",
3694 	};
3695 
3696 	/* Read controller signature register to find a match */
3697 	id = oxu_readl(base, OXU_DEVICEID);
3698 	dev_info(&pdev->dev, "device ID %x\n", id);
3699 	if ((id & OXU_REV_MASK) != (OXU_REV_2100 << OXU_REV_SHIFT))
3700 		return -1;
3701 
3702 	dev_info(&pdev->dev, "found device %x %s (%04x:%04x)\n",
3703 		id >> OXU_REV_SHIFT,
3704 		bo[(id & OXU_BO_MASK) >> OXU_BO_SHIFT],
3705 		(id & OXU_MAJ_REV_MASK) >> OXU_MAJ_REV_SHIFT,
3706 		(id & OXU_MIN_REV_MASK) >> OXU_MIN_REV_SHIFT);
3707 
3708 	return 0;
3709 }
3710 
3711 static const struct hc_driver oxu_hc_driver;
3712 static struct usb_hcd *oxu_create(struct platform_device *pdev,
3713 				unsigned long memstart, unsigned long memlen,
3714 				void *base, int irq, int otg)
3715 {
3716 	struct device *dev = &pdev->dev;
3717 
3718 	struct usb_hcd *hcd;
3719 	struct oxu_hcd *oxu;
3720 	int ret;
3721 
3722 	/* Set endian mode and host mode */
3723 	oxu_writel(base + (otg ? OXU_OTG_CORE_OFFSET : OXU_SPH_CORE_OFFSET),
3724 				OXU_USBMODE,
3725 				OXU_CM_HOST_ONLY | OXU_ES_LITTLE | OXU_VBPS);
3726 
3727 	hcd = usb_create_hcd(&oxu_hc_driver, dev,
3728 				otg ? "oxu210hp_otg" : "oxu210hp_sph");
3729 	if (!hcd)
3730 		return ERR_PTR(-ENOMEM);
3731 
3732 	hcd->rsrc_start = memstart;
3733 	hcd->rsrc_len = memlen;
3734 	hcd->regs = base;
3735 	hcd->irq = irq;
3736 	hcd->state = HC_STATE_HALT;
3737 
3738 	oxu = hcd_to_oxu(hcd);
3739 	oxu->is_otg = otg;
3740 
3741 	ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
3742 	if (ret < 0)
3743 		return ERR_PTR(ret);
3744 
3745 	device_wakeup_enable(hcd->self.controller);
3746 	return hcd;
3747 }
3748 
3749 static int oxu_init(struct platform_device *pdev,
3750 				unsigned long memstart, unsigned long memlen,
3751 				void *base, int irq)
3752 {
3753 	struct oxu_info *info = platform_get_drvdata(pdev);
3754 	struct usb_hcd *hcd;
3755 	int ret;
3756 
3757 	/* First time configuration at start up */
3758 	oxu_configuration(pdev, base);
3759 
3760 	ret = oxu_verify_id(pdev, base);
3761 	if (ret) {
3762 		dev_err(&pdev->dev, "no devices found!\n");
3763 		return -ENODEV;
3764 	}
3765 
3766 	/* Create the OTG controller */
3767 	hcd = oxu_create(pdev, memstart, memlen, base, irq, 1);
3768 	if (IS_ERR(hcd)) {
3769 		dev_err(&pdev->dev, "cannot create OTG controller!\n");
3770 		ret = PTR_ERR(hcd);
3771 		goto error_create_otg;
3772 	}
3773 	info->hcd[0] = hcd;
3774 
3775 	/* Create the SPH host controller */
3776 	hcd = oxu_create(pdev, memstart, memlen, base, irq, 0);
3777 	if (IS_ERR(hcd)) {
3778 		dev_err(&pdev->dev, "cannot create SPH controller!\n");
3779 		ret = PTR_ERR(hcd);
3780 		goto error_create_sph;
3781 	}
3782 	info->hcd[1] = hcd;
3783 
3784 	oxu_writel(base, OXU_CHIPIRQEN_SET,
3785 		oxu_readl(base, OXU_CHIPIRQEN_SET) | 3);
3786 
3787 	return 0;
3788 
3789 error_create_sph:
3790 	usb_remove_hcd(info->hcd[0]);
3791 	usb_put_hcd(info->hcd[0]);
3792 
3793 error_create_otg:
3794 	return ret;
3795 }
3796 
3797 static int oxu_drv_probe(struct platform_device *pdev)
3798 {
3799 	struct resource *res;
3800 	void *base;
3801 	unsigned long memstart, memlen;
3802 	int irq, ret;
3803 	struct oxu_info *info;
3804 
3805 	if (usb_disabled())
3806 		return -ENODEV;
3807 
3808 	/*
3809 	 * Get the platform resources
3810 	 */
3811 	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
3812 	if (!res) {
3813 		dev_err(&pdev->dev,
3814 			"no IRQ! Check %s setup!\n", dev_name(&pdev->dev));
3815 		return -ENODEV;
3816 	}
3817 	irq = res->start;
3818 	dev_dbg(&pdev->dev, "IRQ resource %d\n", irq);
3819 
3820 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3821 	base = devm_ioremap_resource(&pdev->dev, res);
3822 	if (IS_ERR(base)) {
3823 		ret = PTR_ERR(base);
3824 		goto error;
3825 	}
3826 	memstart = res->start;
3827 	memlen = resource_size(res);
3828 
3829 	ret = irq_set_irq_type(irq, IRQF_TRIGGER_FALLING);
3830 	if (ret) {
3831 		dev_err(&pdev->dev, "error setting irq type\n");
3832 		ret = -EFAULT;
3833 		goto error;
3834 	}
3835 
3836 	/* Allocate a driver data struct to hold useful info for both
3837 	 * SPH & OTG devices
3838 	 */
3839 	info = devm_kzalloc(&pdev->dev, sizeof(struct oxu_info), GFP_KERNEL);
3840 	if (!info) {
3841 		ret = -EFAULT;
3842 		goto error;
3843 	}
3844 	platform_set_drvdata(pdev, info);
3845 
3846 	ret = oxu_init(pdev, memstart, memlen, base, irq);
3847 	if (ret < 0) {
3848 		dev_dbg(&pdev->dev, "cannot init USB devices\n");
3849 		goto error;
3850 	}
3851 
3852 	dev_info(&pdev->dev, "devices enabled and running\n");
3853 	platform_set_drvdata(pdev, info);
3854 
3855 	return 0;
3856 
3857 error:
3858 	dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), ret);
3859 	return ret;
3860 }
3861 
3862 static void oxu_remove(struct platform_device *pdev, struct usb_hcd *hcd)
3863 {
3864 	usb_remove_hcd(hcd);
3865 	usb_put_hcd(hcd);
3866 }
3867 
3868 static int oxu_drv_remove(struct platform_device *pdev)
3869 {
3870 	struct oxu_info *info = platform_get_drvdata(pdev);
3871 
3872 	oxu_remove(pdev, info->hcd[0]);
3873 	oxu_remove(pdev, info->hcd[1]);
3874 
3875 	return 0;
3876 }
3877 
3878 static void oxu_drv_shutdown(struct platform_device *pdev)
3879 {
3880 	oxu_drv_remove(pdev);
3881 }
3882 
3883 #if 0
3884 /* FIXME: TODO */
3885 static int oxu_drv_suspend(struct device *dev)
3886 {
3887 	struct platform_device *pdev = to_platform_device(dev);
3888 	struct usb_hcd *hcd = dev_get_drvdata(dev);
3889 
3890 	return 0;
3891 }
3892 
3893 static int oxu_drv_resume(struct device *dev)
3894 {
3895 	struct platform_device *pdev = to_platform_device(dev);
3896 	struct usb_hcd *hcd = dev_get_drvdata(dev);
3897 
3898 	return 0;
3899 }
3900 #else
3901 #define oxu_drv_suspend	NULL
3902 #define oxu_drv_resume	NULL
3903 #endif
3904 
3905 static struct platform_driver oxu_driver = {
3906 	.probe		= oxu_drv_probe,
3907 	.remove		= oxu_drv_remove,
3908 	.shutdown	= oxu_drv_shutdown,
3909 	.suspend	= oxu_drv_suspend,
3910 	.resume		= oxu_drv_resume,
3911 	.driver = {
3912 		.name = "oxu210hp-hcd",
3913 		.bus = &platform_bus_type
3914 	}
3915 };
3916 
3917 module_platform_driver(oxu_driver);
3918 
3919 MODULE_DESCRIPTION("Oxford OXU210HP HCD driver - ver. " DRIVER_VERSION);
3920 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
3921 MODULE_LICENSE("GPL");
3922