xref: /openbmc/linux/drivers/usb/host/oxu210hp-hcd.c (revision 4f205687)
1 /*
2  * Copyright (c) 2008 Rodolfo Giometti <giometti@linux.it>
3  * Copyright (c) 2008 Eurotech S.p.A. <info@eurtech.it>
4  *
5  * This code is *strongly* based on EHCI-HCD code by David Brownell since
6  * the chip is a quasi-EHCI compatible.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of the GNU General Public License as published by the
10  * Free Software Foundation; either version 2 of the License, or (at your
11  * option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22 
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/dmapool.h>
26 #include <linux/kernel.h>
27 #include <linux/delay.h>
28 #include <linux/ioport.h>
29 #include <linux/sched.h>
30 #include <linux/slab.h>
31 #include <linux/errno.h>
32 #include <linux/timer.h>
33 #include <linux/list.h>
34 #include <linux/interrupt.h>
35 #include <linux/usb.h>
36 #include <linux/usb/hcd.h>
37 #include <linux/moduleparam.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/io.h>
40 
41 #include <asm/irq.h>
42 #include <asm/unaligned.h>
43 
44 #include <linux/irq.h>
45 #include <linux/platform_device.h>
46 
47 #include "oxu210hp.h"
48 
49 #define DRIVER_VERSION "0.0.50"
50 
51 /*
52  * Main defines
53  */
54 
55 #define oxu_dbg(oxu, fmt, args...) \
56 		dev_dbg(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
57 #define oxu_err(oxu, fmt, args...) \
58 		dev_err(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
59 #define oxu_info(oxu, fmt, args...) \
60 		dev_info(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
61 
62 #ifdef CONFIG_DYNAMIC_DEBUG
63 #define DEBUG
64 #endif
65 
66 static inline struct usb_hcd *oxu_to_hcd(struct oxu_hcd *oxu)
67 {
68 	return container_of((void *) oxu, struct usb_hcd, hcd_priv);
69 }
70 
71 static inline struct oxu_hcd *hcd_to_oxu(struct usb_hcd *hcd)
72 {
73 	return (struct oxu_hcd *) (hcd->hcd_priv);
74 }
75 
76 /*
77  * Debug stuff
78  */
79 
80 #undef OXU_URB_TRACE
81 #undef OXU_VERBOSE_DEBUG
82 
83 #ifdef OXU_VERBOSE_DEBUG
84 #define oxu_vdbg			oxu_dbg
85 #else
86 #define oxu_vdbg(oxu, fmt, args...)	/* Nop */
87 #endif
88 
89 #ifdef DEBUG
90 
91 static int __attribute__((__unused__))
92 dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
93 {
94 	return scnprintf(buf, len, "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
95 		label, label[0] ? " " : "", status,
96 		(status & STS_ASS) ? " Async" : "",
97 		(status & STS_PSS) ? " Periodic" : "",
98 		(status & STS_RECL) ? " Recl" : "",
99 		(status & STS_HALT) ? " Halt" : "",
100 		(status & STS_IAA) ? " IAA" : "",
101 		(status & STS_FATAL) ? " FATAL" : "",
102 		(status & STS_FLR) ? " FLR" : "",
103 		(status & STS_PCD) ? " PCD" : "",
104 		(status & STS_ERR) ? " ERR" : "",
105 		(status & STS_INT) ? " INT" : ""
106 		);
107 }
108 
109 static int __attribute__((__unused__))
110 dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
111 {
112 	return scnprintf(buf, len, "%s%sintrenable %02x%s%s%s%s%s%s",
113 		label, label[0] ? " " : "", enable,
114 		(enable & STS_IAA) ? " IAA" : "",
115 		(enable & STS_FATAL) ? " FATAL" : "",
116 		(enable & STS_FLR) ? " FLR" : "",
117 		(enable & STS_PCD) ? " PCD" : "",
118 		(enable & STS_ERR) ? " ERR" : "",
119 		(enable & STS_INT) ? " INT" : ""
120 		);
121 }
122 
123 static const char *const fls_strings[] =
124     { "1024", "512", "256", "??" };
125 
126 static int dbg_command_buf(char *buf, unsigned len,
127 				const char *label, u32 command)
128 {
129 	return scnprintf(buf, len,
130 		"%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
131 		label, label[0] ? " " : "", command,
132 		(command & CMD_PARK) ? "park" : "(park)",
133 		CMD_PARK_CNT(command),
134 		(command >> 16) & 0x3f,
135 		(command & CMD_LRESET) ? " LReset" : "",
136 		(command & CMD_IAAD) ? " IAAD" : "",
137 		(command & CMD_ASE) ? " Async" : "",
138 		(command & CMD_PSE) ? " Periodic" : "",
139 		fls_strings[(command >> 2) & 0x3],
140 		(command & CMD_RESET) ? " Reset" : "",
141 		(command & CMD_RUN) ? "RUN" : "HALT"
142 		);
143 }
144 
145 static int dbg_port_buf(char *buf, unsigned len, const char *label,
146 				int port, u32 status)
147 {
148 	char	*sig;
149 
150 	/* signaling state */
151 	switch (status & (3 << 10)) {
152 	case 0 << 10:
153 		sig = "se0";
154 		break;
155 	case 1 << 10:
156 		sig = "k";	/* low speed */
157 		break;
158 	case 2 << 10:
159 		sig = "j";
160 		break;
161 	default:
162 		sig = "?";
163 		break;
164 	}
165 
166 	return scnprintf(buf, len,
167 		"%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
168 		label, label[0] ? " " : "", port, status,
169 		(status & PORT_POWER) ? " POWER" : "",
170 		(status & PORT_OWNER) ? " OWNER" : "",
171 		sig,
172 		(status & PORT_RESET) ? " RESET" : "",
173 		(status & PORT_SUSPEND) ? " SUSPEND" : "",
174 		(status & PORT_RESUME) ? " RESUME" : "",
175 		(status & PORT_OCC) ? " OCC" : "",
176 		(status & PORT_OC) ? " OC" : "",
177 		(status & PORT_PEC) ? " PEC" : "",
178 		(status & PORT_PE) ? " PE" : "",
179 		(status & PORT_CSC) ? " CSC" : "",
180 		(status & PORT_CONNECT) ? " CONNECT" : ""
181 	    );
182 }
183 
184 #else
185 
186 static inline int __attribute__((__unused__))
187 dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
188 { return 0; }
189 
190 static inline int __attribute__((__unused__))
191 dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
192 { return 0; }
193 
194 static inline int __attribute__((__unused__))
195 dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
196 { return 0; }
197 
198 static inline int __attribute__((__unused__))
199 dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
200 { return 0; }
201 
202 #endif /* DEBUG */
203 
204 /* functions have the "wrong" filename when they're output... */
205 #define dbg_status(oxu, label, status) { \
206 	char _buf[80]; \
207 	dbg_status_buf(_buf, sizeof _buf, label, status); \
208 	oxu_dbg(oxu, "%s\n", _buf); \
209 }
210 
211 #define dbg_cmd(oxu, label, command) { \
212 	char _buf[80]; \
213 	dbg_command_buf(_buf, sizeof _buf, label, command); \
214 	oxu_dbg(oxu, "%s\n", _buf); \
215 }
216 
217 #define dbg_port(oxu, label, port, status) { \
218 	char _buf[80]; \
219 	dbg_port_buf(_buf, sizeof _buf, label, port, status); \
220 	oxu_dbg(oxu, "%s\n", _buf); \
221 }
222 
223 /*
224  * Module parameters
225  */
226 
227 /* Initial IRQ latency: faster than hw default */
228 static int log2_irq_thresh;			/* 0 to 6 */
229 module_param(log2_irq_thresh, int, S_IRUGO);
230 MODULE_PARM_DESC(log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
231 
232 /* Initial park setting: slower than hw default */
233 static unsigned park;
234 module_param(park, uint, S_IRUGO);
235 MODULE_PARM_DESC(park, "park setting; 1-3 back-to-back async packets");
236 
237 /* For flakey hardware, ignore overcurrent indicators */
238 static bool ignore_oc;
239 module_param(ignore_oc, bool, S_IRUGO);
240 MODULE_PARM_DESC(ignore_oc, "ignore bogus hardware overcurrent indications");
241 
242 
243 static void ehci_work(struct oxu_hcd *oxu);
244 static int oxu_hub_control(struct usb_hcd *hcd,
245 				u16 typeReq, u16 wValue, u16 wIndex,
246 				char *buf, u16 wLength);
247 
248 /*
249  * Local functions
250  */
251 
252 /* Low level read/write registers functions */
253 static inline u32 oxu_readl(void *base, u32 reg)
254 {
255 	return readl(base + reg);
256 }
257 
258 static inline void oxu_writel(void *base, u32 reg, u32 val)
259 {
260 	writel(val, base + reg);
261 }
262 
263 static inline void timer_action_done(struct oxu_hcd *oxu,
264 					enum ehci_timer_action action)
265 {
266 	clear_bit(action, &oxu->actions);
267 }
268 
269 static inline void timer_action(struct oxu_hcd *oxu,
270 					enum ehci_timer_action action)
271 {
272 	if (!test_and_set_bit(action, &oxu->actions)) {
273 		unsigned long t;
274 
275 		switch (action) {
276 		case TIMER_IAA_WATCHDOG:
277 			t = EHCI_IAA_JIFFIES;
278 			break;
279 		case TIMER_IO_WATCHDOG:
280 			t = EHCI_IO_JIFFIES;
281 			break;
282 		case TIMER_ASYNC_OFF:
283 			t = EHCI_ASYNC_JIFFIES;
284 			break;
285 		case TIMER_ASYNC_SHRINK:
286 		default:
287 			t = EHCI_SHRINK_JIFFIES;
288 			break;
289 		}
290 		t += jiffies;
291 		/* all timings except IAA watchdog can be overridden.
292 		 * async queue SHRINK often precedes IAA.  while it's ready
293 		 * to go OFF neither can matter, and afterwards the IO
294 		 * watchdog stops unless there's still periodic traffic.
295 		 */
296 		if (action != TIMER_IAA_WATCHDOG
297 				&& t > oxu->watchdog.expires
298 				&& timer_pending(&oxu->watchdog))
299 			return;
300 		mod_timer(&oxu->watchdog, t);
301 	}
302 }
303 
304 /*
305  * handshake - spin reading hc until handshake completes or fails
306  * @ptr: address of hc register to be read
307  * @mask: bits to look at in result of read
308  * @done: value of those bits when handshake succeeds
309  * @usec: timeout in microseconds
310  *
311  * Returns negative errno, or zero on success
312  *
313  * Success happens when the "mask" bits have the specified value (hardware
314  * handshake done).  There are two failure modes:  "usec" have passed (major
315  * hardware flakeout), or the register reads as all-ones (hardware removed).
316  *
317  * That last failure should_only happen in cases like physical cardbus eject
318  * before driver shutdown. But it also seems to be caused by bugs in cardbus
319  * bridge shutdown:  shutting down the bridge before the devices using it.
320  */
321 static int handshake(struct oxu_hcd *oxu, void __iomem *ptr,
322 					u32 mask, u32 done, int usec)
323 {
324 	u32 result;
325 
326 	do {
327 		result = readl(ptr);
328 		if (result == ~(u32)0)		/* card removed */
329 			return -ENODEV;
330 		result &= mask;
331 		if (result == done)
332 			return 0;
333 		udelay(1);
334 		usec--;
335 	} while (usec > 0);
336 	return -ETIMEDOUT;
337 }
338 
339 /* Force HC to halt state from unknown (EHCI spec section 2.3) */
340 static int ehci_halt(struct oxu_hcd *oxu)
341 {
342 	u32	temp = readl(&oxu->regs->status);
343 
344 	/* disable any irqs left enabled by previous code */
345 	writel(0, &oxu->regs->intr_enable);
346 
347 	if ((temp & STS_HALT) != 0)
348 		return 0;
349 
350 	temp = readl(&oxu->regs->command);
351 	temp &= ~CMD_RUN;
352 	writel(temp, &oxu->regs->command);
353 	return handshake(oxu, &oxu->regs->status,
354 			  STS_HALT, STS_HALT, 16 * 125);
355 }
356 
357 /* Put TDI/ARC silicon into EHCI mode */
358 static void tdi_reset(struct oxu_hcd *oxu)
359 {
360 	u32 __iomem *reg_ptr;
361 	u32 tmp;
362 
363 	reg_ptr = (u32 __iomem *)(((u8 __iomem *)oxu->regs) + 0x68);
364 	tmp = readl(reg_ptr);
365 	tmp |= 0x3;
366 	writel(tmp, reg_ptr);
367 }
368 
369 /* Reset a non-running (STS_HALT == 1) controller */
370 static int ehci_reset(struct oxu_hcd *oxu)
371 {
372 	int	retval;
373 	u32	command = readl(&oxu->regs->command);
374 
375 	command |= CMD_RESET;
376 	dbg_cmd(oxu, "reset", command);
377 	writel(command, &oxu->regs->command);
378 	oxu_to_hcd(oxu)->state = HC_STATE_HALT;
379 	oxu->next_statechange = jiffies;
380 	retval = handshake(oxu, &oxu->regs->command,
381 			    CMD_RESET, 0, 250 * 1000);
382 
383 	if (retval)
384 		return retval;
385 
386 	tdi_reset(oxu);
387 
388 	return retval;
389 }
390 
391 /* Idle the controller (from running) */
392 static void ehci_quiesce(struct oxu_hcd *oxu)
393 {
394 	u32	temp;
395 
396 #ifdef DEBUG
397 	BUG_ON(!HC_IS_RUNNING(oxu_to_hcd(oxu)->state));
398 #endif
399 
400 	/* wait for any schedule enables/disables to take effect */
401 	temp = readl(&oxu->regs->command) << 10;
402 	temp &= STS_ASS | STS_PSS;
403 	if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
404 				temp, 16 * 125) != 0) {
405 		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
406 		return;
407 	}
408 
409 	/* then disable anything that's still active */
410 	temp = readl(&oxu->regs->command);
411 	temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
412 	writel(temp, &oxu->regs->command);
413 
414 	/* hardware can take 16 microframes to turn off ... */
415 	if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
416 				0, 16 * 125) != 0) {
417 		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
418 		return;
419 	}
420 }
421 
422 static int check_reset_complete(struct oxu_hcd *oxu, int index,
423 				u32 __iomem *status_reg, int port_status)
424 {
425 	if (!(port_status & PORT_CONNECT)) {
426 		oxu->reset_done[index] = 0;
427 		return port_status;
428 	}
429 
430 	/* if reset finished and it's still not enabled -- handoff */
431 	if (!(port_status & PORT_PE)) {
432 		oxu_dbg(oxu, "Failed to enable port %d on root hub TT\n",
433 				index+1);
434 		return port_status;
435 	} else
436 		oxu_dbg(oxu, "port %d high speed\n", index + 1);
437 
438 	return port_status;
439 }
440 
441 static void ehci_hub_descriptor(struct oxu_hcd *oxu,
442 				struct usb_hub_descriptor *desc)
443 {
444 	int ports = HCS_N_PORTS(oxu->hcs_params);
445 	u16 temp;
446 
447 	desc->bDescriptorType = USB_DT_HUB;
448 	desc->bPwrOn2PwrGood = 10;	/* oxu 1.0, 2.3.9 says 20ms max */
449 	desc->bHubContrCurrent = 0;
450 
451 	desc->bNbrPorts = ports;
452 	temp = 1 + (ports / 8);
453 	desc->bDescLength = 7 + 2 * temp;
454 
455 	/* ports removable, and usb 1.0 legacy PortPwrCtrlMask */
456 	memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
457 	memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
458 
459 	temp = HUB_CHAR_INDV_PORT_OCPM;	/* per-port overcurrent reporting */
460 	if (HCS_PPC(oxu->hcs_params))
461 		temp |= HUB_CHAR_INDV_PORT_LPSM; /* per-port power control */
462 	else
463 		temp |= HUB_CHAR_NO_LPSM; /* no power switching */
464 	desc->wHubCharacteristics = (__force __u16)cpu_to_le16(temp);
465 }
466 
467 
468 /* Allocate an OXU210HP on-chip memory data buffer
469  *
470  * An on-chip memory data buffer is required for each OXU210HP USB transfer.
471  * Each transfer descriptor has one or more on-chip memory data buffers.
472  *
473  * Data buffers are allocated from a fix sized pool of data blocks.
474  * To minimise fragmentation and give reasonable memory utlisation,
475  * data buffers are allocated with sizes the power of 2 multiples of
476  * the block size, starting on an address a multiple of the allocated size.
477  *
478  * FIXME: callers of this function require a buffer to be allocated for
479  * len=0. This is a waste of on-chip memory and should be fix. Then this
480  * function should be changed to not allocate a buffer for len=0.
481  */
482 static int oxu_buf_alloc(struct oxu_hcd *oxu, struct ehci_qtd *qtd, int len)
483 {
484 	int n_blocks;	/* minium blocks needed to hold len */
485 	int a_blocks;	/* blocks allocated */
486 	int i, j;
487 
488 	/* Don't allocte bigger than supported */
489 	if (len > BUFFER_SIZE * BUFFER_NUM) {
490 		oxu_err(oxu, "buffer too big (%d)\n", len);
491 		return -ENOMEM;
492 	}
493 
494 	spin_lock(&oxu->mem_lock);
495 
496 	/* Number of blocks needed to hold len */
497 	n_blocks = (len + BUFFER_SIZE - 1) / BUFFER_SIZE;
498 
499 	/* Round the number of blocks up to the power of 2 */
500 	for (a_blocks = 1; a_blocks < n_blocks; a_blocks <<= 1)
501 		;
502 
503 	/* Find a suitable available data buffer */
504 	for (i = 0; i < BUFFER_NUM;
505 			i += max(a_blocks, (int)oxu->db_used[i])) {
506 
507 		/* Check all the required blocks are available */
508 		for (j = 0; j < a_blocks; j++)
509 			if (oxu->db_used[i + j])
510 				break;
511 
512 		if (j != a_blocks)
513 			continue;
514 
515 		/* Allocate blocks found! */
516 		qtd->buffer = (void *) &oxu->mem->db_pool[i];
517 		qtd->buffer_dma = virt_to_phys(qtd->buffer);
518 
519 		qtd->qtd_buffer_len = BUFFER_SIZE * a_blocks;
520 		oxu->db_used[i] = a_blocks;
521 
522 		spin_unlock(&oxu->mem_lock);
523 
524 		return 0;
525 	}
526 
527 	/* Failed */
528 
529 	spin_unlock(&oxu->mem_lock);
530 
531 	return -ENOMEM;
532 }
533 
534 static void oxu_buf_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
535 {
536 	int index;
537 
538 	spin_lock(&oxu->mem_lock);
539 
540 	index = (qtd->buffer - (void *) &oxu->mem->db_pool[0])
541 							 / BUFFER_SIZE;
542 	oxu->db_used[index] = 0;
543 	qtd->qtd_buffer_len = 0;
544 	qtd->buffer_dma = 0;
545 	qtd->buffer = NULL;
546 
547 	spin_unlock(&oxu->mem_lock);
548 }
549 
550 static inline void ehci_qtd_init(struct ehci_qtd *qtd, dma_addr_t dma)
551 {
552 	memset(qtd, 0, sizeof *qtd);
553 	qtd->qtd_dma = dma;
554 	qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
555 	qtd->hw_next = EHCI_LIST_END;
556 	qtd->hw_alt_next = EHCI_LIST_END;
557 	INIT_LIST_HEAD(&qtd->qtd_list);
558 }
559 
560 static inline void oxu_qtd_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
561 {
562 	int index;
563 
564 	if (qtd->buffer)
565 		oxu_buf_free(oxu, qtd);
566 
567 	spin_lock(&oxu->mem_lock);
568 
569 	index = qtd - &oxu->mem->qtd_pool[0];
570 	oxu->qtd_used[index] = 0;
571 
572 	spin_unlock(&oxu->mem_lock);
573 }
574 
575 static struct ehci_qtd *ehci_qtd_alloc(struct oxu_hcd *oxu)
576 {
577 	int i;
578 	struct ehci_qtd *qtd = NULL;
579 
580 	spin_lock(&oxu->mem_lock);
581 
582 	for (i = 0; i < QTD_NUM; i++)
583 		if (!oxu->qtd_used[i])
584 			break;
585 
586 	if (i < QTD_NUM) {
587 		qtd = (struct ehci_qtd *) &oxu->mem->qtd_pool[i];
588 		memset(qtd, 0, sizeof *qtd);
589 
590 		qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
591 		qtd->hw_next = EHCI_LIST_END;
592 		qtd->hw_alt_next = EHCI_LIST_END;
593 		INIT_LIST_HEAD(&qtd->qtd_list);
594 
595 		qtd->qtd_dma = virt_to_phys(qtd);
596 
597 		oxu->qtd_used[i] = 1;
598 	}
599 
600 	spin_unlock(&oxu->mem_lock);
601 
602 	return qtd;
603 }
604 
605 static void oxu_qh_free(struct oxu_hcd *oxu, struct ehci_qh *qh)
606 {
607 	int index;
608 
609 	spin_lock(&oxu->mem_lock);
610 
611 	index = qh - &oxu->mem->qh_pool[0];
612 	oxu->qh_used[index] = 0;
613 
614 	spin_unlock(&oxu->mem_lock);
615 }
616 
617 static void qh_destroy(struct kref *kref)
618 {
619 	struct ehci_qh *qh = container_of(kref, struct ehci_qh, kref);
620 	struct oxu_hcd *oxu = qh->oxu;
621 
622 	/* clean qtds first, and know this is not linked */
623 	if (!list_empty(&qh->qtd_list) || qh->qh_next.ptr) {
624 		oxu_dbg(oxu, "unused qh not empty!\n");
625 		BUG();
626 	}
627 	if (qh->dummy)
628 		oxu_qtd_free(oxu, qh->dummy);
629 	oxu_qh_free(oxu, qh);
630 }
631 
632 static struct ehci_qh *oxu_qh_alloc(struct oxu_hcd *oxu)
633 {
634 	int i;
635 	struct ehci_qh *qh = NULL;
636 
637 	spin_lock(&oxu->mem_lock);
638 
639 	for (i = 0; i < QHEAD_NUM; i++)
640 		if (!oxu->qh_used[i])
641 			break;
642 
643 	if (i < QHEAD_NUM) {
644 		qh = (struct ehci_qh *) &oxu->mem->qh_pool[i];
645 		memset(qh, 0, sizeof *qh);
646 
647 		kref_init(&qh->kref);
648 		qh->oxu = oxu;
649 		qh->qh_dma = virt_to_phys(qh);
650 		INIT_LIST_HEAD(&qh->qtd_list);
651 
652 		/* dummy td enables safe urb queuing */
653 		qh->dummy = ehci_qtd_alloc(oxu);
654 		if (qh->dummy == NULL) {
655 			oxu_dbg(oxu, "no dummy td\n");
656 			oxu->qh_used[i] = 0;
657 			qh = NULL;
658 			goto unlock;
659 		}
660 
661 		oxu->qh_used[i] = 1;
662 	}
663 unlock:
664 	spin_unlock(&oxu->mem_lock);
665 
666 	return qh;
667 }
668 
669 /* to share a qh (cpu threads, or hc) */
670 static inline struct ehci_qh *qh_get(struct ehci_qh *qh)
671 {
672 	kref_get(&qh->kref);
673 	return qh;
674 }
675 
676 static inline void qh_put(struct ehci_qh *qh)
677 {
678 	kref_put(&qh->kref, qh_destroy);
679 }
680 
681 static void oxu_murb_free(struct oxu_hcd *oxu, struct oxu_murb *murb)
682 {
683 	int index;
684 
685 	spin_lock(&oxu->mem_lock);
686 
687 	index = murb - &oxu->murb_pool[0];
688 	oxu->murb_used[index] = 0;
689 
690 	spin_unlock(&oxu->mem_lock);
691 }
692 
693 static struct oxu_murb *oxu_murb_alloc(struct oxu_hcd *oxu)
694 
695 {
696 	int i;
697 	struct oxu_murb *murb = NULL;
698 
699 	spin_lock(&oxu->mem_lock);
700 
701 	for (i = 0; i < MURB_NUM; i++)
702 		if (!oxu->murb_used[i])
703 			break;
704 
705 	if (i < MURB_NUM) {
706 		murb = &(oxu->murb_pool)[i];
707 
708 		oxu->murb_used[i] = 1;
709 	}
710 
711 	spin_unlock(&oxu->mem_lock);
712 
713 	return murb;
714 }
715 
716 /* The queue heads and transfer descriptors are managed from pools tied
717  * to each of the "per device" structures.
718  * This is the initialisation and cleanup code.
719  */
720 static void ehci_mem_cleanup(struct oxu_hcd *oxu)
721 {
722 	kfree(oxu->murb_pool);
723 	oxu->murb_pool = NULL;
724 
725 	if (oxu->async)
726 		qh_put(oxu->async);
727 	oxu->async = NULL;
728 
729 	del_timer(&oxu->urb_timer);
730 
731 	oxu->periodic = NULL;
732 
733 	/* shadow periodic table */
734 	kfree(oxu->pshadow);
735 	oxu->pshadow = NULL;
736 }
737 
738 /* Remember to add cleanup code (above) if you add anything here.
739  */
740 static int ehci_mem_init(struct oxu_hcd *oxu, gfp_t flags)
741 {
742 	int i;
743 
744 	for (i = 0; i < oxu->periodic_size; i++)
745 		oxu->mem->frame_list[i] = EHCI_LIST_END;
746 	for (i = 0; i < QHEAD_NUM; i++)
747 		oxu->qh_used[i] = 0;
748 	for (i = 0; i < QTD_NUM; i++)
749 		oxu->qtd_used[i] = 0;
750 
751 	oxu->murb_pool = kcalloc(MURB_NUM, sizeof(struct oxu_murb), flags);
752 	if (!oxu->murb_pool)
753 		goto fail;
754 
755 	for (i = 0; i < MURB_NUM; i++)
756 		oxu->murb_used[i] = 0;
757 
758 	oxu->async = oxu_qh_alloc(oxu);
759 	if (!oxu->async)
760 		goto fail;
761 
762 	oxu->periodic = (__le32 *) &oxu->mem->frame_list;
763 	oxu->periodic_dma = virt_to_phys(oxu->periodic);
764 
765 	for (i = 0; i < oxu->periodic_size; i++)
766 		oxu->periodic[i] = EHCI_LIST_END;
767 
768 	/* software shadow of hardware table */
769 	oxu->pshadow = kcalloc(oxu->periodic_size, sizeof(void *), flags);
770 	if (oxu->pshadow != NULL)
771 		return 0;
772 
773 fail:
774 	oxu_dbg(oxu, "couldn't init memory\n");
775 	ehci_mem_cleanup(oxu);
776 	return -ENOMEM;
777 }
778 
779 /* Fill a qtd, returning how much of the buffer we were able to queue up.
780  */
781 static int qtd_fill(struct ehci_qtd *qtd, dma_addr_t buf, size_t len,
782 				int token, int maxpacket)
783 {
784 	int i, count;
785 	u64 addr = buf;
786 
787 	/* one buffer entry per 4K ... first might be short or unaligned */
788 	qtd->hw_buf[0] = cpu_to_le32((u32)addr);
789 	qtd->hw_buf_hi[0] = cpu_to_le32((u32)(addr >> 32));
790 	count = 0x1000 - (buf & 0x0fff);	/* rest of that page */
791 	if (likely(len < count))		/* ... iff needed */
792 		count = len;
793 	else {
794 		buf +=  0x1000;
795 		buf &= ~0x0fff;
796 
797 		/* per-qtd limit: from 16K to 20K (best alignment) */
798 		for (i = 1; count < len && i < 5; i++) {
799 			addr = buf;
800 			qtd->hw_buf[i] = cpu_to_le32((u32)addr);
801 			qtd->hw_buf_hi[i] = cpu_to_le32((u32)(addr >> 32));
802 			buf += 0x1000;
803 			if ((count + 0x1000) < len)
804 				count += 0x1000;
805 			else
806 				count = len;
807 		}
808 
809 		/* short packets may only terminate transfers */
810 		if (count != len)
811 			count -= (count % maxpacket);
812 	}
813 	qtd->hw_token = cpu_to_le32((count << 16) | token);
814 	qtd->length = count;
815 
816 	return count;
817 }
818 
819 static inline void qh_update(struct oxu_hcd *oxu,
820 				struct ehci_qh *qh, struct ehci_qtd *qtd)
821 {
822 	/* writes to an active overlay are unsafe */
823 	BUG_ON(qh->qh_state != QH_STATE_IDLE);
824 
825 	qh->hw_qtd_next = QTD_NEXT(qtd->qtd_dma);
826 	qh->hw_alt_next = EHCI_LIST_END;
827 
828 	/* Except for control endpoints, we make hardware maintain data
829 	 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
830 	 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
831 	 * ever clear it.
832 	 */
833 	if (!(qh->hw_info1 & cpu_to_le32(1 << 14))) {
834 		unsigned	is_out, epnum;
835 
836 		is_out = !(qtd->hw_token & cpu_to_le32(1 << 8));
837 		epnum = (le32_to_cpup(&qh->hw_info1) >> 8) & 0x0f;
838 		if (unlikely(!usb_gettoggle(qh->dev, epnum, is_out))) {
839 			qh->hw_token &= ~cpu_to_le32(QTD_TOGGLE);
840 			usb_settoggle(qh->dev, epnum, is_out, 1);
841 		}
842 	}
843 
844 	/* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
845 	wmb();
846 	qh->hw_token &= cpu_to_le32(QTD_TOGGLE | QTD_STS_PING);
847 }
848 
849 /* If it weren't for a common silicon quirk (writing the dummy into the qh
850  * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
851  * recovery (including urb dequeue) would need software changes to a QH...
852  */
853 static void qh_refresh(struct oxu_hcd *oxu, struct ehci_qh *qh)
854 {
855 	struct ehci_qtd *qtd;
856 
857 	if (list_empty(&qh->qtd_list))
858 		qtd = qh->dummy;
859 	else {
860 		qtd = list_entry(qh->qtd_list.next,
861 				struct ehci_qtd, qtd_list);
862 		/* first qtd may already be partially processed */
863 		if (cpu_to_le32(qtd->qtd_dma) == qh->hw_current)
864 			qtd = NULL;
865 	}
866 
867 	if (qtd)
868 		qh_update(oxu, qh, qtd);
869 }
870 
871 static void qtd_copy_status(struct oxu_hcd *oxu, struct urb *urb,
872 				size_t length, u32 token)
873 {
874 	/* count IN/OUT bytes, not SETUP (even short packets) */
875 	if (likely(QTD_PID(token) != 2))
876 		urb->actual_length += length - QTD_LENGTH(token);
877 
878 	/* don't modify error codes */
879 	if (unlikely(urb->status != -EINPROGRESS))
880 		return;
881 
882 	/* force cleanup after short read; not always an error */
883 	if (unlikely(IS_SHORT_READ(token)))
884 		urb->status = -EREMOTEIO;
885 
886 	/* serious "can't proceed" faults reported by the hardware */
887 	if (token & QTD_STS_HALT) {
888 		if (token & QTD_STS_BABBLE) {
889 			/* FIXME "must" disable babbling device's port too */
890 			urb->status = -EOVERFLOW;
891 		} else if (token & QTD_STS_MMF) {
892 			/* fs/ls interrupt xfer missed the complete-split */
893 			urb->status = -EPROTO;
894 		} else if (token & QTD_STS_DBE) {
895 			urb->status = (QTD_PID(token) == 1) /* IN ? */
896 				? -ENOSR  /* hc couldn't read data */
897 				: -ECOMM; /* hc couldn't write data */
898 		} else if (token & QTD_STS_XACT) {
899 			/* timeout, bad crc, wrong PID, etc; retried */
900 			if (QTD_CERR(token))
901 				urb->status = -EPIPE;
902 			else {
903 				oxu_dbg(oxu, "devpath %s ep%d%s 3strikes\n",
904 					urb->dev->devpath,
905 					usb_pipeendpoint(urb->pipe),
906 					usb_pipein(urb->pipe) ? "in" : "out");
907 				urb->status = -EPROTO;
908 			}
909 		/* CERR nonzero + no errors + halt --> stall */
910 		} else if (QTD_CERR(token))
911 			urb->status = -EPIPE;
912 		else	/* unknown */
913 			urb->status = -EPROTO;
914 
915 		oxu_vdbg(oxu, "dev%d ep%d%s qtd token %08x --> status %d\n",
916 			usb_pipedevice(urb->pipe),
917 			usb_pipeendpoint(urb->pipe),
918 			usb_pipein(urb->pipe) ? "in" : "out",
919 			token, urb->status);
920 	}
921 }
922 
923 static void ehci_urb_done(struct oxu_hcd *oxu, struct urb *urb)
924 __releases(oxu->lock)
925 __acquires(oxu->lock)
926 {
927 	if (likely(urb->hcpriv != NULL)) {
928 		struct ehci_qh	*qh = (struct ehci_qh *) urb->hcpriv;
929 
930 		/* S-mask in a QH means it's an interrupt urb */
931 		if ((qh->hw_info2 & cpu_to_le32(QH_SMASK)) != 0) {
932 
933 			/* ... update hc-wide periodic stats (for usbfs) */
934 			oxu_to_hcd(oxu)->self.bandwidth_int_reqs--;
935 		}
936 		qh_put(qh);
937 	}
938 
939 	urb->hcpriv = NULL;
940 	switch (urb->status) {
941 	case -EINPROGRESS:		/* success */
942 		urb->status = 0;
943 	default:			/* fault */
944 		break;
945 	case -EREMOTEIO:		/* fault or normal */
946 		if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
947 			urb->status = 0;
948 		break;
949 	case -ECONNRESET:		/* canceled */
950 	case -ENOENT:
951 		break;
952 	}
953 
954 #ifdef OXU_URB_TRACE
955 	oxu_dbg(oxu, "%s %s urb %p ep%d%s status %d len %d/%d\n",
956 		__func__, urb->dev->devpath, urb,
957 		usb_pipeendpoint(urb->pipe),
958 		usb_pipein(urb->pipe) ? "in" : "out",
959 		urb->status,
960 		urb->actual_length, urb->transfer_buffer_length);
961 #endif
962 
963 	/* complete() can reenter this HCD */
964 	spin_unlock(&oxu->lock);
965 	usb_hcd_giveback_urb(oxu_to_hcd(oxu), urb, urb->status);
966 	spin_lock(&oxu->lock);
967 }
968 
969 static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
970 static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
971 
972 static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
973 static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
974 
975 #define HALT_BIT cpu_to_le32(QTD_STS_HALT)
976 
977 /* Process and free completed qtds for a qh, returning URBs to drivers.
978  * Chases up to qh->hw_current.  Returns number of completions called,
979  * indicating how much "real" work we did.
980  */
981 static unsigned qh_completions(struct oxu_hcd *oxu, struct ehci_qh *qh)
982 {
983 	struct ehci_qtd *last = NULL, *end = qh->dummy;
984 	struct ehci_qtd	*qtd, *tmp;
985 	int stopped;
986 	unsigned count = 0;
987 	int do_status = 0;
988 	u8 state;
989 	struct oxu_murb *murb = NULL;
990 
991 	if (unlikely(list_empty(&qh->qtd_list)))
992 		return count;
993 
994 	/* completions (or tasks on other cpus) must never clobber HALT
995 	 * till we've gone through and cleaned everything up, even when
996 	 * they add urbs to this qh's queue or mark them for unlinking.
997 	 *
998 	 * NOTE:  unlinking expects to be done in queue order.
999 	 */
1000 	state = qh->qh_state;
1001 	qh->qh_state = QH_STATE_COMPLETING;
1002 	stopped = (state == QH_STATE_IDLE);
1003 
1004 	/* remove de-activated QTDs from front of queue.
1005 	 * after faults (including short reads), cleanup this urb
1006 	 * then let the queue advance.
1007 	 * if queue is stopped, handles unlinks.
1008 	 */
1009 	list_for_each_entry_safe(qtd, tmp, &qh->qtd_list, qtd_list) {
1010 		struct urb *urb;
1011 		u32 token = 0;
1012 
1013 		urb = qtd->urb;
1014 
1015 		/* Clean up any state from previous QTD ...*/
1016 		if (last) {
1017 			if (likely(last->urb != urb)) {
1018 				if (last->urb->complete == NULL) {
1019 					murb = (struct oxu_murb *) last->urb;
1020 					last->urb = murb->main;
1021 					if (murb->last) {
1022 						ehci_urb_done(oxu, last->urb);
1023 						count++;
1024 					}
1025 					oxu_murb_free(oxu, murb);
1026 				} else {
1027 					ehci_urb_done(oxu, last->urb);
1028 					count++;
1029 				}
1030 			}
1031 			oxu_qtd_free(oxu, last);
1032 			last = NULL;
1033 		}
1034 
1035 		/* ignore urbs submitted during completions we reported */
1036 		if (qtd == end)
1037 			break;
1038 
1039 		/* hardware copies qtd out of qh overlay */
1040 		rmb();
1041 		token = le32_to_cpu(qtd->hw_token);
1042 
1043 		/* always clean up qtds the hc de-activated */
1044 		if ((token & QTD_STS_ACTIVE) == 0) {
1045 
1046 			if ((token & QTD_STS_HALT) != 0) {
1047 				stopped = 1;
1048 
1049 			/* magic dummy for some short reads; qh won't advance.
1050 			 * that silicon quirk can kick in with this dummy too.
1051 			 */
1052 			} else if (IS_SHORT_READ(token) &&
1053 					!(qtd->hw_alt_next & EHCI_LIST_END)) {
1054 				stopped = 1;
1055 				goto halt;
1056 			}
1057 
1058 		/* stop scanning when we reach qtds the hc is using */
1059 		} else if (likely(!stopped &&
1060 				HC_IS_RUNNING(oxu_to_hcd(oxu)->state))) {
1061 			break;
1062 
1063 		} else {
1064 			stopped = 1;
1065 
1066 			if (unlikely(!HC_IS_RUNNING(oxu_to_hcd(oxu)->state)))
1067 				urb->status = -ESHUTDOWN;
1068 
1069 			/* ignore active urbs unless some previous qtd
1070 			 * for the urb faulted (including short read) or
1071 			 * its urb was canceled.  we may patch qh or qtds.
1072 			 */
1073 			if (likely(urb->status == -EINPROGRESS))
1074 				continue;
1075 
1076 			/* issue status after short control reads */
1077 			if (unlikely(do_status != 0)
1078 					&& QTD_PID(token) == 0 /* OUT */) {
1079 				do_status = 0;
1080 				continue;
1081 			}
1082 
1083 			/* token in overlay may be most current */
1084 			if (state == QH_STATE_IDLE
1085 					&& cpu_to_le32(qtd->qtd_dma)
1086 						== qh->hw_current)
1087 				token = le32_to_cpu(qh->hw_token);
1088 
1089 			/* force halt for unlinked or blocked qh, so we'll
1090 			 * patch the qh later and so that completions can't
1091 			 * activate it while we "know" it's stopped.
1092 			 */
1093 			if ((HALT_BIT & qh->hw_token) == 0) {
1094 halt:
1095 				qh->hw_token |= HALT_BIT;
1096 				wmb();
1097 			}
1098 		}
1099 
1100 		/* Remove it from the queue */
1101 		qtd_copy_status(oxu, urb->complete ?
1102 					urb : ((struct oxu_murb *) urb)->main,
1103 				qtd->length, token);
1104 		if ((usb_pipein(qtd->urb->pipe)) &&
1105 				(NULL != qtd->transfer_buffer))
1106 			memcpy(qtd->transfer_buffer, qtd->buffer, qtd->length);
1107 		do_status = (urb->status == -EREMOTEIO)
1108 				&& usb_pipecontrol(urb->pipe);
1109 
1110 		if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
1111 			last = list_entry(qtd->qtd_list.prev,
1112 					struct ehci_qtd, qtd_list);
1113 			last->hw_next = qtd->hw_next;
1114 		}
1115 		list_del(&qtd->qtd_list);
1116 		last = qtd;
1117 	}
1118 
1119 	/* last urb's completion might still need calling */
1120 	if (likely(last != NULL)) {
1121 		if (last->urb->complete == NULL) {
1122 			murb = (struct oxu_murb *) last->urb;
1123 			last->urb = murb->main;
1124 			if (murb->last) {
1125 				ehci_urb_done(oxu, last->urb);
1126 				count++;
1127 			}
1128 			oxu_murb_free(oxu, murb);
1129 		} else {
1130 			ehci_urb_done(oxu, last->urb);
1131 			count++;
1132 		}
1133 		oxu_qtd_free(oxu, last);
1134 	}
1135 
1136 	/* restore original state; caller must unlink or relink */
1137 	qh->qh_state = state;
1138 
1139 	/* be sure the hardware's done with the qh before refreshing
1140 	 * it after fault cleanup, or recovering from silicon wrongly
1141 	 * overlaying the dummy qtd (which reduces DMA chatter).
1142 	 */
1143 	if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END) {
1144 		switch (state) {
1145 		case QH_STATE_IDLE:
1146 			qh_refresh(oxu, qh);
1147 			break;
1148 		case QH_STATE_LINKED:
1149 			/* should be rare for periodic transfers,
1150 			 * except maybe high bandwidth ...
1151 			 */
1152 			if ((cpu_to_le32(QH_SMASK)
1153 					& qh->hw_info2) != 0) {
1154 				intr_deschedule(oxu, qh);
1155 				(void) qh_schedule(oxu, qh);
1156 			} else
1157 				unlink_async(oxu, qh);
1158 			break;
1159 		/* otherwise, unlink already started */
1160 		}
1161 	}
1162 
1163 	return count;
1164 }
1165 
1166 /* High bandwidth multiplier, as encoded in highspeed endpoint descriptors */
1167 #define hb_mult(wMaxPacketSize)		(1 + (((wMaxPacketSize) >> 11) & 0x03))
1168 /* ... and packet size, for any kind of endpoint descriptor */
1169 #define max_packet(wMaxPacketSize)	((wMaxPacketSize) & 0x07ff)
1170 
1171 /* Reverse of qh_urb_transaction: free a list of TDs.
1172  * used for cleanup after errors, before HC sees an URB's TDs.
1173  */
1174 static void qtd_list_free(struct oxu_hcd *oxu,
1175 				struct urb *urb, struct list_head *head)
1176 {
1177 	struct ehci_qtd	*qtd, *temp;
1178 
1179 	list_for_each_entry_safe(qtd, temp, head, qtd_list) {
1180 		list_del(&qtd->qtd_list);
1181 		oxu_qtd_free(oxu, qtd);
1182 	}
1183 }
1184 
1185 /* Create a list of filled qtds for this URB; won't link into qh.
1186  */
1187 static struct list_head *qh_urb_transaction(struct oxu_hcd *oxu,
1188 						struct urb *urb,
1189 						struct list_head *head,
1190 						gfp_t flags)
1191 {
1192 	struct ehci_qtd	*qtd, *qtd_prev;
1193 	dma_addr_t buf;
1194 	int len, maxpacket;
1195 	int is_input;
1196 	u32 token;
1197 	void *transfer_buf = NULL;
1198 	int ret;
1199 
1200 	/*
1201 	 * URBs map to sequences of QTDs: one logical transaction
1202 	 */
1203 	qtd = ehci_qtd_alloc(oxu);
1204 	if (unlikely(!qtd))
1205 		return NULL;
1206 	list_add_tail(&qtd->qtd_list, head);
1207 	qtd->urb = urb;
1208 
1209 	token = QTD_STS_ACTIVE;
1210 	token |= (EHCI_TUNE_CERR << 10);
1211 	/* for split transactions, SplitXState initialized to zero */
1212 
1213 	len = urb->transfer_buffer_length;
1214 	is_input = usb_pipein(urb->pipe);
1215 	if (!urb->transfer_buffer && urb->transfer_buffer_length && is_input)
1216 		urb->transfer_buffer = phys_to_virt(urb->transfer_dma);
1217 
1218 	if (usb_pipecontrol(urb->pipe)) {
1219 		/* SETUP pid */
1220 		ret = oxu_buf_alloc(oxu, qtd, sizeof(struct usb_ctrlrequest));
1221 		if (ret)
1222 			goto cleanup;
1223 
1224 		qtd_fill(qtd, qtd->buffer_dma, sizeof(struct usb_ctrlrequest),
1225 				token | (2 /* "setup" */ << 8), 8);
1226 		memcpy(qtd->buffer, qtd->urb->setup_packet,
1227 				sizeof(struct usb_ctrlrequest));
1228 
1229 		/* ... and always at least one more pid */
1230 		token ^= QTD_TOGGLE;
1231 		qtd_prev = qtd;
1232 		qtd = ehci_qtd_alloc(oxu);
1233 		if (unlikely(!qtd))
1234 			goto cleanup;
1235 		qtd->urb = urb;
1236 		qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1237 		list_add_tail(&qtd->qtd_list, head);
1238 
1239 		/* for zero length DATA stages, STATUS is always IN */
1240 		if (len == 0)
1241 			token |= (1 /* "in" */ << 8);
1242 	}
1243 
1244 	/*
1245 	 * Data transfer stage: buffer setup
1246 	 */
1247 
1248 	ret = oxu_buf_alloc(oxu, qtd, len);
1249 	if (ret)
1250 		goto cleanup;
1251 
1252 	buf = qtd->buffer_dma;
1253 	transfer_buf = urb->transfer_buffer;
1254 
1255 	if (!is_input)
1256 		memcpy(qtd->buffer, qtd->urb->transfer_buffer, len);
1257 
1258 	if (is_input)
1259 		token |= (1 /* "in" */ << 8);
1260 	/* else it's already initted to "out" pid (0 << 8) */
1261 
1262 	maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
1263 
1264 	/*
1265 	 * buffer gets wrapped in one or more qtds;
1266 	 * last one may be "short" (including zero len)
1267 	 * and may serve as a control status ack
1268 	 */
1269 	for (;;) {
1270 		int this_qtd_len;
1271 
1272 		this_qtd_len = qtd_fill(qtd, buf, len, token, maxpacket);
1273 		qtd->transfer_buffer = transfer_buf;
1274 		len -= this_qtd_len;
1275 		buf += this_qtd_len;
1276 		transfer_buf += this_qtd_len;
1277 		if (is_input)
1278 			qtd->hw_alt_next = oxu->async->hw_alt_next;
1279 
1280 		/* qh makes control packets use qtd toggle; maybe switch it */
1281 		if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
1282 			token ^= QTD_TOGGLE;
1283 
1284 		if (likely(len <= 0))
1285 			break;
1286 
1287 		qtd_prev = qtd;
1288 		qtd = ehci_qtd_alloc(oxu);
1289 		if (unlikely(!qtd))
1290 			goto cleanup;
1291 		if (likely(len > 0)) {
1292 			ret = oxu_buf_alloc(oxu, qtd, len);
1293 			if (ret)
1294 				goto cleanup;
1295 		}
1296 		qtd->urb = urb;
1297 		qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1298 		list_add_tail(&qtd->qtd_list, head);
1299 	}
1300 
1301 	/* unless the bulk/interrupt caller wants a chance to clean
1302 	 * up after short reads, hc should advance qh past this urb
1303 	 */
1304 	if (likely((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
1305 				|| usb_pipecontrol(urb->pipe)))
1306 		qtd->hw_alt_next = EHCI_LIST_END;
1307 
1308 	/*
1309 	 * control requests may need a terminating data "status" ack;
1310 	 * bulk ones may need a terminating short packet (zero length).
1311 	 */
1312 	if (likely(urb->transfer_buffer_length != 0)) {
1313 		int	one_more = 0;
1314 
1315 		if (usb_pipecontrol(urb->pipe)) {
1316 			one_more = 1;
1317 			token ^= 0x0100;	/* "in" <--> "out"  */
1318 			token |= QTD_TOGGLE;	/* force DATA1 */
1319 		} else if (usb_pipebulk(urb->pipe)
1320 				&& (urb->transfer_flags & URB_ZERO_PACKET)
1321 				&& !(urb->transfer_buffer_length % maxpacket)) {
1322 			one_more = 1;
1323 		}
1324 		if (one_more) {
1325 			qtd_prev = qtd;
1326 			qtd = ehci_qtd_alloc(oxu);
1327 			if (unlikely(!qtd))
1328 				goto cleanup;
1329 			qtd->urb = urb;
1330 			qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1331 			list_add_tail(&qtd->qtd_list, head);
1332 
1333 			/* never any data in such packets */
1334 			qtd_fill(qtd, 0, 0, token, 0);
1335 		}
1336 	}
1337 
1338 	/* by default, enable interrupt on urb completion */
1339 		qtd->hw_token |= cpu_to_le32(QTD_IOC);
1340 	return head;
1341 
1342 cleanup:
1343 	qtd_list_free(oxu, urb, head);
1344 	return NULL;
1345 }
1346 
1347 /* Each QH holds a qtd list; a QH is used for everything except iso.
1348  *
1349  * For interrupt urbs, the scheduler must set the microframe scheduling
1350  * mask(s) each time the QH gets scheduled.  For highspeed, that's
1351  * just one microframe in the s-mask.  For split interrupt transactions
1352  * there are additional complications: c-mask, maybe FSTNs.
1353  */
1354 static struct ehci_qh *qh_make(struct oxu_hcd *oxu,
1355 				struct urb *urb, gfp_t flags)
1356 {
1357 	struct ehci_qh *qh = oxu_qh_alloc(oxu);
1358 	u32 info1 = 0, info2 = 0;
1359 	int is_input, type;
1360 	int maxp = 0;
1361 
1362 	if (!qh)
1363 		return qh;
1364 
1365 	/*
1366 	 * init endpoint/device data for this QH
1367 	 */
1368 	info1 |= usb_pipeendpoint(urb->pipe) << 8;
1369 	info1 |= usb_pipedevice(urb->pipe) << 0;
1370 
1371 	is_input = usb_pipein(urb->pipe);
1372 	type = usb_pipetype(urb->pipe);
1373 	maxp = usb_maxpacket(urb->dev, urb->pipe, !is_input);
1374 
1375 	/* Compute interrupt scheduling parameters just once, and save.
1376 	 * - allowing for high bandwidth, how many nsec/uframe are used?
1377 	 * - split transactions need a second CSPLIT uframe; same question
1378 	 * - splits also need a schedule gap (for full/low speed I/O)
1379 	 * - qh has a polling interval
1380 	 *
1381 	 * For control/bulk requests, the HC or TT handles these.
1382 	 */
1383 	if (type == PIPE_INTERRUPT) {
1384 		qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
1385 								is_input, 0,
1386 				hb_mult(maxp) * max_packet(maxp)));
1387 		qh->start = NO_FRAME;
1388 
1389 		if (urb->dev->speed == USB_SPEED_HIGH) {
1390 			qh->c_usecs = 0;
1391 			qh->gap_uf = 0;
1392 
1393 			qh->period = urb->interval >> 3;
1394 			if (qh->period == 0 && urb->interval != 1) {
1395 				/* NOTE interval 2 or 4 uframes could work.
1396 				 * But interval 1 scheduling is simpler, and
1397 				 * includes high bandwidth.
1398 				 */
1399 				oxu_dbg(oxu, "intr period %d uframes, NYET!\n",
1400 					urb->interval);
1401 				goto done;
1402 			}
1403 		} else {
1404 			struct usb_tt	*tt = urb->dev->tt;
1405 			int		think_time;
1406 
1407 			/* gap is f(FS/LS transfer times) */
1408 			qh->gap_uf = 1 + usb_calc_bus_time(urb->dev->speed,
1409 					is_input, 0, maxp) / (125 * 1000);
1410 
1411 			/* FIXME this just approximates SPLIT/CSPLIT times */
1412 			if (is_input) {		/* SPLIT, gap, CSPLIT+DATA */
1413 				qh->c_usecs = qh->usecs + HS_USECS(0);
1414 				qh->usecs = HS_USECS(1);
1415 			} else {		/* SPLIT+DATA, gap, CSPLIT */
1416 				qh->usecs += HS_USECS(1);
1417 				qh->c_usecs = HS_USECS(0);
1418 			}
1419 
1420 			think_time = tt ? tt->think_time : 0;
1421 			qh->tt_usecs = NS_TO_US(think_time +
1422 					usb_calc_bus_time(urb->dev->speed,
1423 					is_input, 0, max_packet(maxp)));
1424 			qh->period = urb->interval;
1425 		}
1426 	}
1427 
1428 	/* support for tt scheduling, and access to toggles */
1429 	qh->dev = urb->dev;
1430 
1431 	/* using TT? */
1432 	switch (urb->dev->speed) {
1433 	case USB_SPEED_LOW:
1434 		info1 |= (1 << 12);	/* EPS "low" */
1435 		/* FALL THROUGH */
1436 
1437 	case USB_SPEED_FULL:
1438 		/* EPS 0 means "full" */
1439 		if (type != PIPE_INTERRUPT)
1440 			info1 |= (EHCI_TUNE_RL_TT << 28);
1441 		if (type == PIPE_CONTROL) {
1442 			info1 |= (1 << 27);	/* for TT */
1443 			info1 |= 1 << 14;	/* toggle from qtd */
1444 		}
1445 		info1 |= maxp << 16;
1446 
1447 		info2 |= (EHCI_TUNE_MULT_TT << 30);
1448 		info2 |= urb->dev->ttport << 23;
1449 
1450 		/* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
1451 
1452 		break;
1453 
1454 	case USB_SPEED_HIGH:		/* no TT involved */
1455 		info1 |= (2 << 12);	/* EPS "high" */
1456 		if (type == PIPE_CONTROL) {
1457 			info1 |= (EHCI_TUNE_RL_HS << 28);
1458 			info1 |= 64 << 16;	/* usb2 fixed maxpacket */
1459 			info1 |= 1 << 14;	/* toggle from qtd */
1460 			info2 |= (EHCI_TUNE_MULT_HS << 30);
1461 		} else if (type == PIPE_BULK) {
1462 			info1 |= (EHCI_TUNE_RL_HS << 28);
1463 			info1 |= 512 << 16;	/* usb2 fixed maxpacket */
1464 			info2 |= (EHCI_TUNE_MULT_HS << 30);
1465 		} else {		/* PIPE_INTERRUPT */
1466 			info1 |= max_packet(maxp) << 16;
1467 			info2 |= hb_mult(maxp) << 30;
1468 		}
1469 		break;
1470 	default:
1471 		oxu_dbg(oxu, "bogus dev %p speed %d\n", urb->dev, urb->dev->speed);
1472 done:
1473 		qh_put(qh);
1474 		return NULL;
1475 	}
1476 
1477 	/* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
1478 
1479 	/* init as live, toggle clear, advance to dummy */
1480 	qh->qh_state = QH_STATE_IDLE;
1481 	qh->hw_info1 = cpu_to_le32(info1);
1482 	qh->hw_info2 = cpu_to_le32(info2);
1483 	usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input, 1);
1484 	qh_refresh(oxu, qh);
1485 	return qh;
1486 }
1487 
1488 /* Move qh (and its qtds) onto async queue; maybe enable queue.
1489  */
1490 static void qh_link_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
1491 {
1492 	__le32 dma = QH_NEXT(qh->qh_dma);
1493 	struct ehci_qh *head;
1494 
1495 	/* (re)start the async schedule? */
1496 	head = oxu->async;
1497 	timer_action_done(oxu, TIMER_ASYNC_OFF);
1498 	if (!head->qh_next.qh) {
1499 		u32	cmd = readl(&oxu->regs->command);
1500 
1501 		if (!(cmd & CMD_ASE)) {
1502 			/* in case a clear of CMD_ASE didn't take yet */
1503 			(void)handshake(oxu, &oxu->regs->status,
1504 					STS_ASS, 0, 150);
1505 			cmd |= CMD_ASE | CMD_RUN;
1506 			writel(cmd, &oxu->regs->command);
1507 			oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
1508 			/* posted write need not be known to HC yet ... */
1509 		}
1510 	}
1511 
1512 	/* clear halt and/or toggle; and maybe recover from silicon quirk */
1513 	if (qh->qh_state == QH_STATE_IDLE)
1514 		qh_refresh(oxu, qh);
1515 
1516 	/* splice right after start */
1517 	qh->qh_next = head->qh_next;
1518 	qh->hw_next = head->hw_next;
1519 	wmb();
1520 
1521 	head->qh_next.qh = qh;
1522 	head->hw_next = dma;
1523 
1524 	qh->qh_state = QH_STATE_LINKED;
1525 	/* qtd completions reported later by interrupt */
1526 }
1527 
1528 #define	QH_ADDR_MASK	cpu_to_le32(0x7f)
1529 
1530 /*
1531  * For control/bulk/interrupt, return QH with these TDs appended.
1532  * Allocates and initializes the QH if necessary.
1533  * Returns null if it can't allocate a QH it needs to.
1534  * If the QH has TDs (urbs) already, that's great.
1535  */
1536 static struct ehci_qh *qh_append_tds(struct oxu_hcd *oxu,
1537 				struct urb *urb, struct list_head *qtd_list,
1538 				int epnum, void	**ptr)
1539 {
1540 	struct ehci_qh *qh = NULL;
1541 
1542 	qh = (struct ehci_qh *) *ptr;
1543 	if (unlikely(qh == NULL)) {
1544 		/* can't sleep here, we have oxu->lock... */
1545 		qh = qh_make(oxu, urb, GFP_ATOMIC);
1546 		*ptr = qh;
1547 	}
1548 	if (likely(qh != NULL)) {
1549 		struct ehci_qtd	*qtd;
1550 
1551 		if (unlikely(list_empty(qtd_list)))
1552 			qtd = NULL;
1553 		else
1554 			qtd = list_entry(qtd_list->next, struct ehci_qtd,
1555 					qtd_list);
1556 
1557 		/* control qh may need patching ... */
1558 		if (unlikely(epnum == 0)) {
1559 
1560 			/* usb_reset_device() briefly reverts to address 0 */
1561 			if (usb_pipedevice(urb->pipe) == 0)
1562 				qh->hw_info1 &= ~QH_ADDR_MASK;
1563 		}
1564 
1565 		/* just one way to queue requests: swap with the dummy qtd.
1566 		 * only hc or qh_refresh() ever modify the overlay.
1567 		 */
1568 		if (likely(qtd != NULL)) {
1569 			struct ehci_qtd	*dummy;
1570 			dma_addr_t dma;
1571 			__le32 token;
1572 
1573 			/* to avoid racing the HC, use the dummy td instead of
1574 			 * the first td of our list (becomes new dummy).  both
1575 			 * tds stay deactivated until we're done, when the
1576 			 * HC is allowed to fetch the old dummy (4.10.2).
1577 			 */
1578 			token = qtd->hw_token;
1579 			qtd->hw_token = HALT_BIT;
1580 			wmb();
1581 			dummy = qh->dummy;
1582 
1583 			dma = dummy->qtd_dma;
1584 			*dummy = *qtd;
1585 			dummy->qtd_dma = dma;
1586 
1587 			list_del(&qtd->qtd_list);
1588 			list_add(&dummy->qtd_list, qtd_list);
1589 			list_splice(qtd_list, qh->qtd_list.prev);
1590 
1591 			ehci_qtd_init(qtd, qtd->qtd_dma);
1592 			qh->dummy = qtd;
1593 
1594 			/* hc must see the new dummy at list end */
1595 			dma = qtd->qtd_dma;
1596 			qtd = list_entry(qh->qtd_list.prev,
1597 					struct ehci_qtd, qtd_list);
1598 			qtd->hw_next = QTD_NEXT(dma);
1599 
1600 			/* let the hc process these next qtds */
1601 			dummy->hw_token = (token & ~(0x80));
1602 			wmb();
1603 			dummy->hw_token = token;
1604 
1605 			urb->hcpriv = qh_get(qh);
1606 		}
1607 	}
1608 	return qh;
1609 }
1610 
1611 static int submit_async(struct oxu_hcd	*oxu, struct urb *urb,
1612 			struct list_head *qtd_list, gfp_t mem_flags)
1613 {
1614 	struct ehci_qtd	*qtd;
1615 	int epnum;
1616 	unsigned long flags;
1617 	struct ehci_qh *qh = NULL;
1618 	int rc = 0;
1619 
1620 	qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
1621 	epnum = urb->ep->desc.bEndpointAddress;
1622 
1623 #ifdef OXU_URB_TRACE
1624 	oxu_dbg(oxu, "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1625 		__func__, urb->dev->devpath, urb,
1626 		epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1627 		urb->transfer_buffer_length,
1628 		qtd, urb->ep->hcpriv);
1629 #endif
1630 
1631 	spin_lock_irqsave(&oxu->lock, flags);
1632 	if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu)))) {
1633 		rc = -ESHUTDOWN;
1634 		goto done;
1635 	}
1636 
1637 	qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
1638 	if (unlikely(qh == NULL)) {
1639 		rc = -ENOMEM;
1640 		goto done;
1641 	}
1642 
1643 	/* Control/bulk operations through TTs don't need scheduling,
1644 	 * the HC and TT handle it when the TT has a buffer ready.
1645 	 */
1646 	if (likely(qh->qh_state == QH_STATE_IDLE))
1647 		qh_link_async(oxu, qh_get(qh));
1648 done:
1649 	spin_unlock_irqrestore(&oxu->lock, flags);
1650 	if (unlikely(qh == NULL))
1651 		qtd_list_free(oxu, urb, qtd_list);
1652 	return rc;
1653 }
1654 
1655 /* The async qh for the qtds being reclaimed are now unlinked from the HC */
1656 
1657 static void end_unlink_async(struct oxu_hcd *oxu)
1658 {
1659 	struct ehci_qh *qh = oxu->reclaim;
1660 	struct ehci_qh *next;
1661 
1662 	timer_action_done(oxu, TIMER_IAA_WATCHDOG);
1663 
1664 	qh->qh_state = QH_STATE_IDLE;
1665 	qh->qh_next.qh = NULL;
1666 	qh_put(qh);			/* refcount from reclaim */
1667 
1668 	/* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1669 	next = qh->reclaim;
1670 	oxu->reclaim = next;
1671 	oxu->reclaim_ready = 0;
1672 	qh->reclaim = NULL;
1673 
1674 	qh_completions(oxu, qh);
1675 
1676 	if (!list_empty(&qh->qtd_list)
1677 			&& HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
1678 		qh_link_async(oxu, qh);
1679 	else {
1680 		qh_put(qh);		/* refcount from async list */
1681 
1682 		/* it's not free to turn the async schedule on/off; leave it
1683 		 * active but idle for a while once it empties.
1684 		 */
1685 		if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state)
1686 				&& oxu->async->qh_next.qh == NULL)
1687 			timer_action(oxu, TIMER_ASYNC_OFF);
1688 	}
1689 
1690 	if (next) {
1691 		oxu->reclaim = NULL;
1692 		start_unlink_async(oxu, next);
1693 	}
1694 }
1695 
1696 /* makes sure the async qh will become idle */
1697 /* caller must own oxu->lock */
1698 
1699 static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
1700 {
1701 	int cmd = readl(&oxu->regs->command);
1702 	struct ehci_qh *prev;
1703 
1704 #ifdef DEBUG
1705 	assert_spin_locked(&oxu->lock);
1706 	BUG_ON(oxu->reclaim || (qh->qh_state != QH_STATE_LINKED
1707 				&& qh->qh_state != QH_STATE_UNLINK_WAIT));
1708 #endif
1709 
1710 	/* stop async schedule right now? */
1711 	if (unlikely(qh == oxu->async)) {
1712 		/* can't get here without STS_ASS set */
1713 		if (oxu_to_hcd(oxu)->state != HC_STATE_HALT
1714 				&& !oxu->reclaim) {
1715 			/* ... and CMD_IAAD clear */
1716 			writel(cmd & ~CMD_ASE, &oxu->regs->command);
1717 			wmb();
1718 			/* handshake later, if we need to */
1719 			timer_action_done(oxu, TIMER_ASYNC_OFF);
1720 		}
1721 		return;
1722 	}
1723 
1724 	qh->qh_state = QH_STATE_UNLINK;
1725 	oxu->reclaim = qh = qh_get(qh);
1726 
1727 	prev = oxu->async;
1728 	while (prev->qh_next.qh != qh)
1729 		prev = prev->qh_next.qh;
1730 
1731 	prev->hw_next = qh->hw_next;
1732 	prev->qh_next = qh->qh_next;
1733 	wmb();
1734 
1735 	if (unlikely(oxu_to_hcd(oxu)->state == HC_STATE_HALT)) {
1736 		/* if (unlikely(qh->reclaim != 0))
1737 		 *	this will recurse, probably not much
1738 		 */
1739 		end_unlink_async(oxu);
1740 		return;
1741 	}
1742 
1743 	oxu->reclaim_ready = 0;
1744 	cmd |= CMD_IAAD;
1745 	writel(cmd, &oxu->regs->command);
1746 	(void) readl(&oxu->regs->command);
1747 	timer_action(oxu, TIMER_IAA_WATCHDOG);
1748 }
1749 
1750 static void scan_async(struct oxu_hcd *oxu)
1751 {
1752 	struct ehci_qh *qh;
1753 	enum ehci_timer_action action = TIMER_IO_WATCHDOG;
1754 
1755 	if (!++(oxu->stamp))
1756 		oxu->stamp++;
1757 	timer_action_done(oxu, TIMER_ASYNC_SHRINK);
1758 rescan:
1759 	qh = oxu->async->qh_next.qh;
1760 	if (likely(qh != NULL)) {
1761 		do {
1762 			/* clean any finished work for this qh */
1763 			if (!list_empty(&qh->qtd_list)
1764 					&& qh->stamp != oxu->stamp) {
1765 				int temp;
1766 
1767 				/* unlinks could happen here; completion
1768 				 * reporting drops the lock.  rescan using
1769 				 * the latest schedule, but don't rescan
1770 				 * qhs we already finished (no looping).
1771 				 */
1772 				qh = qh_get(qh);
1773 				qh->stamp = oxu->stamp;
1774 				temp = qh_completions(oxu, qh);
1775 				qh_put(qh);
1776 				if (temp != 0)
1777 					goto rescan;
1778 			}
1779 
1780 			/* unlink idle entries, reducing HC PCI usage as well
1781 			 * as HCD schedule-scanning costs.  delay for any qh
1782 			 * we just scanned, there's a not-unusual case that it
1783 			 * doesn't stay idle for long.
1784 			 * (plus, avoids some kind of re-activation race.)
1785 			 */
1786 			if (list_empty(&qh->qtd_list)) {
1787 				if (qh->stamp == oxu->stamp)
1788 					action = TIMER_ASYNC_SHRINK;
1789 				else if (!oxu->reclaim
1790 					    && qh->qh_state == QH_STATE_LINKED)
1791 					start_unlink_async(oxu, qh);
1792 			}
1793 
1794 			qh = qh->qh_next.qh;
1795 		} while (qh);
1796 	}
1797 	if (action == TIMER_ASYNC_SHRINK)
1798 		timer_action(oxu, TIMER_ASYNC_SHRINK);
1799 }
1800 
1801 /*
1802  * periodic_next_shadow - return "next" pointer on shadow list
1803  * @periodic: host pointer to qh/itd/sitd
1804  * @tag: hardware tag for type of this record
1805  */
1806 static union ehci_shadow *periodic_next_shadow(union ehci_shadow *periodic,
1807 						__le32 tag)
1808 {
1809 	switch (tag) {
1810 	default:
1811 	case Q_TYPE_QH:
1812 		return &periodic->qh->qh_next;
1813 	}
1814 }
1815 
1816 /* caller must hold oxu->lock */
1817 static void periodic_unlink(struct oxu_hcd *oxu, unsigned frame, void *ptr)
1818 {
1819 	union ehci_shadow *prev_p = &oxu->pshadow[frame];
1820 	__le32 *hw_p = &oxu->periodic[frame];
1821 	union ehci_shadow here = *prev_p;
1822 
1823 	/* find predecessor of "ptr"; hw and shadow lists are in sync */
1824 	while (here.ptr && here.ptr != ptr) {
1825 		prev_p = periodic_next_shadow(prev_p, Q_NEXT_TYPE(*hw_p));
1826 		hw_p = here.hw_next;
1827 		here = *prev_p;
1828 	}
1829 	/* an interrupt entry (at list end) could have been shared */
1830 	if (!here.ptr)
1831 		return;
1832 
1833 	/* update shadow and hardware lists ... the old "next" pointers
1834 	 * from ptr may still be in use, the caller updates them.
1835 	 */
1836 	*prev_p = *periodic_next_shadow(&here, Q_NEXT_TYPE(*hw_p));
1837 	*hw_p = *here.hw_next;
1838 }
1839 
1840 /* how many of the uframe's 125 usecs are allocated? */
1841 static unsigned short periodic_usecs(struct oxu_hcd *oxu,
1842 					unsigned frame, unsigned uframe)
1843 {
1844 	__le32 *hw_p = &oxu->periodic[frame];
1845 	union ehci_shadow *q = &oxu->pshadow[frame];
1846 	unsigned usecs = 0;
1847 
1848 	while (q->ptr) {
1849 		switch (Q_NEXT_TYPE(*hw_p)) {
1850 		case Q_TYPE_QH:
1851 		default:
1852 			/* is it in the S-mask? */
1853 			if (q->qh->hw_info2 & cpu_to_le32(1 << uframe))
1854 				usecs += q->qh->usecs;
1855 			/* ... or C-mask? */
1856 			if (q->qh->hw_info2 & cpu_to_le32(1 << (8 + uframe)))
1857 				usecs += q->qh->c_usecs;
1858 			hw_p = &q->qh->hw_next;
1859 			q = &q->qh->qh_next;
1860 			break;
1861 		}
1862 	}
1863 #ifdef DEBUG
1864 	if (usecs > 100)
1865 		oxu_err(oxu, "uframe %d sched overrun: %d usecs\n",
1866 						frame * 8 + uframe, usecs);
1867 #endif
1868 	return usecs;
1869 }
1870 
1871 static int enable_periodic(struct oxu_hcd *oxu)
1872 {
1873 	u32 cmd;
1874 	int status;
1875 
1876 	/* did clearing PSE did take effect yet?
1877 	 * takes effect only at frame boundaries...
1878 	 */
1879 	status = handshake(oxu, &oxu->regs->status, STS_PSS, 0, 9 * 125);
1880 	if (status != 0) {
1881 		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
1882 		usb_hc_died(oxu_to_hcd(oxu));
1883 		return status;
1884 	}
1885 
1886 	cmd = readl(&oxu->regs->command) | CMD_PSE;
1887 	writel(cmd, &oxu->regs->command);
1888 	/* posted write ... PSS happens later */
1889 	oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
1890 
1891 	/* make sure ehci_work scans these */
1892 	oxu->next_uframe = readl(&oxu->regs->frame_index)
1893 		% (oxu->periodic_size << 3);
1894 	return 0;
1895 }
1896 
1897 static int disable_periodic(struct oxu_hcd *oxu)
1898 {
1899 	u32 cmd;
1900 	int status;
1901 
1902 	/* did setting PSE not take effect yet?
1903 	 * takes effect only at frame boundaries...
1904 	 */
1905 	status = handshake(oxu, &oxu->regs->status, STS_PSS, STS_PSS, 9 * 125);
1906 	if (status != 0) {
1907 		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
1908 		usb_hc_died(oxu_to_hcd(oxu));
1909 		return status;
1910 	}
1911 
1912 	cmd = readl(&oxu->regs->command) & ~CMD_PSE;
1913 	writel(cmd, &oxu->regs->command);
1914 	/* posted write ... */
1915 
1916 	oxu->next_uframe = -1;
1917 	return 0;
1918 }
1919 
1920 /* periodic schedule slots have iso tds (normal or split) first, then a
1921  * sparse tree for active interrupt transfers.
1922  *
1923  * this just links in a qh; caller guarantees uframe masks are set right.
1924  * no FSTN support (yet; oxu 0.96+)
1925  */
1926 static int qh_link_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
1927 {
1928 	unsigned i;
1929 	unsigned period = qh->period;
1930 
1931 	dev_dbg(&qh->dev->dev,
1932 		"link qh%d-%04x/%p start %d [%d/%d us]\n",
1933 		period, le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
1934 		qh, qh->start, qh->usecs, qh->c_usecs);
1935 
1936 	/* high bandwidth, or otherwise every microframe */
1937 	if (period == 0)
1938 		period = 1;
1939 
1940 	for (i = qh->start; i < oxu->periodic_size; i += period) {
1941 		union ehci_shadow	*prev = &oxu->pshadow[i];
1942 		__le32			*hw_p = &oxu->periodic[i];
1943 		union ehci_shadow	here = *prev;
1944 		__le32			type = 0;
1945 
1946 		/* skip the iso nodes at list head */
1947 		while (here.ptr) {
1948 			type = Q_NEXT_TYPE(*hw_p);
1949 			if (type == Q_TYPE_QH)
1950 				break;
1951 			prev = periodic_next_shadow(prev, type);
1952 			hw_p = &here.qh->hw_next;
1953 			here = *prev;
1954 		}
1955 
1956 		/* sorting each branch by period (slow-->fast)
1957 		 * enables sharing interior tree nodes
1958 		 */
1959 		while (here.ptr && qh != here.qh) {
1960 			if (qh->period > here.qh->period)
1961 				break;
1962 			prev = &here.qh->qh_next;
1963 			hw_p = &here.qh->hw_next;
1964 			here = *prev;
1965 		}
1966 		/* link in this qh, unless some earlier pass did that */
1967 		if (qh != here.qh) {
1968 			qh->qh_next = here;
1969 			if (here.qh)
1970 				qh->hw_next = *hw_p;
1971 			wmb();
1972 			prev->qh = qh;
1973 			*hw_p = QH_NEXT(qh->qh_dma);
1974 		}
1975 	}
1976 	qh->qh_state = QH_STATE_LINKED;
1977 	qh_get(qh);
1978 
1979 	/* update per-qh bandwidth for usbfs */
1980 	oxu_to_hcd(oxu)->self.bandwidth_allocated += qh->period
1981 		? ((qh->usecs + qh->c_usecs) / qh->period)
1982 		: (qh->usecs * 8);
1983 
1984 	/* maybe enable periodic schedule processing */
1985 	if (!oxu->periodic_sched++)
1986 		return enable_periodic(oxu);
1987 
1988 	return 0;
1989 }
1990 
1991 static void qh_unlink_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
1992 {
1993 	unsigned i;
1994 	unsigned period;
1995 
1996 	/* FIXME:
1997 	 *   IF this isn't high speed
1998 	 *   and this qh is active in the current uframe
1999 	 *   (and overlay token SplitXstate is false?)
2000 	 * THEN
2001 	 *   qh->hw_info1 |= cpu_to_le32(1 << 7 "ignore");
2002 	 */
2003 
2004 	/* high bandwidth, or otherwise part of every microframe */
2005 	period = qh->period;
2006 	if (period == 0)
2007 		period = 1;
2008 
2009 	for (i = qh->start; i < oxu->periodic_size; i += period)
2010 		periodic_unlink(oxu, i, qh);
2011 
2012 	/* update per-qh bandwidth for usbfs */
2013 	oxu_to_hcd(oxu)->self.bandwidth_allocated -= qh->period
2014 		? ((qh->usecs + qh->c_usecs) / qh->period)
2015 		: (qh->usecs * 8);
2016 
2017 	dev_dbg(&qh->dev->dev,
2018 		"unlink qh%d-%04x/%p start %d [%d/%d us]\n",
2019 		qh->period,
2020 		le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
2021 		qh, qh->start, qh->usecs, qh->c_usecs);
2022 
2023 	/* qh->qh_next still "live" to HC */
2024 	qh->qh_state = QH_STATE_UNLINK;
2025 	qh->qh_next.ptr = NULL;
2026 	qh_put(qh);
2027 
2028 	/* maybe turn off periodic schedule */
2029 	oxu->periodic_sched--;
2030 	if (!oxu->periodic_sched)
2031 		(void) disable_periodic(oxu);
2032 }
2033 
2034 static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2035 {
2036 	unsigned wait;
2037 
2038 	qh_unlink_periodic(oxu, qh);
2039 
2040 	/* simple/paranoid:  always delay, expecting the HC needs to read
2041 	 * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
2042 	 * expect hub_wq to clean up after any CSPLITs we won't issue.
2043 	 * active high speed queues may need bigger delays...
2044 	 */
2045 	if (list_empty(&qh->qtd_list)
2046 		|| (cpu_to_le32(QH_CMASK) & qh->hw_info2) != 0)
2047 		wait = 2;
2048 	else
2049 		wait = 55;	/* worst case: 3 * 1024 */
2050 
2051 	udelay(wait);
2052 	qh->qh_state = QH_STATE_IDLE;
2053 	qh->hw_next = EHCI_LIST_END;
2054 	wmb();
2055 }
2056 
2057 static int check_period(struct oxu_hcd *oxu,
2058 			unsigned frame, unsigned uframe,
2059 			unsigned period, unsigned usecs)
2060 {
2061 	int claimed;
2062 
2063 	/* complete split running into next frame?
2064 	 * given FSTN support, we could sometimes check...
2065 	 */
2066 	if (uframe >= 8)
2067 		return 0;
2068 
2069 	/*
2070 	 * 80% periodic == 100 usec/uframe available
2071 	 * convert "usecs we need" to "max already claimed"
2072 	 */
2073 	usecs = 100 - usecs;
2074 
2075 	/* we "know" 2 and 4 uframe intervals were rejected; so
2076 	 * for period 0, check _every_ microframe in the schedule.
2077 	 */
2078 	if (unlikely(period == 0)) {
2079 		do {
2080 			for (uframe = 0; uframe < 7; uframe++) {
2081 				claimed = periodic_usecs(oxu, frame, uframe);
2082 				if (claimed > usecs)
2083 					return 0;
2084 			}
2085 		} while ((frame += 1) < oxu->periodic_size);
2086 
2087 	/* just check the specified uframe, at that period */
2088 	} else {
2089 		do {
2090 			claimed = periodic_usecs(oxu, frame, uframe);
2091 			if (claimed > usecs)
2092 				return 0;
2093 		} while ((frame += period) < oxu->periodic_size);
2094 	}
2095 
2096 	return 1;
2097 }
2098 
2099 static int check_intr_schedule(struct oxu_hcd	*oxu,
2100 				unsigned frame, unsigned uframe,
2101 				const struct ehci_qh *qh, __le32 *c_maskp)
2102 {
2103 	int retval = -ENOSPC;
2104 
2105 	if (qh->c_usecs && uframe >= 6)		/* FSTN territory? */
2106 		goto done;
2107 
2108 	if (!check_period(oxu, frame, uframe, qh->period, qh->usecs))
2109 		goto done;
2110 	if (!qh->c_usecs) {
2111 		retval = 0;
2112 		*c_maskp = 0;
2113 		goto done;
2114 	}
2115 
2116 done:
2117 	return retval;
2118 }
2119 
2120 /* "first fit" scheduling policy used the first time through,
2121  * or when the previous schedule slot can't be re-used.
2122  */
2123 static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2124 {
2125 	int		status;
2126 	unsigned	uframe;
2127 	__le32		c_mask;
2128 	unsigned	frame;		/* 0..(qh->period - 1), or NO_FRAME */
2129 
2130 	qh_refresh(oxu, qh);
2131 	qh->hw_next = EHCI_LIST_END;
2132 	frame = qh->start;
2133 
2134 	/* reuse the previous schedule slots, if we can */
2135 	if (frame < qh->period) {
2136 		uframe = ffs(le32_to_cpup(&qh->hw_info2) & QH_SMASK);
2137 		status = check_intr_schedule(oxu, frame, --uframe,
2138 				qh, &c_mask);
2139 	} else {
2140 		uframe = 0;
2141 		c_mask = 0;
2142 		status = -ENOSPC;
2143 	}
2144 
2145 	/* else scan the schedule to find a group of slots such that all
2146 	 * uframes have enough periodic bandwidth available.
2147 	 */
2148 	if (status) {
2149 		/* "normal" case, uframing flexible except with splits */
2150 		if (qh->period) {
2151 			frame = qh->period - 1;
2152 			do {
2153 				for (uframe = 0; uframe < 8; uframe++) {
2154 					status = check_intr_schedule(oxu,
2155 							frame, uframe, qh,
2156 							&c_mask);
2157 					if (status == 0)
2158 						break;
2159 				}
2160 			} while (status && frame--);
2161 
2162 		/* qh->period == 0 means every uframe */
2163 		} else {
2164 			frame = 0;
2165 			status = check_intr_schedule(oxu, 0, 0, qh, &c_mask);
2166 		}
2167 		if (status)
2168 			goto done;
2169 		qh->start = frame;
2170 
2171 		/* reset S-frame and (maybe) C-frame masks */
2172 		qh->hw_info2 &= cpu_to_le32(~(QH_CMASK | QH_SMASK));
2173 		qh->hw_info2 |= qh->period
2174 			? cpu_to_le32(1 << uframe)
2175 			: cpu_to_le32(QH_SMASK);
2176 		qh->hw_info2 |= c_mask;
2177 	} else
2178 		oxu_dbg(oxu, "reused qh %p schedule\n", qh);
2179 
2180 	/* stuff into the periodic schedule */
2181 	status = qh_link_periodic(oxu, qh);
2182 done:
2183 	return status;
2184 }
2185 
2186 static int intr_submit(struct oxu_hcd *oxu, struct urb *urb,
2187 			struct list_head *qtd_list, gfp_t mem_flags)
2188 {
2189 	unsigned epnum;
2190 	unsigned long flags;
2191 	struct ehci_qh *qh;
2192 	int status = 0;
2193 	struct list_head	empty;
2194 
2195 	/* get endpoint and transfer/schedule data */
2196 	epnum = urb->ep->desc.bEndpointAddress;
2197 
2198 	spin_lock_irqsave(&oxu->lock, flags);
2199 
2200 	if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu)))) {
2201 		status = -ESHUTDOWN;
2202 		goto done;
2203 	}
2204 
2205 	/* get qh and force any scheduling errors */
2206 	INIT_LIST_HEAD(&empty);
2207 	qh = qh_append_tds(oxu, urb, &empty, epnum, &urb->ep->hcpriv);
2208 	if (qh == NULL) {
2209 		status = -ENOMEM;
2210 		goto done;
2211 	}
2212 	if (qh->qh_state == QH_STATE_IDLE) {
2213 		status = qh_schedule(oxu, qh);
2214 		if (status != 0)
2215 			goto done;
2216 	}
2217 
2218 	/* then queue the urb's tds to the qh */
2219 	qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
2220 	BUG_ON(qh == NULL);
2221 
2222 	/* ... update usbfs periodic stats */
2223 	oxu_to_hcd(oxu)->self.bandwidth_int_reqs++;
2224 
2225 done:
2226 	spin_unlock_irqrestore(&oxu->lock, flags);
2227 	if (status)
2228 		qtd_list_free(oxu, urb, qtd_list);
2229 
2230 	return status;
2231 }
2232 
2233 static inline int itd_submit(struct oxu_hcd *oxu, struct urb *urb,
2234 						gfp_t mem_flags)
2235 {
2236 	oxu_dbg(oxu, "iso support is missing!\n");
2237 	return -ENOSYS;
2238 }
2239 
2240 static inline int sitd_submit(struct oxu_hcd *oxu, struct urb *urb,
2241 						gfp_t mem_flags)
2242 {
2243 	oxu_dbg(oxu, "split iso support is missing!\n");
2244 	return -ENOSYS;
2245 }
2246 
2247 static void scan_periodic(struct oxu_hcd *oxu)
2248 {
2249 	unsigned frame, clock, now_uframe, mod;
2250 	unsigned modified;
2251 
2252 	mod = oxu->periodic_size << 3;
2253 
2254 	/*
2255 	 * When running, scan from last scan point up to "now"
2256 	 * else clean up by scanning everything that's left.
2257 	 * Touches as few pages as possible:  cache-friendly.
2258 	 */
2259 	now_uframe = oxu->next_uframe;
2260 	if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2261 		clock = readl(&oxu->regs->frame_index);
2262 	else
2263 		clock = now_uframe + mod - 1;
2264 	clock %= mod;
2265 
2266 	for (;;) {
2267 		union ehci_shadow	q, *q_p;
2268 		__le32			type, *hw_p;
2269 		unsigned		uframes;
2270 
2271 		/* don't scan past the live uframe */
2272 		frame = now_uframe >> 3;
2273 		if (frame == (clock >> 3))
2274 			uframes = now_uframe & 0x07;
2275 		else {
2276 			/* safe to scan the whole frame at once */
2277 			now_uframe |= 0x07;
2278 			uframes = 8;
2279 		}
2280 
2281 restart:
2282 		/* scan each element in frame's queue for completions */
2283 		q_p = &oxu->pshadow[frame];
2284 		hw_p = &oxu->periodic[frame];
2285 		q.ptr = q_p->ptr;
2286 		type = Q_NEXT_TYPE(*hw_p);
2287 		modified = 0;
2288 
2289 		while (q.ptr != NULL) {
2290 			union ehci_shadow temp;
2291 			int live;
2292 
2293 			live = HC_IS_RUNNING(oxu_to_hcd(oxu)->state);
2294 			switch (type) {
2295 			case Q_TYPE_QH:
2296 				/* handle any completions */
2297 				temp.qh = qh_get(q.qh);
2298 				type = Q_NEXT_TYPE(q.qh->hw_next);
2299 				q = q.qh->qh_next;
2300 				modified = qh_completions(oxu, temp.qh);
2301 				if (unlikely(list_empty(&temp.qh->qtd_list)))
2302 					intr_deschedule(oxu, temp.qh);
2303 				qh_put(temp.qh);
2304 				break;
2305 			default:
2306 				oxu_dbg(oxu, "corrupt type %d frame %d shadow %p\n",
2307 					type, frame, q.ptr);
2308 				q.ptr = NULL;
2309 			}
2310 
2311 			/* assume completion callbacks modify the queue */
2312 			if (unlikely(modified))
2313 				goto restart;
2314 		}
2315 
2316 		/* Stop when we catch up to the HC */
2317 
2318 		/* FIXME:  this assumes we won't get lapped when
2319 		 * latencies climb; that should be rare, but...
2320 		 * detect it, and just go all the way around.
2321 		 * FLR might help detect this case, so long as latencies
2322 		 * don't exceed periodic_size msec (default 1.024 sec).
2323 		 */
2324 
2325 		/* FIXME: likewise assumes HC doesn't halt mid-scan */
2326 
2327 		if (now_uframe == clock) {
2328 			unsigned	now;
2329 
2330 			if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2331 				break;
2332 			oxu->next_uframe = now_uframe;
2333 			now = readl(&oxu->regs->frame_index) % mod;
2334 			if (now_uframe == now)
2335 				break;
2336 
2337 			/* rescan the rest of this frame, then ... */
2338 			clock = now;
2339 		} else {
2340 			now_uframe++;
2341 			now_uframe %= mod;
2342 		}
2343 	}
2344 }
2345 
2346 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
2347  * The firmware seems to think that powering off is a wakeup event!
2348  * This routine turns off remote wakeup and everything else, on all ports.
2349  */
2350 static void ehci_turn_off_all_ports(struct oxu_hcd *oxu)
2351 {
2352 	int port = HCS_N_PORTS(oxu->hcs_params);
2353 
2354 	while (port--)
2355 		writel(PORT_RWC_BITS, &oxu->regs->port_status[port]);
2356 }
2357 
2358 static void ehci_port_power(struct oxu_hcd *oxu, int is_on)
2359 {
2360 	unsigned port;
2361 
2362 	if (!HCS_PPC(oxu->hcs_params))
2363 		return;
2364 
2365 	oxu_dbg(oxu, "...power%s ports...\n", is_on ? "up" : "down");
2366 	for (port = HCS_N_PORTS(oxu->hcs_params); port > 0; )
2367 		(void) oxu_hub_control(oxu_to_hcd(oxu),
2368 				is_on ? SetPortFeature : ClearPortFeature,
2369 				USB_PORT_FEAT_POWER,
2370 				port--, NULL, 0);
2371 	msleep(20);
2372 }
2373 
2374 /* Called from some interrupts, timers, and so on.
2375  * It calls driver completion functions, after dropping oxu->lock.
2376  */
2377 static void ehci_work(struct oxu_hcd *oxu)
2378 {
2379 	timer_action_done(oxu, TIMER_IO_WATCHDOG);
2380 	if (oxu->reclaim_ready)
2381 		end_unlink_async(oxu);
2382 
2383 	/* another CPU may drop oxu->lock during a schedule scan while
2384 	 * it reports urb completions.  this flag guards against bogus
2385 	 * attempts at re-entrant schedule scanning.
2386 	 */
2387 	if (oxu->scanning)
2388 		return;
2389 	oxu->scanning = 1;
2390 	scan_async(oxu);
2391 	if (oxu->next_uframe != -1)
2392 		scan_periodic(oxu);
2393 	oxu->scanning = 0;
2394 
2395 	/* the IO watchdog guards against hardware or driver bugs that
2396 	 * misplace IRQs, and should let us run completely without IRQs.
2397 	 * such lossage has been observed on both VT6202 and VT8235.
2398 	 */
2399 	if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state) &&
2400 			(oxu->async->qh_next.ptr != NULL ||
2401 			 oxu->periodic_sched != 0))
2402 		timer_action(oxu, TIMER_IO_WATCHDOG);
2403 }
2404 
2405 static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
2406 {
2407 	/* if we need to use IAA and it's busy, defer */
2408 	if (qh->qh_state == QH_STATE_LINKED
2409 			&& oxu->reclaim
2410 			&& HC_IS_RUNNING(oxu_to_hcd(oxu)->state)) {
2411 		struct ehci_qh		*last;
2412 
2413 		for (last = oxu->reclaim;
2414 				last->reclaim;
2415 				last = last->reclaim)
2416 			continue;
2417 		qh->qh_state = QH_STATE_UNLINK_WAIT;
2418 		last->reclaim = qh;
2419 
2420 	/* bypass IAA if the hc can't care */
2421 	} else if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state) && oxu->reclaim)
2422 		end_unlink_async(oxu);
2423 
2424 	/* something else might have unlinked the qh by now */
2425 	if (qh->qh_state == QH_STATE_LINKED)
2426 		start_unlink_async(oxu, qh);
2427 }
2428 
2429 /*
2430  * USB host controller methods
2431  */
2432 
2433 static irqreturn_t oxu210_hcd_irq(struct usb_hcd *hcd)
2434 {
2435 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2436 	u32 status, pcd_status = 0;
2437 	int bh;
2438 
2439 	spin_lock(&oxu->lock);
2440 
2441 	status = readl(&oxu->regs->status);
2442 
2443 	/* e.g. cardbus physical eject */
2444 	if (status == ~(u32) 0) {
2445 		oxu_dbg(oxu, "device removed\n");
2446 		goto dead;
2447 	}
2448 
2449 	/* Shared IRQ? */
2450 	status &= INTR_MASK;
2451 	if (!status || unlikely(hcd->state == HC_STATE_HALT)) {
2452 		spin_unlock(&oxu->lock);
2453 		return IRQ_NONE;
2454 	}
2455 
2456 	/* clear (just) interrupts */
2457 	writel(status, &oxu->regs->status);
2458 	readl(&oxu->regs->command);	/* unblock posted write */
2459 	bh = 0;
2460 
2461 #ifdef OXU_VERBOSE_DEBUG
2462 	/* unrequested/ignored: Frame List Rollover */
2463 	dbg_status(oxu, "irq", status);
2464 #endif
2465 
2466 	/* INT, ERR, and IAA interrupt rates can be throttled */
2467 
2468 	/* normal [4.15.1.2] or error [4.15.1.1] completion */
2469 	if (likely((status & (STS_INT|STS_ERR)) != 0))
2470 		bh = 1;
2471 
2472 	/* complete the unlinking of some qh [4.15.2.3] */
2473 	if (status & STS_IAA) {
2474 		oxu->reclaim_ready = 1;
2475 		bh = 1;
2476 	}
2477 
2478 	/* remote wakeup [4.3.1] */
2479 	if (status & STS_PCD) {
2480 		unsigned i = HCS_N_PORTS(oxu->hcs_params);
2481 		pcd_status = status;
2482 
2483 		/* resume root hub? */
2484 		if (!(readl(&oxu->regs->command) & CMD_RUN))
2485 			usb_hcd_resume_root_hub(hcd);
2486 
2487 		while (i--) {
2488 			int pstatus = readl(&oxu->regs->port_status[i]);
2489 
2490 			if (pstatus & PORT_OWNER)
2491 				continue;
2492 			if (!(pstatus & PORT_RESUME)
2493 					|| oxu->reset_done[i] != 0)
2494 				continue;
2495 
2496 			/* start USB_RESUME_TIMEOUT resume signaling from this
2497 			 * port, and make hub_wq collect PORT_STAT_C_SUSPEND to
2498 			 * stop that signaling.
2499 			 */
2500 			oxu->reset_done[i] = jiffies +
2501 				msecs_to_jiffies(USB_RESUME_TIMEOUT);
2502 			oxu_dbg(oxu, "port %d remote wakeup\n", i + 1);
2503 			mod_timer(&hcd->rh_timer, oxu->reset_done[i]);
2504 		}
2505 	}
2506 
2507 	/* PCI errors [4.15.2.4] */
2508 	if (unlikely((status & STS_FATAL) != 0)) {
2509 		/* bogus "fatal" IRQs appear on some chips... why?  */
2510 		status = readl(&oxu->regs->status);
2511 		dbg_cmd(oxu, "fatal", readl(&oxu->regs->command));
2512 		dbg_status(oxu, "fatal", status);
2513 		if (status & STS_HALT) {
2514 			oxu_err(oxu, "fatal error\n");
2515 dead:
2516 			ehci_reset(oxu);
2517 			writel(0, &oxu->regs->configured_flag);
2518 			usb_hc_died(hcd);
2519 			/* generic layer kills/unlinks all urbs, then
2520 			 * uses oxu_stop to clean up the rest
2521 			 */
2522 			bh = 1;
2523 		}
2524 	}
2525 
2526 	if (bh)
2527 		ehci_work(oxu);
2528 	spin_unlock(&oxu->lock);
2529 	if (pcd_status & STS_PCD)
2530 		usb_hcd_poll_rh_status(hcd);
2531 	return IRQ_HANDLED;
2532 }
2533 
2534 static irqreturn_t oxu_irq(struct usb_hcd *hcd)
2535 {
2536 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2537 	int ret = IRQ_HANDLED;
2538 
2539 	u32 status = oxu_readl(hcd->regs, OXU_CHIPIRQSTATUS);
2540 	u32 enable = oxu_readl(hcd->regs, OXU_CHIPIRQEN_SET);
2541 
2542 	/* Disable all interrupt */
2543 	oxu_writel(hcd->regs, OXU_CHIPIRQEN_CLR, enable);
2544 
2545 	if ((oxu->is_otg && (status & OXU_USBOTGI)) ||
2546 		(!oxu->is_otg && (status & OXU_USBSPHI)))
2547 		oxu210_hcd_irq(hcd);
2548 	else
2549 		ret = IRQ_NONE;
2550 
2551 	/* Enable all interrupt back */
2552 	oxu_writel(hcd->regs, OXU_CHIPIRQEN_SET, enable);
2553 
2554 	return ret;
2555 }
2556 
2557 static void oxu_watchdog(unsigned long param)
2558 {
2559 	struct oxu_hcd	*oxu = (struct oxu_hcd *) param;
2560 	unsigned long flags;
2561 
2562 	spin_lock_irqsave(&oxu->lock, flags);
2563 
2564 	/* lost IAA irqs wedge things badly; seen with a vt8235 */
2565 	if (oxu->reclaim) {
2566 		u32 status = readl(&oxu->regs->status);
2567 		if (status & STS_IAA) {
2568 			oxu_vdbg(oxu, "lost IAA\n");
2569 			writel(STS_IAA, &oxu->regs->status);
2570 			oxu->reclaim_ready = 1;
2571 		}
2572 	}
2573 
2574 	/* stop async processing after it's idled a bit */
2575 	if (test_bit(TIMER_ASYNC_OFF, &oxu->actions))
2576 		start_unlink_async(oxu, oxu->async);
2577 
2578 	/* oxu could run by timer, without IRQs ... */
2579 	ehci_work(oxu);
2580 
2581 	spin_unlock_irqrestore(&oxu->lock, flags);
2582 }
2583 
2584 /* One-time init, only for memory state.
2585  */
2586 static int oxu_hcd_init(struct usb_hcd *hcd)
2587 {
2588 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2589 	u32 temp;
2590 	int retval;
2591 	u32 hcc_params;
2592 
2593 	spin_lock_init(&oxu->lock);
2594 
2595 	setup_timer(&oxu->watchdog, oxu_watchdog, (unsigned long)oxu);
2596 
2597 	/*
2598 	 * hw default: 1K periodic list heads, one per frame.
2599 	 * periodic_size can shrink by USBCMD update if hcc_params allows.
2600 	 */
2601 	oxu->periodic_size = DEFAULT_I_TDPS;
2602 	retval = ehci_mem_init(oxu, GFP_KERNEL);
2603 	if (retval < 0)
2604 		return retval;
2605 
2606 	/* controllers may cache some of the periodic schedule ... */
2607 	hcc_params = readl(&oxu->caps->hcc_params);
2608 	if (HCC_ISOC_CACHE(hcc_params))		/* full frame cache */
2609 		oxu->i_thresh = 8;
2610 	else					/* N microframes cached */
2611 		oxu->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
2612 
2613 	oxu->reclaim = NULL;
2614 	oxu->reclaim_ready = 0;
2615 	oxu->next_uframe = -1;
2616 
2617 	/*
2618 	 * dedicate a qh for the async ring head, since we couldn't unlink
2619 	 * a 'real' qh without stopping the async schedule [4.8].  use it
2620 	 * as the 'reclamation list head' too.
2621 	 * its dummy is used in hw_alt_next of many tds, to prevent the qh
2622 	 * from automatically advancing to the next td after short reads.
2623 	 */
2624 	oxu->async->qh_next.qh = NULL;
2625 	oxu->async->hw_next = QH_NEXT(oxu->async->qh_dma);
2626 	oxu->async->hw_info1 = cpu_to_le32(QH_HEAD);
2627 	oxu->async->hw_token = cpu_to_le32(QTD_STS_HALT);
2628 	oxu->async->hw_qtd_next = EHCI_LIST_END;
2629 	oxu->async->qh_state = QH_STATE_LINKED;
2630 	oxu->async->hw_alt_next = QTD_NEXT(oxu->async->dummy->qtd_dma);
2631 
2632 	/* clear interrupt enables, set irq latency */
2633 	if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
2634 		log2_irq_thresh = 0;
2635 	temp = 1 << (16 + log2_irq_thresh);
2636 	if (HCC_CANPARK(hcc_params)) {
2637 		/* HW default park == 3, on hardware that supports it (like
2638 		 * NVidia and ALI silicon), maximizes throughput on the async
2639 		 * schedule by avoiding QH fetches between transfers.
2640 		 *
2641 		 * With fast usb storage devices and NForce2, "park" seems to
2642 		 * make problems:  throughput reduction (!), data errors...
2643 		 */
2644 		if (park) {
2645 			park = min(park, (unsigned) 3);
2646 			temp |= CMD_PARK;
2647 			temp |= park << 8;
2648 		}
2649 		oxu_dbg(oxu, "park %d\n", park);
2650 	}
2651 	if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
2652 		/* periodic schedule size can be smaller than default */
2653 		temp &= ~(3 << 2);
2654 		temp |= (EHCI_TUNE_FLS << 2);
2655 	}
2656 	oxu->command = temp;
2657 
2658 	return 0;
2659 }
2660 
2661 /* Called during probe() after chip reset completes.
2662  */
2663 static int oxu_reset(struct usb_hcd *hcd)
2664 {
2665 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2666 
2667 	spin_lock_init(&oxu->mem_lock);
2668 	INIT_LIST_HEAD(&oxu->urb_list);
2669 	oxu->urb_len = 0;
2670 
2671 	/* FIMXE */
2672 	hcd->self.controller->dma_mask = NULL;
2673 
2674 	if (oxu->is_otg) {
2675 		oxu->caps = hcd->regs + OXU_OTG_CAP_OFFSET;
2676 		oxu->regs = hcd->regs + OXU_OTG_CAP_OFFSET + \
2677 			HC_LENGTH(readl(&oxu->caps->hc_capbase));
2678 
2679 		oxu->mem = hcd->regs + OXU_SPH_MEM;
2680 	} else {
2681 		oxu->caps = hcd->regs + OXU_SPH_CAP_OFFSET;
2682 		oxu->regs = hcd->regs + OXU_SPH_CAP_OFFSET + \
2683 			HC_LENGTH(readl(&oxu->caps->hc_capbase));
2684 
2685 		oxu->mem = hcd->regs + OXU_OTG_MEM;
2686 	}
2687 
2688 	oxu->hcs_params = readl(&oxu->caps->hcs_params);
2689 	oxu->sbrn = 0x20;
2690 
2691 	return oxu_hcd_init(hcd);
2692 }
2693 
2694 static int oxu_run(struct usb_hcd *hcd)
2695 {
2696 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2697 	int retval;
2698 	u32 temp, hcc_params;
2699 
2700 	hcd->uses_new_polling = 1;
2701 
2702 	/* EHCI spec section 4.1 */
2703 	retval = ehci_reset(oxu);
2704 	if (retval != 0) {
2705 		ehci_mem_cleanup(oxu);
2706 		return retval;
2707 	}
2708 	writel(oxu->periodic_dma, &oxu->regs->frame_list);
2709 	writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
2710 
2711 	/* hcc_params controls whether oxu->regs->segment must (!!!)
2712 	 * be used; it constrains QH/ITD/SITD and QTD locations.
2713 	 * pci_pool consistent memory always uses segment zero.
2714 	 * streaming mappings for I/O buffers, like pci_map_single(),
2715 	 * can return segments above 4GB, if the device allows.
2716 	 *
2717 	 * NOTE:  the dma mask is visible through dev->dma_mask, so
2718 	 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
2719 	 * Scsi_Host.highmem_io, and so forth.  It's readonly to all
2720 	 * host side drivers though.
2721 	 */
2722 	hcc_params = readl(&oxu->caps->hcc_params);
2723 	if (HCC_64BIT_ADDR(hcc_params))
2724 		writel(0, &oxu->regs->segment);
2725 
2726 	oxu->command &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE |
2727 				CMD_ASE | CMD_RESET);
2728 	oxu->command |= CMD_RUN;
2729 	writel(oxu->command, &oxu->regs->command);
2730 	dbg_cmd(oxu, "init", oxu->command);
2731 
2732 	/*
2733 	 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
2734 	 * are explicitly handed to companion controller(s), so no TT is
2735 	 * involved with the root hub.  (Except where one is integrated,
2736 	 * and there's no companion controller unless maybe for USB OTG.)
2737 	 */
2738 	hcd->state = HC_STATE_RUNNING;
2739 	writel(FLAG_CF, &oxu->regs->configured_flag);
2740 	readl(&oxu->regs->command);	/* unblock posted writes */
2741 
2742 	temp = HC_VERSION(readl(&oxu->caps->hc_capbase));
2743 	oxu_info(oxu, "USB %x.%x started, quasi-EHCI %x.%02x, driver %s%s\n",
2744 		((oxu->sbrn & 0xf0)>>4), (oxu->sbrn & 0x0f),
2745 		temp >> 8, temp & 0xff, DRIVER_VERSION,
2746 		ignore_oc ? ", overcurrent ignored" : "");
2747 
2748 	writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */
2749 
2750 	return 0;
2751 }
2752 
2753 static void oxu_stop(struct usb_hcd *hcd)
2754 {
2755 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2756 
2757 	/* Turn off port power on all root hub ports. */
2758 	ehci_port_power(oxu, 0);
2759 
2760 	/* no more interrupts ... */
2761 	del_timer_sync(&oxu->watchdog);
2762 
2763 	spin_lock_irq(&oxu->lock);
2764 	if (HC_IS_RUNNING(hcd->state))
2765 		ehci_quiesce(oxu);
2766 
2767 	ehci_reset(oxu);
2768 	writel(0, &oxu->regs->intr_enable);
2769 	spin_unlock_irq(&oxu->lock);
2770 
2771 	/* let companion controllers work when we aren't */
2772 	writel(0, &oxu->regs->configured_flag);
2773 
2774 	/* root hub is shut down separately (first, when possible) */
2775 	spin_lock_irq(&oxu->lock);
2776 	if (oxu->async)
2777 		ehci_work(oxu);
2778 	spin_unlock_irq(&oxu->lock);
2779 	ehci_mem_cleanup(oxu);
2780 
2781 	dbg_status(oxu, "oxu_stop completed", readl(&oxu->regs->status));
2782 }
2783 
2784 /* Kick in for silicon on any bus (not just pci, etc).
2785  * This forcibly disables dma and IRQs, helping kexec and other cases
2786  * where the next system software may expect clean state.
2787  */
2788 static void oxu_shutdown(struct usb_hcd *hcd)
2789 {
2790 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2791 
2792 	(void) ehci_halt(oxu);
2793 	ehci_turn_off_all_ports(oxu);
2794 
2795 	/* make BIOS/etc use companion controller during reboot */
2796 	writel(0, &oxu->regs->configured_flag);
2797 
2798 	/* unblock posted writes */
2799 	readl(&oxu->regs->configured_flag);
2800 }
2801 
2802 /* Non-error returns are a promise to giveback() the urb later
2803  * we drop ownership so next owner (or urb unlink) can get it
2804  *
2805  * urb + dev is in hcd.self.controller.urb_list
2806  * we're queueing TDs onto software and hardware lists
2807  *
2808  * hcd-specific init for hcpriv hasn't been done yet
2809  *
2810  * NOTE:  control, bulk, and interrupt share the same code to append TDs
2811  * to a (possibly active) QH, and the same QH scanning code.
2812  */
2813 static int __oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
2814 				gfp_t mem_flags)
2815 {
2816 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2817 	struct list_head qtd_list;
2818 
2819 	INIT_LIST_HEAD(&qtd_list);
2820 
2821 	switch (usb_pipetype(urb->pipe)) {
2822 	case PIPE_CONTROL:
2823 	case PIPE_BULK:
2824 	default:
2825 		if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
2826 			return -ENOMEM;
2827 		return submit_async(oxu, urb, &qtd_list, mem_flags);
2828 
2829 	case PIPE_INTERRUPT:
2830 		if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
2831 			return -ENOMEM;
2832 		return intr_submit(oxu, urb, &qtd_list, mem_flags);
2833 
2834 	case PIPE_ISOCHRONOUS:
2835 		if (urb->dev->speed == USB_SPEED_HIGH)
2836 			return itd_submit(oxu, urb, mem_flags);
2837 		else
2838 			return sitd_submit(oxu, urb, mem_flags);
2839 	}
2840 }
2841 
2842 /* This function is responsible for breaking URBs with big data size
2843  * into smaller size and processing small urbs in sequence.
2844  */
2845 static int oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
2846 				gfp_t mem_flags)
2847 {
2848 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2849 	int num, rem;
2850 	int transfer_buffer_length;
2851 	void *transfer_buffer;
2852 	struct urb *murb;
2853 	int i, ret;
2854 
2855 	/* If not bulk pipe just enqueue the URB */
2856 	if (!usb_pipebulk(urb->pipe))
2857 		return __oxu_urb_enqueue(hcd, urb, mem_flags);
2858 
2859 	/* Otherwise we should verify the USB transfer buffer size! */
2860 	transfer_buffer = urb->transfer_buffer;
2861 	transfer_buffer_length = urb->transfer_buffer_length;
2862 
2863 	num = urb->transfer_buffer_length / 4096;
2864 	rem = urb->transfer_buffer_length % 4096;
2865 	if (rem != 0)
2866 		num++;
2867 
2868 	/* If URB is smaller than 4096 bytes just enqueue it! */
2869 	if (num == 1)
2870 		return __oxu_urb_enqueue(hcd, urb, mem_flags);
2871 
2872 	/* Ok, we have more job to do! :) */
2873 
2874 	for (i = 0; i < num - 1; i++) {
2875 		/* Get free micro URB poll till a free urb is received */
2876 
2877 		do {
2878 			murb = (struct urb *) oxu_murb_alloc(oxu);
2879 			if (!murb)
2880 				schedule();
2881 		} while (!murb);
2882 
2883 		/* Coping the urb */
2884 		memcpy(murb, urb, sizeof(struct urb));
2885 
2886 		murb->transfer_buffer_length = 4096;
2887 		murb->transfer_buffer = transfer_buffer + i * 4096;
2888 
2889 		/* Null pointer for the encodes that this is a micro urb */
2890 		murb->complete = NULL;
2891 
2892 		((struct oxu_murb *) murb)->main = urb;
2893 		((struct oxu_murb *) murb)->last = 0;
2894 
2895 		/* This loop is to guarantee urb to be processed when there's
2896 		 * not enough resources at a particular time by retrying.
2897 		 */
2898 		do {
2899 			ret  = __oxu_urb_enqueue(hcd, murb, mem_flags);
2900 			if (ret)
2901 				schedule();
2902 		} while (ret);
2903 	}
2904 
2905 	/* Last urb requires special handling  */
2906 
2907 	/* Get free micro URB poll till a free urb is received */
2908 	do {
2909 		murb = (struct urb *) oxu_murb_alloc(oxu);
2910 		if (!murb)
2911 			schedule();
2912 	} while (!murb);
2913 
2914 	/* Coping the urb */
2915 	memcpy(murb, urb, sizeof(struct urb));
2916 
2917 	murb->transfer_buffer_length = rem > 0 ? rem : 4096;
2918 	murb->transfer_buffer = transfer_buffer + (num - 1) * 4096;
2919 
2920 	/* Null pointer for the encodes that this is a micro urb */
2921 	murb->complete = NULL;
2922 
2923 	((struct oxu_murb *) murb)->main = urb;
2924 	((struct oxu_murb *) murb)->last = 1;
2925 
2926 	do {
2927 		ret = __oxu_urb_enqueue(hcd, murb, mem_flags);
2928 		if (ret)
2929 			schedule();
2930 	} while (ret);
2931 
2932 	return ret;
2933 }
2934 
2935 /* Remove from hardware lists.
2936  * Completions normally happen asynchronously
2937  */
2938 static int oxu_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
2939 {
2940 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2941 	struct ehci_qh *qh;
2942 	unsigned long flags;
2943 
2944 	spin_lock_irqsave(&oxu->lock, flags);
2945 	switch (usb_pipetype(urb->pipe)) {
2946 	case PIPE_CONTROL:
2947 	case PIPE_BULK:
2948 	default:
2949 		qh = (struct ehci_qh *) urb->hcpriv;
2950 		if (!qh)
2951 			break;
2952 		unlink_async(oxu, qh);
2953 		break;
2954 
2955 	case PIPE_INTERRUPT:
2956 		qh = (struct ehci_qh *) urb->hcpriv;
2957 		if (!qh)
2958 			break;
2959 		switch (qh->qh_state) {
2960 		case QH_STATE_LINKED:
2961 			intr_deschedule(oxu, qh);
2962 			/* FALL THROUGH */
2963 		case QH_STATE_IDLE:
2964 			qh_completions(oxu, qh);
2965 			break;
2966 		default:
2967 			oxu_dbg(oxu, "bogus qh %p state %d\n",
2968 					qh, qh->qh_state);
2969 			goto done;
2970 		}
2971 
2972 		/* reschedule QH iff another request is queued */
2973 		if (!list_empty(&qh->qtd_list)
2974 				&& HC_IS_RUNNING(hcd->state)) {
2975 			int status;
2976 
2977 			status = qh_schedule(oxu, qh);
2978 			spin_unlock_irqrestore(&oxu->lock, flags);
2979 
2980 			if (status != 0) {
2981 				/* shouldn't happen often, but ...
2982 				 * FIXME kill those tds' urbs
2983 				 */
2984 				dev_err(hcd->self.controller,
2985 					"can't reschedule qh %p, err %d\n", qh,
2986 					status);
2987 			}
2988 			return status;
2989 		}
2990 		break;
2991 	}
2992 done:
2993 	spin_unlock_irqrestore(&oxu->lock, flags);
2994 	return 0;
2995 }
2996 
2997 /* Bulk qh holds the data toggle */
2998 static void oxu_endpoint_disable(struct usb_hcd *hcd,
2999 					struct usb_host_endpoint *ep)
3000 {
3001 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3002 	unsigned long		flags;
3003 	struct ehci_qh		*qh, *tmp;
3004 
3005 	/* ASSERT:  any requests/urbs are being unlinked */
3006 	/* ASSERT:  nobody can be submitting urbs for this any more */
3007 
3008 rescan:
3009 	spin_lock_irqsave(&oxu->lock, flags);
3010 	qh = ep->hcpriv;
3011 	if (!qh)
3012 		goto done;
3013 
3014 	/* endpoints can be iso streams.  for now, we don't
3015 	 * accelerate iso completions ... so spin a while.
3016 	 */
3017 	if (qh->hw_info1 == 0) {
3018 		oxu_vdbg(oxu, "iso delay\n");
3019 		goto idle_timeout;
3020 	}
3021 
3022 	if (!HC_IS_RUNNING(hcd->state))
3023 		qh->qh_state = QH_STATE_IDLE;
3024 	switch (qh->qh_state) {
3025 	case QH_STATE_LINKED:
3026 		for (tmp = oxu->async->qh_next.qh;
3027 				tmp && tmp != qh;
3028 				tmp = tmp->qh_next.qh)
3029 			continue;
3030 		/* periodic qh self-unlinks on empty */
3031 		if (!tmp)
3032 			goto nogood;
3033 		unlink_async(oxu, qh);
3034 		/* FALL THROUGH */
3035 	case QH_STATE_UNLINK:		/* wait for hw to finish? */
3036 idle_timeout:
3037 		spin_unlock_irqrestore(&oxu->lock, flags);
3038 		schedule_timeout_uninterruptible(1);
3039 		goto rescan;
3040 	case QH_STATE_IDLE:		/* fully unlinked */
3041 		if (list_empty(&qh->qtd_list)) {
3042 			qh_put(qh);
3043 			break;
3044 		}
3045 		/* else FALL THROUGH */
3046 	default:
3047 nogood:
3048 		/* caller was supposed to have unlinked any requests;
3049 		 * that's not our job.  just leak this memory.
3050 		 */
3051 		oxu_err(oxu, "qh %p (#%02x) state %d%s\n",
3052 			qh, ep->desc.bEndpointAddress, qh->qh_state,
3053 			list_empty(&qh->qtd_list) ? "" : "(has tds)");
3054 		break;
3055 	}
3056 	ep->hcpriv = NULL;
3057 done:
3058 	spin_unlock_irqrestore(&oxu->lock, flags);
3059 }
3060 
3061 static int oxu_get_frame(struct usb_hcd *hcd)
3062 {
3063 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3064 
3065 	return (readl(&oxu->regs->frame_index) >> 3) %
3066 		oxu->periodic_size;
3067 }
3068 
3069 /* Build "status change" packet (one or two bytes) from HC registers */
3070 static int oxu_hub_status_data(struct usb_hcd *hcd, char *buf)
3071 {
3072 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3073 	u32 temp, mask, status = 0;
3074 	int ports, i, retval = 1;
3075 	unsigned long flags;
3076 
3077 	/* if !PM, root hub timers won't get shut down ... */
3078 	if (!HC_IS_RUNNING(hcd->state))
3079 		return 0;
3080 
3081 	/* init status to no-changes */
3082 	buf[0] = 0;
3083 	ports = HCS_N_PORTS(oxu->hcs_params);
3084 	if (ports > 7) {
3085 		buf[1] = 0;
3086 		retval++;
3087 	}
3088 
3089 	/* Some boards (mostly VIA?) report bogus overcurrent indications,
3090 	 * causing massive log spam unless we completely ignore them.  It
3091 	 * may be relevant that VIA VT8235 controllers, where PORT_POWER is
3092 	 * always set, seem to clear PORT_OCC and PORT_CSC when writing to
3093 	 * PORT_POWER; that's surprising, but maybe within-spec.
3094 	 */
3095 	if (!ignore_oc)
3096 		mask = PORT_CSC | PORT_PEC | PORT_OCC;
3097 	else
3098 		mask = PORT_CSC | PORT_PEC;
3099 
3100 	/* no hub change reports (bit 0) for now (power, ...) */
3101 
3102 	/* port N changes (bit N)? */
3103 	spin_lock_irqsave(&oxu->lock, flags);
3104 	for (i = 0; i < ports; i++) {
3105 		temp = readl(&oxu->regs->port_status[i]);
3106 
3107 		/*
3108 		 * Return status information even for ports with OWNER set.
3109 		 * Otherwise hub_wq wouldn't see the disconnect event when a
3110 		 * high-speed device is switched over to the companion
3111 		 * controller by the user.
3112 		 */
3113 
3114 		if (!(temp & PORT_CONNECT))
3115 			oxu->reset_done[i] = 0;
3116 		if ((temp & mask) != 0 || ((temp & PORT_RESUME) != 0 &&
3117 				time_after_eq(jiffies, oxu->reset_done[i]))) {
3118 			if (i < 7)
3119 				buf[0] |= 1 << (i + 1);
3120 			else
3121 				buf[1] |= 1 << (i - 7);
3122 			status = STS_PCD;
3123 		}
3124 	}
3125 	/* FIXME autosuspend idle root hubs */
3126 	spin_unlock_irqrestore(&oxu->lock, flags);
3127 	return status ? retval : 0;
3128 }
3129 
3130 /* Returns the speed of a device attached to a port on the root hub. */
3131 static inline unsigned int oxu_port_speed(struct oxu_hcd *oxu,
3132 						unsigned int portsc)
3133 {
3134 	switch ((portsc >> 26) & 3) {
3135 	case 0:
3136 		return 0;
3137 	case 1:
3138 		return USB_PORT_STAT_LOW_SPEED;
3139 	case 2:
3140 	default:
3141 		return USB_PORT_STAT_HIGH_SPEED;
3142 	}
3143 }
3144 
3145 #define	PORT_WAKE_BITS	(PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
3146 static int oxu_hub_control(struct usb_hcd *hcd, u16 typeReq,
3147 				u16 wValue, u16 wIndex, char *buf, u16 wLength)
3148 {
3149 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3150 	int ports = HCS_N_PORTS(oxu->hcs_params);
3151 	u32 __iomem *status_reg = &oxu->regs->port_status[wIndex - 1];
3152 	u32 temp, status;
3153 	unsigned long	flags;
3154 	int retval = 0;
3155 	unsigned selector;
3156 
3157 	/*
3158 	 * FIXME:  support SetPortFeatures USB_PORT_FEAT_INDICATOR.
3159 	 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
3160 	 * (track current state ourselves) ... blink for diagnostics,
3161 	 * power, "this is the one", etc.  EHCI spec supports this.
3162 	 */
3163 
3164 	spin_lock_irqsave(&oxu->lock, flags);
3165 	switch (typeReq) {
3166 	case ClearHubFeature:
3167 		switch (wValue) {
3168 		case C_HUB_LOCAL_POWER:
3169 		case C_HUB_OVER_CURRENT:
3170 			/* no hub-wide feature/status flags */
3171 			break;
3172 		default:
3173 			goto error;
3174 		}
3175 		break;
3176 	case ClearPortFeature:
3177 		if (!wIndex || wIndex > ports)
3178 			goto error;
3179 		wIndex--;
3180 		temp = readl(status_reg);
3181 
3182 		/*
3183 		 * Even if OWNER is set, so the port is owned by the
3184 		 * companion controller, hub_wq needs to be able to clear
3185 		 * the port-change status bits (especially
3186 		 * USB_PORT_STAT_C_CONNECTION).
3187 		 */
3188 
3189 		switch (wValue) {
3190 		case USB_PORT_FEAT_ENABLE:
3191 			writel(temp & ~PORT_PE, status_reg);
3192 			break;
3193 		case USB_PORT_FEAT_C_ENABLE:
3194 			writel((temp & ~PORT_RWC_BITS) | PORT_PEC, status_reg);
3195 			break;
3196 		case USB_PORT_FEAT_SUSPEND:
3197 			if (temp & PORT_RESET)
3198 				goto error;
3199 			if (temp & PORT_SUSPEND) {
3200 				if ((temp & PORT_PE) == 0)
3201 					goto error;
3202 				/* resume signaling for 20 msec */
3203 				temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
3204 				writel(temp | PORT_RESUME, status_reg);
3205 				oxu->reset_done[wIndex] = jiffies
3206 						+ msecs_to_jiffies(20);
3207 			}
3208 			break;
3209 		case USB_PORT_FEAT_C_SUSPEND:
3210 			/* we auto-clear this feature */
3211 			break;
3212 		case USB_PORT_FEAT_POWER:
3213 			if (HCS_PPC(oxu->hcs_params))
3214 				writel(temp & ~(PORT_RWC_BITS | PORT_POWER),
3215 					  status_reg);
3216 			break;
3217 		case USB_PORT_FEAT_C_CONNECTION:
3218 			writel((temp & ~PORT_RWC_BITS) | PORT_CSC, status_reg);
3219 			break;
3220 		case USB_PORT_FEAT_C_OVER_CURRENT:
3221 			writel((temp & ~PORT_RWC_BITS) | PORT_OCC, status_reg);
3222 			break;
3223 		case USB_PORT_FEAT_C_RESET:
3224 			/* GetPortStatus clears reset */
3225 			break;
3226 		default:
3227 			goto error;
3228 		}
3229 		readl(&oxu->regs->command);	/* unblock posted write */
3230 		break;
3231 	case GetHubDescriptor:
3232 		ehci_hub_descriptor(oxu, (struct usb_hub_descriptor *)
3233 			buf);
3234 		break;
3235 	case GetHubStatus:
3236 		/* no hub-wide feature/status flags */
3237 		memset(buf, 0, 4);
3238 		break;
3239 	case GetPortStatus:
3240 		if (!wIndex || wIndex > ports)
3241 			goto error;
3242 		wIndex--;
3243 		status = 0;
3244 		temp = readl(status_reg);
3245 
3246 		/* wPortChange bits */
3247 		if (temp & PORT_CSC)
3248 			status |= USB_PORT_STAT_C_CONNECTION << 16;
3249 		if (temp & PORT_PEC)
3250 			status |= USB_PORT_STAT_C_ENABLE << 16;
3251 		if ((temp & PORT_OCC) && !ignore_oc)
3252 			status |= USB_PORT_STAT_C_OVERCURRENT << 16;
3253 
3254 		/* whoever resumes must GetPortStatus to complete it!! */
3255 		if (temp & PORT_RESUME) {
3256 
3257 			/* Remote Wakeup received? */
3258 			if (!oxu->reset_done[wIndex]) {
3259 				/* resume signaling for 20 msec */
3260 				oxu->reset_done[wIndex] = jiffies
3261 						+ msecs_to_jiffies(20);
3262 				/* check the port again */
3263 				mod_timer(&oxu_to_hcd(oxu)->rh_timer,
3264 						oxu->reset_done[wIndex]);
3265 			}
3266 
3267 			/* resume completed? */
3268 			else if (time_after_eq(jiffies,
3269 					oxu->reset_done[wIndex])) {
3270 				status |= USB_PORT_STAT_C_SUSPEND << 16;
3271 				oxu->reset_done[wIndex] = 0;
3272 
3273 				/* stop resume signaling */
3274 				temp = readl(status_reg);
3275 				writel(temp & ~(PORT_RWC_BITS | PORT_RESUME),
3276 					status_reg);
3277 				retval = handshake(oxu, status_reg,
3278 					   PORT_RESUME, 0, 2000 /* 2msec */);
3279 				if (retval != 0) {
3280 					oxu_err(oxu,
3281 						"port %d resume error %d\n",
3282 						wIndex + 1, retval);
3283 					goto error;
3284 				}
3285 				temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
3286 			}
3287 		}
3288 
3289 		/* whoever resets must GetPortStatus to complete it!! */
3290 		if ((temp & PORT_RESET)
3291 				&& time_after_eq(jiffies,
3292 					oxu->reset_done[wIndex])) {
3293 			status |= USB_PORT_STAT_C_RESET << 16;
3294 			oxu->reset_done[wIndex] = 0;
3295 
3296 			/* force reset to complete */
3297 			writel(temp & ~(PORT_RWC_BITS | PORT_RESET),
3298 					status_reg);
3299 			/* REVISIT:  some hardware needs 550+ usec to clear
3300 			 * this bit; seems too long to spin routinely...
3301 			 */
3302 			retval = handshake(oxu, status_reg,
3303 					PORT_RESET, 0, 750);
3304 			if (retval != 0) {
3305 				oxu_err(oxu, "port %d reset error %d\n",
3306 					wIndex + 1, retval);
3307 				goto error;
3308 			}
3309 
3310 			/* see what we found out */
3311 			temp = check_reset_complete(oxu, wIndex, status_reg,
3312 					readl(status_reg));
3313 		}
3314 
3315 		/* transfer dedicated ports to the companion hc */
3316 		if ((temp & PORT_CONNECT) &&
3317 				test_bit(wIndex, &oxu->companion_ports)) {
3318 			temp &= ~PORT_RWC_BITS;
3319 			temp |= PORT_OWNER;
3320 			writel(temp, status_reg);
3321 			oxu_dbg(oxu, "port %d --> companion\n", wIndex + 1);
3322 			temp = readl(status_reg);
3323 		}
3324 
3325 		/*
3326 		 * Even if OWNER is set, there's no harm letting hub_wq
3327 		 * see the wPortStatus values (they should all be 0 except
3328 		 * for PORT_POWER anyway).
3329 		 */
3330 
3331 		if (temp & PORT_CONNECT) {
3332 			status |= USB_PORT_STAT_CONNECTION;
3333 			/* status may be from integrated TT */
3334 			status |= oxu_port_speed(oxu, temp);
3335 		}
3336 		if (temp & PORT_PE)
3337 			status |= USB_PORT_STAT_ENABLE;
3338 		if (temp & (PORT_SUSPEND|PORT_RESUME))
3339 			status |= USB_PORT_STAT_SUSPEND;
3340 		if (temp & PORT_OC)
3341 			status |= USB_PORT_STAT_OVERCURRENT;
3342 		if (temp & PORT_RESET)
3343 			status |= USB_PORT_STAT_RESET;
3344 		if (temp & PORT_POWER)
3345 			status |= USB_PORT_STAT_POWER;
3346 
3347 #ifndef	OXU_VERBOSE_DEBUG
3348 	if (status & ~0xffff)	/* only if wPortChange is interesting */
3349 #endif
3350 		dbg_port(oxu, "GetStatus", wIndex + 1, temp);
3351 		put_unaligned(cpu_to_le32(status), (__le32 *) buf);
3352 		break;
3353 	case SetHubFeature:
3354 		switch (wValue) {
3355 		case C_HUB_LOCAL_POWER:
3356 		case C_HUB_OVER_CURRENT:
3357 			/* no hub-wide feature/status flags */
3358 			break;
3359 		default:
3360 			goto error;
3361 		}
3362 		break;
3363 	case SetPortFeature:
3364 		selector = wIndex >> 8;
3365 		wIndex &= 0xff;
3366 		if (!wIndex || wIndex > ports)
3367 			goto error;
3368 		wIndex--;
3369 		temp = readl(status_reg);
3370 		if (temp & PORT_OWNER)
3371 			break;
3372 
3373 		temp &= ~PORT_RWC_BITS;
3374 		switch (wValue) {
3375 		case USB_PORT_FEAT_SUSPEND:
3376 			if ((temp & PORT_PE) == 0
3377 					|| (temp & PORT_RESET) != 0)
3378 				goto error;
3379 			if (device_may_wakeup(&hcd->self.root_hub->dev))
3380 				temp |= PORT_WAKE_BITS;
3381 			writel(temp | PORT_SUSPEND, status_reg);
3382 			break;
3383 		case USB_PORT_FEAT_POWER:
3384 			if (HCS_PPC(oxu->hcs_params))
3385 				writel(temp | PORT_POWER, status_reg);
3386 			break;
3387 		case USB_PORT_FEAT_RESET:
3388 			if (temp & PORT_RESUME)
3389 				goto error;
3390 			/* line status bits may report this as low speed,
3391 			 * which can be fine if this root hub has a
3392 			 * transaction translator built in.
3393 			 */
3394 			oxu_vdbg(oxu, "port %d reset\n", wIndex + 1);
3395 			temp |= PORT_RESET;
3396 			temp &= ~PORT_PE;
3397 
3398 			/*
3399 			 * caller must wait, then call GetPortStatus
3400 			 * usb 2.0 spec says 50 ms resets on root
3401 			 */
3402 			oxu->reset_done[wIndex] = jiffies
3403 					+ msecs_to_jiffies(50);
3404 			writel(temp, status_reg);
3405 			break;
3406 
3407 		/* For downstream facing ports (these):  one hub port is put
3408 		 * into test mode according to USB2 11.24.2.13, then the hub
3409 		 * must be reset (which for root hub now means rmmod+modprobe,
3410 		 * or else system reboot).  See EHCI 2.3.9 and 4.14 for info
3411 		 * about the EHCI-specific stuff.
3412 		 */
3413 		case USB_PORT_FEAT_TEST:
3414 			if (!selector || selector > 5)
3415 				goto error;
3416 			ehci_quiesce(oxu);
3417 			ehci_halt(oxu);
3418 			temp |= selector << 16;
3419 			writel(temp, status_reg);
3420 			break;
3421 
3422 		default:
3423 			goto error;
3424 		}
3425 		readl(&oxu->regs->command);	/* unblock posted writes */
3426 		break;
3427 
3428 	default:
3429 error:
3430 		/* "stall" on error */
3431 		retval = -EPIPE;
3432 	}
3433 	spin_unlock_irqrestore(&oxu->lock, flags);
3434 	return retval;
3435 }
3436 
3437 #ifdef CONFIG_PM
3438 
3439 static int oxu_bus_suspend(struct usb_hcd *hcd)
3440 {
3441 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3442 	int port;
3443 	int mask;
3444 
3445 	oxu_dbg(oxu, "suspend root hub\n");
3446 
3447 	if (time_before(jiffies, oxu->next_statechange))
3448 		msleep(5);
3449 
3450 	port = HCS_N_PORTS(oxu->hcs_params);
3451 	spin_lock_irq(&oxu->lock);
3452 
3453 	/* stop schedules, clean any completed work */
3454 	if (HC_IS_RUNNING(hcd->state)) {
3455 		ehci_quiesce(oxu);
3456 		hcd->state = HC_STATE_QUIESCING;
3457 	}
3458 	oxu->command = readl(&oxu->regs->command);
3459 	if (oxu->reclaim)
3460 		oxu->reclaim_ready = 1;
3461 	ehci_work(oxu);
3462 
3463 	/* Unlike other USB host controller types, EHCI doesn't have
3464 	 * any notion of "global" or bus-wide suspend.  The driver has
3465 	 * to manually suspend all the active unsuspended ports, and
3466 	 * then manually resume them in the bus_resume() routine.
3467 	 */
3468 	oxu->bus_suspended = 0;
3469 	while (port--) {
3470 		u32 __iomem *reg = &oxu->regs->port_status[port];
3471 		u32 t1 = readl(reg) & ~PORT_RWC_BITS;
3472 		u32 t2 = t1;
3473 
3474 		/* keep track of which ports we suspend */
3475 		if ((t1 & PORT_PE) && !(t1 & PORT_OWNER) &&
3476 				!(t1 & PORT_SUSPEND)) {
3477 			t2 |= PORT_SUSPEND;
3478 			set_bit(port, &oxu->bus_suspended);
3479 		}
3480 
3481 		/* enable remote wakeup on all ports */
3482 		if (device_may_wakeup(&hcd->self.root_hub->dev))
3483 			t2 |= PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E;
3484 		else
3485 			t2 &= ~(PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E);
3486 
3487 		if (t1 != t2) {
3488 			oxu_vdbg(oxu, "port %d, %08x -> %08x\n",
3489 				port + 1, t1, t2);
3490 			writel(t2, reg);
3491 		}
3492 	}
3493 
3494 	/* turn off now-idle HC */
3495 	del_timer_sync(&oxu->watchdog);
3496 	ehci_halt(oxu);
3497 	hcd->state = HC_STATE_SUSPENDED;
3498 
3499 	/* allow remote wakeup */
3500 	mask = INTR_MASK;
3501 	if (!device_may_wakeup(&hcd->self.root_hub->dev))
3502 		mask &= ~STS_PCD;
3503 	writel(mask, &oxu->regs->intr_enable);
3504 	readl(&oxu->regs->intr_enable);
3505 
3506 	oxu->next_statechange = jiffies + msecs_to_jiffies(10);
3507 	spin_unlock_irq(&oxu->lock);
3508 	return 0;
3509 }
3510 
3511 /* Caller has locked the root hub, and should reset/reinit on error */
3512 static int oxu_bus_resume(struct usb_hcd *hcd)
3513 {
3514 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3515 	u32 temp;
3516 	int i;
3517 
3518 	if (time_before(jiffies, oxu->next_statechange))
3519 		msleep(5);
3520 	spin_lock_irq(&oxu->lock);
3521 
3522 	/* Ideally and we've got a real resume here, and no port's power
3523 	 * was lost.  (For PCI, that means Vaux was maintained.)  But we
3524 	 * could instead be restoring a swsusp snapshot -- so that BIOS was
3525 	 * the last user of the controller, not reset/pm hardware keeping
3526 	 * state we gave to it.
3527 	 */
3528 	temp = readl(&oxu->regs->intr_enable);
3529 	oxu_dbg(oxu, "resume root hub%s\n", temp ? "" : " after power loss");
3530 
3531 	/* at least some APM implementations will try to deliver
3532 	 * IRQs right away, so delay them until we're ready.
3533 	 */
3534 	writel(0, &oxu->regs->intr_enable);
3535 
3536 	/* re-init operational registers */
3537 	writel(0, &oxu->regs->segment);
3538 	writel(oxu->periodic_dma, &oxu->regs->frame_list);
3539 	writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
3540 
3541 	/* restore CMD_RUN, framelist size, and irq threshold */
3542 	writel(oxu->command, &oxu->regs->command);
3543 
3544 	/* Some controller/firmware combinations need a delay during which
3545 	 * they set up the port statuses.  See Bugzilla #8190. */
3546 	mdelay(8);
3547 
3548 	/* manually resume the ports we suspended during bus_suspend() */
3549 	i = HCS_N_PORTS(oxu->hcs_params);
3550 	while (i--) {
3551 		temp = readl(&oxu->regs->port_status[i]);
3552 		temp &= ~(PORT_RWC_BITS
3553 			| PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E);
3554 		if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3555 			oxu->reset_done[i] = jiffies + msecs_to_jiffies(20);
3556 			temp |= PORT_RESUME;
3557 		}
3558 		writel(temp, &oxu->regs->port_status[i]);
3559 	}
3560 	i = HCS_N_PORTS(oxu->hcs_params);
3561 	mdelay(20);
3562 	while (i--) {
3563 		temp = readl(&oxu->regs->port_status[i]);
3564 		if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3565 			temp &= ~(PORT_RWC_BITS | PORT_RESUME);
3566 			writel(temp, &oxu->regs->port_status[i]);
3567 			oxu_vdbg(oxu, "resumed port %d\n", i + 1);
3568 		}
3569 	}
3570 	(void) readl(&oxu->regs->command);
3571 
3572 	/* maybe re-activate the schedule(s) */
3573 	temp = 0;
3574 	if (oxu->async->qh_next.qh)
3575 		temp |= CMD_ASE;
3576 	if (oxu->periodic_sched)
3577 		temp |= CMD_PSE;
3578 	if (temp) {
3579 		oxu->command |= temp;
3580 		writel(oxu->command, &oxu->regs->command);
3581 	}
3582 
3583 	oxu->next_statechange = jiffies + msecs_to_jiffies(5);
3584 	hcd->state = HC_STATE_RUNNING;
3585 
3586 	/* Now we can safely re-enable irqs */
3587 	writel(INTR_MASK, &oxu->regs->intr_enable);
3588 
3589 	spin_unlock_irq(&oxu->lock);
3590 	return 0;
3591 }
3592 
3593 #else
3594 
3595 static int oxu_bus_suspend(struct usb_hcd *hcd)
3596 {
3597 	return 0;
3598 }
3599 
3600 static int oxu_bus_resume(struct usb_hcd *hcd)
3601 {
3602 	return 0;
3603 }
3604 
3605 #endif	/* CONFIG_PM */
3606 
3607 static const struct hc_driver oxu_hc_driver = {
3608 	.description =		"oxu210hp_hcd",
3609 	.product_desc =		"oxu210hp HCD",
3610 	.hcd_priv_size =	sizeof(struct oxu_hcd),
3611 
3612 	/*
3613 	 * Generic hardware linkage
3614 	 */
3615 	.irq =			oxu_irq,
3616 	.flags =		HCD_MEMORY | HCD_USB2,
3617 
3618 	/*
3619 	 * Basic lifecycle operations
3620 	 */
3621 	.reset =		oxu_reset,
3622 	.start =		oxu_run,
3623 	.stop =			oxu_stop,
3624 	.shutdown =		oxu_shutdown,
3625 
3626 	/*
3627 	 * Managing i/o requests and associated device resources
3628 	 */
3629 	.urb_enqueue =		oxu_urb_enqueue,
3630 	.urb_dequeue =		oxu_urb_dequeue,
3631 	.endpoint_disable =	oxu_endpoint_disable,
3632 
3633 	/*
3634 	 * Scheduling support
3635 	 */
3636 	.get_frame_number =	oxu_get_frame,
3637 
3638 	/*
3639 	 * Root hub support
3640 	 */
3641 	.hub_status_data =	oxu_hub_status_data,
3642 	.hub_control =		oxu_hub_control,
3643 	.bus_suspend =		oxu_bus_suspend,
3644 	.bus_resume =		oxu_bus_resume,
3645 };
3646 
3647 /*
3648  * Module stuff
3649  */
3650 
3651 static void oxu_configuration(struct platform_device *pdev, void *base)
3652 {
3653 	u32 tmp;
3654 
3655 	/* Initialize top level registers.
3656 	 * First write ever
3657 	 */
3658 	oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
3659 	oxu_writel(base, OXU_SOFTRESET, OXU_SRESET);
3660 	oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
3661 
3662 	tmp = oxu_readl(base, OXU_PIOBURSTREADCTRL);
3663 	oxu_writel(base, OXU_PIOBURSTREADCTRL, tmp | 0x0040);
3664 
3665 	oxu_writel(base, OXU_ASO, OXU_SPHPOEN | OXU_OVRCCURPUPDEN |
3666 					OXU_COMPARATOR | OXU_ASO_OP);
3667 
3668 	tmp = oxu_readl(base, OXU_CLKCTRL_SET);
3669 	oxu_writel(base, OXU_CLKCTRL_SET, tmp | OXU_SYSCLKEN | OXU_USBOTGCLKEN);
3670 
3671 	/* Clear all top interrupt enable */
3672 	oxu_writel(base, OXU_CHIPIRQEN_CLR, 0xff);
3673 
3674 	/* Clear all top interrupt status */
3675 	oxu_writel(base, OXU_CHIPIRQSTATUS, 0xff);
3676 
3677 	/* Enable all needed top interrupt except OTG SPH core */
3678 	oxu_writel(base, OXU_CHIPIRQEN_SET, OXU_USBSPHLPWUI | OXU_USBOTGLPWUI);
3679 }
3680 
3681 static int oxu_verify_id(struct platform_device *pdev, void *base)
3682 {
3683 	u32 id;
3684 	static const char * const bo[] = {
3685 		"reserved",
3686 		"128-pin LQFP",
3687 		"84-pin TFBGA",
3688 		"reserved",
3689 	};
3690 
3691 	/* Read controller signature register to find a match */
3692 	id = oxu_readl(base, OXU_DEVICEID);
3693 	dev_info(&pdev->dev, "device ID %x\n", id);
3694 	if ((id & OXU_REV_MASK) != (OXU_REV_2100 << OXU_REV_SHIFT))
3695 		return -1;
3696 
3697 	dev_info(&pdev->dev, "found device %x %s (%04x:%04x)\n",
3698 		id >> OXU_REV_SHIFT,
3699 		bo[(id & OXU_BO_MASK) >> OXU_BO_SHIFT],
3700 		(id & OXU_MAJ_REV_MASK) >> OXU_MAJ_REV_SHIFT,
3701 		(id & OXU_MIN_REV_MASK) >> OXU_MIN_REV_SHIFT);
3702 
3703 	return 0;
3704 }
3705 
3706 static const struct hc_driver oxu_hc_driver;
3707 static struct usb_hcd *oxu_create(struct platform_device *pdev,
3708 				unsigned long memstart, unsigned long memlen,
3709 				void *base, int irq, int otg)
3710 {
3711 	struct device *dev = &pdev->dev;
3712 
3713 	struct usb_hcd *hcd;
3714 	struct oxu_hcd *oxu;
3715 	int ret;
3716 
3717 	/* Set endian mode and host mode */
3718 	oxu_writel(base + (otg ? OXU_OTG_CORE_OFFSET : OXU_SPH_CORE_OFFSET),
3719 				OXU_USBMODE,
3720 				OXU_CM_HOST_ONLY | OXU_ES_LITTLE | OXU_VBPS);
3721 
3722 	hcd = usb_create_hcd(&oxu_hc_driver, dev,
3723 				otg ? "oxu210hp_otg" : "oxu210hp_sph");
3724 	if (!hcd)
3725 		return ERR_PTR(-ENOMEM);
3726 
3727 	hcd->rsrc_start = memstart;
3728 	hcd->rsrc_len = memlen;
3729 	hcd->regs = base;
3730 	hcd->irq = irq;
3731 	hcd->state = HC_STATE_HALT;
3732 
3733 	oxu = hcd_to_oxu(hcd);
3734 	oxu->is_otg = otg;
3735 
3736 	ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
3737 	if (ret < 0)
3738 		return ERR_PTR(ret);
3739 
3740 	device_wakeup_enable(hcd->self.controller);
3741 	return hcd;
3742 }
3743 
3744 static int oxu_init(struct platform_device *pdev,
3745 				unsigned long memstart, unsigned long memlen,
3746 				void *base, int irq)
3747 {
3748 	struct oxu_info *info = platform_get_drvdata(pdev);
3749 	struct usb_hcd *hcd;
3750 	int ret;
3751 
3752 	/* First time configuration at start up */
3753 	oxu_configuration(pdev, base);
3754 
3755 	ret = oxu_verify_id(pdev, base);
3756 	if (ret) {
3757 		dev_err(&pdev->dev, "no devices found!\n");
3758 		return -ENODEV;
3759 	}
3760 
3761 	/* Create the OTG controller */
3762 	hcd = oxu_create(pdev, memstart, memlen, base, irq, 1);
3763 	if (IS_ERR(hcd)) {
3764 		dev_err(&pdev->dev, "cannot create OTG controller!\n");
3765 		ret = PTR_ERR(hcd);
3766 		goto error_create_otg;
3767 	}
3768 	info->hcd[0] = hcd;
3769 
3770 	/* Create the SPH host controller */
3771 	hcd = oxu_create(pdev, memstart, memlen, base, irq, 0);
3772 	if (IS_ERR(hcd)) {
3773 		dev_err(&pdev->dev, "cannot create SPH controller!\n");
3774 		ret = PTR_ERR(hcd);
3775 		goto error_create_sph;
3776 	}
3777 	info->hcd[1] = hcd;
3778 
3779 	oxu_writel(base, OXU_CHIPIRQEN_SET,
3780 		oxu_readl(base, OXU_CHIPIRQEN_SET) | 3);
3781 
3782 	return 0;
3783 
3784 error_create_sph:
3785 	usb_remove_hcd(info->hcd[0]);
3786 	usb_put_hcd(info->hcd[0]);
3787 
3788 error_create_otg:
3789 	return ret;
3790 }
3791 
3792 static int oxu_drv_probe(struct platform_device *pdev)
3793 {
3794 	struct resource *res;
3795 	void *base;
3796 	unsigned long memstart, memlen;
3797 	int irq, ret;
3798 	struct oxu_info *info;
3799 
3800 	if (usb_disabled())
3801 		return -ENODEV;
3802 
3803 	/*
3804 	 * Get the platform resources
3805 	 */
3806 	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
3807 	if (!res) {
3808 		dev_err(&pdev->dev,
3809 			"no IRQ! Check %s setup!\n", dev_name(&pdev->dev));
3810 		return -ENODEV;
3811 	}
3812 	irq = res->start;
3813 	dev_dbg(&pdev->dev, "IRQ resource %d\n", irq);
3814 
3815 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3816 	base = devm_ioremap_resource(&pdev->dev, res);
3817 	if (IS_ERR(base)) {
3818 		ret = PTR_ERR(base);
3819 		goto error;
3820 	}
3821 	memstart = res->start;
3822 	memlen = resource_size(res);
3823 
3824 	ret = irq_set_irq_type(irq, IRQF_TRIGGER_FALLING);
3825 	if (ret) {
3826 		dev_err(&pdev->dev, "error setting irq type\n");
3827 		ret = -EFAULT;
3828 		goto error;
3829 	}
3830 
3831 	/* Allocate a driver data struct to hold useful info for both
3832 	 * SPH & OTG devices
3833 	 */
3834 	info = devm_kzalloc(&pdev->dev, sizeof(struct oxu_info), GFP_KERNEL);
3835 	if (!info) {
3836 		ret = -EFAULT;
3837 		goto error;
3838 	}
3839 	platform_set_drvdata(pdev, info);
3840 
3841 	ret = oxu_init(pdev, memstart, memlen, base, irq);
3842 	if (ret < 0) {
3843 		dev_dbg(&pdev->dev, "cannot init USB devices\n");
3844 		goto error;
3845 	}
3846 
3847 	dev_info(&pdev->dev, "devices enabled and running\n");
3848 	platform_set_drvdata(pdev, info);
3849 
3850 	return 0;
3851 
3852 error:
3853 	dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), ret);
3854 	return ret;
3855 }
3856 
3857 static void oxu_remove(struct platform_device *pdev, struct usb_hcd *hcd)
3858 {
3859 	usb_remove_hcd(hcd);
3860 	usb_put_hcd(hcd);
3861 }
3862 
3863 static int oxu_drv_remove(struct platform_device *pdev)
3864 {
3865 	struct oxu_info *info = platform_get_drvdata(pdev);
3866 
3867 	oxu_remove(pdev, info->hcd[0]);
3868 	oxu_remove(pdev, info->hcd[1]);
3869 
3870 	return 0;
3871 }
3872 
3873 static void oxu_drv_shutdown(struct platform_device *pdev)
3874 {
3875 	oxu_drv_remove(pdev);
3876 }
3877 
3878 #if 0
3879 /* FIXME: TODO */
3880 static int oxu_drv_suspend(struct device *dev)
3881 {
3882 	struct platform_device *pdev = to_platform_device(dev);
3883 	struct usb_hcd *hcd = dev_get_drvdata(dev);
3884 
3885 	return 0;
3886 }
3887 
3888 static int oxu_drv_resume(struct device *dev)
3889 {
3890 	struct platform_device *pdev = to_platform_device(dev);
3891 	struct usb_hcd *hcd = dev_get_drvdata(dev);
3892 
3893 	return 0;
3894 }
3895 #else
3896 #define oxu_drv_suspend	NULL
3897 #define oxu_drv_resume	NULL
3898 #endif
3899 
3900 static struct platform_driver oxu_driver = {
3901 	.probe		= oxu_drv_probe,
3902 	.remove		= oxu_drv_remove,
3903 	.shutdown	= oxu_drv_shutdown,
3904 	.suspend	= oxu_drv_suspend,
3905 	.resume		= oxu_drv_resume,
3906 	.driver = {
3907 		.name = "oxu210hp-hcd",
3908 		.bus = &platform_bus_type
3909 	}
3910 };
3911 
3912 module_platform_driver(oxu_driver);
3913 
3914 MODULE_DESCRIPTION("Oxford OXU210HP HCD driver - ver. " DRIVER_VERSION);
3915 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
3916 MODULE_LICENSE("GPL");
3917