xref: /openbmc/linux/drivers/usb/host/ohci-pci.c (revision 7b6d864b)
1 /*
2  * OHCI HCD (Host Controller Driver) for USB.
3  *
4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5  * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
6  *
7  * [ Initialisation is based on Linus'  ]
8  * [ uhci code and gregs ohci fragments ]
9  * [ (C) Copyright 1999 Linus Torvalds  ]
10  * [ (C) Copyright 1999 Gregory P. Smith]
11  *
12  * PCI Bus Glue
13  *
14  * This file is licenced under the GPL.
15  */
16 
17 #include <linux/io.h>
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/usb.h>
22 #include <linux/usb/hcd.h>
23 
24 #include "ohci.h"
25 #include "pci-quirks.h"
26 
27 #define DRIVER_DESC "OHCI PCI platform driver"
28 
29 static const char hcd_name[] = "ohci-pci";
30 
31 
32 /*-------------------------------------------------------------------------*/
33 
34 static int broken_suspend(struct usb_hcd *hcd)
35 {
36 	device_init_wakeup(&hcd->self.root_hub->dev, 0);
37 	return 0;
38 }
39 
40 /* AMD 756, for most chips (early revs), corrupts register
41  * values on read ... so enable the vendor workaround.
42  */
43 static int ohci_quirk_amd756(struct usb_hcd *hcd)
44 {
45 	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
46 
47 	ohci->flags = OHCI_QUIRK_AMD756;
48 	ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
49 
50 	/* also erratum 10 (suspend/resume issues) */
51 	return broken_suspend(hcd);
52 }
53 
54 /* Apple's OHCI driver has a lot of bizarre workarounds
55  * for this chip.  Evidently control and bulk lists
56  * can get confused.  (B&W G3 models, and ...)
57  */
58 static int ohci_quirk_opti(struct usb_hcd *hcd)
59 {
60 	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
61 
62 	ohci_dbg (ohci, "WARNING: OPTi workarounds unavailable\n");
63 
64 	return 0;
65 }
66 
67 /* Check for NSC87560. We have to look at the bridge (fn1) to
68  * identify the USB (fn2). This quirk might apply to more or
69  * even all NSC stuff.
70  */
71 static int ohci_quirk_ns(struct usb_hcd *hcd)
72 {
73 	struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
74 	struct pci_dev	*b;
75 
76 	b  = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
77 	if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
78 	    && b->vendor == PCI_VENDOR_ID_NS) {
79 		struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
80 
81 		ohci->flags |= OHCI_QUIRK_SUPERIO;
82 		ohci_dbg (ohci, "Using NSC SuperIO setup\n");
83 	}
84 	pci_dev_put(b);
85 
86 	return 0;
87 }
88 
89 /* Check for Compaq's ZFMicro chipset, which needs short
90  * delays before control or bulk queues get re-activated
91  * in finish_unlinks()
92  */
93 static int ohci_quirk_zfmicro(struct usb_hcd *hcd)
94 {
95 	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
96 
97 	ohci->flags |= OHCI_QUIRK_ZFMICRO;
98 	ohci_dbg(ohci, "enabled Compaq ZFMicro chipset quirks\n");
99 
100 	return 0;
101 }
102 
103 /* Check for Toshiba SCC OHCI which has big endian registers
104  * and little endian in memory data structures
105  */
106 static int ohci_quirk_toshiba_scc(struct usb_hcd *hcd)
107 {
108 	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
109 
110 	/* That chip is only present in the southbridge of some
111 	 * cell based platforms which are supposed to select
112 	 * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if
113 	 * that was the case though.
114 	 */
115 #ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
116 	ohci->flags |= OHCI_QUIRK_BE_MMIO;
117 	ohci_dbg (ohci, "enabled big endian Toshiba quirk\n");
118 	return 0;
119 #else
120 	ohci_err (ohci, "unsupported big endian Toshiba quirk\n");
121 	return -ENXIO;
122 #endif
123 }
124 
125 /* Check for NEC chip and apply quirk for allegedly lost interrupts.
126  */
127 
128 static void ohci_quirk_nec_worker(struct work_struct *work)
129 {
130 	struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
131 	int status;
132 
133 	status = ohci_restart(ohci);
134 	if (status != 0)
135 		ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
136 			 "ohci_restart", status);
137 }
138 
139 static int ohci_quirk_nec(struct usb_hcd *hcd)
140 {
141 	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
142 
143 	ohci->flags |= OHCI_QUIRK_NEC;
144 	INIT_WORK(&ohci->nec_work, ohci_quirk_nec_worker);
145 	ohci_dbg (ohci, "enabled NEC chipset lost interrupt quirk\n");
146 
147 	return 0;
148 }
149 
150 static int ohci_quirk_amd700(struct usb_hcd *hcd)
151 {
152 	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
153 	struct pci_dev *amd_smbus_dev;
154 	u8 rev;
155 
156 	if (usb_amd_find_chipset_info())
157 		ohci->flags |= OHCI_QUIRK_AMD_PLL;
158 
159 	amd_smbus_dev = pci_get_device(PCI_VENDOR_ID_ATI,
160 			PCI_DEVICE_ID_ATI_SBX00_SMBUS, NULL);
161 	if (!amd_smbus_dev)
162 		return 0;
163 
164 	rev = amd_smbus_dev->revision;
165 
166 	/* SB800 needs pre-fetch fix */
167 	if ((rev >= 0x40) && (rev <= 0x4f)) {
168 		ohci->flags |= OHCI_QUIRK_AMD_PREFETCH;
169 		ohci_dbg(ohci, "enabled AMD prefetch quirk\n");
170 	}
171 
172 	pci_dev_put(amd_smbus_dev);
173 	amd_smbus_dev = NULL;
174 
175 	return 0;
176 }
177 
178 /* List of quirks for OHCI */
179 static const struct pci_device_id ohci_pci_quirks[] = {
180 	{
181 		PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x740c),
182 		.driver_data = (unsigned long)ohci_quirk_amd756,
183 	},
184 	{
185 		PCI_DEVICE(PCI_VENDOR_ID_OPTI, 0xc861),
186 		.driver_data = (unsigned long)ohci_quirk_opti,
187 	},
188 	{
189 		PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_ANY_ID),
190 		.driver_data = (unsigned long)ohci_quirk_ns,
191 	},
192 	{
193 		PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8),
194 		.driver_data = (unsigned long)ohci_quirk_zfmicro,
195 	},
196 	{
197 		PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6),
198 		.driver_data = (unsigned long)ohci_quirk_toshiba_scc,
199 	},
200 	{
201 		PCI_DEVICE(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB),
202 		.driver_data = (unsigned long)ohci_quirk_nec,
203 	},
204 	{
205 		/* Toshiba portege 4000 */
206 		.vendor		= PCI_VENDOR_ID_AL,
207 		.device		= 0x5237,
208 		.subvendor	= PCI_VENDOR_ID_TOSHIBA,
209 		.subdevice	= 0x0004,
210 		.driver_data	= (unsigned long) broken_suspend,
211 	},
212 	{
213 		PCI_DEVICE(PCI_VENDOR_ID_ITE, 0x8152),
214 		.driver_data = (unsigned long) broken_suspend,
215 	},
216 	{
217 		PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4397),
218 		.driver_data = (unsigned long)ohci_quirk_amd700,
219 	},
220 	{
221 		PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4398),
222 		.driver_data = (unsigned long)ohci_quirk_amd700,
223 	},
224 	{
225 		PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399),
226 		.driver_data = (unsigned long)ohci_quirk_amd700,
227 	},
228 
229 	/* FIXME for some of the early AMD 760 southbridges, OHCI
230 	 * won't work at all.  blacklist them.
231 	 */
232 
233 	{},
234 };
235 
236 static int ohci_pci_reset (struct usb_hcd *hcd)
237 {
238 	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
239 	struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
240 	int ret = 0;
241 
242 	if (hcd->self.controller) {
243 		const struct pci_device_id *quirk_id;
244 
245 		quirk_id = pci_match_id(ohci_pci_quirks, pdev);
246 		if (quirk_id != NULL) {
247 			int (*quirk)(struct usb_hcd *ohci);
248 			quirk = (void *)quirk_id->driver_data;
249 			ret = quirk(hcd);
250 		}
251 	}
252 
253 	if (ret == 0)
254 		ret = ohci_setup(hcd);
255 	/*
256 	* After ohci setup RWC may not be set for add-in PCI cards.
257 	* This transfers PCI PM wakeup capabilities.
258 	*/
259 	if (device_can_wakeup(&pdev->dev))
260 		ohci->hc_control |= OHCI_CTRL_RWC;
261 	return ret;
262 }
263 
264 static struct hc_driver __read_mostly ohci_pci_hc_driver;
265 
266 static const struct ohci_driver_overrides pci_overrides __initconst = {
267 	.product_desc =		"OHCI PCI host controller",
268 	.reset =		ohci_pci_reset,
269 };
270 
271 static const struct pci_device_id pci_ids [] = { {
272 	/* handle any USB OHCI controller */
273 	PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
274 	.driver_data =	(unsigned long) &ohci_pci_hc_driver,
275 	}, {
276 	/* The device in the ConneXT I/O hub has no class reg */
277 	PCI_VDEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_USB_OHCI),
278 	.driver_data =	(unsigned long) &ohci_pci_hc_driver,
279 	}, { /* end: all zeroes */ }
280 };
281 MODULE_DEVICE_TABLE (pci, pci_ids);
282 
283 /* pci driver glue; this is a "new style" PCI driver module */
284 static struct pci_driver ohci_pci_driver = {
285 	.name =		(char *) hcd_name,
286 	.id_table =	pci_ids,
287 
288 	.probe =	usb_hcd_pci_probe,
289 	.remove =	usb_hcd_pci_remove,
290 	.shutdown =	usb_hcd_pci_shutdown,
291 
292 #ifdef CONFIG_PM_SLEEP
293 	.driver =	{
294 		.pm =	&usb_hcd_pci_pm_ops
295 	},
296 #endif
297 };
298 
299 static int __init ohci_pci_init(void)
300 {
301 	if (usb_disabled())
302 		return -ENODEV;
303 
304 	pr_info("%s: " DRIVER_DESC "\n", hcd_name);
305 
306 	ohci_init_driver(&ohci_pci_hc_driver, &pci_overrides);
307 	return pci_register_driver(&ohci_pci_driver);
308 }
309 module_init(ohci_pci_init);
310 
311 static void __exit ohci_pci_cleanup(void)
312 {
313 	pci_unregister_driver(&ohci_pci_driver);
314 }
315 module_exit(ohci_pci_cleanup);
316 
317 MODULE_DESCRIPTION(DRIVER_DESC);
318 MODULE_LICENSE("GPL");
319