1 /* 2 * OHCI HCD (Host Controller Driver) for USB. 3 * 4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> 5 * (C) Copyright 2000-2005 David Brownell 6 * (C) Copyright 2002 Hewlett-Packard Company 7 * 8 * OMAP Bus Glue 9 * 10 * Modified for OMAP by Tony Lindgren <tony@atomide.com> 11 * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc. 12 * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com> 13 * 14 * This file is licenced under the GPL. 15 */ 16 17 #include <linux/clk.h> 18 #include <linux/dma-mapping.h> 19 #include <linux/err.h> 20 #include <linux/gpio.h> 21 #include <linux/io.h> 22 #include <linux/jiffies.h> 23 #include <linux/kernel.h> 24 #include <linux/module.h> 25 #include <linux/usb/otg.h> 26 #include <linux/platform_device.h> 27 #include <linux/signal.h> 28 #include <linux/usb.h> 29 #include <linux/usb/hcd.h> 30 31 #include "ohci.h" 32 33 #include <asm/io.h> 34 #include <asm/mach-types.h> 35 36 #include <mach/mux.h> 37 38 #include <mach/hardware.h> 39 #include <mach/usb.h> 40 41 42 /* OMAP-1510 OHCI has its own MMU for DMA */ 43 #define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */ 44 #define OMAP1510_LB_CLOCK_DIV 0xfffec10c 45 #define OMAP1510_LB_MMU_CTL 0xfffec208 46 #define OMAP1510_LB_MMU_LCK 0xfffec224 47 #define OMAP1510_LB_MMU_LD_TLB 0xfffec228 48 #define OMAP1510_LB_MMU_CAM_H 0xfffec22c 49 #define OMAP1510_LB_MMU_CAM_L 0xfffec230 50 #define OMAP1510_LB_MMU_RAM_H 0xfffec234 51 #define OMAP1510_LB_MMU_RAM_L 0xfffec238 52 53 #define DRIVER_DESC "OHCI OMAP driver" 54 55 #ifdef CONFIG_TPS65010 56 #include <linux/i2c/tps65010.h> 57 #else 58 59 #define LOW 0 60 #define HIGH 1 61 62 #define GPIO1 1 63 64 static inline int tps65010_set_gpio_out_value(unsigned gpio, unsigned value) 65 { 66 return 0; 67 } 68 69 #endif 70 71 static struct clk *usb_host_ck; 72 static struct clk *usb_dc_ck; 73 74 static const char hcd_name[] = "ohci-omap"; 75 static struct hc_driver __read_mostly ohci_omap_hc_driver; 76 77 static void omap_ohci_clock_power(int on) 78 { 79 if (on) { 80 clk_enable(usb_dc_ck); 81 clk_enable(usb_host_ck); 82 /* guesstimate for T5 == 1x 32K clock + APLL lock time */ 83 udelay(100); 84 } else { 85 clk_disable(usb_host_ck); 86 clk_disable(usb_dc_ck); 87 } 88 } 89 90 /* 91 * Board specific gang-switched transceiver power on/off. 92 * NOTE: OSK supplies power from DC, not battery. 93 */ 94 static int omap_ohci_transceiver_power(int on) 95 { 96 if (on) { 97 if (machine_is_omap_innovator() && cpu_is_omap1510()) 98 __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) 99 | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), 100 INNOVATOR_FPGA_CAM_USB_CONTROL); 101 else if (machine_is_omap_osk()) 102 tps65010_set_gpio_out_value(GPIO1, LOW); 103 } else { 104 if (machine_is_omap_innovator() && cpu_is_omap1510()) 105 __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) 106 & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), 107 INNOVATOR_FPGA_CAM_USB_CONTROL); 108 else if (machine_is_omap_osk()) 109 tps65010_set_gpio_out_value(GPIO1, HIGH); 110 } 111 112 return 0; 113 } 114 115 #ifdef CONFIG_ARCH_OMAP15XX 116 /* 117 * OMAP-1510 specific Local Bus clock on/off 118 */ 119 static int omap_1510_local_bus_power(int on) 120 { 121 if (on) { 122 omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL); 123 udelay(200); 124 } else { 125 omap_writel(0, OMAP1510_LB_MMU_CTL); 126 } 127 128 return 0; 129 } 130 131 /* 132 * OMAP-1510 specific Local Bus initialization 133 * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE. 134 * See also arch/mach-omap/memory.h for __virt_to_dma() and 135 * __dma_to_virt() which need to match with the physical 136 * Local Bus address below. 137 */ 138 static int omap_1510_local_bus_init(void) 139 { 140 unsigned int tlb; 141 unsigned long lbaddr, physaddr; 142 143 omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4, 144 OMAP1510_LB_CLOCK_DIV); 145 146 /* Configure the Local Bus MMU table */ 147 for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) { 148 lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET; 149 physaddr = tlb * 0x00100000 + PHYS_OFFSET; 150 omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H); 151 omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc, 152 OMAP1510_LB_MMU_CAM_L); 153 omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H); 154 omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L); 155 omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK); 156 omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB); 157 } 158 159 /* Enable the walking table */ 160 omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL); 161 udelay(200); 162 163 return 0; 164 } 165 #else 166 #define omap_1510_local_bus_power(x) {} 167 #define omap_1510_local_bus_init() {} 168 #endif 169 170 #ifdef CONFIG_USB_OTG 171 172 static void start_hnp(struct ohci_hcd *ohci) 173 { 174 struct usb_hcd *hcd = ohci_to_hcd(ohci); 175 const unsigned port = hcd->self.otg_port - 1; 176 unsigned long flags; 177 u32 l; 178 179 otg_start_hnp(hcd->usb_phy->otg); 180 181 local_irq_save(flags); 182 hcd->usb_phy->otg->state = OTG_STATE_A_SUSPEND; 183 writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]); 184 l = omap_readl(OTG_CTRL); 185 l &= ~OTG_A_BUSREQ; 186 omap_writel(l, OTG_CTRL); 187 local_irq_restore(flags); 188 } 189 190 #endif 191 192 /*-------------------------------------------------------------------------*/ 193 194 static int ohci_omap_reset(struct usb_hcd *hcd) 195 { 196 struct ohci_hcd *ohci = hcd_to_ohci(hcd); 197 struct omap_usb_config *config = dev_get_platdata(hcd->self.controller); 198 int need_transceiver = (config->otg != 0); 199 int ret; 200 201 dev_dbg(hcd->self.controller, "starting USB Controller\n"); 202 203 if (config->otg) { 204 hcd->self.otg_port = config->otg; 205 /* default/minimum OTG power budget: 8 mA */ 206 hcd->power_budget = 8; 207 } 208 209 /* boards can use OTG transceivers in non-OTG modes */ 210 need_transceiver = need_transceiver 211 || machine_is_omap_h2() || machine_is_omap_h3(); 212 213 /* XXX OMAP16xx only */ 214 if (config->ocpi_enable) 215 config->ocpi_enable(); 216 217 #ifdef CONFIG_USB_OTG 218 if (need_transceiver) { 219 hcd->usb_phy = usb_get_phy(USB_PHY_TYPE_USB2); 220 if (!IS_ERR_OR_NULL(hcd->usb_phy)) { 221 int status = otg_set_host(hcd->usb_phy->otg, 222 &ohci_to_hcd(ohci)->self); 223 dev_dbg(hcd->self.controller, "init %s phy, status %d\n", 224 hcd->usb_phy->label, status); 225 if (status) { 226 usb_put_phy(hcd->usb_phy); 227 return status; 228 } 229 } else { 230 return -EPROBE_DEFER; 231 } 232 ohci->start_hnp = start_hnp; 233 } 234 #endif 235 236 omap_ohci_clock_power(1); 237 238 if (cpu_is_omap15xx()) { 239 omap_1510_local_bus_power(1); 240 omap_1510_local_bus_init(); 241 } 242 243 ret = ohci_setup(hcd); 244 if (ret < 0) 245 return ret; 246 247 if (config->otg || config->rwc) { 248 ohci->hc_control = OHCI_CTRL_RWC; 249 writel(OHCI_CTRL_RWC, &ohci->regs->control); 250 } 251 252 /* board-specific power switching and overcurrent support */ 253 if (machine_is_omap_osk() || machine_is_omap_innovator()) { 254 u32 rh = roothub_a (ohci); 255 256 /* power switching (ganged by default) */ 257 rh &= ~RH_A_NPS; 258 259 /* TPS2045 switch for internal transceiver (port 1) */ 260 if (machine_is_omap_osk()) { 261 ohci_to_hcd(ohci)->power_budget = 250; 262 263 rh &= ~RH_A_NOCP; 264 265 /* gpio9 for overcurrent detction */ 266 omap_cfg_reg(W8_1610_GPIO9); 267 gpio_request(9, "OHCI overcurrent"); 268 gpio_direction_input(9); 269 270 /* for paranoia's sake: disable USB.PUEN */ 271 omap_cfg_reg(W4_USB_HIGHZ); 272 } 273 ohci_writel(ohci, rh, &ohci->regs->roothub.a); 274 ohci->flags &= ~OHCI_QUIRK_HUB_POWER; 275 } else if (machine_is_nokia770()) { 276 /* We require a self-powered hub, which should have 277 * plenty of power. */ 278 ohci_to_hcd(ohci)->power_budget = 0; 279 } 280 281 /* FIXME hub_wq hub requests should manage power switching */ 282 omap_ohci_transceiver_power(1); 283 284 /* board init will have already handled HMC and mux setup. 285 * any external transceiver should already be initialized 286 * too, so all configured ports use the right signaling now. 287 */ 288 289 return 0; 290 } 291 292 /*-------------------------------------------------------------------------*/ 293 294 /** 295 * ohci_hcd_omap_probe - initialize OMAP-based HCDs 296 * Context: !in_interrupt() 297 * 298 * Allocates basic resources for this USB host controller, and 299 * then invokes the start() method for the HCD associated with it 300 * through the hotplug entry's driver_data. 301 */ 302 static int ohci_hcd_omap_probe(struct platform_device *pdev) 303 { 304 int retval, irq; 305 struct usb_hcd *hcd = 0; 306 307 if (pdev->num_resources != 2) { 308 dev_err(&pdev->dev, "invalid num_resources: %i\n", 309 pdev->num_resources); 310 return -ENODEV; 311 } 312 313 if (pdev->resource[0].flags != IORESOURCE_MEM 314 || pdev->resource[1].flags != IORESOURCE_IRQ) { 315 dev_err(&pdev->dev, "invalid resource type\n"); 316 return -ENODEV; 317 } 318 319 usb_host_ck = clk_get(&pdev->dev, "usb_hhc_ck"); 320 if (IS_ERR(usb_host_ck)) 321 return PTR_ERR(usb_host_ck); 322 323 if (!cpu_is_omap15xx()) 324 usb_dc_ck = clk_get(&pdev->dev, "usb_dc_ck"); 325 else 326 usb_dc_ck = clk_get(&pdev->dev, "lb_ck"); 327 328 if (IS_ERR(usb_dc_ck)) { 329 clk_put(usb_host_ck); 330 return PTR_ERR(usb_dc_ck); 331 } 332 333 334 hcd = usb_create_hcd(&ohci_omap_hc_driver, &pdev->dev, 335 dev_name(&pdev->dev)); 336 if (!hcd) { 337 retval = -ENOMEM; 338 goto err0; 339 } 340 hcd->rsrc_start = pdev->resource[0].start; 341 hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1; 342 343 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { 344 dev_dbg(&pdev->dev, "request_mem_region failed\n"); 345 retval = -EBUSY; 346 goto err1; 347 } 348 349 hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); 350 if (!hcd->regs) { 351 dev_err(&pdev->dev, "can't ioremap OHCI HCD\n"); 352 retval = -ENOMEM; 353 goto err2; 354 } 355 356 irq = platform_get_irq(pdev, 0); 357 if (irq < 0) { 358 retval = -ENXIO; 359 goto err3; 360 } 361 retval = usb_add_hcd(hcd, irq, 0); 362 if (retval) 363 goto err3; 364 365 device_wakeup_enable(hcd->self.controller); 366 return 0; 367 err3: 368 iounmap(hcd->regs); 369 err2: 370 release_mem_region(hcd->rsrc_start, hcd->rsrc_len); 371 err1: 372 usb_put_hcd(hcd); 373 err0: 374 clk_put(usb_dc_ck); 375 clk_put(usb_host_ck); 376 return retval; 377 } 378 379 380 /* may be called with controller, bus, and devices active */ 381 382 /** 383 * ohci_hcd_omap_remove - shutdown processing for OMAP-based HCDs 384 * @dev: USB Host Controller being removed 385 * Context: !in_interrupt() 386 * 387 * Reverses the effect of ohci_hcd_omap_probe(), first invoking 388 * the HCD's stop() method. It is always called from a thread 389 * context, normally "rmmod", "apmd", or something similar. 390 */ 391 static int ohci_hcd_omap_remove(struct platform_device *pdev) 392 { 393 struct usb_hcd *hcd = platform_get_drvdata(pdev); 394 395 dev_dbg(hcd->self.controller, "stopping USB Controller\n"); 396 usb_remove_hcd(hcd); 397 omap_ohci_clock_power(0); 398 if (!IS_ERR_OR_NULL(hcd->usb_phy)) { 399 (void) otg_set_host(hcd->usb_phy->otg, 0); 400 usb_put_phy(hcd->usb_phy); 401 } 402 if (machine_is_omap_osk()) 403 gpio_free(9); 404 iounmap(hcd->regs); 405 release_mem_region(hcd->rsrc_start, hcd->rsrc_len); 406 usb_put_hcd(hcd); 407 clk_put(usb_dc_ck); 408 clk_put(usb_host_ck); 409 return 0; 410 } 411 412 /*-------------------------------------------------------------------------*/ 413 414 #ifdef CONFIG_PM 415 416 static int ohci_omap_suspend(struct platform_device *pdev, pm_message_t message) 417 { 418 struct usb_hcd *hcd = platform_get_drvdata(pdev); 419 struct ohci_hcd *ohci = hcd_to_ohci(hcd); 420 bool do_wakeup = device_may_wakeup(&pdev->dev); 421 int ret; 422 423 if (time_before(jiffies, ohci->next_statechange)) 424 msleep(5); 425 ohci->next_statechange = jiffies; 426 427 ret = ohci_suspend(hcd, do_wakeup); 428 if (ret) 429 return ret; 430 431 omap_ohci_clock_power(0); 432 return ret; 433 } 434 435 static int ohci_omap_resume(struct platform_device *dev) 436 { 437 struct usb_hcd *hcd = platform_get_drvdata(dev); 438 struct ohci_hcd *ohci = hcd_to_ohci(hcd); 439 440 if (time_before(jiffies, ohci->next_statechange)) 441 msleep(5); 442 ohci->next_statechange = jiffies; 443 444 omap_ohci_clock_power(1); 445 ohci_resume(hcd, false); 446 return 0; 447 } 448 449 #endif 450 451 /*-------------------------------------------------------------------------*/ 452 453 /* 454 * Driver definition to register with the OMAP bus 455 */ 456 static struct platform_driver ohci_hcd_omap_driver = { 457 .probe = ohci_hcd_omap_probe, 458 .remove = ohci_hcd_omap_remove, 459 .shutdown = usb_hcd_platform_shutdown, 460 #ifdef CONFIG_PM 461 .suspend = ohci_omap_suspend, 462 .resume = ohci_omap_resume, 463 #endif 464 .driver = { 465 .name = "ohci", 466 }, 467 }; 468 469 static const struct ohci_driver_overrides omap_overrides __initconst = { 470 .product_desc = "OMAP OHCI", 471 .reset = ohci_omap_reset 472 }; 473 474 static int __init ohci_omap_init(void) 475 { 476 if (usb_disabled()) 477 return -ENODEV; 478 479 pr_info("%s: " DRIVER_DESC "\n", hcd_name); 480 481 ohci_init_driver(&ohci_omap_hc_driver, &omap_overrides); 482 return platform_driver_register(&ohci_hcd_omap_driver); 483 } 484 module_init(ohci_omap_init); 485 486 static void __exit ohci_omap_cleanup(void) 487 { 488 platform_driver_unregister(&ohci_hcd_omap_driver); 489 } 490 module_exit(ohci_omap_cleanup); 491 492 MODULE_DESCRIPTION(DRIVER_DESC); 493 MODULE_ALIAS("platform:ohci"); 494 MODULE_LICENSE("GPL"); 495