1 /* 2 * ISP1362 HCD (Host Controller Driver) for USB. 3 * 4 * Copyright (C) 2005 Lothar Wassmann <LW@KARO-electronics.de> 5 * 6 * Derived from the SL811 HCD, rewritten for ISP116x. 7 * Copyright (C) 2005 Olav Kongas <ok@artecdesign.ee> 8 * 9 * Portions: 10 * Copyright (C) 2004 Psion Teklogix (for NetBook PRO) 11 * Copyright (C) 2004 David Brownell 12 */ 13 14 /* 15 * The ISP1362 chip requires a large delay (300ns and 462ns) between 16 * accesses to the address and data register. 17 * The following timing options exist: 18 * 19 * 1. Configure your memory controller to add such delays if it can (the best) 20 * 2. Implement platform-specific delay function possibly 21 * combined with configuring the memory controller; see 22 * include/linux/usb_isp1362.h for more info. 23 * 3. Use ndelay (easiest, poorest). 24 * 25 * Use the corresponding macros USE_PLATFORM_DELAY and USE_NDELAY in the 26 * platform specific section of isp1362.h to select the appropriate variant. 27 * 28 * Also note that according to the Philips "ISP1362 Errata" document 29 * Rev 1.00 from 27 May data corruption may occur when the #WR signal 30 * is reasserted (even with #CS deasserted) within 132ns after a 31 * write cycle to any controller register. If the hardware doesn't 32 * implement the recommended fix (gating the #WR with #CS) software 33 * must ensure that no further write cycle (not necessarily to the chip!) 34 * is issued by the CPU within this interval. 35 36 * For PXA25x this can be ensured by using VLIO with the maximum 37 * recovery time (MSCx = 0x7f8c) with a memory clock of 99.53 MHz. 38 */ 39 40 #undef ISP1362_DEBUG 41 42 /* 43 * The PXA255 UDC apparently doesn't handle GET_STATUS, GET_CONFIG and 44 * GET_INTERFACE requests correctly when the SETUP and DATA stages of the 45 * requests are carried out in separate frames. This will delay any SETUP 46 * packets until the start of the next frame so that this situation is 47 * unlikely to occur (and makes usbtest happy running with a PXA255 target 48 * device). 49 */ 50 #undef BUGGY_PXA2XX_UDC_USBTEST 51 52 #undef PTD_TRACE 53 #undef URB_TRACE 54 #undef VERBOSE 55 #undef REGISTERS 56 57 /* This enables a memory test on the ISP1362 chip memory to make sure the 58 * chip access timing is correct. 59 */ 60 #undef CHIP_BUFFER_TEST 61 62 #include <linux/module.h> 63 #include <linux/moduleparam.h> 64 #include <linux/kernel.h> 65 #include <linux/delay.h> 66 #include <linux/ioport.h> 67 #include <linux/sched.h> 68 #include <linux/slab.h> 69 #include <linux/errno.h> 70 #include <linux/init.h> 71 #include <linux/list.h> 72 #include <linux/interrupt.h> 73 #include <linux/usb.h> 74 #include <linux/usb/isp1362.h> 75 #include <linux/usb/hcd.h> 76 #include <linux/platform_device.h> 77 #include <linux/pm.h> 78 #include <linux/io.h> 79 #include <linux/bitmap.h> 80 #include <linux/prefetch.h> 81 #include <linux/debugfs.h> 82 #include <linux/seq_file.h> 83 84 #include <asm/irq.h> 85 #include <asm/byteorder.h> 86 #include <asm/unaligned.h> 87 88 static int dbg_level; 89 #ifdef ISP1362_DEBUG 90 module_param(dbg_level, int, 0644); 91 #else 92 module_param(dbg_level, int, 0); 93 #endif 94 95 #include "../core/usb.h" 96 #include "isp1362.h" 97 98 99 #define DRIVER_VERSION "2005-04-04" 100 #define DRIVER_DESC "ISP1362 USB Host Controller Driver" 101 102 MODULE_DESCRIPTION(DRIVER_DESC); 103 MODULE_LICENSE("GPL"); 104 105 static const char hcd_name[] = "isp1362-hcd"; 106 107 static void isp1362_hc_stop(struct usb_hcd *hcd); 108 static int isp1362_hc_start(struct usb_hcd *hcd); 109 110 /*-------------------------------------------------------------------------*/ 111 112 /* 113 * When called from the interrupthandler only isp1362_hcd->irqenb is modified, 114 * since the interrupt handler will write isp1362_hcd->irqenb to HCuPINT upon 115 * completion. 116 * We don't need a 'disable' counterpart, since interrupts will be disabled 117 * only by the interrupt handler. 118 */ 119 static inline void isp1362_enable_int(struct isp1362_hcd *isp1362_hcd, u16 mask) 120 { 121 if ((isp1362_hcd->irqenb | mask) == isp1362_hcd->irqenb) 122 return; 123 if (mask & ~isp1362_hcd->irqenb) 124 isp1362_write_reg16(isp1362_hcd, HCuPINT, mask & ~isp1362_hcd->irqenb); 125 isp1362_hcd->irqenb |= mask; 126 if (isp1362_hcd->irq_active) 127 return; 128 isp1362_write_reg16(isp1362_hcd, HCuPINTENB, isp1362_hcd->irqenb); 129 } 130 131 /*-------------------------------------------------------------------------*/ 132 133 static inline struct isp1362_ep_queue *get_ptd_queue(struct isp1362_hcd *isp1362_hcd, 134 u16 offset) 135 { 136 struct isp1362_ep_queue *epq = NULL; 137 138 if (offset < isp1362_hcd->istl_queue[1].buf_start) 139 epq = &isp1362_hcd->istl_queue[0]; 140 else if (offset < isp1362_hcd->intl_queue.buf_start) 141 epq = &isp1362_hcd->istl_queue[1]; 142 else if (offset < isp1362_hcd->atl_queue.buf_start) 143 epq = &isp1362_hcd->intl_queue; 144 else if (offset < isp1362_hcd->atl_queue.buf_start + 145 isp1362_hcd->atl_queue.buf_size) 146 epq = &isp1362_hcd->atl_queue; 147 148 if (epq) 149 DBG(1, "%s: PTD $%04x is on %s queue\n", __func__, offset, epq->name); 150 else 151 pr_warning("%s: invalid PTD $%04x\n", __func__, offset); 152 153 return epq; 154 } 155 156 static inline int get_ptd_offset(struct isp1362_ep_queue *epq, u8 index) 157 { 158 int offset; 159 160 if (index * epq->blk_size > epq->buf_size) { 161 pr_warning("%s: Bad %s index %d(%d)\n", __func__, epq->name, index, 162 epq->buf_size / epq->blk_size); 163 return -EINVAL; 164 } 165 offset = epq->buf_start + index * epq->blk_size; 166 DBG(3, "%s: %s PTD[%02x] # %04x\n", __func__, epq->name, index, offset); 167 168 return offset; 169 } 170 171 /*-------------------------------------------------------------------------*/ 172 173 static inline u16 max_transfer_size(struct isp1362_ep_queue *epq, size_t size, 174 int mps) 175 { 176 u16 xfer_size = min_t(size_t, MAX_XFER_SIZE, size); 177 178 xfer_size = min_t(size_t, xfer_size, epq->buf_avail * epq->blk_size - PTD_HEADER_SIZE); 179 if (xfer_size < size && xfer_size % mps) 180 xfer_size -= xfer_size % mps; 181 182 return xfer_size; 183 } 184 185 static int claim_ptd_buffers(struct isp1362_ep_queue *epq, 186 struct isp1362_ep *ep, u16 len) 187 { 188 int ptd_offset = -EINVAL; 189 int num_ptds = ((len + PTD_HEADER_SIZE - 1) / epq->blk_size) + 1; 190 int found; 191 192 BUG_ON(len > epq->buf_size); 193 194 if (!epq->buf_avail) 195 return -ENOMEM; 196 197 if (ep->num_ptds) 198 pr_err("%s: %s len %d/%d num_ptds %d buf_map %08lx skip_map %08lx\n", __func__, 199 epq->name, len, epq->blk_size, num_ptds, epq->buf_map, epq->skip_map); 200 BUG_ON(ep->num_ptds != 0); 201 202 found = bitmap_find_next_zero_area(&epq->buf_map, epq->buf_count, 0, 203 num_ptds, 0); 204 if (found >= epq->buf_count) 205 return -EOVERFLOW; 206 207 DBG(1, "%s: Found %d PTDs[%d] for %d/%d byte\n", __func__, 208 num_ptds, found, len, (int)(epq->blk_size - PTD_HEADER_SIZE)); 209 ptd_offset = get_ptd_offset(epq, found); 210 WARN_ON(ptd_offset < 0); 211 ep->ptd_offset = ptd_offset; 212 ep->num_ptds += num_ptds; 213 epq->buf_avail -= num_ptds; 214 BUG_ON(epq->buf_avail > epq->buf_count); 215 ep->ptd_index = found; 216 bitmap_set(&epq->buf_map, found, num_ptds); 217 DBG(1, "%s: Done %s PTD[%d] $%04x, avail %d count %d claimed %d %08lx:%08lx\n", 218 __func__, epq->name, ep->ptd_index, ep->ptd_offset, 219 epq->buf_avail, epq->buf_count, num_ptds, epq->buf_map, epq->skip_map); 220 221 return found; 222 } 223 224 static inline void release_ptd_buffers(struct isp1362_ep_queue *epq, struct isp1362_ep *ep) 225 { 226 int last = ep->ptd_index + ep->num_ptds; 227 228 if (last > epq->buf_count) 229 pr_err("%s: ep %p req %d len %d %s PTD[%d] $%04x num_ptds %d buf_count %d buf_avail %d buf_map %08lx skip_map %08lx\n", 230 __func__, ep, ep->num_req, ep->length, epq->name, ep->ptd_index, 231 ep->ptd_offset, ep->num_ptds, epq->buf_count, epq->buf_avail, 232 epq->buf_map, epq->skip_map); 233 BUG_ON(last > epq->buf_count); 234 235 bitmap_clear(&epq->buf_map, ep->ptd_index, ep->num_ptds); 236 bitmap_set(&epq->skip_map, ep->ptd_index, ep->num_ptds); 237 epq->buf_avail += ep->num_ptds; 238 epq->ptd_count--; 239 240 BUG_ON(epq->buf_avail > epq->buf_count); 241 BUG_ON(epq->ptd_count > epq->buf_count); 242 243 DBG(1, "%s: Done %s PTDs $%04x released %d avail %d count %d\n", 244 __func__, epq->name, 245 ep->ptd_offset, ep->num_ptds, epq->buf_avail, epq->buf_count); 246 DBG(1, "%s: buf_map %08lx skip_map %08lx\n", __func__, 247 epq->buf_map, epq->skip_map); 248 249 ep->num_ptds = 0; 250 ep->ptd_offset = -EINVAL; 251 ep->ptd_index = -EINVAL; 252 } 253 254 /*-------------------------------------------------------------------------*/ 255 256 /* 257 Set up PTD's. 258 */ 259 static void prepare_ptd(struct isp1362_hcd *isp1362_hcd, struct urb *urb, 260 struct isp1362_ep *ep, struct isp1362_ep_queue *epq, 261 u16 fno) 262 { 263 struct ptd *ptd; 264 int toggle; 265 int dir; 266 u16 len; 267 size_t buf_len = urb->transfer_buffer_length - urb->actual_length; 268 269 DBG(3, "%s: %s ep %p\n", __func__, epq->name, ep); 270 271 ptd = &ep->ptd; 272 273 ep->data = (unsigned char *)urb->transfer_buffer + urb->actual_length; 274 275 switch (ep->nextpid) { 276 case USB_PID_IN: 277 toggle = usb_gettoggle(urb->dev, ep->epnum, 0); 278 dir = PTD_DIR_IN; 279 if (usb_pipecontrol(urb->pipe)) { 280 len = min_t(size_t, ep->maxpacket, buf_len); 281 } else if (usb_pipeisoc(urb->pipe)) { 282 len = min_t(size_t, urb->iso_frame_desc[fno].length, MAX_XFER_SIZE); 283 ep->data = urb->transfer_buffer + urb->iso_frame_desc[fno].offset; 284 } else 285 len = max_transfer_size(epq, buf_len, ep->maxpacket); 286 DBG(1, "%s: IN len %d/%d/%d from URB\n", __func__, len, ep->maxpacket, 287 (int)buf_len); 288 break; 289 case USB_PID_OUT: 290 toggle = usb_gettoggle(urb->dev, ep->epnum, 1); 291 dir = PTD_DIR_OUT; 292 if (usb_pipecontrol(urb->pipe)) 293 len = min_t(size_t, ep->maxpacket, buf_len); 294 else if (usb_pipeisoc(urb->pipe)) 295 len = min_t(size_t, urb->iso_frame_desc[0].length, MAX_XFER_SIZE); 296 else 297 len = max_transfer_size(epq, buf_len, ep->maxpacket); 298 if (len == 0) 299 pr_info("%s: Sending ZERO packet: %d\n", __func__, 300 urb->transfer_flags & URB_ZERO_PACKET); 301 DBG(1, "%s: OUT len %d/%d/%d from URB\n", __func__, len, ep->maxpacket, 302 (int)buf_len); 303 break; 304 case USB_PID_SETUP: 305 toggle = 0; 306 dir = PTD_DIR_SETUP; 307 len = sizeof(struct usb_ctrlrequest); 308 DBG(1, "%s: SETUP len %d\n", __func__, len); 309 ep->data = urb->setup_packet; 310 break; 311 case USB_PID_ACK: 312 toggle = 1; 313 len = 0; 314 dir = (urb->transfer_buffer_length && usb_pipein(urb->pipe)) ? 315 PTD_DIR_OUT : PTD_DIR_IN; 316 DBG(1, "%s: ACK len %d\n", __func__, len); 317 break; 318 default: 319 toggle = dir = len = 0; 320 pr_err("%s@%d: ep->nextpid %02x\n", __func__, __LINE__, ep->nextpid); 321 BUG_ON(1); 322 } 323 324 ep->length = len; 325 if (!len) 326 ep->data = NULL; 327 328 ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK | PTD_TOGGLE(toggle); 329 ptd->mps = PTD_MPS(ep->maxpacket) | PTD_SPD(urb->dev->speed == USB_SPEED_LOW) | 330 PTD_EP(ep->epnum); 331 ptd->len = PTD_LEN(len) | PTD_DIR(dir); 332 ptd->faddr = PTD_FA(usb_pipedevice(urb->pipe)); 333 334 if (usb_pipeint(urb->pipe)) { 335 ptd->faddr |= PTD_SF_INT(ep->branch); 336 ptd->faddr |= PTD_PR(ep->interval ? __ffs(ep->interval) : 0); 337 } 338 if (usb_pipeisoc(urb->pipe)) 339 ptd->faddr |= PTD_SF_ISO(fno); 340 341 DBG(1, "%s: Finished\n", __func__); 342 } 343 344 static void isp1362_write_ptd(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep, 345 struct isp1362_ep_queue *epq) 346 { 347 struct ptd *ptd = &ep->ptd; 348 int len = PTD_GET_DIR(ptd) == PTD_DIR_IN ? 0 : ep->length; 349 350 prefetch(ptd); 351 isp1362_write_buffer(isp1362_hcd, ptd, ep->ptd_offset, PTD_HEADER_SIZE); 352 if (len) 353 isp1362_write_buffer(isp1362_hcd, ep->data, 354 ep->ptd_offset + PTD_HEADER_SIZE, len); 355 356 dump_ptd(ptd); 357 dump_ptd_out_data(ptd, ep->data); 358 } 359 360 static void isp1362_read_ptd(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep, 361 struct isp1362_ep_queue *epq) 362 { 363 struct ptd *ptd = &ep->ptd; 364 int act_len; 365 366 WARN_ON(list_empty(&ep->active)); 367 BUG_ON(ep->ptd_offset < 0); 368 369 list_del_init(&ep->active); 370 DBG(1, "%s: ep %p removed from active list %p\n", __func__, ep, &epq->active); 371 372 prefetchw(ptd); 373 isp1362_read_buffer(isp1362_hcd, ptd, ep->ptd_offset, PTD_HEADER_SIZE); 374 dump_ptd(ptd); 375 act_len = PTD_GET_COUNT(ptd); 376 if (PTD_GET_DIR(ptd) != PTD_DIR_IN || act_len == 0) 377 return; 378 if (act_len > ep->length) 379 pr_err("%s: ep %p PTD $%04x act_len %d ep->length %d\n", __func__, ep, 380 ep->ptd_offset, act_len, ep->length); 381 BUG_ON(act_len > ep->length); 382 /* Only transfer the amount of data that has actually been overwritten 383 * in the chip buffer. We don't want any data that doesn't belong to the 384 * transfer to leak out of the chip to the callers transfer buffer! 385 */ 386 prefetchw(ep->data); 387 isp1362_read_buffer(isp1362_hcd, ep->data, 388 ep->ptd_offset + PTD_HEADER_SIZE, act_len); 389 dump_ptd_in_data(ptd, ep->data); 390 } 391 392 /* 393 * INT PTDs will stay in the chip until data is available. 394 * This function will remove a PTD from the chip when the URB is dequeued. 395 * Must be called with the spinlock held and IRQs disabled 396 */ 397 static void remove_ptd(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep) 398 399 { 400 int index; 401 struct isp1362_ep_queue *epq; 402 403 DBG(1, "%s: ep %p PTD[%d] $%04x\n", __func__, ep, ep->ptd_index, ep->ptd_offset); 404 BUG_ON(ep->ptd_offset < 0); 405 406 epq = get_ptd_queue(isp1362_hcd, ep->ptd_offset); 407 BUG_ON(!epq); 408 409 /* put ep in remove_list for cleanup */ 410 WARN_ON(!list_empty(&ep->remove_list)); 411 list_add_tail(&ep->remove_list, &isp1362_hcd->remove_list); 412 /* let SOF interrupt handle the cleanup */ 413 isp1362_enable_int(isp1362_hcd, HCuPINT_SOF); 414 415 index = ep->ptd_index; 416 if (index < 0) 417 /* ISO queues don't have SKIP registers */ 418 return; 419 420 DBG(1, "%s: Disabling PTD[%02x] $%04x %08lx|%08x\n", __func__, 421 index, ep->ptd_offset, epq->skip_map, 1 << index); 422 423 /* prevent further processing of PTD (will be effective after next SOF) */ 424 epq->skip_map |= 1 << index; 425 if (epq == &isp1362_hcd->atl_queue) { 426 DBG(2, "%s: ATLSKIP = %08x -> %08lx\n", __func__, 427 isp1362_read_reg32(isp1362_hcd, HCATLSKIP), epq->skip_map); 428 isp1362_write_reg32(isp1362_hcd, HCATLSKIP, epq->skip_map); 429 if (~epq->skip_map == 0) 430 isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ATL_ACTIVE); 431 } else if (epq == &isp1362_hcd->intl_queue) { 432 DBG(2, "%s: INTLSKIP = %08x -> %08lx\n", __func__, 433 isp1362_read_reg32(isp1362_hcd, HCINTLSKIP), epq->skip_map); 434 isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, epq->skip_map); 435 if (~epq->skip_map == 0) 436 isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_INTL_ACTIVE); 437 } 438 } 439 440 /* 441 Take done or failed requests out of schedule. Give back 442 processed urbs. 443 */ 444 static void finish_request(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep, 445 struct urb *urb, int status) 446 __releases(isp1362_hcd->lock) 447 __acquires(isp1362_hcd->lock) 448 { 449 urb->hcpriv = NULL; 450 ep->error_count = 0; 451 452 if (usb_pipecontrol(urb->pipe)) 453 ep->nextpid = USB_PID_SETUP; 454 455 URB_DBG("%s: req %d FA %d ep%d%s %s: len %d/%d %s stat %d\n", __func__, 456 ep->num_req, usb_pipedevice(urb->pipe), 457 usb_pipeendpoint(urb->pipe), 458 !usb_pipein(urb->pipe) ? "out" : "in", 459 usb_pipecontrol(urb->pipe) ? "ctrl" : 460 usb_pipeint(urb->pipe) ? "int" : 461 usb_pipebulk(urb->pipe) ? "bulk" : 462 "iso", 463 urb->actual_length, urb->transfer_buffer_length, 464 !(urb->transfer_flags & URB_SHORT_NOT_OK) ? 465 "short_ok" : "", urb->status); 466 467 468 usb_hcd_unlink_urb_from_ep(isp1362_hcd_to_hcd(isp1362_hcd), urb); 469 spin_unlock(&isp1362_hcd->lock); 470 usb_hcd_giveback_urb(isp1362_hcd_to_hcd(isp1362_hcd), urb, status); 471 spin_lock(&isp1362_hcd->lock); 472 473 /* take idle endpoints out of the schedule right away */ 474 if (!list_empty(&ep->hep->urb_list)) 475 return; 476 477 /* async deschedule */ 478 if (!list_empty(&ep->schedule)) { 479 list_del_init(&ep->schedule); 480 return; 481 } 482 483 484 if (ep->interval) { 485 /* periodic deschedule */ 486 DBG(1, "deschedule qh%d/%p branch %d load %d bandwidth %d -> %d\n", ep->interval, 487 ep, ep->branch, ep->load, 488 isp1362_hcd->load[ep->branch], 489 isp1362_hcd->load[ep->branch] - ep->load); 490 isp1362_hcd->load[ep->branch] -= ep->load; 491 ep->branch = PERIODIC_SIZE; 492 } 493 } 494 495 /* 496 * Analyze transfer results, handle partial transfers and errors 497 */ 498 static void postproc_ep(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep) 499 { 500 struct urb *urb = get_urb(ep); 501 struct usb_device *udev; 502 struct ptd *ptd; 503 int short_ok; 504 u16 len; 505 int urbstat = -EINPROGRESS; 506 u8 cc; 507 508 DBG(2, "%s: ep %p req %d\n", __func__, ep, ep->num_req); 509 510 udev = urb->dev; 511 ptd = &ep->ptd; 512 cc = PTD_GET_CC(ptd); 513 if (cc == PTD_NOTACCESSED) { 514 pr_err("%s: req %d PTD %p Untouched by ISP1362\n", __func__, 515 ep->num_req, ptd); 516 cc = PTD_DEVNOTRESP; 517 } 518 519 short_ok = !(urb->transfer_flags & URB_SHORT_NOT_OK); 520 len = urb->transfer_buffer_length - urb->actual_length; 521 522 /* Data underrun is special. For allowed underrun 523 we clear the error and continue as normal. For 524 forbidden underrun we finish the DATA stage 525 immediately while for control transfer, 526 we do a STATUS stage. 527 */ 528 if (cc == PTD_DATAUNDERRUN) { 529 if (short_ok) { 530 DBG(1, "%s: req %d Allowed data underrun short_%sok %d/%d/%d byte\n", 531 __func__, ep->num_req, short_ok ? "" : "not_", 532 PTD_GET_COUNT(ptd), ep->maxpacket, len); 533 cc = PTD_CC_NOERROR; 534 urbstat = 0; 535 } else { 536 DBG(1, "%s: req %d Data Underrun %s nextpid %02x short_%sok %d/%d/%d byte\n", 537 __func__, ep->num_req, 538 usb_pipein(urb->pipe) ? "IN" : "OUT", ep->nextpid, 539 short_ok ? "" : "not_", 540 PTD_GET_COUNT(ptd), ep->maxpacket, len); 541 /* save the data underrun error code for later and 542 * proceed with the status stage 543 */ 544 urb->actual_length += PTD_GET_COUNT(ptd); 545 if (usb_pipecontrol(urb->pipe)) { 546 ep->nextpid = USB_PID_ACK; 547 BUG_ON(urb->actual_length > urb->transfer_buffer_length); 548 549 if (urb->status == -EINPROGRESS) 550 urb->status = cc_to_error[PTD_DATAUNDERRUN]; 551 } else { 552 usb_settoggle(udev, ep->epnum, ep->nextpid == USB_PID_OUT, 553 PTD_GET_TOGGLE(ptd)); 554 urbstat = cc_to_error[PTD_DATAUNDERRUN]; 555 } 556 goto out; 557 } 558 } 559 560 if (cc != PTD_CC_NOERROR) { 561 if (++ep->error_count >= 3 || cc == PTD_CC_STALL || cc == PTD_DATAOVERRUN) { 562 urbstat = cc_to_error[cc]; 563 DBG(1, "%s: req %d nextpid %02x, status %d, error %d, error_count %d\n", 564 __func__, ep->num_req, ep->nextpid, urbstat, cc, 565 ep->error_count); 566 } 567 goto out; 568 } 569 570 switch (ep->nextpid) { 571 case USB_PID_OUT: 572 if (PTD_GET_COUNT(ptd) != ep->length) 573 pr_err("%s: count=%d len=%d\n", __func__, 574 PTD_GET_COUNT(ptd), ep->length); 575 BUG_ON(PTD_GET_COUNT(ptd) != ep->length); 576 urb->actual_length += ep->length; 577 BUG_ON(urb->actual_length > urb->transfer_buffer_length); 578 usb_settoggle(udev, ep->epnum, 1, PTD_GET_TOGGLE(ptd)); 579 if (urb->actual_length == urb->transfer_buffer_length) { 580 DBG(3, "%s: req %d xfer complete %d/%d status %d -> 0\n", __func__, 581 ep->num_req, len, ep->maxpacket, urbstat); 582 if (usb_pipecontrol(urb->pipe)) { 583 DBG(3, "%s: req %d %s Wait for ACK\n", __func__, 584 ep->num_req, 585 usb_pipein(urb->pipe) ? "IN" : "OUT"); 586 ep->nextpid = USB_PID_ACK; 587 } else { 588 if (len % ep->maxpacket || 589 !(urb->transfer_flags & URB_ZERO_PACKET)) { 590 urbstat = 0; 591 DBG(3, "%s: req %d URB %s status %d count %d/%d/%d\n", 592 __func__, ep->num_req, usb_pipein(urb->pipe) ? "IN" : "OUT", 593 urbstat, len, ep->maxpacket, urb->actual_length); 594 } 595 } 596 } 597 break; 598 case USB_PID_IN: 599 len = PTD_GET_COUNT(ptd); 600 BUG_ON(len > ep->length); 601 urb->actual_length += len; 602 BUG_ON(urb->actual_length > urb->transfer_buffer_length); 603 usb_settoggle(udev, ep->epnum, 0, PTD_GET_TOGGLE(ptd)); 604 /* if transfer completed or (allowed) data underrun */ 605 if ((urb->transfer_buffer_length == urb->actual_length) || 606 len % ep->maxpacket) { 607 DBG(3, "%s: req %d xfer complete %d/%d status %d -> 0\n", __func__, 608 ep->num_req, len, ep->maxpacket, urbstat); 609 if (usb_pipecontrol(urb->pipe)) { 610 DBG(3, "%s: req %d %s Wait for ACK\n", __func__, 611 ep->num_req, 612 usb_pipein(urb->pipe) ? "IN" : "OUT"); 613 ep->nextpid = USB_PID_ACK; 614 } else { 615 urbstat = 0; 616 DBG(3, "%s: req %d URB %s status %d count %d/%d/%d\n", 617 __func__, ep->num_req, usb_pipein(urb->pipe) ? "IN" : "OUT", 618 urbstat, len, ep->maxpacket, urb->actual_length); 619 } 620 } 621 break; 622 case USB_PID_SETUP: 623 if (urb->transfer_buffer_length == urb->actual_length) { 624 ep->nextpid = USB_PID_ACK; 625 } else if (usb_pipeout(urb->pipe)) { 626 usb_settoggle(udev, 0, 1, 1); 627 ep->nextpid = USB_PID_OUT; 628 } else { 629 usb_settoggle(udev, 0, 0, 1); 630 ep->nextpid = USB_PID_IN; 631 } 632 break; 633 case USB_PID_ACK: 634 DBG(3, "%s: req %d got ACK %d -> 0\n", __func__, ep->num_req, 635 urbstat); 636 WARN_ON(urbstat != -EINPROGRESS); 637 urbstat = 0; 638 ep->nextpid = 0; 639 break; 640 default: 641 BUG_ON(1); 642 } 643 644 out: 645 if (urbstat != -EINPROGRESS) { 646 DBG(2, "%s: Finishing ep %p req %d urb %p status %d\n", __func__, 647 ep, ep->num_req, urb, urbstat); 648 finish_request(isp1362_hcd, ep, urb, urbstat); 649 } 650 } 651 652 static void finish_unlinks(struct isp1362_hcd *isp1362_hcd) 653 { 654 struct isp1362_ep *ep; 655 struct isp1362_ep *tmp; 656 657 list_for_each_entry_safe(ep, tmp, &isp1362_hcd->remove_list, remove_list) { 658 struct isp1362_ep_queue *epq = 659 get_ptd_queue(isp1362_hcd, ep->ptd_offset); 660 int index = ep->ptd_index; 661 662 BUG_ON(epq == NULL); 663 if (index >= 0) { 664 DBG(1, "%s: remove PTD[%d] $%04x\n", __func__, index, ep->ptd_offset); 665 BUG_ON(ep->num_ptds == 0); 666 release_ptd_buffers(epq, ep); 667 } 668 if (!list_empty(&ep->hep->urb_list)) { 669 struct urb *urb = get_urb(ep); 670 671 DBG(1, "%s: Finishing req %d ep %p from remove_list\n", __func__, 672 ep->num_req, ep); 673 finish_request(isp1362_hcd, ep, urb, -ESHUTDOWN); 674 } 675 WARN_ON(list_empty(&ep->active)); 676 if (!list_empty(&ep->active)) { 677 list_del_init(&ep->active); 678 DBG(1, "%s: ep %p removed from active list\n", __func__, ep); 679 } 680 list_del_init(&ep->remove_list); 681 DBG(1, "%s: ep %p removed from remove_list\n", __func__, ep); 682 } 683 DBG(1, "%s: Done\n", __func__); 684 } 685 686 static inline void enable_atl_transfers(struct isp1362_hcd *isp1362_hcd, int count) 687 { 688 if (count > 0) { 689 if (count < isp1362_hcd->atl_queue.ptd_count) 690 isp1362_write_reg16(isp1362_hcd, HCATLDTC, count); 691 isp1362_enable_int(isp1362_hcd, HCuPINT_ATL); 692 isp1362_write_reg32(isp1362_hcd, HCATLSKIP, isp1362_hcd->atl_queue.skip_map); 693 isp1362_set_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ATL_ACTIVE); 694 } else 695 isp1362_enable_int(isp1362_hcd, HCuPINT_SOF); 696 } 697 698 static inline void enable_intl_transfers(struct isp1362_hcd *isp1362_hcd) 699 { 700 isp1362_enable_int(isp1362_hcd, HCuPINT_INTL); 701 isp1362_set_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_INTL_ACTIVE); 702 isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, isp1362_hcd->intl_queue.skip_map); 703 } 704 705 static inline void enable_istl_transfers(struct isp1362_hcd *isp1362_hcd, int flip) 706 { 707 isp1362_enable_int(isp1362_hcd, flip ? HCuPINT_ISTL1 : HCuPINT_ISTL0); 708 isp1362_set_mask16(isp1362_hcd, HCBUFSTAT, flip ? 709 HCBUFSTAT_ISTL1_FULL : HCBUFSTAT_ISTL0_FULL); 710 } 711 712 static int submit_req(struct isp1362_hcd *isp1362_hcd, struct urb *urb, 713 struct isp1362_ep *ep, struct isp1362_ep_queue *epq) 714 { 715 int index = epq->free_ptd; 716 717 prepare_ptd(isp1362_hcd, urb, ep, epq, 0); 718 index = claim_ptd_buffers(epq, ep, ep->length); 719 if (index == -ENOMEM) { 720 DBG(1, "%s: req %d No free %s PTD available: %d, %08lx:%08lx\n", __func__, 721 ep->num_req, epq->name, ep->num_ptds, epq->buf_map, epq->skip_map); 722 return index; 723 } else if (index == -EOVERFLOW) { 724 DBG(1, "%s: req %d Not enough space for %d byte %s PTD %d %08lx:%08lx\n", 725 __func__, ep->num_req, ep->length, epq->name, ep->num_ptds, 726 epq->buf_map, epq->skip_map); 727 return index; 728 } else 729 BUG_ON(index < 0); 730 list_add_tail(&ep->active, &epq->active); 731 DBG(1, "%s: ep %p req %d len %d added to active list %p\n", __func__, 732 ep, ep->num_req, ep->length, &epq->active); 733 DBG(1, "%s: Submitting %s PTD $%04x for ep %p req %d\n", __func__, epq->name, 734 ep->ptd_offset, ep, ep->num_req); 735 isp1362_write_ptd(isp1362_hcd, ep, epq); 736 __clear_bit(ep->ptd_index, &epq->skip_map); 737 738 return 0; 739 } 740 741 static void start_atl_transfers(struct isp1362_hcd *isp1362_hcd) 742 { 743 int ptd_count = 0; 744 struct isp1362_ep_queue *epq = &isp1362_hcd->atl_queue; 745 struct isp1362_ep *ep; 746 int defer = 0; 747 748 if (atomic_read(&epq->finishing)) { 749 DBG(1, "%s: finish_transfers is active for %s\n", __func__, epq->name); 750 return; 751 } 752 753 list_for_each_entry(ep, &isp1362_hcd->async, schedule) { 754 struct urb *urb = get_urb(ep); 755 int ret; 756 757 if (!list_empty(&ep->active)) { 758 DBG(2, "%s: Skipping active %s ep %p\n", __func__, epq->name, ep); 759 continue; 760 } 761 762 DBG(1, "%s: Processing %s ep %p req %d\n", __func__, epq->name, 763 ep, ep->num_req); 764 765 ret = submit_req(isp1362_hcd, urb, ep, epq); 766 if (ret == -ENOMEM) { 767 defer = 1; 768 break; 769 } else if (ret == -EOVERFLOW) { 770 defer = 1; 771 continue; 772 } 773 #ifdef BUGGY_PXA2XX_UDC_USBTEST 774 defer = ep->nextpid == USB_PID_SETUP; 775 #endif 776 ptd_count++; 777 } 778 779 /* Avoid starving of endpoints */ 780 if (isp1362_hcd->async.next != isp1362_hcd->async.prev) { 781 DBG(2, "%s: Cycling ASYNC schedule %d\n", __func__, ptd_count); 782 list_move(&isp1362_hcd->async, isp1362_hcd->async.next); 783 } 784 if (ptd_count || defer) 785 enable_atl_transfers(isp1362_hcd, defer ? 0 : ptd_count); 786 787 epq->ptd_count += ptd_count; 788 if (epq->ptd_count > epq->stat_maxptds) { 789 epq->stat_maxptds = epq->ptd_count; 790 DBG(0, "%s: max_ptds: %d\n", __func__, epq->stat_maxptds); 791 } 792 } 793 794 static void start_intl_transfers(struct isp1362_hcd *isp1362_hcd) 795 { 796 int ptd_count = 0; 797 struct isp1362_ep_queue *epq = &isp1362_hcd->intl_queue; 798 struct isp1362_ep *ep; 799 800 if (atomic_read(&epq->finishing)) { 801 DBG(1, "%s: finish_transfers is active for %s\n", __func__, epq->name); 802 return; 803 } 804 805 list_for_each_entry(ep, &isp1362_hcd->periodic, schedule) { 806 struct urb *urb = get_urb(ep); 807 int ret; 808 809 if (!list_empty(&ep->active)) { 810 DBG(1, "%s: Skipping active %s ep %p\n", __func__, 811 epq->name, ep); 812 continue; 813 } 814 815 DBG(1, "%s: Processing %s ep %p req %d\n", __func__, 816 epq->name, ep, ep->num_req); 817 ret = submit_req(isp1362_hcd, urb, ep, epq); 818 if (ret == -ENOMEM) 819 break; 820 else if (ret == -EOVERFLOW) 821 continue; 822 ptd_count++; 823 } 824 825 if (ptd_count) { 826 static int last_count; 827 828 if (ptd_count != last_count) { 829 DBG(0, "%s: ptd_count: %d\n", __func__, ptd_count); 830 last_count = ptd_count; 831 } 832 enable_intl_transfers(isp1362_hcd); 833 } 834 835 epq->ptd_count += ptd_count; 836 if (epq->ptd_count > epq->stat_maxptds) 837 epq->stat_maxptds = epq->ptd_count; 838 } 839 840 static inline int next_ptd(struct isp1362_ep_queue *epq, struct isp1362_ep *ep) 841 { 842 u16 ptd_offset = ep->ptd_offset; 843 int num_ptds = (ep->length + PTD_HEADER_SIZE + (epq->blk_size - 1)) / epq->blk_size; 844 845 DBG(2, "%s: PTD offset $%04x + %04x => %d * %04x -> $%04x\n", __func__, ptd_offset, 846 ep->length, num_ptds, epq->blk_size, ptd_offset + num_ptds * epq->blk_size); 847 848 ptd_offset += num_ptds * epq->blk_size; 849 if (ptd_offset < epq->buf_start + epq->buf_size) 850 return ptd_offset; 851 else 852 return -ENOMEM; 853 } 854 855 static void start_iso_transfers(struct isp1362_hcd *isp1362_hcd) 856 { 857 int ptd_count = 0; 858 int flip = isp1362_hcd->istl_flip; 859 struct isp1362_ep_queue *epq; 860 int ptd_offset; 861 struct isp1362_ep *ep; 862 struct isp1362_ep *tmp; 863 u16 fno = isp1362_read_reg32(isp1362_hcd, HCFMNUM); 864 865 fill2: 866 epq = &isp1362_hcd->istl_queue[flip]; 867 if (atomic_read(&epq->finishing)) { 868 DBG(1, "%s: finish_transfers is active for %s\n", __func__, epq->name); 869 return; 870 } 871 872 if (!list_empty(&epq->active)) 873 return; 874 875 ptd_offset = epq->buf_start; 876 list_for_each_entry_safe(ep, tmp, &isp1362_hcd->isoc, schedule) { 877 struct urb *urb = get_urb(ep); 878 s16 diff = fno - (u16)urb->start_frame; 879 880 DBG(1, "%s: Processing %s ep %p\n", __func__, epq->name, ep); 881 882 if (diff > urb->number_of_packets) { 883 /* time frame for this URB has elapsed */ 884 finish_request(isp1362_hcd, ep, urb, -EOVERFLOW); 885 continue; 886 } else if (diff < -1) { 887 /* URB is not due in this frame or the next one. 888 * Comparing with '-1' instead of '0' accounts for double 889 * buffering in the ISP1362 which enables us to queue the PTD 890 * one frame ahead of time 891 */ 892 } else if (diff == -1) { 893 /* submit PTD's that are due in the next frame */ 894 prepare_ptd(isp1362_hcd, urb, ep, epq, fno); 895 if (ptd_offset + PTD_HEADER_SIZE + ep->length > 896 epq->buf_start + epq->buf_size) { 897 pr_err("%s: Not enough ISO buffer space for %d byte PTD\n", 898 __func__, ep->length); 899 continue; 900 } 901 ep->ptd_offset = ptd_offset; 902 list_add_tail(&ep->active, &epq->active); 903 904 ptd_offset = next_ptd(epq, ep); 905 if (ptd_offset < 0) { 906 pr_warning("%s: req %d No more %s PTD buffers available\n", __func__, 907 ep->num_req, epq->name); 908 break; 909 } 910 } 911 } 912 list_for_each_entry(ep, &epq->active, active) { 913 if (epq->active.next == &ep->active) 914 ep->ptd.mps |= PTD_LAST_MSK; 915 isp1362_write_ptd(isp1362_hcd, ep, epq); 916 ptd_count++; 917 } 918 919 if (ptd_count) 920 enable_istl_transfers(isp1362_hcd, flip); 921 922 epq->ptd_count += ptd_count; 923 if (epq->ptd_count > epq->stat_maxptds) 924 epq->stat_maxptds = epq->ptd_count; 925 926 /* check, whether the second ISTL buffer may also be filled */ 927 if (!(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) & 928 (flip ? HCBUFSTAT_ISTL0_FULL : HCBUFSTAT_ISTL1_FULL))) { 929 fno++; 930 ptd_count = 0; 931 flip = 1 - flip; 932 goto fill2; 933 } 934 } 935 936 static void finish_transfers(struct isp1362_hcd *isp1362_hcd, unsigned long done_map, 937 struct isp1362_ep_queue *epq) 938 { 939 struct isp1362_ep *ep; 940 struct isp1362_ep *tmp; 941 942 if (list_empty(&epq->active)) { 943 DBG(1, "%s: Nothing to do for %s queue\n", __func__, epq->name); 944 return; 945 } 946 947 DBG(1, "%s: Finishing %s transfers %08lx\n", __func__, epq->name, done_map); 948 949 atomic_inc(&epq->finishing); 950 list_for_each_entry_safe(ep, tmp, &epq->active, active) { 951 int index = ep->ptd_index; 952 953 DBG(1, "%s: Checking %s PTD[%02x] $%04x\n", __func__, epq->name, 954 index, ep->ptd_offset); 955 956 BUG_ON(index < 0); 957 if (__test_and_clear_bit(index, &done_map)) { 958 isp1362_read_ptd(isp1362_hcd, ep, epq); 959 epq->free_ptd = index; 960 BUG_ON(ep->num_ptds == 0); 961 release_ptd_buffers(epq, ep); 962 963 DBG(1, "%s: ep %p req %d removed from active list\n", __func__, 964 ep, ep->num_req); 965 if (!list_empty(&ep->remove_list)) { 966 list_del_init(&ep->remove_list); 967 DBG(1, "%s: ep %p removed from remove list\n", __func__, ep); 968 } 969 DBG(1, "%s: Postprocessing %s ep %p req %d\n", __func__, epq->name, 970 ep, ep->num_req); 971 postproc_ep(isp1362_hcd, ep); 972 } 973 if (!done_map) 974 break; 975 } 976 if (done_map) 977 pr_warning("%s: done_map not clear: %08lx:%08lx\n", __func__, done_map, 978 epq->skip_map); 979 atomic_dec(&epq->finishing); 980 } 981 982 static void finish_iso_transfers(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep_queue *epq) 983 { 984 struct isp1362_ep *ep; 985 struct isp1362_ep *tmp; 986 987 if (list_empty(&epq->active)) { 988 DBG(1, "%s: Nothing to do for %s queue\n", __func__, epq->name); 989 return; 990 } 991 992 DBG(1, "%s: Finishing %s transfers\n", __func__, epq->name); 993 994 atomic_inc(&epq->finishing); 995 list_for_each_entry_safe(ep, tmp, &epq->active, active) { 996 DBG(1, "%s: Checking PTD $%04x\n", __func__, ep->ptd_offset); 997 998 isp1362_read_ptd(isp1362_hcd, ep, epq); 999 DBG(1, "%s: Postprocessing %s ep %p\n", __func__, epq->name, ep); 1000 postproc_ep(isp1362_hcd, ep); 1001 } 1002 WARN_ON(epq->blk_size != 0); 1003 atomic_dec(&epq->finishing); 1004 } 1005 1006 static irqreturn_t isp1362_irq(struct usb_hcd *hcd) 1007 { 1008 int handled = 0; 1009 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd); 1010 u16 irqstat; 1011 u16 svc_mask; 1012 1013 spin_lock(&isp1362_hcd->lock); 1014 1015 BUG_ON(isp1362_hcd->irq_active++); 1016 1017 isp1362_write_reg16(isp1362_hcd, HCuPINTENB, 0); 1018 1019 irqstat = isp1362_read_reg16(isp1362_hcd, HCuPINT); 1020 DBG(3, "%s: got IRQ %04x:%04x\n", __func__, irqstat, isp1362_hcd->irqenb); 1021 1022 /* only handle interrupts that are currently enabled */ 1023 irqstat &= isp1362_hcd->irqenb; 1024 isp1362_write_reg16(isp1362_hcd, HCuPINT, irqstat); 1025 svc_mask = irqstat; 1026 1027 if (irqstat & HCuPINT_SOF) { 1028 isp1362_hcd->irqenb &= ~HCuPINT_SOF; 1029 isp1362_hcd->irq_stat[ISP1362_INT_SOF]++; 1030 handled = 1; 1031 svc_mask &= ~HCuPINT_SOF; 1032 DBG(3, "%s: SOF\n", __func__); 1033 isp1362_hcd->fmindex = isp1362_read_reg32(isp1362_hcd, HCFMNUM); 1034 if (!list_empty(&isp1362_hcd->remove_list)) 1035 finish_unlinks(isp1362_hcd); 1036 if (!list_empty(&isp1362_hcd->async) && !(irqstat & HCuPINT_ATL)) { 1037 if (list_empty(&isp1362_hcd->atl_queue.active)) { 1038 start_atl_transfers(isp1362_hcd); 1039 } else { 1040 isp1362_enable_int(isp1362_hcd, HCuPINT_ATL); 1041 isp1362_write_reg32(isp1362_hcd, HCATLSKIP, 1042 isp1362_hcd->atl_queue.skip_map); 1043 isp1362_set_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ATL_ACTIVE); 1044 } 1045 } 1046 } 1047 1048 if (irqstat & HCuPINT_ISTL0) { 1049 isp1362_hcd->irq_stat[ISP1362_INT_ISTL0]++; 1050 handled = 1; 1051 svc_mask &= ~HCuPINT_ISTL0; 1052 isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ISTL0_FULL); 1053 DBG(1, "%s: ISTL0\n", __func__); 1054 WARN_ON((int)!!isp1362_hcd->istl_flip); 1055 WARN_ON(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) & 1056 HCBUFSTAT_ISTL0_ACTIVE); 1057 WARN_ON(!(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) & 1058 HCBUFSTAT_ISTL0_DONE)); 1059 isp1362_hcd->irqenb &= ~HCuPINT_ISTL0; 1060 } 1061 1062 if (irqstat & HCuPINT_ISTL1) { 1063 isp1362_hcd->irq_stat[ISP1362_INT_ISTL1]++; 1064 handled = 1; 1065 svc_mask &= ~HCuPINT_ISTL1; 1066 isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ISTL1_FULL); 1067 DBG(1, "%s: ISTL1\n", __func__); 1068 WARN_ON(!(int)isp1362_hcd->istl_flip); 1069 WARN_ON(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) & 1070 HCBUFSTAT_ISTL1_ACTIVE); 1071 WARN_ON(!(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) & 1072 HCBUFSTAT_ISTL1_DONE)); 1073 isp1362_hcd->irqenb &= ~HCuPINT_ISTL1; 1074 } 1075 1076 if (irqstat & (HCuPINT_ISTL0 | HCuPINT_ISTL1)) { 1077 WARN_ON((irqstat & (HCuPINT_ISTL0 | HCuPINT_ISTL1)) == 1078 (HCuPINT_ISTL0 | HCuPINT_ISTL1)); 1079 finish_iso_transfers(isp1362_hcd, 1080 &isp1362_hcd->istl_queue[isp1362_hcd->istl_flip]); 1081 start_iso_transfers(isp1362_hcd); 1082 isp1362_hcd->istl_flip = 1 - isp1362_hcd->istl_flip; 1083 } 1084 1085 if (irqstat & HCuPINT_INTL) { 1086 u32 done_map = isp1362_read_reg32(isp1362_hcd, HCINTLDONE); 1087 u32 skip_map = isp1362_read_reg32(isp1362_hcd, HCINTLSKIP); 1088 isp1362_hcd->irq_stat[ISP1362_INT_INTL]++; 1089 1090 DBG(2, "%s: INTL\n", __func__); 1091 1092 svc_mask &= ~HCuPINT_INTL; 1093 1094 isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, skip_map | done_map); 1095 if (~(done_map | skip_map) == 0) 1096 /* All PTDs are finished, disable INTL processing entirely */ 1097 isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_INTL_ACTIVE); 1098 1099 handled = 1; 1100 WARN_ON(!done_map); 1101 if (done_map) { 1102 DBG(3, "%s: INTL done_map %08x\n", __func__, done_map); 1103 finish_transfers(isp1362_hcd, done_map, &isp1362_hcd->intl_queue); 1104 start_intl_transfers(isp1362_hcd); 1105 } 1106 } 1107 1108 if (irqstat & HCuPINT_ATL) { 1109 u32 done_map = isp1362_read_reg32(isp1362_hcd, HCATLDONE); 1110 u32 skip_map = isp1362_read_reg32(isp1362_hcd, HCATLSKIP); 1111 isp1362_hcd->irq_stat[ISP1362_INT_ATL]++; 1112 1113 DBG(2, "%s: ATL\n", __func__); 1114 1115 svc_mask &= ~HCuPINT_ATL; 1116 1117 isp1362_write_reg32(isp1362_hcd, HCATLSKIP, skip_map | done_map); 1118 if (~(done_map | skip_map) == 0) 1119 isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ATL_ACTIVE); 1120 if (done_map) { 1121 DBG(3, "%s: ATL done_map %08x\n", __func__, done_map); 1122 finish_transfers(isp1362_hcd, done_map, &isp1362_hcd->atl_queue); 1123 start_atl_transfers(isp1362_hcd); 1124 } 1125 handled = 1; 1126 } 1127 1128 if (irqstat & HCuPINT_OPR) { 1129 u32 intstat = isp1362_read_reg32(isp1362_hcd, HCINTSTAT); 1130 isp1362_hcd->irq_stat[ISP1362_INT_OPR]++; 1131 1132 svc_mask &= ~HCuPINT_OPR; 1133 DBG(2, "%s: OPR %08x:%08x\n", __func__, intstat, isp1362_hcd->intenb); 1134 intstat &= isp1362_hcd->intenb; 1135 if (intstat & OHCI_INTR_UE) { 1136 pr_err("Unrecoverable error\n"); 1137 /* FIXME: do here reset or cleanup or whatever */ 1138 } 1139 if (intstat & OHCI_INTR_RHSC) { 1140 isp1362_hcd->rhstatus = isp1362_read_reg32(isp1362_hcd, HCRHSTATUS); 1141 isp1362_hcd->rhport[0] = isp1362_read_reg32(isp1362_hcd, HCRHPORT1); 1142 isp1362_hcd->rhport[1] = isp1362_read_reg32(isp1362_hcd, HCRHPORT2); 1143 } 1144 if (intstat & OHCI_INTR_RD) { 1145 pr_info("%s: RESUME DETECTED\n", __func__); 1146 isp1362_show_reg(isp1362_hcd, HCCONTROL); 1147 usb_hcd_resume_root_hub(hcd); 1148 } 1149 isp1362_write_reg32(isp1362_hcd, HCINTSTAT, intstat); 1150 irqstat &= ~HCuPINT_OPR; 1151 handled = 1; 1152 } 1153 1154 if (irqstat & HCuPINT_SUSP) { 1155 isp1362_hcd->irq_stat[ISP1362_INT_SUSP]++; 1156 handled = 1; 1157 svc_mask &= ~HCuPINT_SUSP; 1158 1159 pr_info("%s: SUSPEND IRQ\n", __func__); 1160 } 1161 1162 if (irqstat & HCuPINT_CLKRDY) { 1163 isp1362_hcd->irq_stat[ISP1362_INT_CLKRDY]++; 1164 handled = 1; 1165 isp1362_hcd->irqenb &= ~HCuPINT_CLKRDY; 1166 svc_mask &= ~HCuPINT_CLKRDY; 1167 pr_info("%s: CLKRDY IRQ\n", __func__); 1168 } 1169 1170 if (svc_mask) 1171 pr_err("%s: Unserviced interrupt(s) %04x\n", __func__, svc_mask); 1172 1173 isp1362_write_reg16(isp1362_hcd, HCuPINTENB, isp1362_hcd->irqenb); 1174 isp1362_hcd->irq_active--; 1175 spin_unlock(&isp1362_hcd->lock); 1176 1177 return IRQ_RETVAL(handled); 1178 } 1179 1180 /*-------------------------------------------------------------------------*/ 1181 1182 #define MAX_PERIODIC_LOAD 900 /* out of 1000 usec */ 1183 static int balance(struct isp1362_hcd *isp1362_hcd, u16 interval, u16 load) 1184 { 1185 int i, branch = -ENOSPC; 1186 1187 /* search for the least loaded schedule branch of that interval 1188 * which has enough bandwidth left unreserved. 1189 */ 1190 for (i = 0; i < interval; i++) { 1191 if (branch < 0 || isp1362_hcd->load[branch] > isp1362_hcd->load[i]) { 1192 int j; 1193 1194 for (j = i; j < PERIODIC_SIZE; j += interval) { 1195 if ((isp1362_hcd->load[j] + load) > MAX_PERIODIC_LOAD) { 1196 pr_err("%s: new load %d load[%02x] %d max %d\n", __func__, 1197 load, j, isp1362_hcd->load[j], MAX_PERIODIC_LOAD); 1198 break; 1199 } 1200 } 1201 if (j < PERIODIC_SIZE) 1202 continue; 1203 branch = i; 1204 } 1205 } 1206 return branch; 1207 } 1208 1209 /* NB! ALL the code above this point runs with isp1362_hcd->lock 1210 held, irqs off 1211 */ 1212 1213 /*-------------------------------------------------------------------------*/ 1214 1215 static int isp1362_urb_enqueue(struct usb_hcd *hcd, 1216 struct urb *urb, 1217 gfp_t mem_flags) 1218 { 1219 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd); 1220 struct usb_device *udev = urb->dev; 1221 unsigned int pipe = urb->pipe; 1222 int is_out = !usb_pipein(pipe); 1223 int type = usb_pipetype(pipe); 1224 int epnum = usb_pipeendpoint(pipe); 1225 struct usb_host_endpoint *hep = urb->ep; 1226 struct isp1362_ep *ep = NULL; 1227 unsigned long flags; 1228 int retval = 0; 1229 1230 DBG(3, "%s: urb %p\n", __func__, urb); 1231 1232 if (type == PIPE_ISOCHRONOUS) { 1233 pr_err("Isochronous transfers not supported\n"); 1234 return -ENOSPC; 1235 } 1236 1237 URB_DBG("%s: FA %d ep%d%s %s: len %d %s%s\n", __func__, 1238 usb_pipedevice(pipe), epnum, 1239 is_out ? "out" : "in", 1240 usb_pipecontrol(pipe) ? "ctrl" : 1241 usb_pipeint(pipe) ? "int" : 1242 usb_pipebulk(pipe) ? "bulk" : 1243 "iso", 1244 urb->transfer_buffer_length, 1245 (urb->transfer_flags & URB_ZERO_PACKET) ? "ZERO_PACKET " : "", 1246 !(urb->transfer_flags & URB_SHORT_NOT_OK) ? 1247 "short_ok" : ""); 1248 1249 /* avoid all allocations within spinlocks: request or endpoint */ 1250 if (!hep->hcpriv) { 1251 ep = kzalloc(sizeof *ep, mem_flags); 1252 if (!ep) 1253 return -ENOMEM; 1254 } 1255 spin_lock_irqsave(&isp1362_hcd->lock, flags); 1256 1257 /* don't submit to a dead or disabled port */ 1258 if (!((isp1362_hcd->rhport[0] | isp1362_hcd->rhport[1]) & 1259 USB_PORT_STAT_ENABLE) || 1260 !HC_IS_RUNNING(hcd->state)) { 1261 kfree(ep); 1262 retval = -ENODEV; 1263 goto fail_not_linked; 1264 } 1265 1266 retval = usb_hcd_link_urb_to_ep(hcd, urb); 1267 if (retval) { 1268 kfree(ep); 1269 goto fail_not_linked; 1270 } 1271 1272 if (hep->hcpriv) { 1273 ep = hep->hcpriv; 1274 } else { 1275 INIT_LIST_HEAD(&ep->schedule); 1276 INIT_LIST_HEAD(&ep->active); 1277 INIT_LIST_HEAD(&ep->remove_list); 1278 ep->udev = usb_get_dev(udev); 1279 ep->hep = hep; 1280 ep->epnum = epnum; 1281 ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out); 1282 ep->ptd_offset = -EINVAL; 1283 ep->ptd_index = -EINVAL; 1284 usb_settoggle(udev, epnum, is_out, 0); 1285 1286 if (type == PIPE_CONTROL) 1287 ep->nextpid = USB_PID_SETUP; 1288 else if (is_out) 1289 ep->nextpid = USB_PID_OUT; 1290 else 1291 ep->nextpid = USB_PID_IN; 1292 1293 switch (type) { 1294 case PIPE_ISOCHRONOUS: 1295 case PIPE_INTERRUPT: 1296 if (urb->interval > PERIODIC_SIZE) 1297 urb->interval = PERIODIC_SIZE; 1298 ep->interval = urb->interval; 1299 ep->branch = PERIODIC_SIZE; 1300 ep->load = usb_calc_bus_time(udev->speed, !is_out, 1301 (type == PIPE_ISOCHRONOUS), 1302 usb_maxpacket(udev, pipe, is_out)) / 1000; 1303 break; 1304 } 1305 hep->hcpriv = ep; 1306 } 1307 ep->num_req = isp1362_hcd->req_serial++; 1308 1309 /* maybe put endpoint into schedule */ 1310 switch (type) { 1311 case PIPE_CONTROL: 1312 case PIPE_BULK: 1313 if (list_empty(&ep->schedule)) { 1314 DBG(1, "%s: Adding ep %p req %d to async schedule\n", 1315 __func__, ep, ep->num_req); 1316 list_add_tail(&ep->schedule, &isp1362_hcd->async); 1317 } 1318 break; 1319 case PIPE_ISOCHRONOUS: 1320 case PIPE_INTERRUPT: 1321 urb->interval = ep->interval; 1322 1323 /* urb submitted for already existing EP */ 1324 if (ep->branch < PERIODIC_SIZE) 1325 break; 1326 1327 retval = balance(isp1362_hcd, ep->interval, ep->load); 1328 if (retval < 0) { 1329 pr_err("%s: balance returned %d\n", __func__, retval); 1330 goto fail; 1331 } 1332 ep->branch = retval; 1333 retval = 0; 1334 isp1362_hcd->fmindex = isp1362_read_reg32(isp1362_hcd, HCFMNUM); 1335 DBG(1, "%s: Current frame %04x branch %02x start_frame %04x(%04x)\n", 1336 __func__, isp1362_hcd->fmindex, ep->branch, 1337 ((isp1362_hcd->fmindex + PERIODIC_SIZE - 1) & 1338 ~(PERIODIC_SIZE - 1)) + ep->branch, 1339 (isp1362_hcd->fmindex & (PERIODIC_SIZE - 1)) + ep->branch); 1340 1341 if (list_empty(&ep->schedule)) { 1342 if (type == PIPE_ISOCHRONOUS) { 1343 u16 frame = isp1362_hcd->fmindex; 1344 1345 frame += max_t(u16, 8, ep->interval); 1346 frame &= ~(ep->interval - 1); 1347 frame |= ep->branch; 1348 if (frame_before(frame, isp1362_hcd->fmindex)) 1349 frame += ep->interval; 1350 urb->start_frame = frame; 1351 1352 DBG(1, "%s: Adding ep %p to isoc schedule\n", __func__, ep); 1353 list_add_tail(&ep->schedule, &isp1362_hcd->isoc); 1354 } else { 1355 DBG(1, "%s: Adding ep %p to periodic schedule\n", __func__, ep); 1356 list_add_tail(&ep->schedule, &isp1362_hcd->periodic); 1357 } 1358 } else 1359 DBG(1, "%s: ep %p already scheduled\n", __func__, ep); 1360 1361 DBG(2, "%s: load %d bandwidth %d -> %d\n", __func__, 1362 ep->load / ep->interval, isp1362_hcd->load[ep->branch], 1363 isp1362_hcd->load[ep->branch] + ep->load); 1364 isp1362_hcd->load[ep->branch] += ep->load; 1365 } 1366 1367 urb->hcpriv = hep; 1368 ALIGNSTAT(isp1362_hcd, urb->transfer_buffer); 1369 1370 switch (type) { 1371 case PIPE_CONTROL: 1372 case PIPE_BULK: 1373 start_atl_transfers(isp1362_hcd); 1374 break; 1375 case PIPE_INTERRUPT: 1376 start_intl_transfers(isp1362_hcd); 1377 break; 1378 case PIPE_ISOCHRONOUS: 1379 start_iso_transfers(isp1362_hcd); 1380 break; 1381 default: 1382 BUG(); 1383 } 1384 fail: 1385 if (retval) 1386 usb_hcd_unlink_urb_from_ep(hcd, urb); 1387 1388 1389 fail_not_linked: 1390 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 1391 if (retval) 1392 DBG(0, "%s: urb %p failed with %d\n", __func__, urb, retval); 1393 return retval; 1394 } 1395 1396 static int isp1362_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) 1397 { 1398 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd); 1399 struct usb_host_endpoint *hep; 1400 unsigned long flags; 1401 struct isp1362_ep *ep; 1402 int retval = 0; 1403 1404 DBG(3, "%s: urb %p\n", __func__, urb); 1405 1406 spin_lock_irqsave(&isp1362_hcd->lock, flags); 1407 retval = usb_hcd_check_unlink_urb(hcd, urb, status); 1408 if (retval) 1409 goto done; 1410 1411 hep = urb->hcpriv; 1412 1413 if (!hep) { 1414 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 1415 return -EIDRM; 1416 } 1417 1418 ep = hep->hcpriv; 1419 if (ep) { 1420 /* In front of queue? */ 1421 if (ep->hep->urb_list.next == &urb->urb_list) { 1422 if (!list_empty(&ep->active)) { 1423 DBG(1, "%s: urb %p ep %p req %d active PTD[%d] $%04x\n", __func__, 1424 urb, ep, ep->num_req, ep->ptd_index, ep->ptd_offset); 1425 /* disable processing and queue PTD for removal */ 1426 remove_ptd(isp1362_hcd, ep); 1427 urb = NULL; 1428 } 1429 } 1430 if (urb) { 1431 DBG(1, "%s: Finishing ep %p req %d\n", __func__, ep, 1432 ep->num_req); 1433 finish_request(isp1362_hcd, ep, urb, status); 1434 } else 1435 DBG(1, "%s: urb %p active; wait4irq\n", __func__, urb); 1436 } else { 1437 pr_warning("%s: No EP in URB %p\n", __func__, urb); 1438 retval = -EINVAL; 1439 } 1440 done: 1441 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 1442 1443 DBG(3, "%s: exit\n", __func__); 1444 1445 return retval; 1446 } 1447 1448 static void isp1362_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep) 1449 { 1450 struct isp1362_ep *ep = hep->hcpriv; 1451 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd); 1452 unsigned long flags; 1453 1454 DBG(1, "%s: ep %p\n", __func__, ep); 1455 if (!ep) 1456 return; 1457 spin_lock_irqsave(&isp1362_hcd->lock, flags); 1458 if (!list_empty(&hep->urb_list)) { 1459 if (!list_empty(&ep->active) && list_empty(&ep->remove_list)) { 1460 DBG(1, "%s: Removing ep %p req %d PTD[%d] $%04x\n", __func__, 1461 ep, ep->num_req, ep->ptd_index, ep->ptd_offset); 1462 remove_ptd(isp1362_hcd, ep); 1463 pr_info("%s: Waiting for Interrupt to clean up\n", __func__); 1464 } 1465 } 1466 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 1467 /* Wait for interrupt to clear out active list */ 1468 while (!list_empty(&ep->active)) 1469 msleep(1); 1470 1471 DBG(1, "%s: Freeing EP %p\n", __func__, ep); 1472 1473 usb_put_dev(ep->udev); 1474 kfree(ep); 1475 hep->hcpriv = NULL; 1476 } 1477 1478 static int isp1362_get_frame(struct usb_hcd *hcd) 1479 { 1480 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd); 1481 u32 fmnum; 1482 unsigned long flags; 1483 1484 spin_lock_irqsave(&isp1362_hcd->lock, flags); 1485 fmnum = isp1362_read_reg32(isp1362_hcd, HCFMNUM); 1486 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 1487 1488 return (int)fmnum; 1489 } 1490 1491 /*-------------------------------------------------------------------------*/ 1492 1493 /* Adapted from ohci-hub.c */ 1494 static int isp1362_hub_status_data(struct usb_hcd *hcd, char *buf) 1495 { 1496 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd); 1497 int ports, i, changed = 0; 1498 unsigned long flags; 1499 1500 if (!HC_IS_RUNNING(hcd->state)) 1501 return -ESHUTDOWN; 1502 1503 /* Report no status change now, if we are scheduled to be 1504 called later */ 1505 if (timer_pending(&hcd->rh_timer)) 1506 return 0; 1507 1508 ports = isp1362_hcd->rhdesca & RH_A_NDP; 1509 BUG_ON(ports > 2); 1510 1511 spin_lock_irqsave(&isp1362_hcd->lock, flags); 1512 /* init status */ 1513 if (isp1362_hcd->rhstatus & (RH_HS_LPSC | RH_HS_OCIC)) 1514 buf[0] = changed = 1; 1515 else 1516 buf[0] = 0; 1517 1518 for (i = 0; i < ports; i++) { 1519 u32 status = isp1362_hcd->rhport[i]; 1520 1521 if (status & (RH_PS_CSC | RH_PS_PESC | RH_PS_PSSC | 1522 RH_PS_OCIC | RH_PS_PRSC)) { 1523 changed = 1; 1524 buf[0] |= 1 << (i + 1); 1525 continue; 1526 } 1527 1528 if (!(status & RH_PS_CCS)) 1529 continue; 1530 } 1531 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 1532 return changed; 1533 } 1534 1535 static void isp1362_hub_descriptor(struct isp1362_hcd *isp1362_hcd, 1536 struct usb_hub_descriptor *desc) 1537 { 1538 u32 reg = isp1362_hcd->rhdesca; 1539 1540 DBG(3, "%s: enter\n", __func__); 1541 1542 desc->bDescriptorType = 0x29; 1543 desc->bDescLength = 9; 1544 desc->bHubContrCurrent = 0; 1545 desc->bNbrPorts = reg & 0x3; 1546 /* Power switching, device type, overcurrent. */ 1547 desc->wHubCharacteristics = cpu_to_le16((reg >> 8) & 0x1f); 1548 DBG(0, "%s: hubcharacteristics = %02x\n", __func__, cpu_to_le16((reg >> 8) & 0x1f)); 1549 desc->bPwrOn2PwrGood = (reg >> 24) & 0xff; 1550 /* ports removable, and legacy PortPwrCtrlMask */ 1551 desc->u.hs.DeviceRemovable[0] = desc->bNbrPorts == 1 ? 1 << 1 : 3 << 1; 1552 desc->u.hs.DeviceRemovable[1] = ~0; 1553 1554 DBG(3, "%s: exit\n", __func__); 1555 } 1556 1557 /* Adapted from ohci-hub.c */ 1558 static int isp1362_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 1559 u16 wIndex, char *buf, u16 wLength) 1560 { 1561 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd); 1562 int retval = 0; 1563 unsigned long flags; 1564 unsigned long t1; 1565 int ports = isp1362_hcd->rhdesca & RH_A_NDP; 1566 u32 tmp = 0; 1567 1568 switch (typeReq) { 1569 case ClearHubFeature: 1570 DBG(0, "ClearHubFeature: "); 1571 switch (wValue) { 1572 case C_HUB_OVER_CURRENT: 1573 DBG(0, "C_HUB_OVER_CURRENT\n"); 1574 spin_lock_irqsave(&isp1362_hcd->lock, flags); 1575 isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_OCIC); 1576 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 1577 case C_HUB_LOCAL_POWER: 1578 DBG(0, "C_HUB_LOCAL_POWER\n"); 1579 break; 1580 default: 1581 goto error; 1582 } 1583 break; 1584 case SetHubFeature: 1585 DBG(0, "SetHubFeature: "); 1586 switch (wValue) { 1587 case C_HUB_OVER_CURRENT: 1588 case C_HUB_LOCAL_POWER: 1589 DBG(0, "C_HUB_OVER_CURRENT or C_HUB_LOCAL_POWER\n"); 1590 break; 1591 default: 1592 goto error; 1593 } 1594 break; 1595 case GetHubDescriptor: 1596 DBG(0, "GetHubDescriptor\n"); 1597 isp1362_hub_descriptor(isp1362_hcd, (struct usb_hub_descriptor *)buf); 1598 break; 1599 case GetHubStatus: 1600 DBG(0, "GetHubStatus\n"); 1601 put_unaligned(cpu_to_le32(0), (__le32 *) buf); 1602 break; 1603 case GetPortStatus: 1604 #ifndef VERBOSE 1605 DBG(0, "GetPortStatus\n"); 1606 #endif 1607 if (!wIndex || wIndex > ports) 1608 goto error; 1609 tmp = isp1362_hcd->rhport[--wIndex]; 1610 put_unaligned(cpu_to_le32(tmp), (__le32 *) buf); 1611 break; 1612 case ClearPortFeature: 1613 DBG(0, "ClearPortFeature: "); 1614 if (!wIndex || wIndex > ports) 1615 goto error; 1616 wIndex--; 1617 1618 switch (wValue) { 1619 case USB_PORT_FEAT_ENABLE: 1620 DBG(0, "USB_PORT_FEAT_ENABLE\n"); 1621 tmp = RH_PS_CCS; 1622 break; 1623 case USB_PORT_FEAT_C_ENABLE: 1624 DBG(0, "USB_PORT_FEAT_C_ENABLE\n"); 1625 tmp = RH_PS_PESC; 1626 break; 1627 case USB_PORT_FEAT_SUSPEND: 1628 DBG(0, "USB_PORT_FEAT_SUSPEND\n"); 1629 tmp = RH_PS_POCI; 1630 break; 1631 case USB_PORT_FEAT_C_SUSPEND: 1632 DBG(0, "USB_PORT_FEAT_C_SUSPEND\n"); 1633 tmp = RH_PS_PSSC; 1634 break; 1635 case USB_PORT_FEAT_POWER: 1636 DBG(0, "USB_PORT_FEAT_POWER\n"); 1637 tmp = RH_PS_LSDA; 1638 1639 break; 1640 case USB_PORT_FEAT_C_CONNECTION: 1641 DBG(0, "USB_PORT_FEAT_C_CONNECTION\n"); 1642 tmp = RH_PS_CSC; 1643 break; 1644 case USB_PORT_FEAT_C_OVER_CURRENT: 1645 DBG(0, "USB_PORT_FEAT_C_OVER_CURRENT\n"); 1646 tmp = RH_PS_OCIC; 1647 break; 1648 case USB_PORT_FEAT_C_RESET: 1649 DBG(0, "USB_PORT_FEAT_C_RESET\n"); 1650 tmp = RH_PS_PRSC; 1651 break; 1652 default: 1653 goto error; 1654 } 1655 1656 spin_lock_irqsave(&isp1362_hcd->lock, flags); 1657 isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + wIndex, tmp); 1658 isp1362_hcd->rhport[wIndex] = 1659 isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + wIndex); 1660 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 1661 break; 1662 case SetPortFeature: 1663 DBG(0, "SetPortFeature: "); 1664 if (!wIndex || wIndex > ports) 1665 goto error; 1666 wIndex--; 1667 switch (wValue) { 1668 case USB_PORT_FEAT_SUSPEND: 1669 DBG(0, "USB_PORT_FEAT_SUSPEND\n"); 1670 spin_lock_irqsave(&isp1362_hcd->lock, flags); 1671 isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + wIndex, RH_PS_PSS); 1672 isp1362_hcd->rhport[wIndex] = 1673 isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + wIndex); 1674 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 1675 break; 1676 case USB_PORT_FEAT_POWER: 1677 DBG(0, "USB_PORT_FEAT_POWER\n"); 1678 spin_lock_irqsave(&isp1362_hcd->lock, flags); 1679 isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + wIndex, RH_PS_PPS); 1680 isp1362_hcd->rhport[wIndex] = 1681 isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + wIndex); 1682 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 1683 break; 1684 case USB_PORT_FEAT_RESET: 1685 DBG(0, "USB_PORT_FEAT_RESET\n"); 1686 spin_lock_irqsave(&isp1362_hcd->lock, flags); 1687 1688 t1 = jiffies + msecs_to_jiffies(USB_RESET_WIDTH); 1689 while (time_before(jiffies, t1)) { 1690 /* spin until any current reset finishes */ 1691 for (;;) { 1692 tmp = isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + wIndex); 1693 if (!(tmp & RH_PS_PRS)) 1694 break; 1695 udelay(500); 1696 } 1697 if (!(tmp & RH_PS_CCS)) 1698 break; 1699 /* Reset lasts 10ms (claims datasheet) */ 1700 isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + wIndex, (RH_PS_PRS)); 1701 1702 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 1703 msleep(10); 1704 spin_lock_irqsave(&isp1362_hcd->lock, flags); 1705 } 1706 1707 isp1362_hcd->rhport[wIndex] = isp1362_read_reg32(isp1362_hcd, 1708 HCRHPORT1 + wIndex); 1709 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 1710 break; 1711 default: 1712 goto error; 1713 } 1714 break; 1715 1716 default: 1717 error: 1718 /* "protocol stall" on error */ 1719 DBG(0, "PROTOCOL STALL\n"); 1720 retval = -EPIPE; 1721 } 1722 1723 return retval; 1724 } 1725 1726 #ifdef CONFIG_PM 1727 static int isp1362_bus_suspend(struct usb_hcd *hcd) 1728 { 1729 int status = 0; 1730 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd); 1731 unsigned long flags; 1732 1733 if (time_before(jiffies, isp1362_hcd->next_statechange)) 1734 msleep(5); 1735 1736 spin_lock_irqsave(&isp1362_hcd->lock, flags); 1737 1738 isp1362_hcd->hc_control = isp1362_read_reg32(isp1362_hcd, HCCONTROL); 1739 switch (isp1362_hcd->hc_control & OHCI_CTRL_HCFS) { 1740 case OHCI_USB_RESUME: 1741 DBG(0, "%s: resume/suspend?\n", __func__); 1742 isp1362_hcd->hc_control &= ~OHCI_CTRL_HCFS; 1743 isp1362_hcd->hc_control |= OHCI_USB_RESET; 1744 isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control); 1745 /* FALL THROUGH */ 1746 case OHCI_USB_RESET: 1747 status = -EBUSY; 1748 pr_warning("%s: needs reinit!\n", __func__); 1749 goto done; 1750 case OHCI_USB_SUSPEND: 1751 pr_warning("%s: already suspended?\n", __func__); 1752 goto done; 1753 } 1754 DBG(0, "%s: suspend root hub\n", __func__); 1755 1756 /* First stop any processing */ 1757 hcd->state = HC_STATE_QUIESCING; 1758 if (!list_empty(&isp1362_hcd->atl_queue.active) || 1759 !list_empty(&isp1362_hcd->intl_queue.active) || 1760 !list_empty(&isp1362_hcd->istl_queue[0] .active) || 1761 !list_empty(&isp1362_hcd->istl_queue[1] .active)) { 1762 int limit; 1763 1764 isp1362_write_reg32(isp1362_hcd, HCATLSKIP, ~0); 1765 isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, ~0); 1766 isp1362_write_reg16(isp1362_hcd, HCBUFSTAT, 0); 1767 isp1362_write_reg16(isp1362_hcd, HCuPINTENB, 0); 1768 isp1362_write_reg32(isp1362_hcd, HCINTSTAT, OHCI_INTR_SF); 1769 1770 DBG(0, "%s: stopping schedules ...\n", __func__); 1771 limit = 2000; 1772 while (limit > 0) { 1773 udelay(250); 1774 limit -= 250; 1775 if (isp1362_read_reg32(isp1362_hcd, HCINTSTAT) & OHCI_INTR_SF) 1776 break; 1777 } 1778 mdelay(7); 1779 if (isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_ATL) { 1780 u32 done_map = isp1362_read_reg32(isp1362_hcd, HCATLDONE); 1781 finish_transfers(isp1362_hcd, done_map, &isp1362_hcd->atl_queue); 1782 } 1783 if (isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_INTL) { 1784 u32 done_map = isp1362_read_reg32(isp1362_hcd, HCINTLDONE); 1785 finish_transfers(isp1362_hcd, done_map, &isp1362_hcd->intl_queue); 1786 } 1787 if (isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_ISTL0) 1788 finish_iso_transfers(isp1362_hcd, &isp1362_hcd->istl_queue[0]); 1789 if (isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_ISTL1) 1790 finish_iso_transfers(isp1362_hcd, &isp1362_hcd->istl_queue[1]); 1791 } 1792 DBG(0, "%s: HCINTSTAT: %08x\n", __func__, 1793 isp1362_read_reg32(isp1362_hcd, HCINTSTAT)); 1794 isp1362_write_reg32(isp1362_hcd, HCINTSTAT, 1795 isp1362_read_reg32(isp1362_hcd, HCINTSTAT)); 1796 1797 /* Suspend hub */ 1798 isp1362_hcd->hc_control = OHCI_USB_SUSPEND; 1799 isp1362_show_reg(isp1362_hcd, HCCONTROL); 1800 isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control); 1801 isp1362_show_reg(isp1362_hcd, HCCONTROL); 1802 1803 #if 1 1804 isp1362_hcd->hc_control = isp1362_read_reg32(isp1362_hcd, HCCONTROL); 1805 if ((isp1362_hcd->hc_control & OHCI_CTRL_HCFS) != OHCI_USB_SUSPEND) { 1806 pr_err("%s: controller won't suspend %08x\n", __func__, 1807 isp1362_hcd->hc_control); 1808 status = -EBUSY; 1809 } else 1810 #endif 1811 { 1812 /* no resumes until devices finish suspending */ 1813 isp1362_hcd->next_statechange = jiffies + msecs_to_jiffies(5); 1814 } 1815 done: 1816 if (status == 0) { 1817 hcd->state = HC_STATE_SUSPENDED; 1818 DBG(0, "%s: HCD suspended: %08x\n", __func__, 1819 isp1362_read_reg32(isp1362_hcd, HCCONTROL)); 1820 } 1821 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 1822 return status; 1823 } 1824 1825 static int isp1362_bus_resume(struct usb_hcd *hcd) 1826 { 1827 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd); 1828 u32 port; 1829 unsigned long flags; 1830 int status = -EINPROGRESS; 1831 1832 if (time_before(jiffies, isp1362_hcd->next_statechange)) 1833 msleep(5); 1834 1835 spin_lock_irqsave(&isp1362_hcd->lock, flags); 1836 isp1362_hcd->hc_control = isp1362_read_reg32(isp1362_hcd, HCCONTROL); 1837 pr_info("%s: HCCONTROL: %08x\n", __func__, isp1362_hcd->hc_control); 1838 if (hcd->state == HC_STATE_RESUMING) { 1839 pr_warning("%s: duplicate resume\n", __func__); 1840 status = 0; 1841 } else 1842 switch (isp1362_hcd->hc_control & OHCI_CTRL_HCFS) { 1843 case OHCI_USB_SUSPEND: 1844 DBG(0, "%s: resume root hub\n", __func__); 1845 isp1362_hcd->hc_control &= ~OHCI_CTRL_HCFS; 1846 isp1362_hcd->hc_control |= OHCI_USB_RESUME; 1847 isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control); 1848 break; 1849 case OHCI_USB_RESUME: 1850 /* HCFS changes sometime after INTR_RD */ 1851 DBG(0, "%s: remote wakeup\n", __func__); 1852 break; 1853 case OHCI_USB_OPER: 1854 DBG(0, "%s: odd resume\n", __func__); 1855 status = 0; 1856 hcd->self.root_hub->dev.power.power_state = PMSG_ON; 1857 break; 1858 default: /* RESET, we lost power */ 1859 DBG(0, "%s: root hub hardware reset\n", __func__); 1860 status = -EBUSY; 1861 } 1862 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 1863 if (status == -EBUSY) { 1864 DBG(0, "%s: Restarting HC\n", __func__); 1865 isp1362_hc_stop(hcd); 1866 return isp1362_hc_start(hcd); 1867 } 1868 if (status != -EINPROGRESS) 1869 return status; 1870 spin_lock_irqsave(&isp1362_hcd->lock, flags); 1871 port = isp1362_read_reg32(isp1362_hcd, HCRHDESCA) & RH_A_NDP; 1872 while (port--) { 1873 u32 stat = isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + port); 1874 1875 /* force global, not selective, resume */ 1876 if (!(stat & RH_PS_PSS)) { 1877 DBG(0, "%s: Not Resuming RH port %d\n", __func__, port); 1878 continue; 1879 } 1880 DBG(0, "%s: Resuming RH port %d\n", __func__, port); 1881 isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + port, RH_PS_POCI); 1882 } 1883 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 1884 1885 /* Some controllers (lucent) need extra-long delays */ 1886 hcd->state = HC_STATE_RESUMING; 1887 mdelay(20 /* usb 11.5.1.10 */ + 15); 1888 1889 isp1362_hcd->hc_control = OHCI_USB_OPER; 1890 spin_lock_irqsave(&isp1362_hcd->lock, flags); 1891 isp1362_show_reg(isp1362_hcd, HCCONTROL); 1892 isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control); 1893 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 1894 /* TRSMRCY */ 1895 msleep(10); 1896 1897 /* keep it alive for ~5x suspend + resume costs */ 1898 isp1362_hcd->next_statechange = jiffies + msecs_to_jiffies(250); 1899 1900 hcd->self.root_hub->dev.power.power_state = PMSG_ON; 1901 hcd->state = HC_STATE_RUNNING; 1902 return 0; 1903 } 1904 #else 1905 #define isp1362_bus_suspend NULL 1906 #define isp1362_bus_resume NULL 1907 #endif 1908 1909 /*-------------------------------------------------------------------------*/ 1910 1911 static void dump_irq(struct seq_file *s, char *label, u16 mask) 1912 { 1913 seq_printf(s, "%-15s %04x%s%s%s%s%s%s\n", label, mask, 1914 mask & HCuPINT_CLKRDY ? " clkrdy" : "", 1915 mask & HCuPINT_SUSP ? " susp" : "", 1916 mask & HCuPINT_OPR ? " opr" : "", 1917 mask & HCuPINT_EOT ? " eot" : "", 1918 mask & HCuPINT_ATL ? " atl" : "", 1919 mask & HCuPINT_SOF ? " sof" : ""); 1920 } 1921 1922 static void dump_int(struct seq_file *s, char *label, u32 mask) 1923 { 1924 seq_printf(s, "%-15s %08x%s%s%s%s%s%s%s\n", label, mask, 1925 mask & OHCI_INTR_MIE ? " MIE" : "", 1926 mask & OHCI_INTR_RHSC ? " rhsc" : "", 1927 mask & OHCI_INTR_FNO ? " fno" : "", 1928 mask & OHCI_INTR_UE ? " ue" : "", 1929 mask & OHCI_INTR_RD ? " rd" : "", 1930 mask & OHCI_INTR_SF ? " sof" : "", 1931 mask & OHCI_INTR_SO ? " so" : ""); 1932 } 1933 1934 static void dump_ctrl(struct seq_file *s, char *label, u32 mask) 1935 { 1936 seq_printf(s, "%-15s %08x%s%s%s\n", label, mask, 1937 mask & OHCI_CTRL_RWC ? " rwc" : "", 1938 mask & OHCI_CTRL_RWE ? " rwe" : "", 1939 ({ 1940 char *hcfs; 1941 switch (mask & OHCI_CTRL_HCFS) { 1942 case OHCI_USB_OPER: 1943 hcfs = " oper"; 1944 break; 1945 case OHCI_USB_RESET: 1946 hcfs = " reset"; 1947 break; 1948 case OHCI_USB_RESUME: 1949 hcfs = " resume"; 1950 break; 1951 case OHCI_USB_SUSPEND: 1952 hcfs = " suspend"; 1953 break; 1954 default: 1955 hcfs = " ?"; 1956 } 1957 hcfs; 1958 })); 1959 } 1960 1961 static void dump_regs(struct seq_file *s, struct isp1362_hcd *isp1362_hcd) 1962 { 1963 seq_printf(s, "HCREVISION [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCREVISION), 1964 isp1362_read_reg32(isp1362_hcd, HCREVISION)); 1965 seq_printf(s, "HCCONTROL [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCCONTROL), 1966 isp1362_read_reg32(isp1362_hcd, HCCONTROL)); 1967 seq_printf(s, "HCCMDSTAT [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCCMDSTAT), 1968 isp1362_read_reg32(isp1362_hcd, HCCMDSTAT)); 1969 seq_printf(s, "HCINTSTAT [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCINTSTAT), 1970 isp1362_read_reg32(isp1362_hcd, HCINTSTAT)); 1971 seq_printf(s, "HCINTENB [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCINTENB), 1972 isp1362_read_reg32(isp1362_hcd, HCINTENB)); 1973 seq_printf(s, "HCFMINTVL [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCFMINTVL), 1974 isp1362_read_reg32(isp1362_hcd, HCFMINTVL)); 1975 seq_printf(s, "HCFMREM [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCFMREM), 1976 isp1362_read_reg32(isp1362_hcd, HCFMREM)); 1977 seq_printf(s, "HCFMNUM [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCFMNUM), 1978 isp1362_read_reg32(isp1362_hcd, HCFMNUM)); 1979 seq_printf(s, "HCLSTHRESH [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCLSTHRESH), 1980 isp1362_read_reg32(isp1362_hcd, HCLSTHRESH)); 1981 seq_printf(s, "HCRHDESCA [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCRHDESCA), 1982 isp1362_read_reg32(isp1362_hcd, HCRHDESCA)); 1983 seq_printf(s, "HCRHDESCB [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCRHDESCB), 1984 isp1362_read_reg32(isp1362_hcd, HCRHDESCB)); 1985 seq_printf(s, "HCRHSTATUS [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCRHSTATUS), 1986 isp1362_read_reg32(isp1362_hcd, HCRHSTATUS)); 1987 seq_printf(s, "HCRHPORT1 [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCRHPORT1), 1988 isp1362_read_reg32(isp1362_hcd, HCRHPORT1)); 1989 seq_printf(s, "HCRHPORT2 [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCRHPORT2), 1990 isp1362_read_reg32(isp1362_hcd, HCRHPORT2)); 1991 seq_printf(s, "\n"); 1992 seq_printf(s, "HCHWCFG [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCHWCFG), 1993 isp1362_read_reg16(isp1362_hcd, HCHWCFG)); 1994 seq_printf(s, "HCDMACFG [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCDMACFG), 1995 isp1362_read_reg16(isp1362_hcd, HCDMACFG)); 1996 seq_printf(s, "HCXFERCTR [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCXFERCTR), 1997 isp1362_read_reg16(isp1362_hcd, HCXFERCTR)); 1998 seq_printf(s, "HCuPINT [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCuPINT), 1999 isp1362_read_reg16(isp1362_hcd, HCuPINT)); 2000 seq_printf(s, "HCuPINTENB [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCuPINTENB), 2001 isp1362_read_reg16(isp1362_hcd, HCuPINTENB)); 2002 seq_printf(s, "HCCHIPID [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCCHIPID), 2003 isp1362_read_reg16(isp1362_hcd, HCCHIPID)); 2004 seq_printf(s, "HCSCRATCH [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCSCRATCH), 2005 isp1362_read_reg16(isp1362_hcd, HCSCRATCH)); 2006 seq_printf(s, "HCBUFSTAT [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCBUFSTAT), 2007 isp1362_read_reg16(isp1362_hcd, HCBUFSTAT)); 2008 seq_printf(s, "HCDIRADDR [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCDIRADDR), 2009 isp1362_read_reg32(isp1362_hcd, HCDIRADDR)); 2010 #if 0 2011 seq_printf(s, "HCDIRDATA [%02x] %04x\n", ISP1362_REG_NO(HCDIRDATA), 2012 isp1362_read_reg16(isp1362_hcd, HCDIRDATA)); 2013 #endif 2014 seq_printf(s, "HCISTLBUFSZ[%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCISTLBUFSZ), 2015 isp1362_read_reg16(isp1362_hcd, HCISTLBUFSZ)); 2016 seq_printf(s, "HCISTLRATE [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCISTLRATE), 2017 isp1362_read_reg16(isp1362_hcd, HCISTLRATE)); 2018 seq_printf(s, "\n"); 2019 seq_printf(s, "HCINTLBUFSZ[%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLBUFSZ), 2020 isp1362_read_reg16(isp1362_hcd, HCINTLBUFSZ)); 2021 seq_printf(s, "HCINTLBLKSZ[%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLBLKSZ), 2022 isp1362_read_reg16(isp1362_hcd, HCINTLBLKSZ)); 2023 seq_printf(s, "HCINTLDONE [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLDONE), 2024 isp1362_read_reg32(isp1362_hcd, HCINTLDONE)); 2025 seq_printf(s, "HCINTLSKIP [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLSKIP), 2026 isp1362_read_reg32(isp1362_hcd, HCINTLSKIP)); 2027 seq_printf(s, "HCINTLLAST [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLLAST), 2028 isp1362_read_reg32(isp1362_hcd, HCINTLLAST)); 2029 seq_printf(s, "HCINTLCURR [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLCURR), 2030 isp1362_read_reg16(isp1362_hcd, HCINTLCURR)); 2031 seq_printf(s, "\n"); 2032 seq_printf(s, "HCATLBUFSZ [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCATLBUFSZ), 2033 isp1362_read_reg16(isp1362_hcd, HCATLBUFSZ)); 2034 seq_printf(s, "HCATLBLKSZ [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCATLBLKSZ), 2035 isp1362_read_reg16(isp1362_hcd, HCATLBLKSZ)); 2036 #if 0 2037 seq_printf(s, "HCATLDONE [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCATLDONE), 2038 isp1362_read_reg32(isp1362_hcd, HCATLDONE)); 2039 #endif 2040 seq_printf(s, "HCATLSKIP [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCATLSKIP), 2041 isp1362_read_reg32(isp1362_hcd, HCATLSKIP)); 2042 seq_printf(s, "HCATLLAST [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCATLLAST), 2043 isp1362_read_reg32(isp1362_hcd, HCATLLAST)); 2044 seq_printf(s, "HCATLCURR [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCATLCURR), 2045 isp1362_read_reg16(isp1362_hcd, HCATLCURR)); 2046 seq_printf(s, "\n"); 2047 seq_printf(s, "HCATLDTC [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCATLDTC), 2048 isp1362_read_reg16(isp1362_hcd, HCATLDTC)); 2049 seq_printf(s, "HCATLDTCTO [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCATLDTCTO), 2050 isp1362_read_reg16(isp1362_hcd, HCATLDTCTO)); 2051 } 2052 2053 static int isp1362_show(struct seq_file *s, void *unused) 2054 { 2055 struct isp1362_hcd *isp1362_hcd = s->private; 2056 struct isp1362_ep *ep; 2057 int i; 2058 2059 seq_printf(s, "%s\n%s version %s\n", 2060 isp1362_hcd_to_hcd(isp1362_hcd)->product_desc, hcd_name, DRIVER_VERSION); 2061 2062 /* collect statistics to help estimate potential win for 2063 * DMA engines that care about alignment (PXA) 2064 */ 2065 seq_printf(s, "alignment: 16b/%ld 8b/%ld 4b/%ld 2b/%ld 1b/%ld\n", 2066 isp1362_hcd->stat16, isp1362_hcd->stat8, isp1362_hcd->stat4, 2067 isp1362_hcd->stat2, isp1362_hcd->stat1); 2068 seq_printf(s, "max # ptds in ATL fifo: %d\n", isp1362_hcd->atl_queue.stat_maxptds); 2069 seq_printf(s, "max # ptds in INTL fifo: %d\n", isp1362_hcd->intl_queue.stat_maxptds); 2070 seq_printf(s, "max # ptds in ISTL fifo: %d\n", 2071 max(isp1362_hcd->istl_queue[0] .stat_maxptds, 2072 isp1362_hcd->istl_queue[1] .stat_maxptds)); 2073 2074 /* FIXME: don't show the following in suspended state */ 2075 spin_lock_irq(&isp1362_hcd->lock); 2076 2077 dump_irq(s, "hc_irq_enable", isp1362_read_reg16(isp1362_hcd, HCuPINTENB)); 2078 dump_irq(s, "hc_irq_status", isp1362_read_reg16(isp1362_hcd, HCuPINT)); 2079 dump_int(s, "ohci_int_enable", isp1362_read_reg32(isp1362_hcd, HCINTENB)); 2080 dump_int(s, "ohci_int_status", isp1362_read_reg32(isp1362_hcd, HCINTSTAT)); 2081 dump_ctrl(s, "ohci_control", isp1362_read_reg32(isp1362_hcd, HCCONTROL)); 2082 2083 for (i = 0; i < NUM_ISP1362_IRQS; i++) 2084 if (isp1362_hcd->irq_stat[i]) 2085 seq_printf(s, "%-15s: %d\n", 2086 ISP1362_INT_NAME(i), isp1362_hcd->irq_stat[i]); 2087 2088 dump_regs(s, isp1362_hcd); 2089 list_for_each_entry(ep, &isp1362_hcd->async, schedule) { 2090 struct urb *urb; 2091 2092 seq_printf(s, "%p, ep%d%s, maxpacket %d:\n", ep, ep->epnum, 2093 ({ 2094 char *s; 2095 switch (ep->nextpid) { 2096 case USB_PID_IN: 2097 s = "in"; 2098 break; 2099 case USB_PID_OUT: 2100 s = "out"; 2101 break; 2102 case USB_PID_SETUP: 2103 s = "setup"; 2104 break; 2105 case USB_PID_ACK: 2106 s = "status"; 2107 break; 2108 default: 2109 s = "?"; 2110 break; 2111 }; 2112 s;}), ep->maxpacket) ; 2113 list_for_each_entry(urb, &ep->hep->urb_list, urb_list) { 2114 seq_printf(s, " urb%p, %d/%d\n", urb, 2115 urb->actual_length, 2116 urb->transfer_buffer_length); 2117 } 2118 } 2119 if (!list_empty(&isp1362_hcd->async)) 2120 seq_printf(s, "\n"); 2121 dump_ptd_queue(&isp1362_hcd->atl_queue); 2122 2123 seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE); 2124 2125 list_for_each_entry(ep, &isp1362_hcd->periodic, schedule) { 2126 seq_printf(s, "branch:%2d load:%3d PTD[%d] $%04x:\n", ep->branch, 2127 isp1362_hcd->load[ep->branch], ep->ptd_index, ep->ptd_offset); 2128 2129 seq_printf(s, " %d/%p (%sdev%d ep%d%s max %d)\n", 2130 ep->interval, ep, 2131 (ep->udev->speed == USB_SPEED_FULL) ? "" : "ls ", 2132 ep->udev->devnum, ep->epnum, 2133 (ep->epnum == 0) ? "" : 2134 ((ep->nextpid == USB_PID_IN) ? 2135 "in" : "out"), ep->maxpacket); 2136 } 2137 dump_ptd_queue(&isp1362_hcd->intl_queue); 2138 2139 seq_printf(s, "ISO:\n"); 2140 2141 list_for_each_entry(ep, &isp1362_hcd->isoc, schedule) { 2142 seq_printf(s, " %d/%p (%sdev%d ep%d%s max %d)\n", 2143 ep->interval, ep, 2144 (ep->udev->speed == USB_SPEED_FULL) ? "" : "ls ", 2145 ep->udev->devnum, ep->epnum, 2146 (ep->epnum == 0) ? "" : 2147 ((ep->nextpid == USB_PID_IN) ? 2148 "in" : "out"), ep->maxpacket); 2149 } 2150 2151 spin_unlock_irq(&isp1362_hcd->lock); 2152 seq_printf(s, "\n"); 2153 2154 return 0; 2155 } 2156 2157 static int isp1362_open(struct inode *inode, struct file *file) 2158 { 2159 return single_open(file, isp1362_show, inode); 2160 } 2161 2162 static const struct file_operations debug_ops = { 2163 .open = isp1362_open, 2164 .read = seq_read, 2165 .llseek = seq_lseek, 2166 .release = single_release, 2167 }; 2168 2169 /* expect just one isp1362_hcd per system */ 2170 static void create_debug_file(struct isp1362_hcd *isp1362_hcd) 2171 { 2172 isp1362_hcd->debug_file = debugfs_create_file("isp1362", S_IRUGO, 2173 usb_debug_root, 2174 isp1362_hcd, &debug_ops); 2175 } 2176 2177 static void remove_debug_file(struct isp1362_hcd *isp1362_hcd) 2178 { 2179 debugfs_remove(isp1362_hcd->debug_file); 2180 } 2181 2182 /*-------------------------------------------------------------------------*/ 2183 2184 static void __isp1362_sw_reset(struct isp1362_hcd *isp1362_hcd) 2185 { 2186 int tmp = 20; 2187 2188 isp1362_write_reg16(isp1362_hcd, HCSWRES, HCSWRES_MAGIC); 2189 isp1362_write_reg32(isp1362_hcd, HCCMDSTAT, OHCI_HCR); 2190 while (--tmp) { 2191 mdelay(1); 2192 if (!(isp1362_read_reg32(isp1362_hcd, HCCMDSTAT) & OHCI_HCR)) 2193 break; 2194 } 2195 if (!tmp) 2196 pr_err("Software reset timeout\n"); 2197 } 2198 2199 static void isp1362_sw_reset(struct isp1362_hcd *isp1362_hcd) 2200 { 2201 unsigned long flags; 2202 2203 spin_lock_irqsave(&isp1362_hcd->lock, flags); 2204 __isp1362_sw_reset(isp1362_hcd); 2205 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 2206 } 2207 2208 static int isp1362_mem_config(struct usb_hcd *hcd) 2209 { 2210 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd); 2211 unsigned long flags; 2212 u32 total; 2213 u16 istl_size = ISP1362_ISTL_BUFSIZE; 2214 u16 intl_blksize = ISP1362_INTL_BLKSIZE + PTD_HEADER_SIZE; 2215 u16 intl_size = ISP1362_INTL_BUFFERS * intl_blksize; 2216 u16 atl_blksize = ISP1362_ATL_BLKSIZE + PTD_HEADER_SIZE; 2217 u16 atl_buffers = (ISP1362_BUF_SIZE - (istl_size + intl_size)) / atl_blksize; 2218 u16 atl_size; 2219 int i; 2220 2221 WARN_ON(istl_size & 3); 2222 WARN_ON(atl_blksize & 3); 2223 WARN_ON(intl_blksize & 3); 2224 WARN_ON(atl_blksize < PTD_HEADER_SIZE); 2225 WARN_ON(intl_blksize < PTD_HEADER_SIZE); 2226 2227 BUG_ON((unsigned)ISP1362_INTL_BUFFERS > 32); 2228 if (atl_buffers > 32) 2229 atl_buffers = 32; 2230 atl_size = atl_buffers * atl_blksize; 2231 total = atl_size + intl_size + istl_size; 2232 dev_info(hcd->self.controller, "ISP1362 Memory usage:\n"); 2233 dev_info(hcd->self.controller, " ISTL: 2 * %4d: %4d @ $%04x:$%04x\n", 2234 istl_size / 2, istl_size, 0, istl_size / 2); 2235 dev_info(hcd->self.controller, " INTL: %4d * (%3zu+8): %4d @ $%04x\n", 2236 ISP1362_INTL_BUFFERS, intl_blksize - PTD_HEADER_SIZE, 2237 intl_size, istl_size); 2238 dev_info(hcd->self.controller, " ATL : %4d * (%3zu+8): %4d @ $%04x\n", 2239 atl_buffers, atl_blksize - PTD_HEADER_SIZE, 2240 atl_size, istl_size + intl_size); 2241 dev_info(hcd->self.controller, " USED/FREE: %4d %4d\n", total, 2242 ISP1362_BUF_SIZE - total); 2243 2244 if (total > ISP1362_BUF_SIZE) { 2245 dev_err(hcd->self.controller, "%s: Memory requested: %d, available %d\n", 2246 __func__, total, ISP1362_BUF_SIZE); 2247 return -ENOMEM; 2248 } 2249 2250 total = istl_size + intl_size + atl_size; 2251 spin_lock_irqsave(&isp1362_hcd->lock, flags); 2252 2253 for (i = 0; i < 2; i++) { 2254 isp1362_hcd->istl_queue[i].buf_start = i * istl_size / 2, 2255 isp1362_hcd->istl_queue[i].buf_size = istl_size / 2; 2256 isp1362_hcd->istl_queue[i].blk_size = 4; 2257 INIT_LIST_HEAD(&isp1362_hcd->istl_queue[i].active); 2258 snprintf(isp1362_hcd->istl_queue[i].name, 2259 sizeof(isp1362_hcd->istl_queue[i].name), "ISTL%d", i); 2260 DBG(3, "%s: %5s buf $%04x %d\n", __func__, 2261 isp1362_hcd->istl_queue[i].name, 2262 isp1362_hcd->istl_queue[i].buf_start, 2263 isp1362_hcd->istl_queue[i].buf_size); 2264 } 2265 isp1362_write_reg16(isp1362_hcd, HCISTLBUFSZ, istl_size / 2); 2266 2267 isp1362_hcd->intl_queue.buf_start = istl_size; 2268 isp1362_hcd->intl_queue.buf_size = intl_size; 2269 isp1362_hcd->intl_queue.buf_count = ISP1362_INTL_BUFFERS; 2270 isp1362_hcd->intl_queue.blk_size = intl_blksize; 2271 isp1362_hcd->intl_queue.buf_avail = isp1362_hcd->intl_queue.buf_count; 2272 isp1362_hcd->intl_queue.skip_map = ~0; 2273 INIT_LIST_HEAD(&isp1362_hcd->intl_queue.active); 2274 2275 isp1362_write_reg16(isp1362_hcd, HCINTLBUFSZ, 2276 isp1362_hcd->intl_queue.buf_size); 2277 isp1362_write_reg16(isp1362_hcd, HCINTLBLKSZ, 2278 isp1362_hcd->intl_queue.blk_size - PTD_HEADER_SIZE); 2279 isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, ~0); 2280 isp1362_write_reg32(isp1362_hcd, HCINTLLAST, 2281 1 << (ISP1362_INTL_BUFFERS - 1)); 2282 2283 isp1362_hcd->atl_queue.buf_start = istl_size + intl_size; 2284 isp1362_hcd->atl_queue.buf_size = atl_size; 2285 isp1362_hcd->atl_queue.buf_count = atl_buffers; 2286 isp1362_hcd->atl_queue.blk_size = atl_blksize; 2287 isp1362_hcd->atl_queue.buf_avail = isp1362_hcd->atl_queue.buf_count; 2288 isp1362_hcd->atl_queue.skip_map = ~0; 2289 INIT_LIST_HEAD(&isp1362_hcd->atl_queue.active); 2290 2291 isp1362_write_reg16(isp1362_hcd, HCATLBUFSZ, 2292 isp1362_hcd->atl_queue.buf_size); 2293 isp1362_write_reg16(isp1362_hcd, HCATLBLKSZ, 2294 isp1362_hcd->atl_queue.blk_size - PTD_HEADER_SIZE); 2295 isp1362_write_reg32(isp1362_hcd, HCATLSKIP, ~0); 2296 isp1362_write_reg32(isp1362_hcd, HCATLLAST, 2297 1 << (atl_buffers - 1)); 2298 2299 snprintf(isp1362_hcd->atl_queue.name, 2300 sizeof(isp1362_hcd->atl_queue.name), "ATL"); 2301 snprintf(isp1362_hcd->intl_queue.name, 2302 sizeof(isp1362_hcd->intl_queue.name), "INTL"); 2303 DBG(3, "%s: %5s buf $%04x %2d * %4d = %4d\n", __func__, 2304 isp1362_hcd->intl_queue.name, 2305 isp1362_hcd->intl_queue.buf_start, 2306 ISP1362_INTL_BUFFERS, isp1362_hcd->intl_queue.blk_size, 2307 isp1362_hcd->intl_queue.buf_size); 2308 DBG(3, "%s: %5s buf $%04x %2d * %4d = %4d\n", __func__, 2309 isp1362_hcd->atl_queue.name, 2310 isp1362_hcd->atl_queue.buf_start, 2311 atl_buffers, isp1362_hcd->atl_queue.blk_size, 2312 isp1362_hcd->atl_queue.buf_size); 2313 2314 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 2315 2316 return 0; 2317 } 2318 2319 static int isp1362_hc_reset(struct usb_hcd *hcd) 2320 { 2321 int ret = 0; 2322 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd); 2323 unsigned long t; 2324 unsigned long timeout = 100; 2325 unsigned long flags; 2326 int clkrdy = 0; 2327 2328 pr_debug("%s:\n", __func__); 2329 2330 if (isp1362_hcd->board && isp1362_hcd->board->reset) { 2331 isp1362_hcd->board->reset(hcd->self.controller, 1); 2332 msleep(20); 2333 if (isp1362_hcd->board->clock) 2334 isp1362_hcd->board->clock(hcd->self.controller, 1); 2335 isp1362_hcd->board->reset(hcd->self.controller, 0); 2336 } else 2337 isp1362_sw_reset(isp1362_hcd); 2338 2339 /* chip has been reset. First we need to see a clock */ 2340 t = jiffies + msecs_to_jiffies(timeout); 2341 while (!clkrdy && time_before_eq(jiffies, t)) { 2342 spin_lock_irqsave(&isp1362_hcd->lock, flags); 2343 clkrdy = isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_CLKRDY; 2344 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 2345 if (!clkrdy) 2346 msleep(4); 2347 } 2348 2349 spin_lock_irqsave(&isp1362_hcd->lock, flags); 2350 isp1362_write_reg16(isp1362_hcd, HCuPINT, HCuPINT_CLKRDY); 2351 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 2352 if (!clkrdy) { 2353 pr_err("Clock not ready after %lums\n", timeout); 2354 ret = -ENODEV; 2355 } 2356 return ret; 2357 } 2358 2359 static void isp1362_hc_stop(struct usb_hcd *hcd) 2360 { 2361 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd); 2362 unsigned long flags; 2363 u32 tmp; 2364 2365 pr_debug("%s:\n", __func__); 2366 2367 del_timer_sync(&hcd->rh_timer); 2368 2369 spin_lock_irqsave(&isp1362_hcd->lock, flags); 2370 2371 isp1362_write_reg16(isp1362_hcd, HCuPINTENB, 0); 2372 2373 /* Switch off power for all ports */ 2374 tmp = isp1362_read_reg32(isp1362_hcd, HCRHDESCA); 2375 tmp &= ~(RH_A_NPS | RH_A_PSM); 2376 isp1362_write_reg32(isp1362_hcd, HCRHDESCA, tmp); 2377 isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_LPS); 2378 2379 /* Reset the chip */ 2380 if (isp1362_hcd->board && isp1362_hcd->board->reset) 2381 isp1362_hcd->board->reset(hcd->self.controller, 1); 2382 else 2383 __isp1362_sw_reset(isp1362_hcd); 2384 2385 if (isp1362_hcd->board && isp1362_hcd->board->clock) 2386 isp1362_hcd->board->clock(hcd->self.controller, 0); 2387 2388 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 2389 } 2390 2391 #ifdef CHIP_BUFFER_TEST 2392 static int isp1362_chip_test(struct isp1362_hcd *isp1362_hcd) 2393 { 2394 int ret = 0; 2395 u16 *ref; 2396 unsigned long flags; 2397 2398 ref = kmalloc(2 * ISP1362_BUF_SIZE, GFP_KERNEL); 2399 if (ref) { 2400 int offset; 2401 u16 *tst = &ref[ISP1362_BUF_SIZE / 2]; 2402 2403 for (offset = 0; offset < ISP1362_BUF_SIZE / 2; offset++) { 2404 ref[offset] = ~offset; 2405 tst[offset] = offset; 2406 } 2407 2408 for (offset = 0; offset < 4; offset++) { 2409 int j; 2410 2411 for (j = 0; j < 8; j++) { 2412 spin_lock_irqsave(&isp1362_hcd->lock, flags); 2413 isp1362_write_buffer(isp1362_hcd, (u8 *)ref + offset, 0, j); 2414 isp1362_read_buffer(isp1362_hcd, (u8 *)tst + offset, 0, j); 2415 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 2416 2417 if (memcmp(ref, tst, j)) { 2418 ret = -ENODEV; 2419 pr_err("%s: memory check with %d byte offset %d failed\n", 2420 __func__, j, offset); 2421 dump_data((u8 *)ref + offset, j); 2422 dump_data((u8 *)tst + offset, j); 2423 } 2424 } 2425 } 2426 2427 spin_lock_irqsave(&isp1362_hcd->lock, flags); 2428 isp1362_write_buffer(isp1362_hcd, ref, 0, ISP1362_BUF_SIZE); 2429 isp1362_read_buffer(isp1362_hcd, tst, 0, ISP1362_BUF_SIZE); 2430 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 2431 2432 if (memcmp(ref, tst, ISP1362_BUF_SIZE)) { 2433 ret = -ENODEV; 2434 pr_err("%s: memory check failed\n", __func__); 2435 dump_data((u8 *)tst, ISP1362_BUF_SIZE / 2); 2436 } 2437 2438 for (offset = 0; offset < 256; offset++) { 2439 int test_size = 0; 2440 2441 yield(); 2442 2443 memset(tst, 0, ISP1362_BUF_SIZE); 2444 spin_lock_irqsave(&isp1362_hcd->lock, flags); 2445 isp1362_write_buffer(isp1362_hcd, tst, 0, ISP1362_BUF_SIZE); 2446 isp1362_read_buffer(isp1362_hcd, tst, 0, ISP1362_BUF_SIZE); 2447 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 2448 if (memcmp(tst, tst + (ISP1362_BUF_SIZE / (2 * sizeof(*tst))), 2449 ISP1362_BUF_SIZE / 2)) { 2450 pr_err("%s: Failed to clear buffer\n", __func__); 2451 dump_data((u8 *)tst, ISP1362_BUF_SIZE); 2452 break; 2453 } 2454 spin_lock_irqsave(&isp1362_hcd->lock, flags); 2455 isp1362_write_buffer(isp1362_hcd, ref, offset * 2, PTD_HEADER_SIZE); 2456 isp1362_write_buffer(isp1362_hcd, ref + PTD_HEADER_SIZE / sizeof(*ref), 2457 offset * 2 + PTD_HEADER_SIZE, test_size); 2458 isp1362_read_buffer(isp1362_hcd, tst, offset * 2, 2459 PTD_HEADER_SIZE + test_size); 2460 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 2461 if (memcmp(ref, tst, PTD_HEADER_SIZE + test_size)) { 2462 dump_data(((u8 *)ref) + offset, PTD_HEADER_SIZE + test_size); 2463 dump_data((u8 *)tst, PTD_HEADER_SIZE + test_size); 2464 spin_lock_irqsave(&isp1362_hcd->lock, flags); 2465 isp1362_read_buffer(isp1362_hcd, tst, offset * 2, 2466 PTD_HEADER_SIZE + test_size); 2467 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 2468 if (memcmp(ref, tst, PTD_HEADER_SIZE + test_size)) { 2469 ret = -ENODEV; 2470 pr_err("%s: memory check with offset %02x failed\n", 2471 __func__, offset); 2472 break; 2473 } 2474 pr_warning("%s: memory check with offset %02x ok after second read\n", 2475 __func__, offset); 2476 } 2477 } 2478 kfree(ref); 2479 } 2480 return ret; 2481 } 2482 #endif 2483 2484 static int isp1362_hc_start(struct usb_hcd *hcd) 2485 { 2486 int ret; 2487 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd); 2488 struct isp1362_platform_data *board = isp1362_hcd->board; 2489 u16 hwcfg; 2490 u16 chipid; 2491 unsigned long flags; 2492 2493 pr_debug("%s:\n", __func__); 2494 2495 spin_lock_irqsave(&isp1362_hcd->lock, flags); 2496 chipid = isp1362_read_reg16(isp1362_hcd, HCCHIPID); 2497 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 2498 2499 if ((chipid & HCCHIPID_MASK) != HCCHIPID_MAGIC) { 2500 pr_err("%s: Invalid chip ID %04x\n", __func__, chipid); 2501 return -ENODEV; 2502 } 2503 2504 #ifdef CHIP_BUFFER_TEST 2505 ret = isp1362_chip_test(isp1362_hcd); 2506 if (ret) 2507 return -ENODEV; 2508 #endif 2509 spin_lock_irqsave(&isp1362_hcd->lock, flags); 2510 /* clear interrupt status and disable all interrupt sources */ 2511 isp1362_write_reg16(isp1362_hcd, HCuPINT, 0xff); 2512 isp1362_write_reg16(isp1362_hcd, HCuPINTENB, 0); 2513 2514 /* HW conf */ 2515 hwcfg = HCHWCFG_INT_ENABLE | HCHWCFG_DBWIDTH(1); 2516 if (board->sel15Kres) 2517 hwcfg |= HCHWCFG_PULLDOWN_DS2 | 2518 ((MAX_ROOT_PORTS > 1) ? HCHWCFG_PULLDOWN_DS1 : 0); 2519 if (board->clknotstop) 2520 hwcfg |= HCHWCFG_CLKNOTSTOP; 2521 if (board->oc_enable) 2522 hwcfg |= HCHWCFG_ANALOG_OC; 2523 if (board->int_act_high) 2524 hwcfg |= HCHWCFG_INT_POL; 2525 if (board->int_edge_triggered) 2526 hwcfg |= HCHWCFG_INT_TRIGGER; 2527 if (board->dreq_act_high) 2528 hwcfg |= HCHWCFG_DREQ_POL; 2529 if (board->dack_act_high) 2530 hwcfg |= HCHWCFG_DACK_POL; 2531 isp1362_write_reg16(isp1362_hcd, HCHWCFG, hwcfg); 2532 isp1362_show_reg(isp1362_hcd, HCHWCFG); 2533 isp1362_write_reg16(isp1362_hcd, HCDMACFG, 0); 2534 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 2535 2536 ret = isp1362_mem_config(hcd); 2537 if (ret) 2538 return ret; 2539 2540 spin_lock_irqsave(&isp1362_hcd->lock, flags); 2541 2542 /* Root hub conf */ 2543 isp1362_hcd->rhdesca = 0; 2544 if (board->no_power_switching) 2545 isp1362_hcd->rhdesca |= RH_A_NPS; 2546 if (board->power_switching_mode) 2547 isp1362_hcd->rhdesca |= RH_A_PSM; 2548 if (board->potpg) 2549 isp1362_hcd->rhdesca |= (board->potpg << 24) & RH_A_POTPGT; 2550 else 2551 isp1362_hcd->rhdesca |= (25 << 24) & RH_A_POTPGT; 2552 2553 isp1362_write_reg32(isp1362_hcd, HCRHDESCA, isp1362_hcd->rhdesca & ~RH_A_OCPM); 2554 isp1362_write_reg32(isp1362_hcd, HCRHDESCA, isp1362_hcd->rhdesca | RH_A_OCPM); 2555 isp1362_hcd->rhdesca = isp1362_read_reg32(isp1362_hcd, HCRHDESCA); 2556 2557 isp1362_hcd->rhdescb = RH_B_PPCM; 2558 isp1362_write_reg32(isp1362_hcd, HCRHDESCB, isp1362_hcd->rhdescb); 2559 isp1362_hcd->rhdescb = isp1362_read_reg32(isp1362_hcd, HCRHDESCB); 2560 2561 isp1362_read_reg32(isp1362_hcd, HCFMINTVL); 2562 isp1362_write_reg32(isp1362_hcd, HCFMINTVL, (FSMP(FI) << 16) | FI); 2563 isp1362_write_reg32(isp1362_hcd, HCLSTHRESH, LSTHRESH); 2564 2565 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 2566 2567 isp1362_hcd->hc_control = OHCI_USB_OPER; 2568 hcd->state = HC_STATE_RUNNING; 2569 2570 spin_lock_irqsave(&isp1362_hcd->lock, flags); 2571 /* Set up interrupts */ 2572 isp1362_hcd->intenb = OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE; 2573 isp1362_hcd->intenb |= OHCI_INTR_RD; 2574 isp1362_hcd->irqenb = HCuPINT_OPR | HCuPINT_SUSP; 2575 isp1362_write_reg32(isp1362_hcd, HCINTENB, isp1362_hcd->intenb); 2576 isp1362_write_reg16(isp1362_hcd, HCuPINTENB, isp1362_hcd->irqenb); 2577 2578 /* Go operational */ 2579 isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control); 2580 /* enable global power */ 2581 isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_LPSC | RH_HS_DRWE); 2582 2583 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 2584 2585 return 0; 2586 } 2587 2588 /*-------------------------------------------------------------------------*/ 2589 2590 static struct hc_driver isp1362_hc_driver = { 2591 .description = hcd_name, 2592 .product_desc = "ISP1362 Host Controller", 2593 .hcd_priv_size = sizeof(struct isp1362_hcd), 2594 2595 .irq = isp1362_irq, 2596 .flags = HCD_USB11 | HCD_MEMORY, 2597 2598 .reset = isp1362_hc_reset, 2599 .start = isp1362_hc_start, 2600 .stop = isp1362_hc_stop, 2601 2602 .urb_enqueue = isp1362_urb_enqueue, 2603 .urb_dequeue = isp1362_urb_dequeue, 2604 .endpoint_disable = isp1362_endpoint_disable, 2605 2606 .get_frame_number = isp1362_get_frame, 2607 2608 .hub_status_data = isp1362_hub_status_data, 2609 .hub_control = isp1362_hub_control, 2610 .bus_suspend = isp1362_bus_suspend, 2611 .bus_resume = isp1362_bus_resume, 2612 }; 2613 2614 /*-------------------------------------------------------------------------*/ 2615 2616 static int isp1362_remove(struct platform_device *pdev) 2617 { 2618 struct usb_hcd *hcd = platform_get_drvdata(pdev); 2619 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd); 2620 struct resource *res; 2621 2622 remove_debug_file(isp1362_hcd); 2623 DBG(0, "%s: Removing HCD\n", __func__); 2624 usb_remove_hcd(hcd); 2625 2626 DBG(0, "%s: Unmapping data_reg @ %p\n", __func__, 2627 isp1362_hcd->data_reg); 2628 iounmap(isp1362_hcd->data_reg); 2629 2630 DBG(0, "%s: Unmapping addr_reg @ %p\n", __func__, 2631 isp1362_hcd->addr_reg); 2632 iounmap(isp1362_hcd->addr_reg); 2633 2634 res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 2635 DBG(0, "%s: release mem_region: %08lx\n", __func__, (long unsigned int)res->start); 2636 if (res) 2637 release_mem_region(res->start, resource_size(res)); 2638 2639 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2640 DBG(0, "%s: release mem_region: %08lx\n", __func__, (long unsigned int)res->start); 2641 if (res) 2642 release_mem_region(res->start, resource_size(res)); 2643 2644 DBG(0, "%s: put_hcd\n", __func__); 2645 usb_put_hcd(hcd); 2646 DBG(0, "%s: Done\n", __func__); 2647 2648 return 0; 2649 } 2650 2651 static int isp1362_probe(struct platform_device *pdev) 2652 { 2653 struct usb_hcd *hcd; 2654 struct isp1362_hcd *isp1362_hcd; 2655 struct resource *addr, *data; 2656 void __iomem *addr_reg; 2657 void __iomem *data_reg; 2658 int irq; 2659 int retval = 0; 2660 struct resource *irq_res; 2661 unsigned int irq_flags = 0; 2662 2663 if (usb_disabled()) 2664 return -ENODEV; 2665 2666 /* basic sanity checks first. board-specific init logic should 2667 * have initialized this the three resources and probably board 2668 * specific platform_data. we don't probe for IRQs, and do only 2669 * minimal sanity checking. 2670 */ 2671 if (pdev->num_resources < 3) { 2672 retval = -ENODEV; 2673 goto err1; 2674 } 2675 2676 data = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2677 addr = platform_get_resource(pdev, IORESOURCE_MEM, 1); 2678 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 2679 if (!addr || !data || !irq_res) { 2680 retval = -ENODEV; 2681 goto err1; 2682 } 2683 irq = irq_res->start; 2684 2685 if (pdev->dev.dma_mask) { 2686 DBG(1, "won't do DMA"); 2687 retval = -ENODEV; 2688 goto err1; 2689 } 2690 2691 if (!request_mem_region(addr->start, resource_size(addr), hcd_name)) { 2692 retval = -EBUSY; 2693 goto err1; 2694 } 2695 addr_reg = ioremap(addr->start, resource_size(addr)); 2696 if (addr_reg == NULL) { 2697 retval = -ENOMEM; 2698 goto err2; 2699 } 2700 2701 if (!request_mem_region(data->start, resource_size(data), hcd_name)) { 2702 retval = -EBUSY; 2703 goto err3; 2704 } 2705 data_reg = ioremap(data->start, resource_size(data)); 2706 if (data_reg == NULL) { 2707 retval = -ENOMEM; 2708 goto err4; 2709 } 2710 2711 /* allocate and initialize hcd */ 2712 hcd = usb_create_hcd(&isp1362_hc_driver, &pdev->dev, dev_name(&pdev->dev)); 2713 if (!hcd) { 2714 retval = -ENOMEM; 2715 goto err5; 2716 } 2717 hcd->rsrc_start = data->start; 2718 isp1362_hcd = hcd_to_isp1362_hcd(hcd); 2719 isp1362_hcd->data_reg = data_reg; 2720 isp1362_hcd->addr_reg = addr_reg; 2721 2722 isp1362_hcd->next_statechange = jiffies; 2723 spin_lock_init(&isp1362_hcd->lock); 2724 INIT_LIST_HEAD(&isp1362_hcd->async); 2725 INIT_LIST_HEAD(&isp1362_hcd->periodic); 2726 INIT_LIST_HEAD(&isp1362_hcd->isoc); 2727 INIT_LIST_HEAD(&isp1362_hcd->remove_list); 2728 isp1362_hcd->board = dev_get_platdata(&pdev->dev); 2729 #if USE_PLATFORM_DELAY 2730 if (!isp1362_hcd->board->delay) { 2731 dev_err(hcd->self.controller, "No platform delay function given\n"); 2732 retval = -ENODEV; 2733 goto err6; 2734 } 2735 #endif 2736 2737 if (irq_res->flags & IORESOURCE_IRQ_HIGHEDGE) 2738 irq_flags |= IRQF_TRIGGER_RISING; 2739 if (irq_res->flags & IORESOURCE_IRQ_LOWEDGE) 2740 irq_flags |= IRQF_TRIGGER_FALLING; 2741 if (irq_res->flags & IORESOURCE_IRQ_HIGHLEVEL) 2742 irq_flags |= IRQF_TRIGGER_HIGH; 2743 if (irq_res->flags & IORESOURCE_IRQ_LOWLEVEL) 2744 irq_flags |= IRQF_TRIGGER_LOW; 2745 2746 retval = usb_add_hcd(hcd, irq, irq_flags | IRQF_SHARED); 2747 if (retval != 0) 2748 goto err6; 2749 pr_info("%s, irq %d\n", hcd->product_desc, irq); 2750 2751 create_debug_file(isp1362_hcd); 2752 2753 return 0; 2754 2755 err6: 2756 DBG(0, "%s: Freeing dev %p\n", __func__, isp1362_hcd); 2757 usb_put_hcd(hcd); 2758 err5: 2759 DBG(0, "%s: Unmapping data_reg @ %p\n", __func__, data_reg); 2760 iounmap(data_reg); 2761 err4: 2762 DBG(0, "%s: Releasing mem region %08lx\n", __func__, (long unsigned int)data->start); 2763 release_mem_region(data->start, resource_size(data)); 2764 err3: 2765 DBG(0, "%s: Unmapping addr_reg @ %p\n", __func__, addr_reg); 2766 iounmap(addr_reg); 2767 err2: 2768 DBG(0, "%s: Releasing mem region %08lx\n", __func__, (long unsigned int)addr->start); 2769 release_mem_region(addr->start, resource_size(addr)); 2770 err1: 2771 pr_err("%s: init error, %d\n", __func__, retval); 2772 2773 return retval; 2774 } 2775 2776 #ifdef CONFIG_PM 2777 static int isp1362_suspend(struct platform_device *pdev, pm_message_t state) 2778 { 2779 struct usb_hcd *hcd = platform_get_drvdata(pdev); 2780 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd); 2781 unsigned long flags; 2782 int retval = 0; 2783 2784 DBG(0, "%s: Suspending device\n", __func__); 2785 2786 if (state.event == PM_EVENT_FREEZE) { 2787 DBG(0, "%s: Suspending root hub\n", __func__); 2788 retval = isp1362_bus_suspend(hcd); 2789 } else { 2790 DBG(0, "%s: Suspending RH ports\n", __func__); 2791 spin_lock_irqsave(&isp1362_hcd->lock, flags); 2792 isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_LPS); 2793 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 2794 } 2795 if (retval == 0) 2796 pdev->dev.power.power_state = state; 2797 return retval; 2798 } 2799 2800 static int isp1362_resume(struct platform_device *pdev) 2801 { 2802 struct usb_hcd *hcd = platform_get_drvdata(pdev); 2803 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd); 2804 unsigned long flags; 2805 2806 DBG(0, "%s: Resuming\n", __func__); 2807 2808 if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) { 2809 DBG(0, "%s: Resume RH ports\n", __func__); 2810 spin_lock_irqsave(&isp1362_hcd->lock, flags); 2811 isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_LPSC); 2812 spin_unlock_irqrestore(&isp1362_hcd->lock, flags); 2813 return 0; 2814 } 2815 2816 pdev->dev.power.power_state = PMSG_ON; 2817 2818 return isp1362_bus_resume(isp1362_hcd_to_hcd(isp1362_hcd)); 2819 } 2820 #else 2821 #define isp1362_suspend NULL 2822 #define isp1362_resume NULL 2823 #endif 2824 2825 static struct platform_driver isp1362_driver = { 2826 .probe = isp1362_probe, 2827 .remove = isp1362_remove, 2828 2829 .suspend = isp1362_suspend, 2830 .resume = isp1362_resume, 2831 .driver = { 2832 .name = (char *)hcd_name, 2833 .owner = THIS_MODULE, 2834 }, 2835 }; 2836 2837 module_platform_driver(isp1362_driver); 2838