xref: /openbmc/linux/drivers/usb/host/ehci-q.c (revision df2634f43f5106947f3735a0b61a6527a4b278cd)
1 /*
2  * Copyright (C) 2001-2004 by David Brownell
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms of the GNU General Public License as published by the
6  * Free Software Foundation; either version 2 of the License, or (at your
7  * option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12  * for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software Foundation,
16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17  */
18 
19 /* this file is part of ehci-hcd.c */
20 
21 /*-------------------------------------------------------------------------*/
22 
23 /*
24  * EHCI hardware queue manipulation ... the core.  QH/QTD manipulation.
25  *
26  * Control, bulk, and interrupt traffic all use "qh" lists.  They list "qtd"
27  * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28  * buffers needed for the larger number).  We use one QH per endpoint, queue
29  * multiple urbs (all three types) per endpoint.  URBs may need several qtds.
30  *
31  * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32  * interrupts) needs careful scheduling.  Performance improvements can be
33  * an ongoing challenge.  That's in "ehci-sched.c".
34  *
35  * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36  * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37  * (b) special fields in qh entries or (c) split iso entries.  TTs will
38  * buffer low/full speed data so the host collects it at high speed.
39  */
40 
41 /*-------------------------------------------------------------------------*/
42 
43 /* fill a qtd, returning how much of the buffer we were able to queue up */
44 
45 static int
46 qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
47 		  size_t len, int token, int maxpacket)
48 {
49 	int	i, count;
50 	u64	addr = buf;
51 
52 	/* one buffer entry per 4K ... first might be short or unaligned */
53 	qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
54 	qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
55 	count = 0x1000 - (buf & 0x0fff);	/* rest of that page */
56 	if (likely (len < count))		/* ... iff needed */
57 		count = len;
58 	else {
59 		buf +=  0x1000;
60 		buf &= ~0x0fff;
61 
62 		/* per-qtd limit: from 16K to 20K (best alignment) */
63 		for (i = 1; count < len && i < 5; i++) {
64 			addr = buf;
65 			qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
66 			qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
67 					(u32)(addr >> 32));
68 			buf += 0x1000;
69 			if ((count + 0x1000) < len)
70 				count += 0x1000;
71 			else
72 				count = len;
73 		}
74 
75 		/* short packets may only terminate transfers */
76 		if (count != len)
77 			count -= (count % maxpacket);
78 	}
79 	qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
80 	qtd->length = count;
81 
82 	return count;
83 }
84 
85 /*-------------------------------------------------------------------------*/
86 
87 static inline void
88 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
89 {
90 	struct ehci_qh_hw *hw = qh->hw;
91 
92 	/* writes to an active overlay are unsafe */
93 	BUG_ON(qh->qh_state != QH_STATE_IDLE);
94 
95 	hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
96 	hw->hw_alt_next = EHCI_LIST_END(ehci);
97 
98 	/* Except for control endpoints, we make hardware maintain data
99 	 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
100 	 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
101 	 * ever clear it.
102 	 */
103 	if (!(hw->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) {
104 		unsigned	is_out, epnum;
105 
106 		is_out = !(qtd->hw_token & cpu_to_hc32(ehci, 1 << 8));
107 		epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
108 		if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
109 			hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
110 			usb_settoggle (qh->dev, epnum, is_out, 1);
111 		}
112 	}
113 
114 	/* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
115 	wmb ();
116 	hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
117 }
118 
119 /* if it weren't for a common silicon quirk (writing the dummy into the qh
120  * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
121  * recovery (including urb dequeue) would need software changes to a QH...
122  */
123 static void
124 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
125 {
126 	struct ehci_qtd *qtd;
127 
128 	if (list_empty (&qh->qtd_list))
129 		qtd = qh->dummy;
130 	else {
131 		qtd = list_entry (qh->qtd_list.next,
132 				struct ehci_qtd, qtd_list);
133 		/* first qtd may already be partially processed */
134 		if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw->hw_current)
135 			qtd = NULL;
136 	}
137 
138 	if (qtd)
139 		qh_update (ehci, qh, qtd);
140 }
141 
142 /*-------------------------------------------------------------------------*/
143 
144 static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
145 
146 static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
147 		struct usb_host_endpoint *ep)
148 {
149 	struct ehci_hcd		*ehci = hcd_to_ehci(hcd);
150 	struct ehci_qh		*qh = ep->hcpriv;
151 	unsigned long		flags;
152 
153 	spin_lock_irqsave(&ehci->lock, flags);
154 	qh->clearing_tt = 0;
155 	if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
156 			&& HC_IS_RUNNING(hcd->state))
157 		qh_link_async(ehci, qh);
158 	spin_unlock_irqrestore(&ehci->lock, flags);
159 }
160 
161 static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
162 		struct urb *urb, u32 token)
163 {
164 
165 	/* If an async split transaction gets an error or is unlinked,
166 	 * the TT buffer may be left in an indeterminate state.  We
167 	 * have to clear the TT buffer.
168 	 *
169 	 * Note: this routine is never called for Isochronous transfers.
170 	 */
171 	if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
172 #ifdef DEBUG
173 		struct usb_device *tt = urb->dev->tt->hub;
174 		dev_dbg(&tt->dev,
175 			"clear tt buffer port %d, a%d ep%d t%08x\n",
176 			urb->dev->ttport, urb->dev->devnum,
177 			usb_pipeendpoint(urb->pipe), token);
178 #endif /* DEBUG */
179 		if (!ehci_is_TDI(ehci)
180 				|| urb->dev->tt->hub !=
181 				   ehci_to_hcd(ehci)->self.root_hub) {
182 			if (usb_hub_clear_tt_buffer(urb) == 0)
183 				qh->clearing_tt = 1;
184 		} else {
185 
186 			/* REVISIT ARC-derived cores don't clear the root
187 			 * hub TT buffer in this way...
188 			 */
189 		}
190 	}
191 }
192 
193 static int qtd_copy_status (
194 	struct ehci_hcd *ehci,
195 	struct urb *urb,
196 	size_t length,
197 	u32 token
198 )
199 {
200 	int	status = -EINPROGRESS;
201 
202 	/* count IN/OUT bytes, not SETUP (even short packets) */
203 	if (likely (QTD_PID (token) != 2))
204 		urb->actual_length += length - QTD_LENGTH (token);
205 
206 	/* don't modify error codes */
207 	if (unlikely(urb->unlinked))
208 		return status;
209 
210 	/* force cleanup after short read; not always an error */
211 	if (unlikely (IS_SHORT_READ (token)))
212 		status = -EREMOTEIO;
213 
214 	/* serious "can't proceed" faults reported by the hardware */
215 	if (token & QTD_STS_HALT) {
216 		if (token & QTD_STS_BABBLE) {
217 			/* FIXME "must" disable babbling device's port too */
218 			status = -EOVERFLOW;
219 		/* CERR nonzero + halt --> stall */
220 		} else if (QTD_CERR(token)) {
221 			status = -EPIPE;
222 
223 		/* In theory, more than one of the following bits can be set
224 		 * since they are sticky and the transaction is retried.
225 		 * Which to test first is rather arbitrary.
226 		 */
227 		} else if (token & QTD_STS_MMF) {
228 			/* fs/ls interrupt xfer missed the complete-split */
229 			status = -EPROTO;
230 		} else if (token & QTD_STS_DBE) {
231 			status = (QTD_PID (token) == 1) /* IN ? */
232 				? -ENOSR  /* hc couldn't read data */
233 				: -ECOMM; /* hc couldn't write data */
234 		} else if (token & QTD_STS_XACT) {
235 			/* timeout, bad CRC, wrong PID, etc */
236 			ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
237 				urb->dev->devpath,
238 				usb_pipeendpoint(urb->pipe),
239 				usb_pipein(urb->pipe) ? "in" : "out");
240 			status = -EPROTO;
241 		} else {	/* unknown */
242 			status = -EPROTO;
243 		}
244 
245 		ehci_vdbg (ehci,
246 			"dev%d ep%d%s qtd token %08x --> status %d\n",
247 			usb_pipedevice (urb->pipe),
248 			usb_pipeendpoint (urb->pipe),
249 			usb_pipein (urb->pipe) ? "in" : "out",
250 			token, status);
251 	}
252 
253 	return status;
254 }
255 
256 static void
257 ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
258 __releases(ehci->lock)
259 __acquires(ehci->lock)
260 {
261 	if (likely (urb->hcpriv != NULL)) {
262 		struct ehci_qh	*qh = (struct ehci_qh *) urb->hcpriv;
263 
264 		/* S-mask in a QH means it's an interrupt urb */
265 		if ((qh->hw->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
266 
267 			/* ... update hc-wide periodic stats (for usbfs) */
268 			ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
269 		}
270 		qh_put (qh);
271 	}
272 
273 	if (unlikely(urb->unlinked)) {
274 		COUNT(ehci->stats.unlink);
275 	} else {
276 		/* report non-error and short read status as zero */
277 		if (status == -EINPROGRESS || status == -EREMOTEIO)
278 			status = 0;
279 		COUNT(ehci->stats.complete);
280 	}
281 
282 #ifdef EHCI_URB_TRACE
283 	ehci_dbg (ehci,
284 		"%s %s urb %p ep%d%s status %d len %d/%d\n",
285 		__func__, urb->dev->devpath, urb,
286 		usb_pipeendpoint (urb->pipe),
287 		usb_pipein (urb->pipe) ? "in" : "out",
288 		status,
289 		urb->actual_length, urb->transfer_buffer_length);
290 #endif
291 
292 	/* complete() can reenter this HCD */
293 	usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
294 	spin_unlock (&ehci->lock);
295 	usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
296 	spin_lock (&ehci->lock);
297 }
298 
299 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
300 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
301 
302 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
303 
304 /*
305  * Process and free completed qtds for a qh, returning URBs to drivers.
306  * Chases up to qh->hw_current.  Returns number of completions called,
307  * indicating how much "real" work we did.
308  */
309 static unsigned
310 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
311 {
312 	struct ehci_qtd		*last, *end = qh->dummy;
313 	struct list_head	*entry, *tmp;
314 	int			last_status;
315 	int			stopped;
316 	unsigned		count = 0;
317 	u8			state;
318 	const __le32		halt = HALT_BIT(ehci);
319 	struct ehci_qh_hw	*hw = qh->hw;
320 
321 	if (unlikely (list_empty (&qh->qtd_list)))
322 		return count;
323 
324 	/* completions (or tasks on other cpus) must never clobber HALT
325 	 * till we've gone through and cleaned everything up, even when
326 	 * they add urbs to this qh's queue or mark them for unlinking.
327 	 *
328 	 * NOTE:  unlinking expects to be done in queue order.
329 	 *
330 	 * It's a bug for qh->qh_state to be anything other than
331 	 * QH_STATE_IDLE, unless our caller is scan_async() or
332 	 * scan_periodic().
333 	 */
334 	state = qh->qh_state;
335 	qh->qh_state = QH_STATE_COMPLETING;
336 	stopped = (state == QH_STATE_IDLE);
337 
338  rescan:
339 	last = NULL;
340 	last_status = -EINPROGRESS;
341 	qh->needs_rescan = 0;
342 
343 	/* remove de-activated QTDs from front of queue.
344 	 * after faults (including short reads), cleanup this urb
345 	 * then let the queue advance.
346 	 * if queue is stopped, handles unlinks.
347 	 */
348 	list_for_each_safe (entry, tmp, &qh->qtd_list) {
349 		struct ehci_qtd	*qtd;
350 		struct urb	*urb;
351 		u32		token = 0;
352 
353 		qtd = list_entry (entry, struct ehci_qtd, qtd_list);
354 		urb = qtd->urb;
355 
356 		/* clean up any state from previous QTD ...*/
357 		if (last) {
358 			if (likely (last->urb != urb)) {
359 				ehci_urb_done(ehci, last->urb, last_status);
360 				count++;
361 				last_status = -EINPROGRESS;
362 			}
363 			ehci_qtd_free (ehci, last);
364 			last = NULL;
365 		}
366 
367 		/* ignore urbs submitted during completions we reported */
368 		if (qtd == end)
369 			break;
370 
371 		/* hardware copies qtd out of qh overlay */
372 		rmb ();
373 		token = hc32_to_cpu(ehci, qtd->hw_token);
374 
375 		/* always clean up qtds the hc de-activated */
376  retry_xacterr:
377 		if ((token & QTD_STS_ACTIVE) == 0) {
378 
379 			/* on STALL, error, and short reads this urb must
380 			 * complete and all its qtds must be recycled.
381 			 */
382 			if ((token & QTD_STS_HALT) != 0) {
383 
384 				/* retry transaction errors until we
385 				 * reach the software xacterr limit
386 				 */
387 				if ((token & QTD_STS_XACT) &&
388 						QTD_CERR(token) == 0 &&
389 						++qh->xacterrs < QH_XACTERR_MAX &&
390 						!urb->unlinked) {
391 					ehci_dbg(ehci,
392 	"detected XactErr len %zu/%zu retry %d\n",
393 	qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
394 
395 					/* reset the token in the qtd and the
396 					 * qh overlay (which still contains
397 					 * the qtd) so that we pick up from
398 					 * where we left off
399 					 */
400 					token &= ~QTD_STS_HALT;
401 					token |= QTD_STS_ACTIVE |
402 							(EHCI_TUNE_CERR << 10);
403 					qtd->hw_token = cpu_to_hc32(ehci,
404 							token);
405 					wmb();
406 					hw->hw_token = cpu_to_hc32(ehci,
407 							token);
408 					goto retry_xacterr;
409 				}
410 				stopped = 1;
411 
412 			/* magic dummy for some short reads; qh won't advance.
413 			 * that silicon quirk can kick in with this dummy too.
414 			 *
415 			 * other short reads won't stop the queue, including
416 			 * control transfers (status stage handles that) or
417 			 * most other single-qtd reads ... the queue stops if
418 			 * URB_SHORT_NOT_OK was set so the driver submitting
419 			 * the urbs could clean it up.
420 			 */
421 			} else if (IS_SHORT_READ (token)
422 					&& !(qtd->hw_alt_next
423 						& EHCI_LIST_END(ehci))) {
424 				stopped = 1;
425 				goto halt;
426 			}
427 
428 		/* stop scanning when we reach qtds the hc is using */
429 		} else if (likely (!stopped
430 				&& HC_IS_RUNNING (ehci_to_hcd(ehci)->state))) {
431 			break;
432 
433 		/* scan the whole queue for unlinks whenever it stops */
434 		} else {
435 			stopped = 1;
436 
437 			/* cancel everything if we halt, suspend, etc */
438 			if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))
439 				last_status = -ESHUTDOWN;
440 
441 			/* this qtd is active; skip it unless a previous qtd
442 			 * for its urb faulted, or its urb was canceled.
443 			 */
444 			else if (last_status == -EINPROGRESS && !urb->unlinked)
445 				continue;
446 
447 			/* qh unlinked; token in overlay may be most current */
448 			if (state == QH_STATE_IDLE
449 					&& cpu_to_hc32(ehci, qtd->qtd_dma)
450 						== hw->hw_current) {
451 				token = hc32_to_cpu(ehci, hw->hw_token);
452 
453 				/* An unlink may leave an incomplete
454 				 * async transaction in the TT buffer.
455 				 * We have to clear it.
456 				 */
457 				ehci_clear_tt_buffer(ehci, qh, urb, token);
458 			}
459 
460 			/* force halt for unlinked or blocked qh, so we'll
461 			 * patch the qh later and so that completions can't
462 			 * activate it while we "know" it's stopped.
463 			 */
464 			if ((halt & hw->hw_token) == 0) {
465 halt:
466 				hw->hw_token |= halt;
467 				wmb ();
468 			}
469 		}
470 
471 		/* unless we already know the urb's status, collect qtd status
472 		 * and update count of bytes transferred.  in common short read
473 		 * cases with only one data qtd (including control transfers),
474 		 * queue processing won't halt.  but with two or more qtds (for
475 		 * example, with a 32 KB transfer), when the first qtd gets a
476 		 * short read the second must be removed by hand.
477 		 */
478 		if (last_status == -EINPROGRESS) {
479 			last_status = qtd_copy_status(ehci, urb,
480 					qtd->length, token);
481 			if (last_status == -EREMOTEIO
482 					&& (qtd->hw_alt_next
483 						& EHCI_LIST_END(ehci)))
484 				last_status = -EINPROGRESS;
485 
486 			/* As part of low/full-speed endpoint-halt processing
487 			 * we must clear the TT buffer (11.17.5).
488 			 */
489 			if (unlikely(last_status != -EINPROGRESS &&
490 					last_status != -EREMOTEIO)) {
491 				/* The TT's in some hubs malfunction when they
492 				 * receive this request following a STALL (they
493 				 * stop sending isochronous packets).  Since a
494 				 * STALL can't leave the TT buffer in a busy
495 				 * state (if you believe Figures 11-48 - 11-51
496 				 * in the USB 2.0 spec), we won't clear the TT
497 				 * buffer in this case.  Strictly speaking this
498 				 * is a violation of the spec.
499 				 */
500 				if (last_status != -EPIPE)
501 					ehci_clear_tt_buffer(ehci, qh, urb,
502 							token);
503 			}
504 		}
505 
506 		/* if we're removing something not at the queue head,
507 		 * patch the hardware queue pointer.
508 		 */
509 		if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
510 			last = list_entry (qtd->qtd_list.prev,
511 					struct ehci_qtd, qtd_list);
512 			last->hw_next = qtd->hw_next;
513 		}
514 
515 		/* remove qtd; it's recycled after possible urb completion */
516 		list_del (&qtd->qtd_list);
517 		last = qtd;
518 
519 		/* reinit the xacterr counter for the next qtd */
520 		qh->xacterrs = 0;
521 	}
522 
523 	/* last urb's completion might still need calling */
524 	if (likely (last != NULL)) {
525 		ehci_urb_done(ehci, last->urb, last_status);
526 		count++;
527 		ehci_qtd_free (ehci, last);
528 	}
529 
530 	/* Do we need to rescan for URBs dequeued during a giveback? */
531 	if (unlikely(qh->needs_rescan)) {
532 		/* If the QH is already unlinked, do the rescan now. */
533 		if (state == QH_STATE_IDLE)
534 			goto rescan;
535 
536 		/* Otherwise we have to wait until the QH is fully unlinked.
537 		 * Our caller will start an unlink if qh->needs_rescan is
538 		 * set.  But if an unlink has already started, nothing needs
539 		 * to be done.
540 		 */
541 		if (state != QH_STATE_LINKED)
542 			qh->needs_rescan = 0;
543 	}
544 
545 	/* restore original state; caller must unlink or relink */
546 	qh->qh_state = state;
547 
548 	/* be sure the hardware's done with the qh before refreshing
549 	 * it after fault cleanup, or recovering from silicon wrongly
550 	 * overlaying the dummy qtd (which reduces DMA chatter).
551 	 */
552 	if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci)) {
553 		switch (state) {
554 		case QH_STATE_IDLE:
555 			qh_refresh(ehci, qh);
556 			break;
557 		case QH_STATE_LINKED:
558 			/* We won't refresh a QH that's linked (after the HC
559 			 * stopped the queue).  That avoids a race:
560 			 *  - HC reads first part of QH;
561 			 *  - CPU updates that first part and the token;
562 			 *  - HC reads rest of that QH, including token
563 			 * Result:  HC gets an inconsistent image, and then
564 			 * DMAs to/from the wrong memory (corrupting it).
565 			 *
566 			 * That should be rare for interrupt transfers,
567 			 * except maybe high bandwidth ...
568 			 */
569 
570 			/* Tell the caller to start an unlink */
571 			qh->needs_rescan = 1;
572 			break;
573 		/* otherwise, unlink already started */
574 		}
575 	}
576 
577 	return count;
578 }
579 
580 /*-------------------------------------------------------------------------*/
581 
582 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
583 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
584 // ... and packet size, for any kind of endpoint descriptor
585 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
586 
587 /*
588  * reverse of qh_urb_transaction:  free a list of TDs.
589  * used for cleanup after errors, before HC sees an URB's TDs.
590  */
591 static void qtd_list_free (
592 	struct ehci_hcd		*ehci,
593 	struct urb		*urb,
594 	struct list_head	*qtd_list
595 ) {
596 	struct list_head	*entry, *temp;
597 
598 	list_for_each_safe (entry, temp, qtd_list) {
599 		struct ehci_qtd	*qtd;
600 
601 		qtd = list_entry (entry, struct ehci_qtd, qtd_list);
602 		list_del (&qtd->qtd_list);
603 		ehci_qtd_free (ehci, qtd);
604 	}
605 }
606 
607 /*
608  * create a list of filled qtds for this URB; won't link into qh.
609  */
610 static struct list_head *
611 qh_urb_transaction (
612 	struct ehci_hcd		*ehci,
613 	struct urb		*urb,
614 	struct list_head	*head,
615 	gfp_t			flags
616 ) {
617 	struct ehci_qtd		*qtd, *qtd_prev;
618 	dma_addr_t		buf;
619 	int			len, this_sg_len, maxpacket;
620 	int			is_input;
621 	u32			token;
622 	int			i;
623 	struct scatterlist	*sg;
624 
625 	/*
626 	 * URBs map to sequences of QTDs:  one logical transaction
627 	 */
628 	qtd = ehci_qtd_alloc (ehci, flags);
629 	if (unlikely (!qtd))
630 		return NULL;
631 	list_add_tail (&qtd->qtd_list, head);
632 	qtd->urb = urb;
633 
634 	token = QTD_STS_ACTIVE;
635 	token |= (EHCI_TUNE_CERR << 10);
636 	/* for split transactions, SplitXState initialized to zero */
637 
638 	len = urb->transfer_buffer_length;
639 	is_input = usb_pipein (urb->pipe);
640 	if (usb_pipecontrol (urb->pipe)) {
641 		/* SETUP pid */
642 		qtd_fill(ehci, qtd, urb->setup_dma,
643 				sizeof (struct usb_ctrlrequest),
644 				token | (2 /* "setup" */ << 8), 8);
645 
646 		/* ... and always at least one more pid */
647 		token ^= QTD_TOGGLE;
648 		qtd_prev = qtd;
649 		qtd = ehci_qtd_alloc (ehci, flags);
650 		if (unlikely (!qtd))
651 			goto cleanup;
652 		qtd->urb = urb;
653 		qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
654 		list_add_tail (&qtd->qtd_list, head);
655 
656 		/* for zero length DATA stages, STATUS is always IN */
657 		if (len == 0)
658 			token |= (1 /* "in" */ << 8);
659 	}
660 
661 	/*
662 	 * data transfer stage:  buffer setup
663 	 */
664 	i = urb->num_sgs;
665 	if (len > 0 && i > 0) {
666 		sg = urb->sg;
667 		buf = sg_dma_address(sg);
668 
669 		/* urb->transfer_buffer_length may be smaller than the
670 		 * size of the scatterlist (or vice versa)
671 		 */
672 		this_sg_len = min_t(int, sg_dma_len(sg), len);
673 	} else {
674 		sg = NULL;
675 		buf = urb->transfer_dma;
676 		this_sg_len = len;
677 	}
678 
679 	if (is_input)
680 		token |= (1 /* "in" */ << 8);
681 	/* else it's already initted to "out" pid (0 << 8) */
682 
683 	maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
684 
685 	/*
686 	 * buffer gets wrapped in one or more qtds;
687 	 * last one may be "short" (including zero len)
688 	 * and may serve as a control status ack
689 	 */
690 	for (;;) {
691 		int this_qtd_len;
692 
693 		this_qtd_len = qtd_fill(ehci, qtd, buf, this_sg_len, token,
694 				maxpacket);
695 		this_sg_len -= this_qtd_len;
696 		len -= this_qtd_len;
697 		buf += this_qtd_len;
698 
699 		/*
700 		 * short reads advance to a "magic" dummy instead of the next
701 		 * qtd ... that forces the queue to stop, for manual cleanup.
702 		 * (this will usually be overridden later.)
703 		 */
704 		if (is_input)
705 			qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
706 
707 		/* qh makes control packets use qtd toggle; maybe switch it */
708 		if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
709 			token ^= QTD_TOGGLE;
710 
711 		if (likely(this_sg_len <= 0)) {
712 			if (--i <= 0 || len <= 0)
713 				break;
714 			sg = sg_next(sg);
715 			buf = sg_dma_address(sg);
716 			this_sg_len = min_t(int, sg_dma_len(sg), len);
717 		}
718 
719 		qtd_prev = qtd;
720 		qtd = ehci_qtd_alloc (ehci, flags);
721 		if (unlikely (!qtd))
722 			goto cleanup;
723 		qtd->urb = urb;
724 		qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
725 		list_add_tail (&qtd->qtd_list, head);
726 	}
727 
728 	/*
729 	 * unless the caller requires manual cleanup after short reads,
730 	 * have the alt_next mechanism keep the queue running after the
731 	 * last data qtd (the only one, for control and most other cases).
732 	 */
733 	if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
734 				|| usb_pipecontrol (urb->pipe)))
735 		qtd->hw_alt_next = EHCI_LIST_END(ehci);
736 
737 	/*
738 	 * control requests may need a terminating data "status" ack;
739 	 * bulk ones may need a terminating short packet (zero length).
740 	 */
741 	if (likely (urb->transfer_buffer_length != 0)) {
742 		int	one_more = 0;
743 
744 		if (usb_pipecontrol (urb->pipe)) {
745 			one_more = 1;
746 			token ^= 0x0100;	/* "in" <--> "out"  */
747 			token |= QTD_TOGGLE;	/* force DATA1 */
748 		} else if (usb_pipebulk (urb->pipe)
749 				&& (urb->transfer_flags & URB_ZERO_PACKET)
750 				&& !(urb->transfer_buffer_length % maxpacket)) {
751 			one_more = 1;
752 		}
753 		if (one_more) {
754 			qtd_prev = qtd;
755 			qtd = ehci_qtd_alloc (ehci, flags);
756 			if (unlikely (!qtd))
757 				goto cleanup;
758 			qtd->urb = urb;
759 			qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
760 			list_add_tail (&qtd->qtd_list, head);
761 
762 			/* never any data in such packets */
763 			qtd_fill(ehci, qtd, 0, 0, token, 0);
764 		}
765 	}
766 
767 	/* by default, enable interrupt on urb completion */
768 	if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
769 		qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
770 	return head;
771 
772 cleanup:
773 	qtd_list_free (ehci, urb, head);
774 	return NULL;
775 }
776 
777 /*-------------------------------------------------------------------------*/
778 
779 // Would be best to create all qh's from config descriptors,
780 // when each interface/altsetting is established.  Unlink
781 // any previous qh and cancel its urbs first; endpoints are
782 // implicitly reset then (data toggle too).
783 // That'd mean updating how usbcore talks to HCDs. (2.7?)
784 
785 
786 /*
787  * Each QH holds a qtd list; a QH is used for everything except iso.
788  *
789  * For interrupt urbs, the scheduler must set the microframe scheduling
790  * mask(s) each time the QH gets scheduled.  For highspeed, that's
791  * just one microframe in the s-mask.  For split interrupt transactions
792  * there are additional complications: c-mask, maybe FSTNs.
793  */
794 static struct ehci_qh *
795 qh_make (
796 	struct ehci_hcd		*ehci,
797 	struct urb		*urb,
798 	gfp_t			flags
799 ) {
800 	struct ehci_qh		*qh = ehci_qh_alloc (ehci, flags);
801 	u32			info1 = 0, info2 = 0;
802 	int			is_input, type;
803 	int			maxp = 0;
804 	struct usb_tt		*tt = urb->dev->tt;
805 	struct ehci_qh_hw	*hw;
806 
807 	if (!qh)
808 		return qh;
809 
810 	/*
811 	 * init endpoint/device data for this QH
812 	 */
813 	info1 |= usb_pipeendpoint (urb->pipe) << 8;
814 	info1 |= usb_pipedevice (urb->pipe) << 0;
815 
816 	is_input = usb_pipein (urb->pipe);
817 	type = usb_pipetype (urb->pipe);
818 	maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
819 
820 	/* 1024 byte maxpacket is a hardware ceiling.  High bandwidth
821 	 * acts like up to 3KB, but is built from smaller packets.
822 	 */
823 	if (max_packet(maxp) > 1024) {
824 		ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
825 		goto done;
826 	}
827 
828 	/* Compute interrupt scheduling parameters just once, and save.
829 	 * - allowing for high bandwidth, how many nsec/uframe are used?
830 	 * - split transactions need a second CSPLIT uframe; same question
831 	 * - splits also need a schedule gap (for full/low speed I/O)
832 	 * - qh has a polling interval
833 	 *
834 	 * For control/bulk requests, the HC or TT handles these.
835 	 */
836 	if (type == PIPE_INTERRUPT) {
837 		qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
838 				is_input, 0,
839 				hb_mult(maxp) * max_packet(maxp)));
840 		qh->start = NO_FRAME;
841 
842 		if (urb->dev->speed == USB_SPEED_HIGH) {
843 			qh->c_usecs = 0;
844 			qh->gap_uf = 0;
845 
846 			qh->period = urb->interval >> 3;
847 			if (qh->period == 0 && urb->interval != 1) {
848 				/* NOTE interval 2 or 4 uframes could work.
849 				 * But interval 1 scheduling is simpler, and
850 				 * includes high bandwidth.
851 				 */
852 				urb->interval = 1;
853 			} else if (qh->period > ehci->periodic_size) {
854 				qh->period = ehci->periodic_size;
855 				urb->interval = qh->period << 3;
856 			}
857 		} else {
858 			int		think_time;
859 
860 			/* gap is f(FS/LS transfer times) */
861 			qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
862 					is_input, 0, maxp) / (125 * 1000);
863 
864 			/* FIXME this just approximates SPLIT/CSPLIT times */
865 			if (is_input) {		// SPLIT, gap, CSPLIT+DATA
866 				qh->c_usecs = qh->usecs + HS_USECS (0);
867 				qh->usecs = HS_USECS (1);
868 			} else {		// SPLIT+DATA, gap, CSPLIT
869 				qh->usecs += HS_USECS (1);
870 				qh->c_usecs = HS_USECS (0);
871 			}
872 
873 			think_time = tt ? tt->think_time : 0;
874 			qh->tt_usecs = NS_TO_US (think_time +
875 					usb_calc_bus_time (urb->dev->speed,
876 					is_input, 0, max_packet (maxp)));
877 			qh->period = urb->interval;
878 			if (qh->period > ehci->periodic_size) {
879 				qh->period = ehci->periodic_size;
880 				urb->interval = qh->period;
881 			}
882 		}
883 	}
884 
885 	/* support for tt scheduling, and access to toggles */
886 	qh->dev = urb->dev;
887 
888 	/* using TT? */
889 	switch (urb->dev->speed) {
890 	case USB_SPEED_LOW:
891 		info1 |= (1 << 12);	/* EPS "low" */
892 		/* FALL THROUGH */
893 
894 	case USB_SPEED_FULL:
895 		/* EPS 0 means "full" */
896 		if (type != PIPE_INTERRUPT)
897 			info1 |= (EHCI_TUNE_RL_TT << 28);
898 		if (type == PIPE_CONTROL) {
899 			info1 |= (1 << 27);	/* for TT */
900 			info1 |= 1 << 14;	/* toggle from qtd */
901 		}
902 		info1 |= maxp << 16;
903 
904 		info2 |= (EHCI_TUNE_MULT_TT << 30);
905 
906 		/* Some Freescale processors have an erratum in which the
907 		 * port number in the queue head was 0..N-1 instead of 1..N.
908 		 */
909 		if (ehci_has_fsl_portno_bug(ehci))
910 			info2 |= (urb->dev->ttport-1) << 23;
911 		else
912 			info2 |= urb->dev->ttport << 23;
913 
914 		/* set the address of the TT; for TDI's integrated
915 		 * root hub tt, leave it zeroed.
916 		 */
917 		if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
918 			info2 |= tt->hub->devnum << 16;
919 
920 		/* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
921 
922 		break;
923 
924 	case USB_SPEED_HIGH:		/* no TT involved */
925 		info1 |= (2 << 12);	/* EPS "high" */
926 		if (type == PIPE_CONTROL) {
927 			info1 |= (EHCI_TUNE_RL_HS << 28);
928 			info1 |= 64 << 16;	/* usb2 fixed maxpacket */
929 			info1 |= 1 << 14;	/* toggle from qtd */
930 			info2 |= (EHCI_TUNE_MULT_HS << 30);
931 		} else if (type == PIPE_BULK) {
932 			info1 |= (EHCI_TUNE_RL_HS << 28);
933 			/* The USB spec says that high speed bulk endpoints
934 			 * always use 512 byte maxpacket.  But some device
935 			 * vendors decided to ignore that, and MSFT is happy
936 			 * to help them do so.  So now people expect to use
937 			 * such nonconformant devices with Linux too; sigh.
938 			 */
939 			info1 |= max_packet(maxp) << 16;
940 			info2 |= (EHCI_TUNE_MULT_HS << 30);
941 		} else {		/* PIPE_INTERRUPT */
942 			info1 |= max_packet (maxp) << 16;
943 			info2 |= hb_mult (maxp) << 30;
944 		}
945 		break;
946 	default:
947 		dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
948 done:
949 		qh_put (qh);
950 		return NULL;
951 	}
952 
953 	/* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
954 
955 	/* init as live, toggle clear, advance to dummy */
956 	qh->qh_state = QH_STATE_IDLE;
957 	hw = qh->hw;
958 	hw->hw_info1 = cpu_to_hc32(ehci, info1);
959 	hw->hw_info2 = cpu_to_hc32(ehci, info2);
960 	usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
961 	qh_refresh (ehci, qh);
962 	return qh;
963 }
964 
965 /*-------------------------------------------------------------------------*/
966 
967 /* move qh (and its qtds) onto async queue; maybe enable queue.  */
968 
969 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
970 {
971 	__hc32		dma = QH_NEXT(ehci, qh->qh_dma);
972 	struct ehci_qh	*head;
973 
974 	/* Don't link a QH if there's a Clear-TT-Buffer pending */
975 	if (unlikely(qh->clearing_tt))
976 		return;
977 
978 	WARN_ON(qh->qh_state != QH_STATE_IDLE);
979 
980 	/* (re)start the async schedule? */
981 	head = ehci->async;
982 	timer_action_done (ehci, TIMER_ASYNC_OFF);
983 	if (!head->qh_next.qh) {
984 		u32	cmd = ehci_readl(ehci, &ehci->regs->command);
985 
986 		if (!(cmd & CMD_ASE)) {
987 			/* in case a clear of CMD_ASE didn't take yet */
988 			(void)handshake(ehci, &ehci->regs->status,
989 					STS_ASS, 0, 150);
990 			cmd |= CMD_ASE | CMD_RUN;
991 			ehci_writel(ehci, cmd, &ehci->regs->command);
992 			ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
993 			/* posted write need not be known to HC yet ... */
994 		}
995 	}
996 
997 	/* clear halt and/or toggle; and maybe recover from silicon quirk */
998 	qh_refresh(ehci, qh);
999 
1000 	/* splice right after start */
1001 	qh->qh_next = head->qh_next;
1002 	qh->hw->hw_next = head->hw->hw_next;
1003 	wmb ();
1004 
1005 	head->qh_next.qh = qh;
1006 	head->hw->hw_next = dma;
1007 
1008 	qh_get(qh);
1009 	qh->xacterrs = 0;
1010 	qh->qh_state = QH_STATE_LINKED;
1011 	/* qtd completions reported later by interrupt */
1012 }
1013 
1014 /*-------------------------------------------------------------------------*/
1015 
1016 /*
1017  * For control/bulk/interrupt, return QH with these TDs appended.
1018  * Allocates and initializes the QH if necessary.
1019  * Returns null if it can't allocate a QH it needs to.
1020  * If the QH has TDs (urbs) already, that's great.
1021  */
1022 static struct ehci_qh *qh_append_tds (
1023 	struct ehci_hcd		*ehci,
1024 	struct urb		*urb,
1025 	struct list_head	*qtd_list,
1026 	int			epnum,
1027 	void			**ptr
1028 )
1029 {
1030 	struct ehci_qh		*qh = NULL;
1031 	__hc32			qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
1032 
1033 	qh = (struct ehci_qh *) *ptr;
1034 	if (unlikely (qh == NULL)) {
1035 		/* can't sleep here, we have ehci->lock... */
1036 		qh = qh_make (ehci, urb, GFP_ATOMIC);
1037 		*ptr = qh;
1038 	}
1039 	if (likely (qh != NULL)) {
1040 		struct ehci_qtd	*qtd;
1041 
1042 		if (unlikely (list_empty (qtd_list)))
1043 			qtd = NULL;
1044 		else
1045 			qtd = list_entry (qtd_list->next, struct ehci_qtd,
1046 					qtd_list);
1047 
1048 		/* control qh may need patching ... */
1049 		if (unlikely (epnum == 0)) {
1050 
1051                         /* usb_reset_device() briefly reverts to address 0 */
1052                         if (usb_pipedevice (urb->pipe) == 0)
1053 				qh->hw->hw_info1 &= ~qh_addr_mask;
1054 		}
1055 
1056 		/* just one way to queue requests: swap with the dummy qtd.
1057 		 * only hc or qh_refresh() ever modify the overlay.
1058 		 */
1059 		if (likely (qtd != NULL)) {
1060 			struct ehci_qtd		*dummy;
1061 			dma_addr_t		dma;
1062 			__hc32			token;
1063 
1064 			/* to avoid racing the HC, use the dummy td instead of
1065 			 * the first td of our list (becomes new dummy).  both
1066 			 * tds stay deactivated until we're done, when the
1067 			 * HC is allowed to fetch the old dummy (4.10.2).
1068 			 */
1069 			token = qtd->hw_token;
1070 			qtd->hw_token = HALT_BIT(ehci);
1071 			wmb ();
1072 			dummy = qh->dummy;
1073 
1074 			dma = dummy->qtd_dma;
1075 			*dummy = *qtd;
1076 			dummy->qtd_dma = dma;
1077 
1078 			list_del (&qtd->qtd_list);
1079 			list_add (&dummy->qtd_list, qtd_list);
1080 			list_splice_tail(qtd_list, &qh->qtd_list);
1081 
1082 			ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
1083 			qh->dummy = qtd;
1084 
1085 			/* hc must see the new dummy at list end */
1086 			dma = qtd->qtd_dma;
1087 			qtd = list_entry (qh->qtd_list.prev,
1088 					struct ehci_qtd, qtd_list);
1089 			qtd->hw_next = QTD_NEXT(ehci, dma);
1090 
1091 			/* let the hc process these next qtds */
1092 			wmb ();
1093 			dummy->hw_token = token;
1094 
1095 			urb->hcpriv = qh_get (qh);
1096 		}
1097 	}
1098 	return qh;
1099 }
1100 
1101 /*-------------------------------------------------------------------------*/
1102 
1103 static int
1104 submit_async (
1105 	struct ehci_hcd		*ehci,
1106 	struct urb		*urb,
1107 	struct list_head	*qtd_list,
1108 	gfp_t			mem_flags
1109 ) {
1110 	struct ehci_qtd		*qtd;
1111 	int			epnum;
1112 	unsigned long		flags;
1113 	struct ehci_qh		*qh = NULL;
1114 	int			rc;
1115 
1116 	qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
1117 	epnum = urb->ep->desc.bEndpointAddress;
1118 
1119 #ifdef EHCI_URB_TRACE
1120 	ehci_dbg (ehci,
1121 		"%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1122 		__func__, urb->dev->devpath, urb,
1123 		epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1124 		urb->transfer_buffer_length,
1125 		qtd, urb->ep->hcpriv);
1126 #endif
1127 
1128 	spin_lock_irqsave (&ehci->lock, flags);
1129 	if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
1130 		rc = -ESHUTDOWN;
1131 		goto done;
1132 	}
1133 	rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1134 	if (unlikely(rc))
1135 		goto done;
1136 
1137 	qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
1138 	if (unlikely(qh == NULL)) {
1139 		usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1140 		rc = -ENOMEM;
1141 		goto done;
1142 	}
1143 
1144 	/* Control/bulk operations through TTs don't need scheduling,
1145 	 * the HC and TT handle it when the TT has a buffer ready.
1146 	 */
1147 	if (likely (qh->qh_state == QH_STATE_IDLE))
1148 		qh_link_async(ehci, qh);
1149  done:
1150 	spin_unlock_irqrestore (&ehci->lock, flags);
1151 	if (unlikely (qh == NULL))
1152 		qtd_list_free (ehci, urb, qtd_list);
1153 	return rc;
1154 }
1155 
1156 /*-------------------------------------------------------------------------*/
1157 
1158 /* the async qh for the qtds being reclaimed are now unlinked from the HC */
1159 
1160 static void end_unlink_async (struct ehci_hcd *ehci)
1161 {
1162 	struct ehci_qh		*qh = ehci->reclaim;
1163 	struct ehci_qh		*next;
1164 
1165 	iaa_watchdog_done(ehci);
1166 
1167 	// qh->hw_next = cpu_to_hc32(qh->qh_dma);
1168 	qh->qh_state = QH_STATE_IDLE;
1169 	qh->qh_next.qh = NULL;
1170 	qh_put (qh);			// refcount from reclaim
1171 
1172 	/* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1173 	next = qh->reclaim;
1174 	ehci->reclaim = next;
1175 	qh->reclaim = NULL;
1176 
1177 	qh_completions (ehci, qh);
1178 
1179 	if (!list_empty (&qh->qtd_list)
1180 			&& HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
1181 		qh_link_async (ehci, qh);
1182 	else {
1183 		/* it's not free to turn the async schedule on/off; leave it
1184 		 * active but idle for a while once it empties.
1185 		 */
1186 		if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
1187 				&& ehci->async->qh_next.qh == NULL)
1188 			timer_action (ehci, TIMER_ASYNC_OFF);
1189 	}
1190 	qh_put(qh);			/* refcount from async list */
1191 
1192 	if (next) {
1193 		ehci->reclaim = NULL;
1194 		start_unlink_async (ehci, next);
1195 	}
1196 }
1197 
1198 /* makes sure the async qh will become idle */
1199 /* caller must own ehci->lock */
1200 
1201 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1202 {
1203 	int		cmd = ehci_readl(ehci, &ehci->regs->command);
1204 	struct ehci_qh	*prev;
1205 
1206 #ifdef DEBUG
1207 	assert_spin_locked(&ehci->lock);
1208 	if (ehci->reclaim
1209 			|| (qh->qh_state != QH_STATE_LINKED
1210 				&& qh->qh_state != QH_STATE_UNLINK_WAIT)
1211 			)
1212 		BUG ();
1213 #endif
1214 
1215 	/* stop async schedule right now? */
1216 	if (unlikely (qh == ehci->async)) {
1217 		/* can't get here without STS_ASS set */
1218 		if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
1219 				&& !ehci->reclaim) {
1220 			/* ... and CMD_IAAD clear */
1221 			ehci_writel(ehci, cmd & ~CMD_ASE,
1222 				    &ehci->regs->command);
1223 			wmb ();
1224 			// handshake later, if we need to
1225 			timer_action_done (ehci, TIMER_ASYNC_OFF);
1226 		}
1227 		return;
1228 	}
1229 
1230 	qh->qh_state = QH_STATE_UNLINK;
1231 	ehci->reclaim = qh = qh_get (qh);
1232 
1233 	prev = ehci->async;
1234 	while (prev->qh_next.qh != qh)
1235 		prev = prev->qh_next.qh;
1236 
1237 	prev->hw->hw_next = qh->hw->hw_next;
1238 	prev->qh_next = qh->qh_next;
1239 	wmb ();
1240 
1241 	/* If the controller isn't running, we don't have to wait for it */
1242 	if (unlikely(!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))) {
1243 		/* if (unlikely (qh->reclaim != 0))
1244 		 *	this will recurse, probably not much
1245 		 */
1246 		end_unlink_async (ehci);
1247 		return;
1248 	}
1249 
1250 	cmd |= CMD_IAAD;
1251 	ehci_writel(ehci, cmd, &ehci->regs->command);
1252 	(void)ehci_readl(ehci, &ehci->regs->command);
1253 	iaa_watchdog_start(ehci);
1254 }
1255 
1256 /*-------------------------------------------------------------------------*/
1257 
1258 static void scan_async (struct ehci_hcd *ehci)
1259 {
1260 	struct ehci_qh		*qh;
1261 	enum ehci_timer_action	action = TIMER_IO_WATCHDOG;
1262 
1263 	ehci->stamp = ehci_readl(ehci, &ehci->regs->frame_index);
1264 	timer_action_done (ehci, TIMER_ASYNC_SHRINK);
1265 rescan:
1266 	qh = ehci->async->qh_next.qh;
1267 	if (likely (qh != NULL)) {
1268 		do {
1269 			/* clean any finished work for this qh */
1270 			if (!list_empty (&qh->qtd_list)
1271 					&& qh->stamp != ehci->stamp) {
1272 				int temp;
1273 
1274 				/* unlinks could happen here; completion
1275 				 * reporting drops the lock.  rescan using
1276 				 * the latest schedule, but don't rescan
1277 				 * qhs we already finished (no looping).
1278 				 */
1279 				qh = qh_get (qh);
1280 				qh->stamp = ehci->stamp;
1281 				temp = qh_completions (ehci, qh);
1282 				if (qh->needs_rescan)
1283 					unlink_async(ehci, qh);
1284 				qh_put (qh);
1285 				if (temp != 0) {
1286 					goto rescan;
1287 				}
1288 			}
1289 
1290 			/* unlink idle entries, reducing DMA usage as well
1291 			 * as HCD schedule-scanning costs.  delay for any qh
1292 			 * we just scanned, there's a not-unusual case that it
1293 			 * doesn't stay idle for long.
1294 			 * (plus, avoids some kind of re-activation race.)
1295 			 */
1296 			if (list_empty(&qh->qtd_list)
1297 					&& qh->qh_state == QH_STATE_LINKED) {
1298 				if (!ehci->reclaim
1299 					&& ((ehci->stamp - qh->stamp) & 0x1fff)
1300 						>= (EHCI_SHRINK_FRAMES * 8))
1301 					start_unlink_async(ehci, qh);
1302 				else
1303 					action = TIMER_ASYNC_SHRINK;
1304 			}
1305 
1306 			qh = qh->qh_next.qh;
1307 		} while (qh);
1308 	}
1309 	if (action == TIMER_ASYNC_SHRINK)
1310 		timer_action (ehci, TIMER_ASYNC_SHRINK);
1311 }
1312