1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * drivers/usb/host/ehci-orion.c 4 * 5 * Tzachi Perelstein <tzachi@marvell.com> 6 */ 7 8 #include <linux/kernel.h> 9 #include <linux/module.h> 10 #include <linux/platform_device.h> 11 #include <linux/mbus.h> 12 #include <linux/clk.h> 13 #include <linux/platform_data/usb-ehci-orion.h> 14 #include <linux/of.h> 15 #include <linux/phy/phy.h> 16 #include <linux/of_device.h> 17 #include <linux/of_irq.h> 18 #include <linux/usb.h> 19 #include <linux/usb/hcd.h> 20 #include <linux/io.h> 21 #include <linux/dma-mapping.h> 22 23 #include "ehci.h" 24 25 #define rdl(off) readl_relaxed(hcd->regs + (off)) 26 #define wrl(off, val) writel_relaxed((val), hcd->regs + (off)) 27 28 #define USB_CMD 0x140 29 #define USB_CMD_RUN BIT(0) 30 #define USB_CMD_RESET BIT(1) 31 #define USB_MODE 0x1a8 32 #define USB_MODE_MASK GENMASK(1, 0) 33 #define USB_MODE_DEVICE 0x2 34 #define USB_MODE_HOST 0x3 35 #define USB_MODE_SDIS BIT(4) 36 #define USB_CAUSE 0x310 37 #define USB_MASK 0x314 38 #define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4)) 39 #define USB_WINDOW_BASE(i) (0x324 + ((i) << 4)) 40 #define USB_IPG 0x360 41 #define USB_PHY_PWR_CTRL 0x400 42 #define USB_PHY_TX_CTRL 0x420 43 #define USB_PHY_RX_CTRL 0x430 44 #define USB_PHY_IVREF_CTRL 0x440 45 #define USB_PHY_TST_GRP_CTRL 0x450 46 47 #define USB_SBUSCFG 0x90 48 49 /* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */ 50 #define USB_SBUSCFG_BAWR_ALIGN_128B (0x3 << 6) 51 #define USB_SBUSCFG_BARD_ALIGN_128B (0x3 << 3) 52 /* AHBBRST = 3 : Align AHB Burst to INCR16 (64 bytes) */ 53 #define USB_SBUSCFG_AHBBRST_INCR16 (0x3 << 0) 54 55 #define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B \ 56 | USB_SBUSCFG_BARD_ALIGN_128B \ 57 | USB_SBUSCFG_AHBBRST_INCR16) 58 59 #define DRIVER_DESC "EHCI orion driver" 60 61 #define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv) 62 63 struct orion_ehci_hcd { 64 struct clk *clk; 65 struct phy *phy; 66 }; 67 68 static struct hc_driver __read_mostly ehci_orion_hc_driver; 69 70 /* 71 * Implement Orion USB controller specification guidelines 72 */ 73 static void orion_usb_phy_v1_setup(struct usb_hcd *hcd) 74 { 75 /* The below GLs are according to the Orion Errata document */ 76 /* 77 * Clear interrupt cause and mask 78 */ 79 wrl(USB_CAUSE, 0); 80 wrl(USB_MASK, 0); 81 82 /* 83 * Reset controller 84 */ 85 wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET); 86 while (rdl(USB_CMD) & USB_CMD_RESET); 87 88 /* 89 * GL# USB-10: Set IPG for non start of frame packets 90 * Bits[14:8]=0xc 91 */ 92 wrl(USB_IPG, (rdl(USB_IPG) & ~0x7f00) | 0xc00); 93 94 /* 95 * GL# USB-9: USB 2.0 Power Control 96 * BG_VSEL[7:6]=0x1 97 */ 98 wrl(USB_PHY_PWR_CTRL, (rdl(USB_PHY_PWR_CTRL) & ~0xc0)| 0x40); 99 100 /* 101 * GL# USB-1: USB PHY Tx Control - force calibration to '8' 102 * TXDATA_BLOCK_EN[21]=0x1, EXT_RCAL_EN[13]=0x1, IMP_CAL[6:3]=0x8 103 */ 104 wrl(USB_PHY_TX_CTRL, (rdl(USB_PHY_TX_CTRL) & ~0x78) | 0x202040); 105 106 /* 107 * GL# USB-3 GL# USB-9: USB PHY Rx Control 108 * RXDATA_BLOCK_LENGHT[31:30]=0x3, EDGE_DET_SEL[27:26]=0, 109 * CDR_FASTLOCK_EN[21]=0, DISCON_THRESHOLD[9:8]=0, SQ_THRESH[7:4]=0x1 110 */ 111 wrl(USB_PHY_RX_CTRL, (rdl(USB_PHY_RX_CTRL) & ~0xc2003f0) | 0xc0000010); 112 113 /* 114 * GL# USB-3 GL# USB-9: USB PHY IVREF Control 115 * PLLVDD12[1:0]=0x2, RXVDD[5:4]=0x3, Reserved[19]=0 116 */ 117 wrl(USB_PHY_IVREF_CTRL, (rdl(USB_PHY_IVREF_CTRL) & ~0x80003 ) | 0x32); 118 119 /* 120 * GL# USB-3 GL# USB-9: USB PHY Test Group Control 121 * REG_FIFO_SQ_RST[15]=0 122 */ 123 wrl(USB_PHY_TST_GRP_CTRL, rdl(USB_PHY_TST_GRP_CTRL) & ~0x8000); 124 125 /* 126 * Stop and reset controller 127 */ 128 wrl(USB_CMD, rdl(USB_CMD) & ~USB_CMD_RUN); 129 wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET); 130 while (rdl(USB_CMD) & USB_CMD_RESET); 131 132 /* 133 * GL# USB-5 Streaming disable REG_USB_MODE[4]=1 134 * TBD: This need to be done after each reset! 135 * GL# USB-4 Setup USB Host mode 136 */ 137 wrl(USB_MODE, USB_MODE_SDIS | USB_MODE_HOST); 138 } 139 140 static void 141 ehci_orion_conf_mbus_windows(struct usb_hcd *hcd, 142 const struct mbus_dram_target_info *dram) 143 { 144 int i; 145 146 for (i = 0; i < 4; i++) { 147 wrl(USB_WINDOW_CTRL(i), 0); 148 wrl(USB_WINDOW_BASE(i), 0); 149 } 150 151 for (i = 0; i < dram->num_cs; i++) { 152 const struct mbus_dram_window *cs = dram->cs + i; 153 154 wrl(USB_WINDOW_CTRL(i), ((cs->size - 1) & 0xffff0000) | 155 (cs->mbus_attr << 8) | 156 (dram->mbus_dram_target_id << 4) | 1); 157 wrl(USB_WINDOW_BASE(i), cs->base); 158 } 159 } 160 161 static int ehci_orion_drv_reset(struct usb_hcd *hcd) 162 { 163 struct device *dev = hcd->self.controller; 164 int ret; 165 166 ret = ehci_setup(hcd); 167 if (ret) 168 return ret; 169 170 /* 171 * For SoC without hlock, need to program sbuscfg value to guarantee 172 * AHB master's burst would not overrun or underrun FIFO. 173 * 174 * sbuscfg reg has to be set after usb controller reset, otherwise 175 * the value would be override to 0. 176 */ 177 if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci")) 178 wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL); 179 180 return ret; 181 } 182 183 static int __maybe_unused ehci_orion_drv_suspend(struct device *dev) 184 { 185 struct usb_hcd *hcd = dev_get_drvdata(dev); 186 187 return ehci_suspend(hcd, device_may_wakeup(dev)); 188 } 189 190 static int __maybe_unused ehci_orion_drv_resume(struct device *dev) 191 { 192 struct usb_hcd *hcd = dev_get_drvdata(dev); 193 194 return ehci_resume(hcd, false); 195 } 196 197 static SIMPLE_DEV_PM_OPS(ehci_orion_pm_ops, ehci_orion_drv_suspend, 198 ehci_orion_drv_resume); 199 200 static const struct ehci_driver_overrides orion_overrides __initconst = { 201 .extra_priv_size = sizeof(struct orion_ehci_hcd), 202 .reset = ehci_orion_drv_reset, 203 }; 204 205 static int ehci_orion_drv_probe(struct platform_device *pdev) 206 { 207 struct orion_ehci_data *pd = dev_get_platdata(&pdev->dev); 208 const struct mbus_dram_target_info *dram; 209 struct resource *res; 210 struct usb_hcd *hcd; 211 struct ehci_hcd *ehci; 212 void __iomem *regs; 213 int irq, err; 214 enum orion_ehci_phy_ver phy_version; 215 struct orion_ehci_hcd *priv; 216 217 if (usb_disabled()) 218 return -ENODEV; 219 220 pr_debug("Initializing Orion-SoC USB Host Controller\n"); 221 222 irq = platform_get_irq(pdev, 0); 223 if (irq <= 0) { 224 err = -ENODEV; 225 goto err; 226 } 227 228 /* 229 * Right now device-tree probed devices don't get dma_mask 230 * set. Since shared usb code relies on it, set it here for 231 * now. Once we have dma capability bindings this can go away. 232 */ 233 err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 234 if (err) 235 goto err; 236 237 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 238 regs = devm_ioremap_resource(&pdev->dev, res); 239 if (IS_ERR(regs)) { 240 err = PTR_ERR(regs); 241 goto err; 242 } 243 244 hcd = usb_create_hcd(&ehci_orion_hc_driver, 245 &pdev->dev, dev_name(&pdev->dev)); 246 if (!hcd) { 247 err = -ENOMEM; 248 goto err; 249 } 250 251 hcd->rsrc_start = res->start; 252 hcd->rsrc_len = resource_size(res); 253 hcd->regs = regs; 254 255 ehci = hcd_to_ehci(hcd); 256 ehci->caps = hcd->regs + 0x100; 257 hcd->has_tt = 1; 258 259 priv = hcd_to_orion_priv(hcd); 260 /* 261 * Not all platforms can gate the clock, so it is not an error if 262 * the clock does not exists. 263 */ 264 priv->clk = devm_clk_get(&pdev->dev, NULL); 265 if (!IS_ERR(priv->clk)) { 266 err = clk_prepare_enable(priv->clk); 267 if (err) 268 goto err_put_hcd; 269 } 270 271 priv->phy = devm_phy_optional_get(&pdev->dev, "usb"); 272 if (IS_ERR(priv->phy)) { 273 err = PTR_ERR(priv->phy); 274 if (err != -ENOSYS) 275 goto err_dis_clk; 276 } 277 278 /* 279 * (Re-)program MBUS remapping windows if we are asked to. 280 */ 281 dram = mv_mbus_dram_info(); 282 if (dram) 283 ehci_orion_conf_mbus_windows(hcd, dram); 284 285 /* 286 * setup Orion USB controller. 287 */ 288 if (pdev->dev.of_node) 289 phy_version = EHCI_PHY_NA; 290 else 291 phy_version = pd->phy_version; 292 293 switch (phy_version) { 294 case EHCI_PHY_NA: /* dont change USB phy settings */ 295 break; 296 case EHCI_PHY_ORION: 297 orion_usb_phy_v1_setup(hcd); 298 break; 299 case EHCI_PHY_DD: 300 case EHCI_PHY_KW: 301 default: 302 dev_warn(&pdev->dev, "USB phy version isn't supported.\n"); 303 } 304 305 err = usb_add_hcd(hcd, irq, IRQF_SHARED); 306 if (err) 307 goto err_dis_clk; 308 309 device_wakeup_enable(hcd->self.controller); 310 return 0; 311 312 err_dis_clk: 313 if (!IS_ERR(priv->clk)) 314 clk_disable_unprepare(priv->clk); 315 err_put_hcd: 316 usb_put_hcd(hcd); 317 err: 318 dev_err(&pdev->dev, "init %s fail, %d\n", 319 dev_name(&pdev->dev), err); 320 321 return err; 322 } 323 324 static int ehci_orion_drv_remove(struct platform_device *pdev) 325 { 326 struct usb_hcd *hcd = platform_get_drvdata(pdev); 327 struct orion_ehci_hcd *priv = hcd_to_orion_priv(hcd); 328 329 usb_remove_hcd(hcd); 330 331 if (!IS_ERR(priv->clk)) 332 clk_disable_unprepare(priv->clk); 333 334 usb_put_hcd(hcd); 335 336 return 0; 337 } 338 339 static const struct of_device_id ehci_orion_dt_ids[] = { 340 { .compatible = "marvell,orion-ehci", }, 341 { .compatible = "marvell,armada-3700-ehci", }, 342 {}, 343 }; 344 MODULE_DEVICE_TABLE(of, ehci_orion_dt_ids); 345 346 static struct platform_driver ehci_orion_driver = { 347 .probe = ehci_orion_drv_probe, 348 .remove = ehci_orion_drv_remove, 349 .shutdown = usb_hcd_platform_shutdown, 350 .driver = { 351 .name = "orion-ehci", 352 .of_match_table = ehci_orion_dt_ids, 353 .pm = &ehci_orion_pm_ops, 354 }, 355 }; 356 357 static int __init ehci_orion_init(void) 358 { 359 if (usb_disabled()) 360 return -ENODEV; 361 362 ehci_init_driver(&ehci_orion_hc_driver, &orion_overrides); 363 return platform_driver_register(&ehci_orion_driver); 364 } 365 module_init(ehci_orion_init); 366 367 static void __exit ehci_orion_cleanup(void) 368 { 369 platform_driver_unregister(&ehci_orion_driver); 370 } 371 module_exit(ehci_orion_cleanup); 372 373 MODULE_DESCRIPTION(DRIVER_DESC); 374 MODULE_ALIAS("platform:orion-ehci"); 375 MODULE_AUTHOR("Tzachi Perelstein"); 376 MODULE_LICENSE("GPL v2"); 377