1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * drivers/usb/host/ehci-orion.c 4 * 5 * Tzachi Perelstein <tzachi@marvell.com> 6 */ 7 8 #include <linux/kernel.h> 9 #include <linux/module.h> 10 #include <linux/platform_device.h> 11 #include <linux/mbus.h> 12 #include <linux/clk.h> 13 #include <linux/platform_data/usb-ehci-orion.h> 14 #include <linux/of.h> 15 #include <linux/phy/phy.h> 16 #include <linux/of_device.h> 17 #include <linux/of_irq.h> 18 #include <linux/usb.h> 19 #include <linux/usb/hcd.h> 20 #include <linux/io.h> 21 #include <linux/dma-mapping.h> 22 23 #include "ehci.h" 24 25 #define rdl(off) readl_relaxed(hcd->regs + (off)) 26 #define wrl(off, val) writel_relaxed((val), hcd->regs + (off)) 27 28 #define USB_CMD 0x140 29 #define USB_CMD_RUN BIT(0) 30 #define USB_CMD_RESET BIT(1) 31 #define USB_MODE 0x1a8 32 #define USB_MODE_MASK GENMASK(1, 0) 33 #define USB_MODE_DEVICE 0x2 34 #define USB_MODE_HOST 0x3 35 #define USB_MODE_SDIS BIT(4) 36 #define USB_CAUSE 0x310 37 #define USB_MASK 0x314 38 #define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4)) 39 #define USB_WINDOW_BASE(i) (0x324 + ((i) << 4)) 40 #define USB_IPG 0x360 41 #define USB_PHY_PWR_CTRL 0x400 42 #define USB_PHY_TX_CTRL 0x420 43 #define USB_PHY_RX_CTRL 0x430 44 #define USB_PHY_IVREF_CTRL 0x440 45 #define USB_PHY_TST_GRP_CTRL 0x450 46 47 #define USB_SBUSCFG 0x90 48 49 /* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */ 50 #define USB_SBUSCFG_BAWR_ALIGN_128B (0x3 << 6) 51 #define USB_SBUSCFG_BARD_ALIGN_128B (0x3 << 3) 52 /* AHBBRST = 3 : Align AHB Burst to INCR16 (64 bytes) */ 53 #define USB_SBUSCFG_AHBBRST_INCR16 (0x3 << 0) 54 55 #define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B \ 56 | USB_SBUSCFG_BARD_ALIGN_128B \ 57 | USB_SBUSCFG_AHBBRST_INCR16) 58 59 #define DRIVER_DESC "EHCI orion driver" 60 61 #define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv) 62 63 struct orion_ehci_hcd { 64 struct clk *clk; 65 struct phy *phy; 66 }; 67 68 static const char hcd_name[] = "ehci-orion"; 69 70 static struct hc_driver __read_mostly ehci_orion_hc_driver; 71 72 /* 73 * Implement Orion USB controller specification guidelines 74 */ 75 static void orion_usb_phy_v1_setup(struct usb_hcd *hcd) 76 { 77 /* The below GLs are according to the Orion Errata document */ 78 /* 79 * Clear interrupt cause and mask 80 */ 81 wrl(USB_CAUSE, 0); 82 wrl(USB_MASK, 0); 83 84 /* 85 * Reset controller 86 */ 87 wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET); 88 while (rdl(USB_CMD) & USB_CMD_RESET); 89 90 /* 91 * GL# USB-10: Set IPG for non start of frame packets 92 * Bits[14:8]=0xc 93 */ 94 wrl(USB_IPG, (rdl(USB_IPG) & ~0x7f00) | 0xc00); 95 96 /* 97 * GL# USB-9: USB 2.0 Power Control 98 * BG_VSEL[7:6]=0x1 99 */ 100 wrl(USB_PHY_PWR_CTRL, (rdl(USB_PHY_PWR_CTRL) & ~0xc0)| 0x40); 101 102 /* 103 * GL# USB-1: USB PHY Tx Control - force calibration to '8' 104 * TXDATA_BLOCK_EN[21]=0x1, EXT_RCAL_EN[13]=0x1, IMP_CAL[6:3]=0x8 105 */ 106 wrl(USB_PHY_TX_CTRL, (rdl(USB_PHY_TX_CTRL) & ~0x78) | 0x202040); 107 108 /* 109 * GL# USB-3 GL# USB-9: USB PHY Rx Control 110 * RXDATA_BLOCK_LENGHT[31:30]=0x3, EDGE_DET_SEL[27:26]=0, 111 * CDR_FASTLOCK_EN[21]=0, DISCON_THRESHOLD[9:8]=0, SQ_THRESH[7:4]=0x1 112 */ 113 wrl(USB_PHY_RX_CTRL, (rdl(USB_PHY_RX_CTRL) & ~0xc2003f0) | 0xc0000010); 114 115 /* 116 * GL# USB-3 GL# USB-9: USB PHY IVREF Control 117 * PLLVDD12[1:0]=0x2, RXVDD[5:4]=0x3, Reserved[19]=0 118 */ 119 wrl(USB_PHY_IVREF_CTRL, (rdl(USB_PHY_IVREF_CTRL) & ~0x80003 ) | 0x32); 120 121 /* 122 * GL# USB-3 GL# USB-9: USB PHY Test Group Control 123 * REG_FIFO_SQ_RST[15]=0 124 */ 125 wrl(USB_PHY_TST_GRP_CTRL, rdl(USB_PHY_TST_GRP_CTRL) & ~0x8000); 126 127 /* 128 * Stop and reset controller 129 */ 130 wrl(USB_CMD, rdl(USB_CMD) & ~USB_CMD_RUN); 131 wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET); 132 while (rdl(USB_CMD) & USB_CMD_RESET); 133 134 /* 135 * GL# USB-5 Streaming disable REG_USB_MODE[4]=1 136 * TBD: This need to be done after each reset! 137 * GL# USB-4 Setup USB Host mode 138 */ 139 wrl(USB_MODE, USB_MODE_SDIS | USB_MODE_HOST); 140 } 141 142 static void 143 ehci_orion_conf_mbus_windows(struct usb_hcd *hcd, 144 const struct mbus_dram_target_info *dram) 145 { 146 int i; 147 148 for (i = 0; i < 4; i++) { 149 wrl(USB_WINDOW_CTRL(i), 0); 150 wrl(USB_WINDOW_BASE(i), 0); 151 } 152 153 for (i = 0; i < dram->num_cs; i++) { 154 const struct mbus_dram_window *cs = dram->cs + i; 155 156 wrl(USB_WINDOW_CTRL(i), ((cs->size - 1) & 0xffff0000) | 157 (cs->mbus_attr << 8) | 158 (dram->mbus_dram_target_id << 4) | 1); 159 wrl(USB_WINDOW_BASE(i), cs->base); 160 } 161 } 162 163 static int ehci_orion_drv_reset(struct usb_hcd *hcd) 164 { 165 struct device *dev = hcd->self.controller; 166 int ret; 167 168 ret = ehci_setup(hcd); 169 if (ret) 170 return ret; 171 172 /* 173 * For SoC without hlock, need to program sbuscfg value to guarantee 174 * AHB master's burst would not overrun or underrun FIFO. 175 * 176 * sbuscfg reg has to be set after usb controller reset, otherwise 177 * the value would be override to 0. 178 */ 179 if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci")) 180 wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL); 181 182 return ret; 183 } 184 185 static const struct ehci_driver_overrides orion_overrides __initconst = { 186 .extra_priv_size = sizeof(struct orion_ehci_hcd), 187 .reset = ehci_orion_drv_reset, 188 }; 189 190 static int ehci_orion_drv_probe(struct platform_device *pdev) 191 { 192 struct orion_ehci_data *pd = dev_get_platdata(&pdev->dev); 193 const struct mbus_dram_target_info *dram; 194 struct resource *res; 195 struct usb_hcd *hcd; 196 struct ehci_hcd *ehci; 197 void __iomem *regs; 198 int irq, err; 199 enum orion_ehci_phy_ver phy_version; 200 struct orion_ehci_hcd *priv; 201 202 if (usb_disabled()) 203 return -ENODEV; 204 205 pr_debug("Initializing Orion-SoC USB Host Controller\n"); 206 207 irq = platform_get_irq(pdev, 0); 208 if (irq <= 0) { 209 dev_err(&pdev->dev, 210 "Found HC with no IRQ. Check %s setup!\n", 211 dev_name(&pdev->dev)); 212 err = -ENODEV; 213 goto err; 214 } 215 216 /* 217 * Right now device-tree probed devices don't get dma_mask 218 * set. Since shared usb code relies on it, set it here for 219 * now. Once we have dma capability bindings this can go away. 220 */ 221 err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 222 if (err) 223 goto err; 224 225 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 226 regs = devm_ioremap_resource(&pdev->dev, res); 227 if (IS_ERR(regs)) { 228 err = PTR_ERR(regs); 229 goto err; 230 } 231 232 hcd = usb_create_hcd(&ehci_orion_hc_driver, 233 &pdev->dev, dev_name(&pdev->dev)); 234 if (!hcd) { 235 err = -ENOMEM; 236 goto err; 237 } 238 239 hcd->rsrc_start = res->start; 240 hcd->rsrc_len = resource_size(res); 241 hcd->regs = regs; 242 243 ehci = hcd_to_ehci(hcd); 244 ehci->caps = hcd->regs + 0x100; 245 hcd->has_tt = 1; 246 247 priv = hcd_to_orion_priv(hcd); 248 /* 249 * Not all platforms can gate the clock, so it is not an error if 250 * the clock does not exists. 251 */ 252 priv->clk = devm_clk_get(&pdev->dev, NULL); 253 if (!IS_ERR(priv->clk)) 254 clk_prepare_enable(priv->clk); 255 256 priv->phy = devm_phy_optional_get(&pdev->dev, "usb"); 257 if (IS_ERR(priv->phy)) { 258 err = PTR_ERR(priv->phy); 259 if (err != -ENOSYS) 260 goto err_phy_get; 261 } else { 262 err = phy_init(priv->phy); 263 if (err) 264 goto err_phy_init; 265 266 err = phy_power_on(priv->phy); 267 if (err) 268 goto err_phy_power_on; 269 } 270 271 /* 272 * (Re-)program MBUS remapping windows if we are asked to. 273 */ 274 dram = mv_mbus_dram_info(); 275 if (dram) 276 ehci_orion_conf_mbus_windows(hcd, dram); 277 278 /* 279 * setup Orion USB controller. 280 */ 281 if (pdev->dev.of_node) 282 phy_version = EHCI_PHY_NA; 283 else 284 phy_version = pd->phy_version; 285 286 switch (phy_version) { 287 case EHCI_PHY_NA: /* dont change USB phy settings */ 288 break; 289 case EHCI_PHY_ORION: 290 orion_usb_phy_v1_setup(hcd); 291 break; 292 case EHCI_PHY_DD: 293 case EHCI_PHY_KW: 294 default: 295 dev_warn(&pdev->dev, "USB phy version isn't supported.\n"); 296 } 297 298 err = usb_add_hcd(hcd, irq, IRQF_SHARED); 299 if (err) 300 goto err_add_hcd; 301 302 device_wakeup_enable(hcd->self.controller); 303 return 0; 304 305 err_add_hcd: 306 if (!IS_ERR(priv->phy)) 307 phy_power_off(priv->phy); 308 err_phy_power_on: 309 if (!IS_ERR(priv->phy)) 310 phy_exit(priv->phy); 311 err_phy_init: 312 err_phy_get: 313 if (!IS_ERR(priv->clk)) 314 clk_disable_unprepare(priv->clk); 315 usb_put_hcd(hcd); 316 err: 317 dev_err(&pdev->dev, "init %s fail, %d\n", 318 dev_name(&pdev->dev), err); 319 320 return err; 321 } 322 323 static int ehci_orion_drv_remove(struct platform_device *pdev) 324 { 325 struct usb_hcd *hcd = platform_get_drvdata(pdev); 326 struct orion_ehci_hcd *priv = hcd_to_orion_priv(hcd); 327 328 usb_remove_hcd(hcd); 329 330 if (!IS_ERR(priv->phy)) { 331 phy_power_off(priv->phy); 332 phy_exit(priv->phy); 333 } 334 335 if (!IS_ERR(priv->clk)) 336 clk_disable_unprepare(priv->clk); 337 338 usb_put_hcd(hcd); 339 340 return 0; 341 } 342 343 static const struct of_device_id ehci_orion_dt_ids[] = { 344 { .compatible = "marvell,orion-ehci", }, 345 { .compatible = "marvell,armada-3700-ehci", }, 346 {}, 347 }; 348 MODULE_DEVICE_TABLE(of, ehci_orion_dt_ids); 349 350 static struct platform_driver ehci_orion_driver = { 351 .probe = ehci_orion_drv_probe, 352 .remove = ehci_orion_drv_remove, 353 .shutdown = usb_hcd_platform_shutdown, 354 .driver = { 355 .name = "orion-ehci", 356 .of_match_table = ehci_orion_dt_ids, 357 }, 358 }; 359 360 static int __init ehci_orion_init(void) 361 { 362 if (usb_disabled()) 363 return -ENODEV; 364 365 pr_info("%s: " DRIVER_DESC "\n", hcd_name); 366 367 ehci_init_driver(&ehci_orion_hc_driver, &orion_overrides); 368 return platform_driver_register(&ehci_orion_driver); 369 } 370 module_init(ehci_orion_init); 371 372 static void __exit ehci_orion_cleanup(void) 373 { 374 platform_driver_unregister(&ehci_orion_driver); 375 } 376 module_exit(ehci_orion_cleanup); 377 378 MODULE_DESCRIPTION(DRIVER_DESC); 379 MODULE_ALIAS("platform:orion-ehci"); 380 MODULE_AUTHOR("Tzachi Perelstein"); 381 MODULE_LICENSE("GPL v2"); 382