1 /* 2 * Copyright (c) 2001 by David Brownell 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the 6 * Free Software Foundation; either version 2 of the License, or (at your 7 * option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, but 10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software Foundation, 16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 */ 18 19 /* this file is part of ehci-hcd.c */ 20 21 /*-------------------------------------------------------------------------*/ 22 23 /* 24 * There's basically three types of memory: 25 * - data used only by the HCD ... kmalloc is fine 26 * - async and periodic schedules, shared by HC and HCD ... these 27 * need to use dma_pool or dma_alloc_coherent 28 * - driver buffers, read/written by HC ... single shot DMA mapped 29 * 30 * There's also "register" data (e.g. PCI or SOC), which is memory mapped. 31 * No memory seen by this driver is pageable. 32 */ 33 34 /*-------------------------------------------------------------------------*/ 35 36 /* Allocate the key transfer structures from the previously allocated pool */ 37 38 static inline void ehci_qtd_init(struct ehci_hcd *ehci, struct ehci_qtd *qtd, 39 dma_addr_t dma) 40 { 41 memset (qtd, 0, sizeof *qtd); 42 qtd->qtd_dma = dma; 43 qtd->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT); 44 qtd->hw_next = EHCI_LIST_END(ehci); 45 qtd->hw_alt_next = EHCI_LIST_END(ehci); 46 INIT_LIST_HEAD (&qtd->qtd_list); 47 } 48 49 static struct ehci_qtd *ehci_qtd_alloc (struct ehci_hcd *ehci, gfp_t flags) 50 { 51 struct ehci_qtd *qtd; 52 dma_addr_t dma; 53 54 qtd = dma_pool_alloc (ehci->qtd_pool, flags, &dma); 55 if (qtd != NULL) { 56 ehci_qtd_init(ehci, qtd, dma); 57 } 58 return qtd; 59 } 60 61 static inline void ehci_qtd_free (struct ehci_hcd *ehci, struct ehci_qtd *qtd) 62 { 63 dma_pool_free (ehci->qtd_pool, qtd, qtd->qtd_dma); 64 } 65 66 67 static void qh_destroy(struct ehci_hcd *ehci, struct ehci_qh *qh) 68 { 69 /* clean qtds first, and know this is not linked */ 70 if (!list_empty (&qh->qtd_list) || qh->qh_next.ptr) { 71 ehci_dbg (ehci, "unused qh not empty!\n"); 72 BUG (); 73 } 74 if (qh->dummy) 75 ehci_qtd_free (ehci, qh->dummy); 76 dma_pool_free(ehci->qh_pool, qh->hw, qh->qh_dma); 77 kfree(qh); 78 } 79 80 static struct ehci_qh *ehci_qh_alloc (struct ehci_hcd *ehci, gfp_t flags) 81 { 82 struct ehci_qh *qh; 83 dma_addr_t dma; 84 85 qh = kzalloc(sizeof *qh, GFP_ATOMIC); 86 if (!qh) 87 goto done; 88 qh->hw = (struct ehci_qh_hw *) 89 dma_pool_alloc(ehci->qh_pool, flags, &dma); 90 if (!qh->hw) 91 goto fail; 92 memset(qh->hw, 0, sizeof *qh->hw); 93 qh->qh_dma = dma; 94 // INIT_LIST_HEAD (&qh->qh_list); 95 INIT_LIST_HEAD (&qh->qtd_list); 96 97 /* dummy td enables safe urb queuing */ 98 qh->dummy = ehci_qtd_alloc (ehci, flags); 99 if (qh->dummy == NULL) { 100 ehci_dbg (ehci, "no dummy td\n"); 101 goto fail1; 102 } 103 done: 104 return qh; 105 fail1: 106 dma_pool_free(ehci->qh_pool, qh->hw, qh->qh_dma); 107 fail: 108 kfree(qh); 109 return NULL; 110 } 111 112 /*-------------------------------------------------------------------------*/ 113 114 /* The queue heads and transfer descriptors are managed from pools tied 115 * to each of the "per device" structures. 116 * This is the initialisation and cleanup code. 117 */ 118 119 static void ehci_mem_cleanup (struct ehci_hcd *ehci) 120 { 121 if (ehci->async) 122 qh_destroy(ehci, ehci->async); 123 ehci->async = NULL; 124 125 if (ehci->dummy) 126 qh_destroy(ehci, ehci->dummy); 127 ehci->dummy = NULL; 128 129 /* DMA consistent memory and pools */ 130 if (ehci->qtd_pool) 131 dma_pool_destroy (ehci->qtd_pool); 132 ehci->qtd_pool = NULL; 133 134 if (ehci->qh_pool) { 135 dma_pool_destroy (ehci->qh_pool); 136 ehci->qh_pool = NULL; 137 } 138 139 if (ehci->itd_pool) 140 dma_pool_destroy (ehci->itd_pool); 141 ehci->itd_pool = NULL; 142 143 if (ehci->sitd_pool) 144 dma_pool_destroy (ehci->sitd_pool); 145 ehci->sitd_pool = NULL; 146 147 if (ehci->periodic) 148 dma_free_coherent (ehci_to_hcd(ehci)->self.controller, 149 ehci->periodic_size * sizeof (u32), 150 ehci->periodic, ehci->periodic_dma); 151 ehci->periodic = NULL; 152 153 /* shadow periodic table */ 154 kfree(ehci->pshadow); 155 ehci->pshadow = NULL; 156 } 157 158 /* remember to add cleanup code (above) if you add anything here */ 159 static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags) 160 { 161 int i; 162 163 /* QTDs for control/bulk/intr transfers */ 164 ehci->qtd_pool = dma_pool_create ("ehci_qtd", 165 ehci_to_hcd(ehci)->self.controller, 166 sizeof (struct ehci_qtd), 167 32 /* byte alignment (for hw parts) */, 168 4096 /* can't cross 4K */); 169 if (!ehci->qtd_pool) { 170 goto fail; 171 } 172 173 /* QHs for control/bulk/intr transfers */ 174 ehci->qh_pool = dma_pool_create ("ehci_qh", 175 ehci_to_hcd(ehci)->self.controller, 176 sizeof(struct ehci_qh_hw), 177 32 /* byte alignment (for hw parts) */, 178 4096 /* can't cross 4K */); 179 if (!ehci->qh_pool) { 180 goto fail; 181 } 182 ehci->async = ehci_qh_alloc (ehci, flags); 183 if (!ehci->async) { 184 goto fail; 185 } 186 187 /* ITD for high speed ISO transfers */ 188 ehci->itd_pool = dma_pool_create ("ehci_itd", 189 ehci_to_hcd(ehci)->self.controller, 190 sizeof (struct ehci_itd), 191 32 /* byte alignment (for hw parts) */, 192 4096 /* can't cross 4K */); 193 if (!ehci->itd_pool) { 194 goto fail; 195 } 196 197 /* SITD for full/low speed split ISO transfers */ 198 ehci->sitd_pool = dma_pool_create ("ehci_sitd", 199 ehci_to_hcd(ehci)->self.controller, 200 sizeof (struct ehci_sitd), 201 32 /* byte alignment (for hw parts) */, 202 4096 /* can't cross 4K */); 203 if (!ehci->sitd_pool) { 204 goto fail; 205 } 206 207 /* Hardware periodic table */ 208 ehci->periodic = (__le32 *) 209 dma_alloc_coherent (ehci_to_hcd(ehci)->self.controller, 210 ehci->periodic_size * sizeof(__le32), 211 &ehci->periodic_dma, 0); 212 if (ehci->periodic == NULL) { 213 goto fail; 214 } 215 216 if (ehci->use_dummy_qh) { 217 struct ehci_qh_hw *hw; 218 ehci->dummy = ehci_qh_alloc(ehci, flags); 219 if (!ehci->dummy) 220 goto fail; 221 222 hw = ehci->dummy->hw; 223 hw->hw_next = EHCI_LIST_END(ehci); 224 hw->hw_qtd_next = EHCI_LIST_END(ehci); 225 hw->hw_alt_next = EHCI_LIST_END(ehci); 226 hw->hw_token &= ~QTD_STS_ACTIVE; 227 ehci->dummy->hw = hw; 228 229 for (i = 0; i < ehci->periodic_size; i++) 230 ehci->periodic[i] = ehci->dummy->qh_dma; 231 } else { 232 for (i = 0; i < ehci->periodic_size; i++) 233 ehci->periodic[i] = EHCI_LIST_END(ehci); 234 } 235 236 /* software shadow of hardware table */ 237 ehci->pshadow = kcalloc(ehci->periodic_size, sizeof(void *), flags); 238 if (ehci->pshadow != NULL) 239 return 0; 240 241 fail: 242 ehci_dbg (ehci, "couldn't init memory\n"); 243 ehci_mem_cleanup (ehci); 244 return -ENOMEM; 245 } 246