xref: /openbmc/linux/drivers/usb/host/ehci-hcd.c (revision a9d85efb)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Enhanced Host Controller Interface (EHCI) driver for USB.
4  *
5  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6  *
7  * Copyright (c) 2000-2004 by David Brownell
8  */
9 
10 #include <linux/module.h>
11 #include <linux/pci.h>
12 #include <linux/dmapool.h>
13 #include <linux/kernel.h>
14 #include <linux/delay.h>
15 #include <linux/ioport.h>
16 #include <linux/sched.h>
17 #include <linux/vmalloc.h>
18 #include <linux/errno.h>
19 #include <linux/init.h>
20 #include <linux/hrtimer.h>
21 #include <linux/list.h>
22 #include <linux/interrupt.h>
23 #include <linux/usb.h>
24 #include <linux/usb/hcd.h>
25 #include <linux/usb/otg.h>
26 #include <linux/moduleparam.h>
27 #include <linux/dma-mapping.h>
28 #include <linux/debugfs.h>
29 #include <linux/platform_device.h>
30 #include <linux/slab.h>
31 
32 #include <asm/byteorder.h>
33 #include <asm/io.h>
34 #include <asm/irq.h>
35 #include <asm/unaligned.h>
36 
37 #if defined(CONFIG_PPC_PS3)
38 #include <asm/firmware.h>
39 #endif
40 
41 /*-------------------------------------------------------------------------*/
42 
43 /*
44  * EHCI hc_driver implementation ... experimental, incomplete.
45  * Based on the final 1.0 register interface specification.
46  *
47  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
48  * First was PCMCIA, like ISA; then CardBus, which is PCI.
49  * Next comes "CardBay", using USB 2.0 signals.
50  *
51  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
52  * Special thanks to Intel and VIA for providing host controllers to
53  * test this driver on, and Cypress (including In-System Design) for
54  * providing early devices for those host controllers to talk to!
55  */
56 
57 #define DRIVER_AUTHOR "David Brownell"
58 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
59 
60 static const char	hcd_name [] = "ehci_hcd";
61 
62 
63 #undef EHCI_URB_TRACE
64 
65 /* magic numbers that can affect system performance */
66 #define	EHCI_TUNE_CERR		3	/* 0-3 qtd retries; 0 == don't stop */
67 #define	EHCI_TUNE_RL_HS		4	/* nak throttle; see 4.9 */
68 #define	EHCI_TUNE_RL_TT		0
69 #define	EHCI_TUNE_MULT_HS	1	/* 1-3 transactions/uframe; 4.10.3 */
70 #define	EHCI_TUNE_MULT_TT	1
71 /*
72  * Some drivers think it's safe to schedule isochronous transfers more than
73  * 256 ms into the future (partly as a result of an old bug in the scheduling
74  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
75  * length of 512 frames instead of 256.
76  */
77 #define	EHCI_TUNE_FLS		1	/* (medium) 512-frame schedule */
78 
79 /* Initial IRQ latency:  faster than hw default */
80 static int log2_irq_thresh;		// 0 to 6
81 module_param (log2_irq_thresh, int, S_IRUGO);
82 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
83 
84 /* initial park setting:  slower than hw default */
85 static unsigned park;
86 module_param (park, uint, S_IRUGO);
87 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
88 
89 /* for flakey hardware, ignore overcurrent indicators */
90 static bool ignore_oc;
91 module_param (ignore_oc, bool, S_IRUGO);
92 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
93 
94 #define	INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
95 
96 /*-------------------------------------------------------------------------*/
97 
98 #include "ehci.h"
99 #include "pci-quirks.h"
100 
101 static void compute_tt_budget(u8 budget_table[EHCI_BANDWIDTH_SIZE],
102 		struct ehci_tt *tt);
103 
104 /*
105  * The MosChip MCS9990 controller updates its microframe counter
106  * a little before the frame counter, and occasionally we will read
107  * the invalid intermediate value.  Avoid problems by checking the
108  * microframe number (the low-order 3 bits); if they are 0 then
109  * re-read the register to get the correct value.
110  */
111 static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
112 {
113 	unsigned uf;
114 
115 	uf = ehci_readl(ehci, &ehci->regs->frame_index);
116 	if (unlikely((uf & 7) == 0))
117 		uf = ehci_readl(ehci, &ehci->regs->frame_index);
118 	return uf;
119 }
120 
121 static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
122 {
123 	if (ehci->frame_index_bug)
124 		return ehci_moschip_read_frame_index(ehci);
125 	return ehci_readl(ehci, &ehci->regs->frame_index);
126 }
127 
128 #include "ehci-dbg.c"
129 
130 /*-------------------------------------------------------------------------*/
131 
132 /*
133  * ehci_handshake - spin reading hc until handshake completes or fails
134  * @ptr: address of hc register to be read
135  * @mask: bits to look at in result of read
136  * @done: value of those bits when handshake succeeds
137  * @usec: timeout in microseconds
138  *
139  * Returns negative errno, or zero on success
140  *
141  * Success happens when the "mask" bits have the specified value (hardware
142  * handshake done).  There are two failure modes:  "usec" have passed (major
143  * hardware flakeout), or the register reads as all-ones (hardware removed).
144  *
145  * That last failure should_only happen in cases like physical cardbus eject
146  * before driver shutdown. But it also seems to be caused by bugs in cardbus
147  * bridge shutdown:  shutting down the bridge before the devices using it.
148  */
149 int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
150 		   u32 mask, u32 done, int usec)
151 {
152 	u32	result;
153 
154 	do {
155 		result = ehci_readl(ehci, ptr);
156 		if (result == ~(u32)0)		/* card removed */
157 			return -ENODEV;
158 		result &= mask;
159 		if (result == done)
160 			return 0;
161 		udelay (1);
162 		usec--;
163 	} while (usec > 0);
164 	return -ETIMEDOUT;
165 }
166 EXPORT_SYMBOL_GPL(ehci_handshake);
167 
168 /* check TDI/ARC silicon is in host mode */
169 static int tdi_in_host_mode (struct ehci_hcd *ehci)
170 {
171 	u32		tmp;
172 
173 	tmp = ehci_readl(ehci, &ehci->regs->usbmode);
174 	return (tmp & 3) == USBMODE_CM_HC;
175 }
176 
177 /*
178  * Force HC to halt state from unknown (EHCI spec section 2.3).
179  * Must be called with interrupts enabled and the lock not held.
180  */
181 static int ehci_halt (struct ehci_hcd *ehci)
182 {
183 	u32	temp;
184 
185 	spin_lock_irq(&ehci->lock);
186 
187 	/* disable any irqs left enabled by previous code */
188 	ehci_writel(ehci, 0, &ehci->regs->intr_enable);
189 
190 	if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
191 		spin_unlock_irq(&ehci->lock);
192 		return 0;
193 	}
194 
195 	/*
196 	 * This routine gets called during probe before ehci->command
197 	 * has been initialized, so we can't rely on its value.
198 	 */
199 	ehci->command &= ~CMD_RUN;
200 	temp = ehci_readl(ehci, &ehci->regs->command);
201 	temp &= ~(CMD_RUN | CMD_IAAD);
202 	ehci_writel(ehci, temp, &ehci->regs->command);
203 
204 	spin_unlock_irq(&ehci->lock);
205 	synchronize_irq(ehci_to_hcd(ehci)->irq);
206 
207 	return ehci_handshake(ehci, &ehci->regs->status,
208 			  STS_HALT, STS_HALT, 16 * 125);
209 }
210 
211 /* put TDI/ARC silicon into EHCI mode */
212 static void tdi_reset (struct ehci_hcd *ehci)
213 {
214 	u32		tmp;
215 
216 	tmp = ehci_readl(ehci, &ehci->regs->usbmode);
217 	tmp |= USBMODE_CM_HC;
218 	/* The default byte access to MMR space is LE after
219 	 * controller reset. Set the required endian mode
220 	 * for transfer buffers to match the host microprocessor
221 	 */
222 	if (ehci_big_endian_mmio(ehci))
223 		tmp |= USBMODE_BE;
224 	ehci_writel(ehci, tmp, &ehci->regs->usbmode);
225 }
226 
227 /*
228  * Reset a non-running (STS_HALT == 1) controller.
229  * Must be called with interrupts enabled and the lock not held.
230  */
231 int ehci_reset(struct ehci_hcd *ehci)
232 {
233 	int	retval;
234 	u32	command = ehci_readl(ehci, &ehci->regs->command);
235 
236 	/* If the EHCI debug controller is active, special care must be
237 	 * taken before and after a host controller reset */
238 	if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
239 		ehci->debug = NULL;
240 
241 	command |= CMD_RESET;
242 	dbg_cmd (ehci, "reset", command);
243 	ehci_writel(ehci, command, &ehci->regs->command);
244 	ehci->rh_state = EHCI_RH_HALTED;
245 	ehci->next_statechange = jiffies;
246 	retval = ehci_handshake(ehci, &ehci->regs->command,
247 			    CMD_RESET, 0, 250 * 1000);
248 
249 	if (ehci->has_hostpc) {
250 		ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
251 				&ehci->regs->usbmode_ex);
252 		ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
253 	}
254 	if (retval)
255 		return retval;
256 
257 	if (ehci_is_TDI(ehci))
258 		tdi_reset (ehci);
259 
260 	if (ehci->debug)
261 		dbgp_external_startup(ehci_to_hcd(ehci));
262 
263 	ehci->port_c_suspend = ehci->suspended_ports =
264 			ehci->resuming_ports = 0;
265 	return retval;
266 }
267 EXPORT_SYMBOL_GPL(ehci_reset);
268 
269 /*
270  * Idle the controller (turn off the schedules).
271  * Must be called with interrupts enabled and the lock not held.
272  */
273 static void ehci_quiesce (struct ehci_hcd *ehci)
274 {
275 	u32	temp;
276 
277 	if (ehci->rh_state != EHCI_RH_RUNNING)
278 		return;
279 
280 	/* wait for any schedule enables/disables to take effect */
281 	temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
282 	ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp,
283 			16 * 125);
284 
285 	/* then disable anything that's still active */
286 	spin_lock_irq(&ehci->lock);
287 	ehci->command &= ~(CMD_ASE | CMD_PSE);
288 	ehci_writel(ehci, ehci->command, &ehci->regs->command);
289 	spin_unlock_irq(&ehci->lock);
290 
291 	/* hardware can take 16 microframes to turn off ... */
292 	ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0,
293 			16 * 125);
294 }
295 
296 /*-------------------------------------------------------------------------*/
297 
298 static void end_iaa_cycle(struct ehci_hcd *ehci);
299 static void end_unlink_async(struct ehci_hcd *ehci);
300 static void unlink_empty_async(struct ehci_hcd *ehci);
301 static void ehci_work(struct ehci_hcd *ehci);
302 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
303 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
304 static int ehci_port_power(struct ehci_hcd *ehci, int portnum, bool enable);
305 
306 #include "ehci-timer.c"
307 #include "ehci-hub.c"
308 #include "ehci-mem.c"
309 #include "ehci-q.c"
310 #include "ehci-sched.c"
311 #include "ehci-sysfs.c"
312 
313 /*-------------------------------------------------------------------------*/
314 
315 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
316  * The firmware seems to think that powering off is a wakeup event!
317  * This routine turns off remote wakeup and everything else, on all ports.
318  */
319 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
320 {
321 	int	port = HCS_N_PORTS(ehci->hcs_params);
322 
323 	while (port--) {
324 		spin_unlock_irq(&ehci->lock);
325 		ehci_port_power(ehci, port, false);
326 		spin_lock_irq(&ehci->lock);
327 		ehci_writel(ehci, PORT_RWC_BITS,
328 				&ehci->regs->port_status[port]);
329 	}
330 }
331 
332 /*
333  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
334  * Must be called with interrupts enabled and the lock not held.
335  */
336 static void ehci_silence_controller(struct ehci_hcd *ehci)
337 {
338 	ehci_halt(ehci);
339 
340 	spin_lock_irq(&ehci->lock);
341 	ehci->rh_state = EHCI_RH_HALTED;
342 	ehci_turn_off_all_ports(ehci);
343 
344 	/* make BIOS/etc use companion controller during reboot */
345 	ehci_writel(ehci, 0, &ehci->regs->configured_flag);
346 
347 	/* unblock posted writes */
348 	ehci_readl(ehci, &ehci->regs->configured_flag);
349 	spin_unlock_irq(&ehci->lock);
350 }
351 
352 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
353  * This forcibly disables dma and IRQs, helping kexec and other cases
354  * where the next system software may expect clean state.
355  */
356 static void ehci_shutdown(struct usb_hcd *hcd)
357 {
358 	struct ehci_hcd	*ehci = hcd_to_ehci(hcd);
359 
360 	/**
361 	 * Protect the system from crashing at system shutdown in cases where
362 	 * usb host is not added yet from OTG controller driver.
363 	 * As ehci_setup() not done yet, so stop accessing registers or
364 	 * variables initialized in ehci_setup()
365 	 */
366 	if (!ehci->sbrn)
367 		return;
368 
369 	spin_lock_irq(&ehci->lock);
370 	ehci->shutdown = true;
371 	ehci->rh_state = EHCI_RH_STOPPING;
372 	ehci->enabled_hrtimer_events = 0;
373 	spin_unlock_irq(&ehci->lock);
374 
375 	ehci_silence_controller(ehci);
376 
377 	hrtimer_cancel(&ehci->hrtimer);
378 }
379 
380 /*-------------------------------------------------------------------------*/
381 
382 /*
383  * ehci_work is called from some interrupts, timers, and so on.
384  * it calls driver completion functions, after dropping ehci->lock.
385  */
386 static void ehci_work (struct ehci_hcd *ehci)
387 {
388 	/* another CPU may drop ehci->lock during a schedule scan while
389 	 * it reports urb completions.  this flag guards against bogus
390 	 * attempts at re-entrant schedule scanning.
391 	 */
392 	if (ehci->scanning) {
393 		ehci->need_rescan = true;
394 		return;
395 	}
396 	ehci->scanning = true;
397 
398  rescan:
399 	ehci->need_rescan = false;
400 	if (ehci->async_count)
401 		scan_async(ehci);
402 	if (ehci->intr_count > 0)
403 		scan_intr(ehci);
404 	if (ehci->isoc_count > 0)
405 		scan_isoc(ehci);
406 	if (ehci->need_rescan)
407 		goto rescan;
408 	ehci->scanning = false;
409 
410 	/* the IO watchdog guards against hardware or driver bugs that
411 	 * misplace IRQs, and should let us run completely without IRQs.
412 	 * such lossage has been observed on both VT6202 and VT8235.
413 	 */
414 	turn_on_io_watchdog(ehci);
415 }
416 
417 /*
418  * Called when the ehci_hcd module is removed.
419  */
420 static void ehci_stop (struct usb_hcd *hcd)
421 {
422 	struct ehci_hcd		*ehci = hcd_to_ehci (hcd);
423 
424 	ehci_dbg (ehci, "stop\n");
425 
426 	/* no more interrupts ... */
427 
428 	spin_lock_irq(&ehci->lock);
429 	ehci->enabled_hrtimer_events = 0;
430 	spin_unlock_irq(&ehci->lock);
431 
432 	ehci_quiesce(ehci);
433 	ehci_silence_controller(ehci);
434 	ehci_reset (ehci);
435 
436 	hrtimer_cancel(&ehci->hrtimer);
437 	remove_sysfs_files(ehci);
438 	remove_debug_files (ehci);
439 
440 	/* root hub is shut down separately (first, when possible) */
441 	spin_lock_irq (&ehci->lock);
442 	end_free_itds(ehci);
443 	spin_unlock_irq (&ehci->lock);
444 	ehci_mem_cleanup (ehci);
445 
446 	if (ehci->amd_pll_fix == 1)
447 		usb_amd_dev_put();
448 
449 	dbg_status (ehci, "ehci_stop completed",
450 		    ehci_readl(ehci, &ehci->regs->status));
451 }
452 
453 /* one-time init, only for memory state */
454 static int ehci_init(struct usb_hcd *hcd)
455 {
456 	struct ehci_hcd		*ehci = hcd_to_ehci(hcd);
457 	u32			temp;
458 	int			retval;
459 	u32			hcc_params;
460 	struct ehci_qh_hw	*hw;
461 
462 	spin_lock_init(&ehci->lock);
463 
464 	/*
465 	 * keep io watchdog by default, those good HCDs could turn off it later
466 	 */
467 	ehci->need_io_watchdog = 1;
468 
469 	hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
470 	ehci->hrtimer.function = ehci_hrtimer_func;
471 	ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
472 
473 	hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
474 
475 	/*
476 	 * by default set standard 80% (== 100 usec/uframe) max periodic
477 	 * bandwidth as required by USB 2.0
478 	 */
479 	ehci->uframe_periodic_max = 100;
480 
481 	/*
482 	 * hw default: 1K periodic list heads, one per frame.
483 	 * periodic_size can shrink by USBCMD update if hcc_params allows.
484 	 */
485 	ehci->periodic_size = DEFAULT_I_TDPS;
486 	INIT_LIST_HEAD(&ehci->async_unlink);
487 	INIT_LIST_HEAD(&ehci->async_idle);
488 	INIT_LIST_HEAD(&ehci->intr_unlink_wait);
489 	INIT_LIST_HEAD(&ehci->intr_unlink);
490 	INIT_LIST_HEAD(&ehci->intr_qh_list);
491 	INIT_LIST_HEAD(&ehci->cached_itd_list);
492 	INIT_LIST_HEAD(&ehci->cached_sitd_list);
493 	INIT_LIST_HEAD(&ehci->tt_list);
494 
495 	if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
496 		/* periodic schedule size can be smaller than default */
497 		switch (EHCI_TUNE_FLS) {
498 		case 0: ehci->periodic_size = 1024; break;
499 		case 1: ehci->periodic_size = 512; break;
500 		case 2: ehci->periodic_size = 256; break;
501 		default:	BUG();
502 		}
503 	}
504 	if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
505 		return retval;
506 
507 	/* controllers may cache some of the periodic schedule ... */
508 	if (HCC_ISOC_CACHE(hcc_params))		// full frame cache
509 		ehci->i_thresh = 0;
510 	else					// N microframes cached
511 		ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
512 
513 	/*
514 	 * dedicate a qh for the async ring head, since we couldn't unlink
515 	 * a 'real' qh without stopping the async schedule [4.8].  use it
516 	 * as the 'reclamation list head' too.
517 	 * its dummy is used in hw_alt_next of many tds, to prevent the qh
518 	 * from automatically advancing to the next td after short reads.
519 	 */
520 	ehci->async->qh_next.qh = NULL;
521 	hw = ehci->async->hw;
522 	hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
523 	hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
524 #if defined(CONFIG_PPC_PS3)
525 	hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
526 #endif
527 	hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
528 	hw->hw_qtd_next = EHCI_LIST_END(ehci);
529 	ehci->async->qh_state = QH_STATE_LINKED;
530 	hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
531 
532 	/* clear interrupt enables, set irq latency */
533 	if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
534 		log2_irq_thresh = 0;
535 	temp = 1 << (16 + log2_irq_thresh);
536 	if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
537 		ehci->has_ppcd = 1;
538 		ehci_dbg(ehci, "enable per-port change event\n");
539 		temp |= CMD_PPCEE;
540 	}
541 	if (HCC_CANPARK(hcc_params)) {
542 		/* HW default park == 3, on hardware that supports it (like
543 		 * NVidia and ALI silicon), maximizes throughput on the async
544 		 * schedule by avoiding QH fetches between transfers.
545 		 *
546 		 * With fast usb storage devices and NForce2, "park" seems to
547 		 * make problems:  throughput reduction (!), data errors...
548 		 */
549 		if (park) {
550 			park = min(park, (unsigned) 3);
551 			temp |= CMD_PARK;
552 			temp |= park << 8;
553 		}
554 		ehci_dbg(ehci, "park %d\n", park);
555 	}
556 	if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
557 		/* periodic schedule size can be smaller than default */
558 		temp &= ~(3 << 2);
559 		temp |= (EHCI_TUNE_FLS << 2);
560 	}
561 	ehci->command = temp;
562 
563 	/* Accept arbitrarily long scatter-gather lists */
564 	if (!hcd->localmem_pool)
565 		hcd->self.sg_tablesize = ~0;
566 
567 	/* Prepare for unlinking active QHs */
568 	ehci->old_current = ~0;
569 	return 0;
570 }
571 
572 /* start HC running; it's halted, ehci_init() has been run (once) */
573 static int ehci_run (struct usb_hcd *hcd)
574 {
575 	struct ehci_hcd		*ehci = hcd_to_ehci (hcd);
576 	u32			temp;
577 	u32			hcc_params;
578 	int			rc;
579 
580 	hcd->uses_new_polling = 1;
581 
582 	/* EHCI spec section 4.1 */
583 
584 	ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
585 	ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
586 
587 	/*
588 	 * hcc_params controls whether ehci->regs->segment must (!!!)
589 	 * be used; it constrains QH/ITD/SITD and QTD locations.
590 	 * dma_pool consistent memory always uses segment zero.
591 	 * streaming mappings for I/O buffers, like pci_map_single(),
592 	 * can return segments above 4GB, if the device allows.
593 	 *
594 	 * NOTE:  the dma mask is visible through dev->dma_mask, so
595 	 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
596 	 * Scsi_Host.highmem_io, and so forth.  It's readonly to all
597 	 * host side drivers though.
598 	 */
599 	hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
600 	if (HCC_64BIT_ADDR(hcc_params)) {
601 		ehci_writel(ehci, 0, &ehci->regs->segment);
602 #if 0
603 // this is deeply broken on almost all architectures
604 		if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
605 			ehci_info(ehci, "enabled 64bit DMA\n");
606 #endif
607 	}
608 
609 
610 	// Philips, Intel, and maybe others need CMD_RUN before the
611 	// root hub will detect new devices (why?); NEC doesn't
612 	ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
613 	ehci->command |= CMD_RUN;
614 	ehci_writel(ehci, ehci->command, &ehci->regs->command);
615 	dbg_cmd (ehci, "init", ehci->command);
616 
617 	/*
618 	 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
619 	 * are explicitly handed to companion controller(s), so no TT is
620 	 * involved with the root hub.  (Except where one is integrated,
621 	 * and there's no companion controller unless maybe for USB OTG.)
622 	 *
623 	 * Turning on the CF flag will transfer ownership of all ports
624 	 * from the companions to the EHCI controller.  If any of the
625 	 * companions are in the middle of a port reset at the time, it
626 	 * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
627 	 * guarantees that no resets are in progress.  After we set CF,
628 	 * a short delay lets the hardware catch up; new resets shouldn't
629 	 * be started before the port switching actions could complete.
630 	 */
631 	down_write(&ehci_cf_port_reset_rwsem);
632 	ehci->rh_state = EHCI_RH_RUNNING;
633 	ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
634 
635 	/* Wait until HC become operational */
636 	ehci_readl(ehci, &ehci->regs->command);	/* unblock posted writes */
637 	msleep(5);
638 	rc = ehci_handshake(ehci, &ehci->regs->status, STS_HALT, 0, 100 * 1000);
639 
640 	up_write(&ehci_cf_port_reset_rwsem);
641 
642 	if (rc) {
643 		ehci_err(ehci, "USB %x.%x, controller refused to start: %d\n",
644 			 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), rc);
645 		return rc;
646 	}
647 
648 	ehci->last_periodic_enable = ktime_get_real();
649 
650 	temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
651 	ehci_info (ehci,
652 		"USB %x.%x started, EHCI %x.%02x%s\n",
653 		((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
654 		temp >> 8, temp & 0xff,
655 		(ignore_oc || ehci->spurious_oc) ? ", overcurrent ignored" : "");
656 
657 	ehci_writel(ehci, INTR_MASK,
658 		    &ehci->regs->intr_enable); /* Turn On Interrupts */
659 
660 	/* GRR this is run-once init(), being done every time the HC starts.
661 	 * So long as they're part of class devices, we can't do it init()
662 	 * since the class device isn't created that early.
663 	 */
664 	create_debug_files(ehci);
665 	create_sysfs_files(ehci);
666 
667 	return 0;
668 }
669 
670 int ehci_setup(struct usb_hcd *hcd)
671 {
672 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
673 	int retval;
674 
675 	ehci->regs = (void __iomem *)ehci->caps +
676 	    HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
677 	dbg_hcs_params(ehci, "reset");
678 	dbg_hcc_params(ehci, "reset");
679 
680 	/* cache this readonly data; minimize chip reads */
681 	ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
682 
683 	ehci->sbrn = HCD_USB2;
684 
685 	/* data structure init */
686 	retval = ehci_init(hcd);
687 	if (retval)
688 		return retval;
689 
690 	retval = ehci_halt(ehci);
691 	if (retval) {
692 		ehci_mem_cleanup(ehci);
693 		return retval;
694 	}
695 
696 	ehci_reset(ehci);
697 
698 	return 0;
699 }
700 EXPORT_SYMBOL_GPL(ehci_setup);
701 
702 /*-------------------------------------------------------------------------*/
703 
704 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
705 {
706 	struct ehci_hcd		*ehci = hcd_to_ehci (hcd);
707 	u32			status, current_status, masked_status, pcd_status = 0;
708 	u32			cmd;
709 	int			bh;
710 
711 	spin_lock(&ehci->lock);
712 
713 	status = 0;
714 	current_status = ehci_readl(ehci, &ehci->regs->status);
715 restart:
716 
717 	/* e.g. cardbus physical eject */
718 	if (current_status == ~(u32) 0) {
719 		ehci_dbg (ehci, "device removed\n");
720 		goto dead;
721 	}
722 	status |= current_status;
723 
724 	/*
725 	 * We don't use STS_FLR, but some controllers don't like it to
726 	 * remain on, so mask it out along with the other status bits.
727 	 */
728 	masked_status = current_status & (INTR_MASK | STS_FLR);
729 
730 	/* Shared IRQ? */
731 	if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
732 		spin_unlock(&ehci->lock);
733 		return IRQ_NONE;
734 	}
735 
736 	/* clear (just) interrupts */
737 	ehci_writel(ehci, masked_status, &ehci->regs->status);
738 
739 	/* For edge interrupts, don't race with an interrupt bit being raised */
740 	current_status = ehci_readl(ehci, &ehci->regs->status);
741 	if (current_status & INTR_MASK)
742 		goto restart;
743 
744 	cmd = ehci_readl(ehci, &ehci->regs->command);
745 	bh = 0;
746 
747 	/* normal [4.15.1.2] or error [4.15.1.1] completion */
748 	if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
749 		if (likely ((status & STS_ERR) == 0))
750 			INCR(ehci->stats.normal);
751 		else
752 			INCR(ehci->stats.error);
753 		bh = 1;
754 	}
755 
756 	/* complete the unlinking of some qh [4.15.2.3] */
757 	if (status & STS_IAA) {
758 
759 		/* Turn off the IAA watchdog */
760 		ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
761 
762 		/*
763 		 * Mild optimization: Allow another IAAD to reset the
764 		 * hrtimer, if one occurs before the next expiration.
765 		 * In theory we could always cancel the hrtimer, but
766 		 * tests show that about half the time it will be reset
767 		 * for some other event anyway.
768 		 */
769 		if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
770 			++ehci->next_hrtimer_event;
771 
772 		/* guard against (alleged) silicon errata */
773 		if (cmd & CMD_IAAD)
774 			ehci_dbg(ehci, "IAA with IAAD still set?\n");
775 		if (ehci->iaa_in_progress)
776 			INCR(ehci->stats.iaa);
777 		end_iaa_cycle(ehci);
778 	}
779 
780 	/* remote wakeup [4.3.1] */
781 	if (status & STS_PCD) {
782 		unsigned	i = HCS_N_PORTS (ehci->hcs_params);
783 		u32		ppcd = ~0;
784 
785 		/* kick root hub later */
786 		pcd_status = status;
787 
788 		/* resume root hub? */
789 		if (ehci->rh_state == EHCI_RH_SUSPENDED)
790 			usb_hcd_resume_root_hub(hcd);
791 
792 		/* get per-port change detect bits */
793 		if (ehci->has_ppcd)
794 			ppcd = status >> 16;
795 
796 		while (i--) {
797 			int pstatus;
798 
799 			/* leverage per-port change bits feature */
800 			if (!(ppcd & (1 << i)))
801 				continue;
802 			pstatus = ehci_readl(ehci,
803 					 &ehci->regs->port_status[i]);
804 
805 			if (pstatus & PORT_OWNER)
806 				continue;
807 			if (!(test_bit(i, &ehci->suspended_ports) &&
808 					((pstatus & PORT_RESUME) ||
809 						!(pstatus & PORT_SUSPEND)) &&
810 					(pstatus & PORT_PE) &&
811 					ehci->reset_done[i] == 0))
812 				continue;
813 
814 			/* start USB_RESUME_TIMEOUT msec resume signaling from
815 			 * this port, and make hub_wq collect
816 			 * PORT_STAT_C_SUSPEND to stop that signaling.
817 			 */
818 			ehci->reset_done[i] = jiffies +
819 				msecs_to_jiffies(USB_RESUME_TIMEOUT);
820 			set_bit(i, &ehci->resuming_ports);
821 			ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
822 			usb_hcd_start_port_resume(&hcd->self, i);
823 			mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
824 		}
825 	}
826 
827 	/* PCI errors [4.15.2.4] */
828 	if (unlikely ((status & STS_FATAL) != 0)) {
829 		ehci_err(ehci, "fatal error\n");
830 		dbg_cmd(ehci, "fatal", cmd);
831 		dbg_status(ehci, "fatal", status);
832 dead:
833 		usb_hc_died(hcd);
834 
835 		/* Don't let the controller do anything more */
836 		ehci->shutdown = true;
837 		ehci->rh_state = EHCI_RH_STOPPING;
838 		ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
839 		ehci_writel(ehci, ehci->command, &ehci->regs->command);
840 		ehci_writel(ehci, 0, &ehci->regs->intr_enable);
841 		ehci_handle_controller_death(ehci);
842 
843 		/* Handle completions when the controller stops */
844 		bh = 0;
845 	}
846 
847 	if (bh)
848 		ehci_work (ehci);
849 	spin_unlock(&ehci->lock);
850 	if (pcd_status)
851 		usb_hcd_poll_rh_status(hcd);
852 	return IRQ_HANDLED;
853 }
854 
855 /*-------------------------------------------------------------------------*/
856 
857 /*
858  * non-error returns are a promise to giveback() the urb later
859  * we drop ownership so next owner (or urb unlink) can get it
860  *
861  * urb + dev is in hcd.self.controller.urb_list
862  * we're queueing TDs onto software and hardware lists
863  *
864  * hcd-specific init for hcpriv hasn't been done yet
865  *
866  * NOTE:  control, bulk, and interrupt share the same code to append TDs
867  * to a (possibly active) QH, and the same QH scanning code.
868  */
869 static int ehci_urb_enqueue (
870 	struct usb_hcd	*hcd,
871 	struct urb	*urb,
872 	gfp_t		mem_flags
873 ) {
874 	struct ehci_hcd		*ehci = hcd_to_ehci (hcd);
875 	struct list_head	qtd_list;
876 
877 	INIT_LIST_HEAD (&qtd_list);
878 
879 	switch (usb_pipetype (urb->pipe)) {
880 	case PIPE_CONTROL:
881 		/* qh_completions() code doesn't handle all the fault cases
882 		 * in multi-TD control transfers.  Even 1KB is rare anyway.
883 		 */
884 		if (urb->transfer_buffer_length > (16 * 1024))
885 			return -EMSGSIZE;
886 		fallthrough;
887 	/* case PIPE_BULK: */
888 	default:
889 		if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
890 			return -ENOMEM;
891 		return submit_async(ehci, urb, &qtd_list, mem_flags);
892 
893 	case PIPE_INTERRUPT:
894 		if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
895 			return -ENOMEM;
896 		return intr_submit(ehci, urb, &qtd_list, mem_flags);
897 
898 	case PIPE_ISOCHRONOUS:
899 		if (urb->dev->speed == USB_SPEED_HIGH)
900 			return itd_submit (ehci, urb, mem_flags);
901 		else
902 			return sitd_submit (ehci, urb, mem_flags);
903 	}
904 }
905 
906 /* remove from hardware lists
907  * completions normally happen asynchronously
908  */
909 
910 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
911 {
912 	struct ehci_hcd		*ehci = hcd_to_ehci (hcd);
913 	struct ehci_qh		*qh;
914 	unsigned long		flags;
915 	int			rc;
916 
917 	spin_lock_irqsave (&ehci->lock, flags);
918 	rc = usb_hcd_check_unlink_urb(hcd, urb, status);
919 	if (rc)
920 		goto done;
921 
922 	if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
923 		/*
924 		 * We don't expedite dequeue for isochronous URBs.
925 		 * Just wait until they complete normally or their
926 		 * time slot expires.
927 		 */
928 	} else {
929 		qh = (struct ehci_qh *) urb->hcpriv;
930 		qh->unlink_reason |= QH_UNLINK_REQUESTED;
931 		switch (qh->qh_state) {
932 		case QH_STATE_LINKED:
933 			if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
934 				start_unlink_intr(ehci, qh);
935 			else
936 				start_unlink_async(ehci, qh);
937 			break;
938 		case QH_STATE_COMPLETING:
939 			qh->dequeue_during_giveback = 1;
940 			break;
941 		case QH_STATE_UNLINK:
942 		case QH_STATE_UNLINK_WAIT:
943 			/* already started */
944 			break;
945 		case QH_STATE_IDLE:
946 			/* QH might be waiting for a Clear-TT-Buffer */
947 			qh_completions(ehci, qh);
948 			break;
949 		}
950 	}
951 done:
952 	spin_unlock_irqrestore (&ehci->lock, flags);
953 	return rc;
954 }
955 
956 /*-------------------------------------------------------------------------*/
957 
958 // bulk qh holds the data toggle
959 
960 static void
961 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
962 {
963 	struct ehci_hcd		*ehci = hcd_to_ehci (hcd);
964 	unsigned long		flags;
965 	struct ehci_qh		*qh;
966 
967 	/* ASSERT:  any requests/urbs are being unlinked */
968 	/* ASSERT:  nobody can be submitting urbs for this any more */
969 
970 rescan:
971 	spin_lock_irqsave (&ehci->lock, flags);
972 	qh = ep->hcpriv;
973 	if (!qh)
974 		goto done;
975 
976 	/* endpoints can be iso streams.  for now, we don't
977 	 * accelerate iso completions ... so spin a while.
978 	 */
979 	if (qh->hw == NULL) {
980 		struct ehci_iso_stream	*stream = ep->hcpriv;
981 
982 		if (!list_empty(&stream->td_list))
983 			goto idle_timeout;
984 
985 		/* BUG_ON(!list_empty(&stream->free_list)); */
986 		reserve_release_iso_bandwidth(ehci, stream, -1);
987 		kfree(stream);
988 		goto done;
989 	}
990 
991 	qh->unlink_reason |= QH_UNLINK_REQUESTED;
992 	switch (qh->qh_state) {
993 	case QH_STATE_LINKED:
994 		if (list_empty(&qh->qtd_list))
995 			qh->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
996 		else
997 			WARN_ON(1);
998 		if (usb_endpoint_type(&ep->desc) != USB_ENDPOINT_XFER_INT)
999 			start_unlink_async(ehci, qh);
1000 		else
1001 			start_unlink_intr(ehci, qh);
1002 		fallthrough;
1003 	case QH_STATE_COMPLETING:	/* already in unlinking */
1004 	case QH_STATE_UNLINK:		/* wait for hw to finish? */
1005 	case QH_STATE_UNLINK_WAIT:
1006 idle_timeout:
1007 		spin_unlock_irqrestore (&ehci->lock, flags);
1008 		schedule_timeout_uninterruptible(1);
1009 		goto rescan;
1010 	case QH_STATE_IDLE:		/* fully unlinked */
1011 		if (qh->clearing_tt)
1012 			goto idle_timeout;
1013 		if (list_empty (&qh->qtd_list)) {
1014 			if (qh->ps.bw_uperiod)
1015 				reserve_release_intr_bandwidth(ehci, qh, -1);
1016 			qh_destroy(ehci, qh);
1017 			break;
1018 		}
1019 		fallthrough;
1020 	default:
1021 		/* caller was supposed to have unlinked any requests;
1022 		 * that's not our job.  just leak this memory.
1023 		 */
1024 		ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1025 			qh, ep->desc.bEndpointAddress, qh->qh_state,
1026 			list_empty (&qh->qtd_list) ? "" : "(has tds)");
1027 		break;
1028 	}
1029  done:
1030 	ep->hcpriv = NULL;
1031 	spin_unlock_irqrestore (&ehci->lock, flags);
1032 }
1033 
1034 static void
1035 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1036 {
1037 	struct ehci_hcd		*ehci = hcd_to_ehci(hcd);
1038 	struct ehci_qh		*qh;
1039 	int			eptype = usb_endpoint_type(&ep->desc);
1040 	int			epnum = usb_endpoint_num(&ep->desc);
1041 	int			is_out = usb_endpoint_dir_out(&ep->desc);
1042 	unsigned long		flags;
1043 
1044 	if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1045 		return;
1046 
1047 	spin_lock_irqsave(&ehci->lock, flags);
1048 	qh = ep->hcpriv;
1049 
1050 	/* For Bulk and Interrupt endpoints we maintain the toggle state
1051 	 * in the hardware; the toggle bits in udev aren't used at all.
1052 	 * When an endpoint is reset by usb_clear_halt() we must reset
1053 	 * the toggle bit in the QH.
1054 	 */
1055 	if (qh) {
1056 		if (!list_empty(&qh->qtd_list)) {
1057 			WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1058 		} else {
1059 			/* The toggle value in the QH can't be updated
1060 			 * while the QH is active.  Unlink it now;
1061 			 * re-linking will call qh_refresh().
1062 			 */
1063 			usb_settoggle(qh->ps.udev, epnum, is_out, 0);
1064 			qh->unlink_reason |= QH_UNLINK_REQUESTED;
1065 			if (eptype == USB_ENDPOINT_XFER_BULK)
1066 				start_unlink_async(ehci, qh);
1067 			else
1068 				start_unlink_intr(ehci, qh);
1069 		}
1070 	}
1071 	spin_unlock_irqrestore(&ehci->lock, flags);
1072 }
1073 
1074 static int ehci_get_frame (struct usb_hcd *hcd)
1075 {
1076 	struct ehci_hcd		*ehci = hcd_to_ehci (hcd);
1077 	return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1078 }
1079 
1080 /*-------------------------------------------------------------------------*/
1081 
1082 /* Device addition and removal */
1083 
1084 static void ehci_remove_device(struct usb_hcd *hcd, struct usb_device *udev)
1085 {
1086 	struct ehci_hcd		*ehci = hcd_to_ehci(hcd);
1087 
1088 	spin_lock_irq(&ehci->lock);
1089 	drop_tt(udev);
1090 	spin_unlock_irq(&ehci->lock);
1091 }
1092 
1093 /*-------------------------------------------------------------------------*/
1094 
1095 #ifdef	CONFIG_PM
1096 
1097 /* suspend/resume, section 4.3 */
1098 
1099 /* These routines handle the generic parts of controller suspend/resume */
1100 
1101 int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1102 {
1103 	struct ehci_hcd		*ehci = hcd_to_ehci(hcd);
1104 
1105 	if (time_before(jiffies, ehci->next_statechange))
1106 		msleep(10);
1107 
1108 	/*
1109 	 * Root hub was already suspended.  Disable IRQ emission and
1110 	 * mark HW unaccessible.  The PM and USB cores make sure that
1111 	 * the root hub is either suspended or stopped.
1112 	 */
1113 	ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1114 
1115 	spin_lock_irq(&ehci->lock);
1116 	ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1117 	(void) ehci_readl(ehci, &ehci->regs->intr_enable);
1118 
1119 	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1120 	spin_unlock_irq(&ehci->lock);
1121 
1122 	synchronize_irq(hcd->irq);
1123 
1124 	/* Check for race with a wakeup request */
1125 	if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1126 		ehci_resume(hcd, false);
1127 		return -EBUSY;
1128 	}
1129 
1130 	return 0;
1131 }
1132 EXPORT_SYMBOL_GPL(ehci_suspend);
1133 
1134 /* Returns 0 if power was preserved, 1 if power was lost */
1135 int ehci_resume(struct usb_hcd *hcd, bool force_reset)
1136 {
1137 	struct ehci_hcd		*ehci = hcd_to_ehci(hcd);
1138 
1139 	if (time_before(jiffies, ehci->next_statechange))
1140 		msleep(100);
1141 
1142 	/* Mark hardware accessible again as we are back to full power by now */
1143 	set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1144 
1145 	if (ehci->shutdown)
1146 		return 0;		/* Controller is dead */
1147 
1148 	/*
1149 	 * If CF is still set and reset isn't forced
1150 	 * then we maintained suspend power.
1151 	 * Just undo the effect of ehci_suspend().
1152 	 */
1153 	if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1154 			!force_reset) {
1155 		int	mask = INTR_MASK;
1156 
1157 		ehci_prepare_ports_for_controller_resume(ehci);
1158 
1159 		spin_lock_irq(&ehci->lock);
1160 		if (ehci->shutdown)
1161 			goto skip;
1162 
1163 		if (!hcd->self.root_hub->do_remote_wakeup)
1164 			mask &= ~STS_PCD;
1165 		ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1166 		ehci_readl(ehci, &ehci->regs->intr_enable);
1167  skip:
1168 		spin_unlock_irq(&ehci->lock);
1169 		return 0;
1170 	}
1171 
1172 	/*
1173 	 * Else reset, to cope with power loss or resume from hibernation
1174 	 * having let the firmware kick in during reboot.
1175 	 */
1176 	usb_root_hub_lost_power(hcd->self.root_hub);
1177 	(void) ehci_halt(ehci);
1178 	(void) ehci_reset(ehci);
1179 
1180 	spin_lock_irq(&ehci->lock);
1181 	if (ehci->shutdown)
1182 		goto skip;
1183 
1184 	ehci_writel(ehci, ehci->command, &ehci->regs->command);
1185 	ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1186 	ehci_readl(ehci, &ehci->regs->command);	/* unblock posted writes */
1187 
1188 	ehci->rh_state = EHCI_RH_SUSPENDED;
1189 	spin_unlock_irq(&ehci->lock);
1190 
1191 	return 1;
1192 }
1193 EXPORT_SYMBOL_GPL(ehci_resume);
1194 
1195 #endif
1196 
1197 /*-------------------------------------------------------------------------*/
1198 
1199 /*
1200  * Generic structure: This gets copied for platform drivers so that
1201  * individual entries can be overridden as needed.
1202  */
1203 
1204 static const struct hc_driver ehci_hc_driver = {
1205 	.description =		hcd_name,
1206 	.product_desc =		"EHCI Host Controller",
1207 	.hcd_priv_size =	sizeof(struct ehci_hcd),
1208 
1209 	/*
1210 	 * generic hardware linkage
1211 	 */
1212 	.irq =			ehci_irq,
1213 	.flags =		HCD_MEMORY | HCD_DMA | HCD_USB2 | HCD_BH,
1214 
1215 	/*
1216 	 * basic lifecycle operations
1217 	 */
1218 	.reset =		ehci_setup,
1219 	.start =		ehci_run,
1220 	.stop =			ehci_stop,
1221 	.shutdown =		ehci_shutdown,
1222 
1223 	/*
1224 	 * managing i/o requests and associated device resources
1225 	 */
1226 	.urb_enqueue =		ehci_urb_enqueue,
1227 	.urb_dequeue =		ehci_urb_dequeue,
1228 	.endpoint_disable =	ehci_endpoint_disable,
1229 	.endpoint_reset =	ehci_endpoint_reset,
1230 	.clear_tt_buffer_complete =	ehci_clear_tt_buffer_complete,
1231 
1232 	/*
1233 	 * scheduling support
1234 	 */
1235 	.get_frame_number =	ehci_get_frame,
1236 
1237 	/*
1238 	 * root hub support
1239 	 */
1240 	.hub_status_data =	ehci_hub_status_data,
1241 	.hub_control =		ehci_hub_control,
1242 	.bus_suspend =		ehci_bus_suspend,
1243 	.bus_resume =		ehci_bus_resume,
1244 	.relinquish_port =	ehci_relinquish_port,
1245 	.port_handed_over =	ehci_port_handed_over,
1246 	.get_resuming_ports =	ehci_get_resuming_ports,
1247 
1248 	/*
1249 	 * device support
1250 	 */
1251 	.free_dev =		ehci_remove_device,
1252 #ifdef CONFIG_USB_HCD_TEST_MODE
1253 	/* EH SINGLE_STEP_SET_FEATURE test support */
1254 	.submit_single_step_set_feature	= ehci_submit_single_step_set_feature,
1255 #endif
1256 };
1257 
1258 void ehci_init_driver(struct hc_driver *drv,
1259 		const struct ehci_driver_overrides *over)
1260 {
1261 	/* Copy the generic table to drv and then apply the overrides */
1262 	*drv = ehci_hc_driver;
1263 
1264 	if (over) {
1265 		drv->hcd_priv_size += over->extra_priv_size;
1266 		if (over->reset)
1267 			drv->reset = over->reset;
1268 		if (over->port_power)
1269 			drv->port_power = over->port_power;
1270 	}
1271 }
1272 EXPORT_SYMBOL_GPL(ehci_init_driver);
1273 
1274 /*-------------------------------------------------------------------------*/
1275 
1276 MODULE_DESCRIPTION(DRIVER_DESC);
1277 MODULE_AUTHOR (DRIVER_AUTHOR);
1278 MODULE_LICENSE ("GPL");
1279 
1280 #ifdef CONFIG_USB_EHCI_SH
1281 #include "ehci-sh.c"
1282 #endif
1283 
1284 #ifdef CONFIG_PPC_PS3
1285 #include "ehci-ps3.c"
1286 #endif
1287 
1288 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1289 #include "ehci-ppc-of.c"
1290 #endif
1291 
1292 #ifdef CONFIG_XPS_USB_HCD_XILINX
1293 #include "ehci-xilinx-of.c"
1294 #endif
1295 
1296 #ifdef CONFIG_SPARC_LEON
1297 #include "ehci-grlib.c"
1298 #endif
1299 
1300 static struct platform_driver * const platform_drivers[] = {
1301 #ifdef CONFIG_USB_EHCI_SH
1302 	&ehci_hcd_sh_driver,
1303 #endif
1304 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1305 	&ehci_hcd_ppc_of_driver,
1306 #endif
1307 #ifdef CONFIG_XPS_USB_HCD_XILINX
1308 	&ehci_hcd_xilinx_of_driver,
1309 #endif
1310 #ifdef CONFIG_SPARC_LEON
1311 	&ehci_grlib_driver,
1312 #endif
1313 };
1314 
1315 static int __init ehci_hcd_init(void)
1316 {
1317 	int retval = 0;
1318 
1319 	if (usb_disabled())
1320 		return -ENODEV;
1321 
1322 	printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1323 	set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1324 	if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1325 			test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1326 		printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1327 				" before uhci_hcd and ohci_hcd, not after\n");
1328 
1329 	pr_debug("%s: block sizes: qh %zd qtd %zd itd %zd sitd %zd\n",
1330 		 hcd_name,
1331 		 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1332 		 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1333 
1334 #ifdef CONFIG_DYNAMIC_DEBUG
1335 	ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1336 #endif
1337 
1338 	retval = platform_register_drivers(platform_drivers, ARRAY_SIZE(platform_drivers));
1339 	if (retval < 0)
1340 		goto clean0;
1341 
1342 #ifdef CONFIG_PPC_PS3
1343 	retval = ps3_ehci_driver_register(&ps3_ehci_driver);
1344 	if (retval < 0)
1345 		goto clean1;
1346 #endif
1347 
1348 	return 0;
1349 
1350 #ifdef CONFIG_PPC_PS3
1351 clean1:
1352 #endif
1353 	platform_unregister_drivers(platform_drivers, ARRAY_SIZE(platform_drivers));
1354 clean0:
1355 #ifdef CONFIG_DYNAMIC_DEBUG
1356 	debugfs_remove(ehci_debug_root);
1357 	ehci_debug_root = NULL;
1358 #endif
1359 	clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1360 	return retval;
1361 }
1362 module_init(ehci_hcd_init);
1363 
1364 static void __exit ehci_hcd_cleanup(void)
1365 {
1366 #ifdef CONFIG_PPC_PS3
1367 	ps3_ehci_driver_unregister(&ps3_ehci_driver);
1368 #endif
1369 	platform_unregister_drivers(platform_drivers, ARRAY_SIZE(platform_drivers));
1370 #ifdef CONFIG_DYNAMIC_DEBUG
1371 	debugfs_remove(ehci_debug_root);
1372 #endif
1373 	clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1374 }
1375 module_exit(ehci_hcd_cleanup);
1376