1 /* 2 * Enhanced Host Controller Interface (EHCI) driver for USB. 3 * 4 * Maintainer: Alan Stern <stern@rowland.harvard.edu> 5 * 6 * Copyright (c) 2000-2004 by David Brownell 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 16 * for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software Foundation, 20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 */ 22 23 #include <linux/module.h> 24 #include <linux/pci.h> 25 #include <linux/dmapool.h> 26 #include <linux/kernel.h> 27 #include <linux/delay.h> 28 #include <linux/ioport.h> 29 #include <linux/sched.h> 30 #include <linux/vmalloc.h> 31 #include <linux/errno.h> 32 #include <linux/init.h> 33 #include <linux/hrtimer.h> 34 #include <linux/list.h> 35 #include <linux/interrupt.h> 36 #include <linux/usb.h> 37 #include <linux/usb/hcd.h> 38 #include <linux/moduleparam.h> 39 #include <linux/dma-mapping.h> 40 #include <linux/debugfs.h> 41 #include <linux/slab.h> 42 43 #include <asm/byteorder.h> 44 #include <asm/io.h> 45 #include <asm/irq.h> 46 #include <asm/unaligned.h> 47 48 #if defined(CONFIG_PPC_PS3) 49 #include <asm/firmware.h> 50 #endif 51 52 /*-------------------------------------------------------------------------*/ 53 54 /* 55 * EHCI hc_driver implementation ... experimental, incomplete. 56 * Based on the final 1.0 register interface specification. 57 * 58 * USB 2.0 shows up in upcoming www.pcmcia.org technology. 59 * First was PCMCIA, like ISA; then CardBus, which is PCI. 60 * Next comes "CardBay", using USB 2.0 signals. 61 * 62 * Contains additional contributions by Brad Hards, Rory Bolt, and others. 63 * Special thanks to Intel and VIA for providing host controllers to 64 * test this driver on, and Cypress (including In-System Design) for 65 * providing early devices for those host controllers to talk to! 66 */ 67 68 #define DRIVER_AUTHOR "David Brownell" 69 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver" 70 71 static const char hcd_name [] = "ehci_hcd"; 72 73 74 #undef EHCI_URB_TRACE 75 76 /* magic numbers that can affect system performance */ 77 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */ 78 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */ 79 #define EHCI_TUNE_RL_TT 0 80 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */ 81 #define EHCI_TUNE_MULT_TT 1 82 /* 83 * Some drivers think it's safe to schedule isochronous transfers more than 84 * 256 ms into the future (partly as a result of an old bug in the scheduling 85 * code). In an attempt to avoid trouble, we will use a minimum scheduling 86 * length of 512 frames instead of 256. 87 */ 88 #define EHCI_TUNE_FLS 1 /* (medium) 512-frame schedule */ 89 90 /* Initial IRQ latency: faster than hw default */ 91 static int log2_irq_thresh = 0; // 0 to 6 92 module_param (log2_irq_thresh, int, S_IRUGO); 93 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes"); 94 95 /* initial park setting: slower than hw default */ 96 static unsigned park = 0; 97 module_param (park, uint, S_IRUGO); 98 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets"); 99 100 /* for flakey hardware, ignore overcurrent indicators */ 101 static bool ignore_oc = 0; 102 module_param (ignore_oc, bool, S_IRUGO); 103 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications"); 104 105 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) 106 107 /*-------------------------------------------------------------------------*/ 108 109 #include "ehci.h" 110 #include "pci-quirks.h" 111 112 static void compute_tt_budget(u8 budget_table[EHCI_BANDWIDTH_SIZE], 113 struct ehci_tt *tt); 114 115 /* 116 * The MosChip MCS9990 controller updates its microframe counter 117 * a little before the frame counter, and occasionally we will read 118 * the invalid intermediate value. Avoid problems by checking the 119 * microframe number (the low-order 3 bits); if they are 0 then 120 * re-read the register to get the correct value. 121 */ 122 static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci) 123 { 124 unsigned uf; 125 126 uf = ehci_readl(ehci, &ehci->regs->frame_index); 127 if (unlikely((uf & 7) == 0)) 128 uf = ehci_readl(ehci, &ehci->regs->frame_index); 129 return uf; 130 } 131 132 static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci) 133 { 134 if (ehci->frame_index_bug) 135 return ehci_moschip_read_frame_index(ehci); 136 return ehci_readl(ehci, &ehci->regs->frame_index); 137 } 138 139 #include "ehci-dbg.c" 140 141 /*-------------------------------------------------------------------------*/ 142 143 /* 144 * ehci_handshake - spin reading hc until handshake completes or fails 145 * @ptr: address of hc register to be read 146 * @mask: bits to look at in result of read 147 * @done: value of those bits when handshake succeeds 148 * @usec: timeout in microseconds 149 * 150 * Returns negative errno, or zero on success 151 * 152 * Success happens when the "mask" bits have the specified value (hardware 153 * handshake done). There are two failure modes: "usec" have passed (major 154 * hardware flakeout), or the register reads as all-ones (hardware removed). 155 * 156 * That last failure should_only happen in cases like physical cardbus eject 157 * before driver shutdown. But it also seems to be caused by bugs in cardbus 158 * bridge shutdown: shutting down the bridge before the devices using it. 159 */ 160 int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr, 161 u32 mask, u32 done, int usec) 162 { 163 u32 result; 164 165 do { 166 result = ehci_readl(ehci, ptr); 167 if (result == ~(u32)0) /* card removed */ 168 return -ENODEV; 169 result &= mask; 170 if (result == done) 171 return 0; 172 udelay (1); 173 usec--; 174 } while (usec > 0); 175 return -ETIMEDOUT; 176 } 177 EXPORT_SYMBOL_GPL(ehci_handshake); 178 179 /* check TDI/ARC silicon is in host mode */ 180 static int tdi_in_host_mode (struct ehci_hcd *ehci) 181 { 182 u32 tmp; 183 184 tmp = ehci_readl(ehci, &ehci->regs->usbmode); 185 return (tmp & 3) == USBMODE_CM_HC; 186 } 187 188 /* 189 * Force HC to halt state from unknown (EHCI spec section 2.3). 190 * Must be called with interrupts enabled and the lock not held. 191 */ 192 static int ehci_halt (struct ehci_hcd *ehci) 193 { 194 u32 temp; 195 196 spin_lock_irq(&ehci->lock); 197 198 /* disable any irqs left enabled by previous code */ 199 ehci_writel(ehci, 0, &ehci->regs->intr_enable); 200 201 if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) { 202 spin_unlock_irq(&ehci->lock); 203 return 0; 204 } 205 206 /* 207 * This routine gets called during probe before ehci->command 208 * has been initialized, so we can't rely on its value. 209 */ 210 ehci->command &= ~CMD_RUN; 211 temp = ehci_readl(ehci, &ehci->regs->command); 212 temp &= ~(CMD_RUN | CMD_IAAD); 213 ehci_writel(ehci, temp, &ehci->regs->command); 214 215 spin_unlock_irq(&ehci->lock); 216 synchronize_irq(ehci_to_hcd(ehci)->irq); 217 218 return ehci_handshake(ehci, &ehci->regs->status, 219 STS_HALT, STS_HALT, 16 * 125); 220 } 221 222 /* put TDI/ARC silicon into EHCI mode */ 223 static void tdi_reset (struct ehci_hcd *ehci) 224 { 225 u32 tmp; 226 227 tmp = ehci_readl(ehci, &ehci->regs->usbmode); 228 tmp |= USBMODE_CM_HC; 229 /* The default byte access to MMR space is LE after 230 * controller reset. Set the required endian mode 231 * for transfer buffers to match the host microprocessor 232 */ 233 if (ehci_big_endian_mmio(ehci)) 234 tmp |= USBMODE_BE; 235 ehci_writel(ehci, tmp, &ehci->regs->usbmode); 236 } 237 238 /* 239 * Reset a non-running (STS_HALT == 1) controller. 240 * Must be called with interrupts enabled and the lock not held. 241 */ 242 static int ehci_reset (struct ehci_hcd *ehci) 243 { 244 int retval; 245 u32 command = ehci_readl(ehci, &ehci->regs->command); 246 247 /* If the EHCI debug controller is active, special care must be 248 * taken before and after a host controller reset */ 249 if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci))) 250 ehci->debug = NULL; 251 252 command |= CMD_RESET; 253 dbg_cmd (ehci, "reset", command); 254 ehci_writel(ehci, command, &ehci->regs->command); 255 ehci->rh_state = EHCI_RH_HALTED; 256 ehci->next_statechange = jiffies; 257 retval = ehci_handshake(ehci, &ehci->regs->command, 258 CMD_RESET, 0, 250 * 1000); 259 260 if (ehci->has_hostpc) { 261 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS, 262 &ehci->regs->usbmode_ex); 263 ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning); 264 } 265 if (retval) 266 return retval; 267 268 if (ehci_is_TDI(ehci)) 269 tdi_reset (ehci); 270 271 if (ehci->debug) 272 dbgp_external_startup(ehci_to_hcd(ehci)); 273 274 ehci->port_c_suspend = ehci->suspended_ports = 275 ehci->resuming_ports = 0; 276 return retval; 277 } 278 279 /* 280 * Idle the controller (turn off the schedules). 281 * Must be called with interrupts enabled and the lock not held. 282 */ 283 static void ehci_quiesce (struct ehci_hcd *ehci) 284 { 285 u32 temp; 286 287 if (ehci->rh_state != EHCI_RH_RUNNING) 288 return; 289 290 /* wait for any schedule enables/disables to take effect */ 291 temp = (ehci->command << 10) & (STS_ASS | STS_PSS); 292 ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp, 293 16 * 125); 294 295 /* then disable anything that's still active */ 296 spin_lock_irq(&ehci->lock); 297 ehci->command &= ~(CMD_ASE | CMD_PSE); 298 ehci_writel(ehci, ehci->command, &ehci->regs->command); 299 spin_unlock_irq(&ehci->lock); 300 301 /* hardware can take 16 microframes to turn off ... */ 302 ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0, 303 16 * 125); 304 } 305 306 /*-------------------------------------------------------------------------*/ 307 308 static void end_unlink_async(struct ehci_hcd *ehci); 309 static void unlink_empty_async(struct ehci_hcd *ehci); 310 static void unlink_empty_async_suspended(struct ehci_hcd *ehci); 311 static void ehci_work(struct ehci_hcd *ehci); 312 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh); 313 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh); 314 315 #include "ehci-timer.c" 316 #include "ehci-hub.c" 317 #include "ehci-mem.c" 318 #include "ehci-q.c" 319 #include "ehci-sched.c" 320 #include "ehci-sysfs.c" 321 322 /*-------------------------------------------------------------------------*/ 323 324 /* On some systems, leaving remote wakeup enabled prevents system shutdown. 325 * The firmware seems to think that powering off is a wakeup event! 326 * This routine turns off remote wakeup and everything else, on all ports. 327 */ 328 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci) 329 { 330 int port = HCS_N_PORTS(ehci->hcs_params); 331 332 while (port--) 333 ehci_writel(ehci, PORT_RWC_BITS, 334 &ehci->regs->port_status[port]); 335 } 336 337 /* 338 * Halt HC, turn off all ports, and let the BIOS use the companion controllers. 339 * Must be called with interrupts enabled and the lock not held. 340 */ 341 static void ehci_silence_controller(struct ehci_hcd *ehci) 342 { 343 ehci_halt(ehci); 344 345 spin_lock_irq(&ehci->lock); 346 ehci->rh_state = EHCI_RH_HALTED; 347 ehci_turn_off_all_ports(ehci); 348 349 /* make BIOS/etc use companion controller during reboot */ 350 ehci_writel(ehci, 0, &ehci->regs->configured_flag); 351 352 /* unblock posted writes */ 353 ehci_readl(ehci, &ehci->regs->configured_flag); 354 spin_unlock_irq(&ehci->lock); 355 } 356 357 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc). 358 * This forcibly disables dma and IRQs, helping kexec and other cases 359 * where the next system software may expect clean state. 360 */ 361 static void ehci_shutdown(struct usb_hcd *hcd) 362 { 363 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 364 365 spin_lock_irq(&ehci->lock); 366 ehci->shutdown = true; 367 ehci->rh_state = EHCI_RH_STOPPING; 368 ehci->enabled_hrtimer_events = 0; 369 spin_unlock_irq(&ehci->lock); 370 371 ehci_silence_controller(ehci); 372 373 hrtimer_cancel(&ehci->hrtimer); 374 } 375 376 /*-------------------------------------------------------------------------*/ 377 378 /* 379 * ehci_work is called from some interrupts, timers, and so on. 380 * it calls driver completion functions, after dropping ehci->lock. 381 */ 382 static void ehci_work (struct ehci_hcd *ehci) 383 { 384 /* another CPU may drop ehci->lock during a schedule scan while 385 * it reports urb completions. this flag guards against bogus 386 * attempts at re-entrant schedule scanning. 387 */ 388 if (ehci->scanning) { 389 ehci->need_rescan = true; 390 return; 391 } 392 ehci->scanning = true; 393 394 rescan: 395 ehci->need_rescan = false; 396 if (ehci->async_count) 397 scan_async(ehci); 398 if (ehci->intr_count > 0) 399 scan_intr(ehci); 400 if (ehci->isoc_count > 0) 401 scan_isoc(ehci); 402 if (ehci->need_rescan) 403 goto rescan; 404 ehci->scanning = false; 405 406 /* the IO watchdog guards against hardware or driver bugs that 407 * misplace IRQs, and should let us run completely without IRQs. 408 * such lossage has been observed on both VT6202 and VT8235. 409 */ 410 turn_on_io_watchdog(ehci); 411 } 412 413 /* 414 * Called when the ehci_hcd module is removed. 415 */ 416 static void ehci_stop (struct usb_hcd *hcd) 417 { 418 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 419 420 ehci_dbg (ehci, "stop\n"); 421 422 /* no more interrupts ... */ 423 424 spin_lock_irq(&ehci->lock); 425 ehci->enabled_hrtimer_events = 0; 426 spin_unlock_irq(&ehci->lock); 427 428 ehci_quiesce(ehci); 429 ehci_silence_controller(ehci); 430 ehci_reset (ehci); 431 432 hrtimer_cancel(&ehci->hrtimer); 433 remove_sysfs_files(ehci); 434 remove_debug_files (ehci); 435 436 /* root hub is shut down separately (first, when possible) */ 437 spin_lock_irq (&ehci->lock); 438 end_free_itds(ehci); 439 spin_unlock_irq (&ehci->lock); 440 ehci_mem_cleanup (ehci); 441 442 if (ehci->amd_pll_fix == 1) 443 usb_amd_dev_put(); 444 445 dbg_status (ehci, "ehci_stop completed", 446 ehci_readl(ehci, &ehci->regs->status)); 447 } 448 449 /* one-time init, only for memory state */ 450 static int ehci_init(struct usb_hcd *hcd) 451 { 452 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 453 u32 temp; 454 int retval; 455 u32 hcc_params; 456 struct ehci_qh_hw *hw; 457 458 spin_lock_init(&ehci->lock); 459 460 /* 461 * keep io watchdog by default, those good HCDs could turn off it later 462 */ 463 ehci->need_io_watchdog = 1; 464 465 hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); 466 ehci->hrtimer.function = ehci_hrtimer_func; 467 ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT; 468 469 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params); 470 471 /* 472 * by default set standard 80% (== 100 usec/uframe) max periodic 473 * bandwidth as required by USB 2.0 474 */ 475 ehci->uframe_periodic_max = 100; 476 477 /* 478 * hw default: 1K periodic list heads, one per frame. 479 * periodic_size can shrink by USBCMD update if hcc_params allows. 480 */ 481 ehci->periodic_size = DEFAULT_I_TDPS; 482 INIT_LIST_HEAD(&ehci->async_unlink); 483 INIT_LIST_HEAD(&ehci->async_idle); 484 INIT_LIST_HEAD(&ehci->intr_unlink_wait); 485 INIT_LIST_HEAD(&ehci->intr_unlink); 486 INIT_LIST_HEAD(&ehci->intr_qh_list); 487 INIT_LIST_HEAD(&ehci->cached_itd_list); 488 INIT_LIST_HEAD(&ehci->cached_sitd_list); 489 INIT_LIST_HEAD(&ehci->tt_list); 490 491 if (HCC_PGM_FRAMELISTLEN(hcc_params)) { 492 /* periodic schedule size can be smaller than default */ 493 switch (EHCI_TUNE_FLS) { 494 case 0: ehci->periodic_size = 1024; break; 495 case 1: ehci->periodic_size = 512; break; 496 case 2: ehci->periodic_size = 256; break; 497 default: BUG(); 498 } 499 } 500 if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0) 501 return retval; 502 503 /* controllers may cache some of the periodic schedule ... */ 504 if (HCC_ISOC_CACHE(hcc_params)) // full frame cache 505 ehci->i_thresh = 0; 506 else // N microframes cached 507 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params); 508 509 /* 510 * dedicate a qh for the async ring head, since we couldn't unlink 511 * a 'real' qh without stopping the async schedule [4.8]. use it 512 * as the 'reclamation list head' too. 513 * its dummy is used in hw_alt_next of many tds, to prevent the qh 514 * from automatically advancing to the next td after short reads. 515 */ 516 ehci->async->qh_next.qh = NULL; 517 hw = ehci->async->hw; 518 hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma); 519 hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD); 520 #if defined(CONFIG_PPC_PS3) 521 hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE); 522 #endif 523 hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT); 524 hw->hw_qtd_next = EHCI_LIST_END(ehci); 525 ehci->async->qh_state = QH_STATE_LINKED; 526 hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma); 527 528 /* clear interrupt enables, set irq latency */ 529 if (log2_irq_thresh < 0 || log2_irq_thresh > 6) 530 log2_irq_thresh = 0; 531 temp = 1 << (16 + log2_irq_thresh); 532 if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) { 533 ehci->has_ppcd = 1; 534 ehci_dbg(ehci, "enable per-port change event\n"); 535 temp |= CMD_PPCEE; 536 } 537 if (HCC_CANPARK(hcc_params)) { 538 /* HW default park == 3, on hardware that supports it (like 539 * NVidia and ALI silicon), maximizes throughput on the async 540 * schedule by avoiding QH fetches between transfers. 541 * 542 * With fast usb storage devices and NForce2, "park" seems to 543 * make problems: throughput reduction (!), data errors... 544 */ 545 if (park) { 546 park = min(park, (unsigned) 3); 547 temp |= CMD_PARK; 548 temp |= park << 8; 549 } 550 ehci_dbg(ehci, "park %d\n", park); 551 } 552 if (HCC_PGM_FRAMELISTLEN(hcc_params)) { 553 /* periodic schedule size can be smaller than default */ 554 temp &= ~(3 << 2); 555 temp |= (EHCI_TUNE_FLS << 2); 556 } 557 ehci->command = temp; 558 559 /* Accept arbitrarily long scatter-gather lists */ 560 if (!(hcd->driver->flags & HCD_LOCAL_MEM)) 561 hcd->self.sg_tablesize = ~0; 562 return 0; 563 } 564 565 /* start HC running; it's halted, ehci_init() has been run (once) */ 566 static int ehci_run (struct usb_hcd *hcd) 567 { 568 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 569 u32 temp; 570 u32 hcc_params; 571 572 hcd->uses_new_polling = 1; 573 574 /* EHCI spec section 4.1 */ 575 576 ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list); 577 ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next); 578 579 /* 580 * hcc_params controls whether ehci->regs->segment must (!!!) 581 * be used; it constrains QH/ITD/SITD and QTD locations. 582 * pci_pool consistent memory always uses segment zero. 583 * streaming mappings for I/O buffers, like pci_map_single(), 584 * can return segments above 4GB, if the device allows. 585 * 586 * NOTE: the dma mask is visible through dma_supported(), so 587 * drivers can pass this info along ... like NETIF_F_HIGHDMA, 588 * Scsi_Host.highmem_io, and so forth. It's readonly to all 589 * host side drivers though. 590 */ 591 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params); 592 if (HCC_64BIT_ADDR(hcc_params)) { 593 ehci_writel(ehci, 0, &ehci->regs->segment); 594 #if 0 595 // this is deeply broken on almost all architectures 596 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64))) 597 ehci_info(ehci, "enabled 64bit DMA\n"); 598 #endif 599 } 600 601 602 // Philips, Intel, and maybe others need CMD_RUN before the 603 // root hub will detect new devices (why?); NEC doesn't 604 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); 605 ehci->command |= CMD_RUN; 606 ehci_writel(ehci, ehci->command, &ehci->regs->command); 607 dbg_cmd (ehci, "init", ehci->command); 608 609 /* 610 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices 611 * are explicitly handed to companion controller(s), so no TT is 612 * involved with the root hub. (Except where one is integrated, 613 * and there's no companion controller unless maybe for USB OTG.) 614 * 615 * Turning on the CF flag will transfer ownership of all ports 616 * from the companions to the EHCI controller. If any of the 617 * companions are in the middle of a port reset at the time, it 618 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem 619 * guarantees that no resets are in progress. After we set CF, 620 * a short delay lets the hardware catch up; new resets shouldn't 621 * be started before the port switching actions could complete. 622 */ 623 down_write(&ehci_cf_port_reset_rwsem); 624 ehci->rh_state = EHCI_RH_RUNNING; 625 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag); 626 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */ 627 msleep(5); 628 up_write(&ehci_cf_port_reset_rwsem); 629 ehci->last_periodic_enable = ktime_get_real(); 630 631 temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase)); 632 ehci_info (ehci, 633 "USB %x.%x started, EHCI %x.%02x%s\n", 634 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), 635 temp >> 8, temp & 0xff, 636 ignore_oc ? ", overcurrent ignored" : ""); 637 638 ehci_writel(ehci, INTR_MASK, 639 &ehci->regs->intr_enable); /* Turn On Interrupts */ 640 641 /* GRR this is run-once init(), being done every time the HC starts. 642 * So long as they're part of class devices, we can't do it init() 643 * since the class device isn't created that early. 644 */ 645 create_debug_files(ehci); 646 create_sysfs_files(ehci); 647 648 return 0; 649 } 650 651 int ehci_setup(struct usb_hcd *hcd) 652 { 653 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 654 int retval; 655 656 ehci->regs = (void __iomem *)ehci->caps + 657 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase)); 658 dbg_hcs_params(ehci, "reset"); 659 dbg_hcc_params(ehci, "reset"); 660 661 /* cache this readonly data; minimize chip reads */ 662 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); 663 664 ehci->sbrn = HCD_USB2; 665 666 /* data structure init */ 667 retval = ehci_init(hcd); 668 if (retval) 669 return retval; 670 671 retval = ehci_halt(ehci); 672 if (retval) 673 return retval; 674 675 ehci_reset(ehci); 676 677 return 0; 678 } 679 EXPORT_SYMBOL_GPL(ehci_setup); 680 681 /*-------------------------------------------------------------------------*/ 682 683 static irqreturn_t ehci_irq (struct usb_hcd *hcd) 684 { 685 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 686 u32 status, masked_status, pcd_status = 0, cmd; 687 int bh; 688 689 spin_lock (&ehci->lock); 690 691 status = ehci_readl(ehci, &ehci->regs->status); 692 693 /* e.g. cardbus physical eject */ 694 if (status == ~(u32) 0) { 695 ehci_dbg (ehci, "device removed\n"); 696 goto dead; 697 } 698 699 /* 700 * We don't use STS_FLR, but some controllers don't like it to 701 * remain on, so mask it out along with the other status bits. 702 */ 703 masked_status = status & (INTR_MASK | STS_FLR); 704 705 /* Shared IRQ? */ 706 if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) { 707 spin_unlock(&ehci->lock); 708 return IRQ_NONE; 709 } 710 711 /* clear (just) interrupts */ 712 ehci_writel(ehci, masked_status, &ehci->regs->status); 713 cmd = ehci_readl(ehci, &ehci->regs->command); 714 bh = 0; 715 716 /* normal [4.15.1.2] or error [4.15.1.1] completion */ 717 if (likely ((status & (STS_INT|STS_ERR)) != 0)) { 718 if (likely ((status & STS_ERR) == 0)) 719 COUNT (ehci->stats.normal); 720 else 721 COUNT (ehci->stats.error); 722 bh = 1; 723 } 724 725 /* complete the unlinking of some qh [4.15.2.3] */ 726 if (status & STS_IAA) { 727 728 /* Turn off the IAA watchdog */ 729 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG); 730 731 /* 732 * Mild optimization: Allow another IAAD to reset the 733 * hrtimer, if one occurs before the next expiration. 734 * In theory we could always cancel the hrtimer, but 735 * tests show that about half the time it will be reset 736 * for some other event anyway. 737 */ 738 if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG) 739 ++ehci->next_hrtimer_event; 740 741 /* guard against (alleged) silicon errata */ 742 if (cmd & CMD_IAAD) 743 ehci_dbg(ehci, "IAA with IAAD still set?\n"); 744 if (ehci->iaa_in_progress) 745 COUNT(ehci->stats.iaa); 746 end_unlink_async(ehci); 747 } 748 749 /* remote wakeup [4.3.1] */ 750 if (status & STS_PCD) { 751 unsigned i = HCS_N_PORTS (ehci->hcs_params); 752 u32 ppcd = ~0; 753 754 /* kick root hub later */ 755 pcd_status = status; 756 757 /* resume root hub? */ 758 if (ehci->rh_state == EHCI_RH_SUSPENDED) 759 usb_hcd_resume_root_hub(hcd); 760 761 /* get per-port change detect bits */ 762 if (ehci->has_ppcd) 763 ppcd = status >> 16; 764 765 while (i--) { 766 int pstatus; 767 768 /* leverage per-port change bits feature */ 769 if (!(ppcd & (1 << i))) 770 continue; 771 pstatus = ehci_readl(ehci, 772 &ehci->regs->port_status[i]); 773 774 if (pstatus & PORT_OWNER) 775 continue; 776 if (!(test_bit(i, &ehci->suspended_ports) && 777 ((pstatus & PORT_RESUME) || 778 !(pstatus & PORT_SUSPEND)) && 779 (pstatus & PORT_PE) && 780 ehci->reset_done[i] == 0)) 781 continue; 782 783 /* start 20 msec resume signaling from this port, 784 * and make khubd collect PORT_STAT_C_SUSPEND to 785 * stop that signaling. Use 5 ms extra for safety, 786 * like usb_port_resume() does. 787 */ 788 ehci->reset_done[i] = jiffies + msecs_to_jiffies(25); 789 set_bit(i, &ehci->resuming_ports); 790 ehci_dbg (ehci, "port %d remote wakeup\n", i + 1); 791 usb_hcd_start_port_resume(&hcd->self, i); 792 mod_timer(&hcd->rh_timer, ehci->reset_done[i]); 793 } 794 } 795 796 /* PCI errors [4.15.2.4] */ 797 if (unlikely ((status & STS_FATAL) != 0)) { 798 ehci_err(ehci, "fatal error\n"); 799 dbg_cmd(ehci, "fatal", cmd); 800 dbg_status(ehci, "fatal", status); 801 dead: 802 usb_hc_died(hcd); 803 804 /* Don't let the controller do anything more */ 805 ehci->shutdown = true; 806 ehci->rh_state = EHCI_RH_STOPPING; 807 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE); 808 ehci_writel(ehci, ehci->command, &ehci->regs->command); 809 ehci_writel(ehci, 0, &ehci->regs->intr_enable); 810 ehci_handle_controller_death(ehci); 811 812 /* Handle completions when the controller stops */ 813 bh = 0; 814 } 815 816 if (bh) 817 ehci_work (ehci); 818 spin_unlock (&ehci->lock); 819 if (pcd_status) 820 usb_hcd_poll_rh_status(hcd); 821 return IRQ_HANDLED; 822 } 823 824 /*-------------------------------------------------------------------------*/ 825 826 /* 827 * non-error returns are a promise to giveback() the urb later 828 * we drop ownership so next owner (or urb unlink) can get it 829 * 830 * urb + dev is in hcd.self.controller.urb_list 831 * we're queueing TDs onto software and hardware lists 832 * 833 * hcd-specific init for hcpriv hasn't been done yet 834 * 835 * NOTE: control, bulk, and interrupt share the same code to append TDs 836 * to a (possibly active) QH, and the same QH scanning code. 837 */ 838 static int ehci_urb_enqueue ( 839 struct usb_hcd *hcd, 840 struct urb *urb, 841 gfp_t mem_flags 842 ) { 843 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 844 struct list_head qtd_list; 845 846 INIT_LIST_HEAD (&qtd_list); 847 848 switch (usb_pipetype (urb->pipe)) { 849 case PIPE_CONTROL: 850 /* qh_completions() code doesn't handle all the fault cases 851 * in multi-TD control transfers. Even 1KB is rare anyway. 852 */ 853 if (urb->transfer_buffer_length > (16 * 1024)) 854 return -EMSGSIZE; 855 /* FALLTHROUGH */ 856 /* case PIPE_BULK: */ 857 default: 858 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags)) 859 return -ENOMEM; 860 return submit_async(ehci, urb, &qtd_list, mem_flags); 861 862 case PIPE_INTERRUPT: 863 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags)) 864 return -ENOMEM; 865 return intr_submit(ehci, urb, &qtd_list, mem_flags); 866 867 case PIPE_ISOCHRONOUS: 868 if (urb->dev->speed == USB_SPEED_HIGH) 869 return itd_submit (ehci, urb, mem_flags); 870 else 871 return sitd_submit (ehci, urb, mem_flags); 872 } 873 } 874 875 /* remove from hardware lists 876 * completions normally happen asynchronously 877 */ 878 879 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) 880 { 881 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 882 struct ehci_qh *qh; 883 unsigned long flags; 884 int rc; 885 886 spin_lock_irqsave (&ehci->lock, flags); 887 rc = usb_hcd_check_unlink_urb(hcd, urb, status); 888 if (rc) 889 goto done; 890 891 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) { 892 /* 893 * We don't expedite dequeue for isochronous URBs. 894 * Just wait until they complete normally or their 895 * time slot expires. 896 */ 897 } else { 898 qh = (struct ehci_qh *) urb->hcpriv; 899 qh->exception = 1; 900 switch (qh->qh_state) { 901 case QH_STATE_LINKED: 902 if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) 903 start_unlink_intr(ehci, qh); 904 else 905 start_unlink_async(ehci, qh); 906 break; 907 case QH_STATE_COMPLETING: 908 qh->dequeue_during_giveback = 1; 909 break; 910 case QH_STATE_UNLINK: 911 case QH_STATE_UNLINK_WAIT: 912 /* already started */ 913 break; 914 case QH_STATE_IDLE: 915 /* QH might be waiting for a Clear-TT-Buffer */ 916 qh_completions(ehci, qh); 917 break; 918 } 919 } 920 done: 921 spin_unlock_irqrestore (&ehci->lock, flags); 922 return rc; 923 } 924 925 /*-------------------------------------------------------------------------*/ 926 927 // bulk qh holds the data toggle 928 929 static void 930 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep) 931 { 932 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 933 unsigned long flags; 934 struct ehci_qh *qh; 935 936 /* ASSERT: any requests/urbs are being unlinked */ 937 /* ASSERT: nobody can be submitting urbs for this any more */ 938 939 rescan: 940 spin_lock_irqsave (&ehci->lock, flags); 941 qh = ep->hcpriv; 942 if (!qh) 943 goto done; 944 945 /* endpoints can be iso streams. for now, we don't 946 * accelerate iso completions ... so spin a while. 947 */ 948 if (qh->hw == NULL) { 949 struct ehci_iso_stream *stream = ep->hcpriv; 950 951 if (!list_empty(&stream->td_list)) 952 goto idle_timeout; 953 954 /* BUG_ON(!list_empty(&stream->free_list)); */ 955 reserve_release_iso_bandwidth(ehci, stream, -1); 956 kfree(stream); 957 goto done; 958 } 959 960 qh->exception = 1; 961 if (ehci->rh_state < EHCI_RH_RUNNING) 962 qh->qh_state = QH_STATE_IDLE; 963 switch (qh->qh_state) { 964 case QH_STATE_LINKED: 965 WARN_ON(!list_empty(&qh->qtd_list)); 966 if (usb_endpoint_type(&ep->desc) != USB_ENDPOINT_XFER_INT) 967 start_unlink_async(ehci, qh); 968 else 969 start_unlink_intr(ehci, qh); 970 /* FALL THROUGH */ 971 case QH_STATE_COMPLETING: /* already in unlinking */ 972 case QH_STATE_UNLINK: /* wait for hw to finish? */ 973 case QH_STATE_UNLINK_WAIT: 974 idle_timeout: 975 spin_unlock_irqrestore (&ehci->lock, flags); 976 schedule_timeout_uninterruptible(1); 977 goto rescan; 978 case QH_STATE_IDLE: /* fully unlinked */ 979 if (qh->clearing_tt) 980 goto idle_timeout; 981 if (list_empty (&qh->qtd_list)) { 982 if (qh->ps.bw_uperiod) 983 reserve_release_intr_bandwidth(ehci, qh, -1); 984 qh_destroy(ehci, qh); 985 break; 986 } 987 /* else FALL THROUGH */ 988 default: 989 /* caller was supposed to have unlinked any requests; 990 * that's not our job. just leak this memory. 991 */ 992 ehci_err (ehci, "qh %p (#%02x) state %d%s\n", 993 qh, ep->desc.bEndpointAddress, qh->qh_state, 994 list_empty (&qh->qtd_list) ? "" : "(has tds)"); 995 break; 996 } 997 done: 998 ep->hcpriv = NULL; 999 spin_unlock_irqrestore (&ehci->lock, flags); 1000 } 1001 1002 static void 1003 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep) 1004 { 1005 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 1006 struct ehci_qh *qh; 1007 int eptype = usb_endpoint_type(&ep->desc); 1008 int epnum = usb_endpoint_num(&ep->desc); 1009 int is_out = usb_endpoint_dir_out(&ep->desc); 1010 unsigned long flags; 1011 1012 if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT) 1013 return; 1014 1015 spin_lock_irqsave(&ehci->lock, flags); 1016 qh = ep->hcpriv; 1017 1018 /* For Bulk and Interrupt endpoints we maintain the toggle state 1019 * in the hardware; the toggle bits in udev aren't used at all. 1020 * When an endpoint is reset by usb_clear_halt() we must reset 1021 * the toggle bit in the QH. 1022 */ 1023 if (qh) { 1024 if (!list_empty(&qh->qtd_list)) { 1025 WARN_ONCE(1, "clear_halt for a busy endpoint\n"); 1026 } else { 1027 /* The toggle value in the QH can't be updated 1028 * while the QH is active. Unlink it now; 1029 * re-linking will call qh_refresh(). 1030 */ 1031 usb_settoggle(qh->ps.udev, epnum, is_out, 0); 1032 qh->exception = 1; 1033 if (eptype == USB_ENDPOINT_XFER_BULK) 1034 start_unlink_async(ehci, qh); 1035 else 1036 start_unlink_intr(ehci, qh); 1037 } 1038 } 1039 spin_unlock_irqrestore(&ehci->lock, flags); 1040 } 1041 1042 static int ehci_get_frame (struct usb_hcd *hcd) 1043 { 1044 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 1045 return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size; 1046 } 1047 1048 /*-------------------------------------------------------------------------*/ 1049 1050 /* Device addition and removal */ 1051 1052 static void ehci_remove_device(struct usb_hcd *hcd, struct usb_device *udev) 1053 { 1054 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 1055 1056 spin_lock_irq(&ehci->lock); 1057 drop_tt(udev); 1058 spin_unlock_irq(&ehci->lock); 1059 } 1060 1061 /*-------------------------------------------------------------------------*/ 1062 1063 #ifdef CONFIG_PM 1064 1065 /* suspend/resume, section 4.3 */ 1066 1067 /* These routines handle the generic parts of controller suspend/resume */ 1068 1069 int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup) 1070 { 1071 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 1072 1073 if (time_before(jiffies, ehci->next_statechange)) 1074 msleep(10); 1075 1076 /* 1077 * Root hub was already suspended. Disable IRQ emission and 1078 * mark HW unaccessible. The PM and USB cores make sure that 1079 * the root hub is either suspended or stopped. 1080 */ 1081 ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup); 1082 1083 spin_lock_irq(&ehci->lock); 1084 ehci_writel(ehci, 0, &ehci->regs->intr_enable); 1085 (void) ehci_readl(ehci, &ehci->regs->intr_enable); 1086 1087 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 1088 spin_unlock_irq(&ehci->lock); 1089 1090 synchronize_irq(hcd->irq); 1091 1092 /* Check for race with a wakeup request */ 1093 if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) { 1094 ehci_resume(hcd, false); 1095 return -EBUSY; 1096 } 1097 1098 return 0; 1099 } 1100 EXPORT_SYMBOL_GPL(ehci_suspend); 1101 1102 /* Returns 0 if power was preserved, 1 if power was lost */ 1103 int ehci_resume(struct usb_hcd *hcd, bool hibernated) 1104 { 1105 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 1106 1107 if (time_before(jiffies, ehci->next_statechange)) 1108 msleep(100); 1109 1110 /* Mark hardware accessible again as we are back to full power by now */ 1111 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 1112 1113 if (ehci->shutdown) 1114 return 0; /* Controller is dead */ 1115 1116 /* 1117 * If CF is still set and we aren't resuming from hibernation 1118 * then we maintained suspend power. 1119 * Just undo the effect of ehci_suspend(). 1120 */ 1121 if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF && 1122 !hibernated) { 1123 int mask = INTR_MASK; 1124 1125 ehci_prepare_ports_for_controller_resume(ehci); 1126 1127 spin_lock_irq(&ehci->lock); 1128 if (ehci->shutdown) 1129 goto skip; 1130 1131 if (!hcd->self.root_hub->do_remote_wakeup) 1132 mask &= ~STS_PCD; 1133 ehci_writel(ehci, mask, &ehci->regs->intr_enable); 1134 ehci_readl(ehci, &ehci->regs->intr_enable); 1135 skip: 1136 spin_unlock_irq(&ehci->lock); 1137 return 0; 1138 } 1139 1140 /* 1141 * Else reset, to cope with power loss or resume from hibernation 1142 * having let the firmware kick in during reboot. 1143 */ 1144 usb_root_hub_lost_power(hcd->self.root_hub); 1145 (void) ehci_halt(ehci); 1146 (void) ehci_reset(ehci); 1147 1148 spin_lock_irq(&ehci->lock); 1149 if (ehci->shutdown) 1150 goto skip; 1151 1152 ehci_writel(ehci, ehci->command, &ehci->regs->command); 1153 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag); 1154 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */ 1155 1156 ehci->rh_state = EHCI_RH_SUSPENDED; 1157 spin_unlock_irq(&ehci->lock); 1158 1159 return 1; 1160 } 1161 EXPORT_SYMBOL_GPL(ehci_resume); 1162 1163 #endif 1164 1165 /*-------------------------------------------------------------------------*/ 1166 1167 /* 1168 * Generic structure: This gets copied for platform drivers so that 1169 * individual entries can be overridden as needed. 1170 */ 1171 1172 static const struct hc_driver ehci_hc_driver = { 1173 .description = hcd_name, 1174 .product_desc = "EHCI Host Controller", 1175 .hcd_priv_size = sizeof(struct ehci_hcd), 1176 1177 /* 1178 * generic hardware linkage 1179 */ 1180 .irq = ehci_irq, 1181 .flags = HCD_MEMORY | HCD_USB2 | HCD_BH, 1182 1183 /* 1184 * basic lifecycle operations 1185 */ 1186 .reset = ehci_setup, 1187 .start = ehci_run, 1188 .stop = ehci_stop, 1189 .shutdown = ehci_shutdown, 1190 1191 /* 1192 * managing i/o requests and associated device resources 1193 */ 1194 .urb_enqueue = ehci_urb_enqueue, 1195 .urb_dequeue = ehci_urb_dequeue, 1196 .endpoint_disable = ehci_endpoint_disable, 1197 .endpoint_reset = ehci_endpoint_reset, 1198 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete, 1199 1200 /* 1201 * scheduling support 1202 */ 1203 .get_frame_number = ehci_get_frame, 1204 1205 /* 1206 * root hub support 1207 */ 1208 .hub_status_data = ehci_hub_status_data, 1209 .hub_control = ehci_hub_control, 1210 .bus_suspend = ehci_bus_suspend, 1211 .bus_resume = ehci_bus_resume, 1212 .relinquish_port = ehci_relinquish_port, 1213 .port_handed_over = ehci_port_handed_over, 1214 1215 /* 1216 * device support 1217 */ 1218 .free_dev = ehci_remove_device, 1219 }; 1220 1221 void ehci_init_driver(struct hc_driver *drv, 1222 const struct ehci_driver_overrides *over) 1223 { 1224 /* Copy the generic table to drv and then apply the overrides */ 1225 *drv = ehci_hc_driver; 1226 1227 if (over) { 1228 drv->hcd_priv_size += over->extra_priv_size; 1229 if (over->reset) 1230 drv->reset = over->reset; 1231 } 1232 } 1233 EXPORT_SYMBOL_GPL(ehci_init_driver); 1234 1235 /*-------------------------------------------------------------------------*/ 1236 1237 MODULE_DESCRIPTION(DRIVER_DESC); 1238 MODULE_AUTHOR (DRIVER_AUTHOR); 1239 MODULE_LICENSE ("GPL"); 1240 1241 #ifdef CONFIG_USB_EHCI_FSL 1242 #include "ehci-fsl.c" 1243 #define PLATFORM_DRIVER ehci_fsl_driver 1244 #endif 1245 1246 #ifdef CONFIG_USB_EHCI_SH 1247 #include "ehci-sh.c" 1248 #define PLATFORM_DRIVER ehci_hcd_sh_driver 1249 #endif 1250 1251 #ifdef CONFIG_PPC_PS3 1252 #include "ehci-ps3.c" 1253 #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver 1254 #endif 1255 1256 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF 1257 #include "ehci-ppc-of.c" 1258 #define OF_PLATFORM_DRIVER ehci_hcd_ppc_of_driver 1259 #endif 1260 1261 #ifdef CONFIG_XPS_USB_HCD_XILINX 1262 #include "ehci-xilinx-of.c" 1263 #define XILINX_OF_PLATFORM_DRIVER ehci_hcd_xilinx_of_driver 1264 #endif 1265 1266 #ifdef CONFIG_USB_OCTEON_EHCI 1267 #include "ehci-octeon.c" 1268 #define PLATFORM_DRIVER ehci_octeon_driver 1269 #endif 1270 1271 #ifdef CONFIG_TILE_USB 1272 #include "ehci-tilegx.c" 1273 #define PLATFORM_DRIVER ehci_hcd_tilegx_driver 1274 #endif 1275 1276 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP 1277 #include "ehci-pmcmsp.c" 1278 #define PLATFORM_DRIVER ehci_hcd_msp_driver 1279 #endif 1280 1281 #ifdef CONFIG_SPARC_LEON 1282 #include "ehci-grlib.c" 1283 #define PLATFORM_DRIVER ehci_grlib_driver 1284 #endif 1285 1286 #ifdef CONFIG_USB_EHCI_MV 1287 #include "ehci-mv.c" 1288 #define PLATFORM_DRIVER ehci_mv_driver 1289 #endif 1290 1291 #ifdef CONFIG_MIPS_SEAD3 1292 #include "ehci-sead3.c" 1293 #define PLATFORM_DRIVER ehci_hcd_sead3_driver 1294 #endif 1295 1296 static int __init ehci_hcd_init(void) 1297 { 1298 int retval = 0; 1299 1300 if (usb_disabled()) 1301 return -ENODEV; 1302 1303 printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name); 1304 set_bit(USB_EHCI_LOADED, &usb_hcds_loaded); 1305 if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) || 1306 test_bit(USB_OHCI_LOADED, &usb_hcds_loaded)) 1307 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded" 1308 " before uhci_hcd and ohci_hcd, not after\n"); 1309 1310 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n", 1311 hcd_name, 1312 sizeof(struct ehci_qh), sizeof(struct ehci_qtd), 1313 sizeof(struct ehci_itd), sizeof(struct ehci_sitd)); 1314 1315 #ifdef CONFIG_DYNAMIC_DEBUG 1316 ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root); 1317 if (!ehci_debug_root) { 1318 retval = -ENOENT; 1319 goto err_debug; 1320 } 1321 #endif 1322 1323 #ifdef PLATFORM_DRIVER 1324 retval = platform_driver_register(&PLATFORM_DRIVER); 1325 if (retval < 0) 1326 goto clean0; 1327 #endif 1328 1329 #ifdef PS3_SYSTEM_BUS_DRIVER 1330 retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER); 1331 if (retval < 0) 1332 goto clean2; 1333 #endif 1334 1335 #ifdef OF_PLATFORM_DRIVER 1336 retval = platform_driver_register(&OF_PLATFORM_DRIVER); 1337 if (retval < 0) 1338 goto clean3; 1339 #endif 1340 1341 #ifdef XILINX_OF_PLATFORM_DRIVER 1342 retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER); 1343 if (retval < 0) 1344 goto clean4; 1345 #endif 1346 return retval; 1347 1348 #ifdef XILINX_OF_PLATFORM_DRIVER 1349 /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */ 1350 clean4: 1351 #endif 1352 #ifdef OF_PLATFORM_DRIVER 1353 platform_driver_unregister(&OF_PLATFORM_DRIVER); 1354 clean3: 1355 #endif 1356 #ifdef PS3_SYSTEM_BUS_DRIVER 1357 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER); 1358 clean2: 1359 #endif 1360 #ifdef PLATFORM_DRIVER 1361 platform_driver_unregister(&PLATFORM_DRIVER); 1362 clean0: 1363 #endif 1364 #ifdef CONFIG_DYNAMIC_DEBUG 1365 debugfs_remove(ehci_debug_root); 1366 ehci_debug_root = NULL; 1367 err_debug: 1368 #endif 1369 clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded); 1370 return retval; 1371 } 1372 module_init(ehci_hcd_init); 1373 1374 static void __exit ehci_hcd_cleanup(void) 1375 { 1376 #ifdef XILINX_OF_PLATFORM_DRIVER 1377 platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); 1378 #endif 1379 #ifdef OF_PLATFORM_DRIVER 1380 platform_driver_unregister(&OF_PLATFORM_DRIVER); 1381 #endif 1382 #ifdef PLATFORM_DRIVER 1383 platform_driver_unregister(&PLATFORM_DRIVER); 1384 #endif 1385 #ifdef PS3_SYSTEM_BUS_DRIVER 1386 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER); 1387 #endif 1388 #ifdef CONFIG_DYNAMIC_DEBUG 1389 debugfs_remove(ehci_debug_root); 1390 #endif 1391 clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded); 1392 } 1393 module_exit(ehci_hcd_cleanup); 1394