1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Enhanced Host Controller Interface (EHCI) driver for USB. 4 * 5 * Maintainer: Alan Stern <stern@rowland.harvard.edu> 6 * 7 * Copyright (c) 2000-2004 by David Brownell 8 */ 9 10 #include <linux/module.h> 11 #include <linux/pci.h> 12 #include <linux/dmapool.h> 13 #include <linux/kernel.h> 14 #include <linux/delay.h> 15 #include <linux/ioport.h> 16 #include <linux/sched.h> 17 #include <linux/vmalloc.h> 18 #include <linux/errno.h> 19 #include <linux/init.h> 20 #include <linux/hrtimer.h> 21 #include <linux/list.h> 22 #include <linux/interrupt.h> 23 #include <linux/usb.h> 24 #include <linux/usb/hcd.h> 25 #include <linux/moduleparam.h> 26 #include <linux/dma-mapping.h> 27 #include <linux/debugfs.h> 28 #include <linux/slab.h> 29 30 #include <asm/byteorder.h> 31 #include <asm/io.h> 32 #include <asm/irq.h> 33 #include <asm/unaligned.h> 34 35 #if defined(CONFIG_PPC_PS3) 36 #include <asm/firmware.h> 37 #endif 38 39 /*-------------------------------------------------------------------------*/ 40 41 /* 42 * EHCI hc_driver implementation ... experimental, incomplete. 43 * Based on the final 1.0 register interface specification. 44 * 45 * USB 2.0 shows up in upcoming www.pcmcia.org technology. 46 * First was PCMCIA, like ISA; then CardBus, which is PCI. 47 * Next comes "CardBay", using USB 2.0 signals. 48 * 49 * Contains additional contributions by Brad Hards, Rory Bolt, and others. 50 * Special thanks to Intel and VIA for providing host controllers to 51 * test this driver on, and Cypress (including In-System Design) for 52 * providing early devices for those host controllers to talk to! 53 */ 54 55 #define DRIVER_AUTHOR "David Brownell" 56 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver" 57 58 static const char hcd_name [] = "ehci_hcd"; 59 60 61 #undef EHCI_URB_TRACE 62 63 /* magic numbers that can affect system performance */ 64 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */ 65 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */ 66 #define EHCI_TUNE_RL_TT 0 67 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */ 68 #define EHCI_TUNE_MULT_TT 1 69 /* 70 * Some drivers think it's safe to schedule isochronous transfers more than 71 * 256 ms into the future (partly as a result of an old bug in the scheduling 72 * code). In an attempt to avoid trouble, we will use a minimum scheduling 73 * length of 512 frames instead of 256. 74 */ 75 #define EHCI_TUNE_FLS 1 /* (medium) 512-frame schedule */ 76 77 /* Initial IRQ latency: faster than hw default */ 78 static int log2_irq_thresh = 0; // 0 to 6 79 module_param (log2_irq_thresh, int, S_IRUGO); 80 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes"); 81 82 /* initial park setting: slower than hw default */ 83 static unsigned park = 0; 84 module_param (park, uint, S_IRUGO); 85 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets"); 86 87 /* for flakey hardware, ignore overcurrent indicators */ 88 static bool ignore_oc; 89 module_param (ignore_oc, bool, S_IRUGO); 90 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications"); 91 92 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) 93 94 /*-------------------------------------------------------------------------*/ 95 96 #include "ehci.h" 97 #include "pci-quirks.h" 98 99 static void compute_tt_budget(u8 budget_table[EHCI_BANDWIDTH_SIZE], 100 struct ehci_tt *tt); 101 102 /* 103 * The MosChip MCS9990 controller updates its microframe counter 104 * a little before the frame counter, and occasionally we will read 105 * the invalid intermediate value. Avoid problems by checking the 106 * microframe number (the low-order 3 bits); if they are 0 then 107 * re-read the register to get the correct value. 108 */ 109 static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci) 110 { 111 unsigned uf; 112 113 uf = ehci_readl(ehci, &ehci->regs->frame_index); 114 if (unlikely((uf & 7) == 0)) 115 uf = ehci_readl(ehci, &ehci->regs->frame_index); 116 return uf; 117 } 118 119 static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci) 120 { 121 if (ehci->frame_index_bug) 122 return ehci_moschip_read_frame_index(ehci); 123 return ehci_readl(ehci, &ehci->regs->frame_index); 124 } 125 126 #include "ehci-dbg.c" 127 128 /*-------------------------------------------------------------------------*/ 129 130 /* 131 * ehci_handshake - spin reading hc until handshake completes or fails 132 * @ptr: address of hc register to be read 133 * @mask: bits to look at in result of read 134 * @done: value of those bits when handshake succeeds 135 * @usec: timeout in microseconds 136 * 137 * Returns negative errno, or zero on success 138 * 139 * Success happens when the "mask" bits have the specified value (hardware 140 * handshake done). There are two failure modes: "usec" have passed (major 141 * hardware flakeout), or the register reads as all-ones (hardware removed). 142 * 143 * That last failure should_only happen in cases like physical cardbus eject 144 * before driver shutdown. But it also seems to be caused by bugs in cardbus 145 * bridge shutdown: shutting down the bridge before the devices using it. 146 */ 147 int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr, 148 u32 mask, u32 done, int usec) 149 { 150 u32 result; 151 152 do { 153 result = ehci_readl(ehci, ptr); 154 if (result == ~(u32)0) /* card removed */ 155 return -ENODEV; 156 result &= mask; 157 if (result == done) 158 return 0; 159 udelay (1); 160 usec--; 161 } while (usec > 0); 162 return -ETIMEDOUT; 163 } 164 EXPORT_SYMBOL_GPL(ehci_handshake); 165 166 /* check TDI/ARC silicon is in host mode */ 167 static int tdi_in_host_mode (struct ehci_hcd *ehci) 168 { 169 u32 tmp; 170 171 tmp = ehci_readl(ehci, &ehci->regs->usbmode); 172 return (tmp & 3) == USBMODE_CM_HC; 173 } 174 175 /* 176 * Force HC to halt state from unknown (EHCI spec section 2.3). 177 * Must be called with interrupts enabled and the lock not held. 178 */ 179 static int ehci_halt (struct ehci_hcd *ehci) 180 { 181 u32 temp; 182 183 spin_lock_irq(&ehci->lock); 184 185 /* disable any irqs left enabled by previous code */ 186 ehci_writel(ehci, 0, &ehci->regs->intr_enable); 187 188 if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) { 189 spin_unlock_irq(&ehci->lock); 190 return 0; 191 } 192 193 /* 194 * This routine gets called during probe before ehci->command 195 * has been initialized, so we can't rely on its value. 196 */ 197 ehci->command &= ~CMD_RUN; 198 temp = ehci_readl(ehci, &ehci->regs->command); 199 temp &= ~(CMD_RUN | CMD_IAAD); 200 ehci_writel(ehci, temp, &ehci->regs->command); 201 202 spin_unlock_irq(&ehci->lock); 203 synchronize_irq(ehci_to_hcd(ehci)->irq); 204 205 return ehci_handshake(ehci, &ehci->regs->status, 206 STS_HALT, STS_HALT, 16 * 125); 207 } 208 209 /* put TDI/ARC silicon into EHCI mode */ 210 static void tdi_reset (struct ehci_hcd *ehci) 211 { 212 u32 tmp; 213 214 tmp = ehci_readl(ehci, &ehci->regs->usbmode); 215 tmp |= USBMODE_CM_HC; 216 /* The default byte access to MMR space is LE after 217 * controller reset. Set the required endian mode 218 * for transfer buffers to match the host microprocessor 219 */ 220 if (ehci_big_endian_mmio(ehci)) 221 tmp |= USBMODE_BE; 222 ehci_writel(ehci, tmp, &ehci->regs->usbmode); 223 } 224 225 /* 226 * Reset a non-running (STS_HALT == 1) controller. 227 * Must be called with interrupts enabled and the lock not held. 228 */ 229 int ehci_reset(struct ehci_hcd *ehci) 230 { 231 int retval; 232 u32 command = ehci_readl(ehci, &ehci->regs->command); 233 234 /* If the EHCI debug controller is active, special care must be 235 * taken before and after a host controller reset */ 236 if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci))) 237 ehci->debug = NULL; 238 239 command |= CMD_RESET; 240 dbg_cmd (ehci, "reset", command); 241 ehci_writel(ehci, command, &ehci->regs->command); 242 ehci->rh_state = EHCI_RH_HALTED; 243 ehci->next_statechange = jiffies; 244 retval = ehci_handshake(ehci, &ehci->regs->command, 245 CMD_RESET, 0, 250 * 1000); 246 247 if (ehci->has_hostpc) { 248 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS, 249 &ehci->regs->usbmode_ex); 250 ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning); 251 } 252 if (retval) 253 return retval; 254 255 if (ehci_is_TDI(ehci)) 256 tdi_reset (ehci); 257 258 if (ehci->debug) 259 dbgp_external_startup(ehci_to_hcd(ehci)); 260 261 ehci->port_c_suspend = ehci->suspended_ports = 262 ehci->resuming_ports = 0; 263 return retval; 264 } 265 EXPORT_SYMBOL_GPL(ehci_reset); 266 267 /* 268 * Idle the controller (turn off the schedules). 269 * Must be called with interrupts enabled and the lock not held. 270 */ 271 static void ehci_quiesce (struct ehci_hcd *ehci) 272 { 273 u32 temp; 274 275 if (ehci->rh_state != EHCI_RH_RUNNING) 276 return; 277 278 /* wait for any schedule enables/disables to take effect */ 279 temp = (ehci->command << 10) & (STS_ASS | STS_PSS); 280 ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp, 281 16 * 125); 282 283 /* then disable anything that's still active */ 284 spin_lock_irq(&ehci->lock); 285 ehci->command &= ~(CMD_ASE | CMD_PSE); 286 ehci_writel(ehci, ehci->command, &ehci->regs->command); 287 spin_unlock_irq(&ehci->lock); 288 289 /* hardware can take 16 microframes to turn off ... */ 290 ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0, 291 16 * 125); 292 } 293 294 /*-------------------------------------------------------------------------*/ 295 296 static void end_iaa_cycle(struct ehci_hcd *ehci); 297 static void end_unlink_async(struct ehci_hcd *ehci); 298 static void unlink_empty_async(struct ehci_hcd *ehci); 299 static void ehci_work(struct ehci_hcd *ehci); 300 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh); 301 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh); 302 static int ehci_port_power(struct ehci_hcd *ehci, int portnum, bool enable); 303 304 #include "ehci-timer.c" 305 #include "ehci-hub.c" 306 #include "ehci-mem.c" 307 #include "ehci-q.c" 308 #include "ehci-sched.c" 309 #include "ehci-sysfs.c" 310 311 /*-------------------------------------------------------------------------*/ 312 313 /* On some systems, leaving remote wakeup enabled prevents system shutdown. 314 * The firmware seems to think that powering off is a wakeup event! 315 * This routine turns off remote wakeup and everything else, on all ports. 316 */ 317 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci) 318 { 319 int port = HCS_N_PORTS(ehci->hcs_params); 320 321 while (port--) { 322 spin_unlock_irq(&ehci->lock); 323 ehci_port_power(ehci, port, false); 324 spin_lock_irq(&ehci->lock); 325 ehci_writel(ehci, PORT_RWC_BITS, 326 &ehci->regs->port_status[port]); 327 } 328 } 329 330 /* 331 * Halt HC, turn off all ports, and let the BIOS use the companion controllers. 332 * Must be called with interrupts enabled and the lock not held. 333 */ 334 static void ehci_silence_controller(struct ehci_hcd *ehci) 335 { 336 ehci_halt(ehci); 337 338 spin_lock_irq(&ehci->lock); 339 ehci->rh_state = EHCI_RH_HALTED; 340 ehci_turn_off_all_ports(ehci); 341 342 /* make BIOS/etc use companion controller during reboot */ 343 ehci_writel(ehci, 0, &ehci->regs->configured_flag); 344 345 /* unblock posted writes */ 346 ehci_readl(ehci, &ehci->regs->configured_flag); 347 spin_unlock_irq(&ehci->lock); 348 } 349 350 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc). 351 * This forcibly disables dma and IRQs, helping kexec and other cases 352 * where the next system software may expect clean state. 353 */ 354 static void ehci_shutdown(struct usb_hcd *hcd) 355 { 356 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 357 358 /** 359 * Protect the system from crashing at system shutdown in cases where 360 * usb host is not added yet from OTG controller driver. 361 * As ehci_setup() not done yet, so stop accessing registers or 362 * variables initialized in ehci_setup() 363 */ 364 if (!ehci->sbrn) 365 return; 366 367 spin_lock_irq(&ehci->lock); 368 ehci->shutdown = true; 369 ehci->rh_state = EHCI_RH_STOPPING; 370 ehci->enabled_hrtimer_events = 0; 371 spin_unlock_irq(&ehci->lock); 372 373 ehci_silence_controller(ehci); 374 375 hrtimer_cancel(&ehci->hrtimer); 376 } 377 378 /*-------------------------------------------------------------------------*/ 379 380 /* 381 * ehci_work is called from some interrupts, timers, and so on. 382 * it calls driver completion functions, after dropping ehci->lock. 383 */ 384 static void ehci_work (struct ehci_hcd *ehci) 385 { 386 /* another CPU may drop ehci->lock during a schedule scan while 387 * it reports urb completions. this flag guards against bogus 388 * attempts at re-entrant schedule scanning. 389 */ 390 if (ehci->scanning) { 391 ehci->need_rescan = true; 392 return; 393 } 394 ehci->scanning = true; 395 396 rescan: 397 ehci->need_rescan = false; 398 if (ehci->async_count) 399 scan_async(ehci); 400 if (ehci->intr_count > 0) 401 scan_intr(ehci); 402 if (ehci->isoc_count > 0) 403 scan_isoc(ehci); 404 if (ehci->need_rescan) 405 goto rescan; 406 ehci->scanning = false; 407 408 /* the IO watchdog guards against hardware or driver bugs that 409 * misplace IRQs, and should let us run completely without IRQs. 410 * such lossage has been observed on both VT6202 and VT8235. 411 */ 412 turn_on_io_watchdog(ehci); 413 } 414 415 /* 416 * Called when the ehci_hcd module is removed. 417 */ 418 static void ehci_stop (struct usb_hcd *hcd) 419 { 420 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 421 422 ehci_dbg (ehci, "stop\n"); 423 424 /* no more interrupts ... */ 425 426 spin_lock_irq(&ehci->lock); 427 ehci->enabled_hrtimer_events = 0; 428 spin_unlock_irq(&ehci->lock); 429 430 ehci_quiesce(ehci); 431 ehci_silence_controller(ehci); 432 ehci_reset (ehci); 433 434 hrtimer_cancel(&ehci->hrtimer); 435 remove_sysfs_files(ehci); 436 remove_debug_files (ehci); 437 438 /* root hub is shut down separately (first, when possible) */ 439 spin_lock_irq (&ehci->lock); 440 end_free_itds(ehci); 441 spin_unlock_irq (&ehci->lock); 442 ehci_mem_cleanup (ehci); 443 444 if (ehci->amd_pll_fix == 1) 445 usb_amd_dev_put(); 446 447 dbg_status (ehci, "ehci_stop completed", 448 ehci_readl(ehci, &ehci->regs->status)); 449 } 450 451 /* one-time init, only for memory state */ 452 static int ehci_init(struct usb_hcd *hcd) 453 { 454 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 455 u32 temp; 456 int retval; 457 u32 hcc_params; 458 struct ehci_qh_hw *hw; 459 460 spin_lock_init(&ehci->lock); 461 462 /* 463 * keep io watchdog by default, those good HCDs could turn off it later 464 */ 465 ehci->need_io_watchdog = 1; 466 467 hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); 468 ehci->hrtimer.function = ehci_hrtimer_func; 469 ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT; 470 471 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params); 472 473 /* 474 * by default set standard 80% (== 100 usec/uframe) max periodic 475 * bandwidth as required by USB 2.0 476 */ 477 ehci->uframe_periodic_max = 100; 478 479 /* 480 * hw default: 1K periodic list heads, one per frame. 481 * periodic_size can shrink by USBCMD update if hcc_params allows. 482 */ 483 ehci->periodic_size = DEFAULT_I_TDPS; 484 INIT_LIST_HEAD(&ehci->async_unlink); 485 INIT_LIST_HEAD(&ehci->async_idle); 486 INIT_LIST_HEAD(&ehci->intr_unlink_wait); 487 INIT_LIST_HEAD(&ehci->intr_unlink); 488 INIT_LIST_HEAD(&ehci->intr_qh_list); 489 INIT_LIST_HEAD(&ehci->cached_itd_list); 490 INIT_LIST_HEAD(&ehci->cached_sitd_list); 491 INIT_LIST_HEAD(&ehci->tt_list); 492 493 if (HCC_PGM_FRAMELISTLEN(hcc_params)) { 494 /* periodic schedule size can be smaller than default */ 495 switch (EHCI_TUNE_FLS) { 496 case 0: ehci->periodic_size = 1024; break; 497 case 1: ehci->periodic_size = 512; break; 498 case 2: ehci->periodic_size = 256; break; 499 default: BUG(); 500 } 501 } 502 if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0) 503 return retval; 504 505 /* controllers may cache some of the periodic schedule ... */ 506 if (HCC_ISOC_CACHE(hcc_params)) // full frame cache 507 ehci->i_thresh = 0; 508 else // N microframes cached 509 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params); 510 511 /* 512 * dedicate a qh for the async ring head, since we couldn't unlink 513 * a 'real' qh without stopping the async schedule [4.8]. use it 514 * as the 'reclamation list head' too. 515 * its dummy is used in hw_alt_next of many tds, to prevent the qh 516 * from automatically advancing to the next td after short reads. 517 */ 518 ehci->async->qh_next.qh = NULL; 519 hw = ehci->async->hw; 520 hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma); 521 hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD); 522 #if defined(CONFIG_PPC_PS3) 523 hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE); 524 #endif 525 hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT); 526 hw->hw_qtd_next = EHCI_LIST_END(ehci); 527 ehci->async->qh_state = QH_STATE_LINKED; 528 hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma); 529 530 /* clear interrupt enables, set irq latency */ 531 if (log2_irq_thresh < 0 || log2_irq_thresh > 6) 532 log2_irq_thresh = 0; 533 temp = 1 << (16 + log2_irq_thresh); 534 if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) { 535 ehci->has_ppcd = 1; 536 ehci_dbg(ehci, "enable per-port change event\n"); 537 temp |= CMD_PPCEE; 538 } 539 if (HCC_CANPARK(hcc_params)) { 540 /* HW default park == 3, on hardware that supports it (like 541 * NVidia and ALI silicon), maximizes throughput on the async 542 * schedule by avoiding QH fetches between transfers. 543 * 544 * With fast usb storage devices and NForce2, "park" seems to 545 * make problems: throughput reduction (!), data errors... 546 */ 547 if (park) { 548 park = min(park, (unsigned) 3); 549 temp |= CMD_PARK; 550 temp |= park << 8; 551 } 552 ehci_dbg(ehci, "park %d\n", park); 553 } 554 if (HCC_PGM_FRAMELISTLEN(hcc_params)) { 555 /* periodic schedule size can be smaller than default */ 556 temp &= ~(3 << 2); 557 temp |= (EHCI_TUNE_FLS << 2); 558 } 559 ehci->command = temp; 560 561 /* Accept arbitrarily long scatter-gather lists */ 562 if (!(hcd->driver->flags & HCD_LOCAL_MEM)) 563 hcd->self.sg_tablesize = ~0; 564 565 /* Prepare for unlinking active QHs */ 566 ehci->old_current = ~0; 567 return 0; 568 } 569 570 /* start HC running; it's halted, ehci_init() has been run (once) */ 571 static int ehci_run (struct usb_hcd *hcd) 572 { 573 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 574 u32 temp; 575 u32 hcc_params; 576 577 hcd->uses_new_polling = 1; 578 579 /* EHCI spec section 4.1 */ 580 581 ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list); 582 ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next); 583 584 /* 585 * hcc_params controls whether ehci->regs->segment must (!!!) 586 * be used; it constrains QH/ITD/SITD and QTD locations. 587 * dma_pool consistent memory always uses segment zero. 588 * streaming mappings for I/O buffers, like pci_map_single(), 589 * can return segments above 4GB, if the device allows. 590 * 591 * NOTE: the dma mask is visible through dev->dma_mask, so 592 * drivers can pass this info along ... like NETIF_F_HIGHDMA, 593 * Scsi_Host.highmem_io, and so forth. It's readonly to all 594 * host side drivers though. 595 */ 596 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params); 597 if (HCC_64BIT_ADDR(hcc_params)) { 598 ehci_writel(ehci, 0, &ehci->regs->segment); 599 #if 0 600 // this is deeply broken on almost all architectures 601 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64))) 602 ehci_info(ehci, "enabled 64bit DMA\n"); 603 #endif 604 } 605 606 607 // Philips, Intel, and maybe others need CMD_RUN before the 608 // root hub will detect new devices (why?); NEC doesn't 609 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); 610 ehci->command |= CMD_RUN; 611 ehci_writel(ehci, ehci->command, &ehci->regs->command); 612 dbg_cmd (ehci, "init", ehci->command); 613 614 /* 615 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices 616 * are explicitly handed to companion controller(s), so no TT is 617 * involved with the root hub. (Except where one is integrated, 618 * and there's no companion controller unless maybe for USB OTG.) 619 * 620 * Turning on the CF flag will transfer ownership of all ports 621 * from the companions to the EHCI controller. If any of the 622 * companions are in the middle of a port reset at the time, it 623 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem 624 * guarantees that no resets are in progress. After we set CF, 625 * a short delay lets the hardware catch up; new resets shouldn't 626 * be started before the port switching actions could complete. 627 */ 628 down_write(&ehci_cf_port_reset_rwsem); 629 ehci->rh_state = EHCI_RH_RUNNING; 630 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag); 631 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */ 632 msleep(5); 633 up_write(&ehci_cf_port_reset_rwsem); 634 ehci->last_periodic_enable = ktime_get_real(); 635 636 temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase)); 637 ehci_info (ehci, 638 "USB %x.%x started, EHCI %x.%02x%s\n", 639 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), 640 temp >> 8, temp & 0xff, 641 ignore_oc ? ", overcurrent ignored" : ""); 642 643 ehci_writel(ehci, INTR_MASK, 644 &ehci->regs->intr_enable); /* Turn On Interrupts */ 645 646 /* GRR this is run-once init(), being done every time the HC starts. 647 * So long as they're part of class devices, we can't do it init() 648 * since the class device isn't created that early. 649 */ 650 create_debug_files(ehci); 651 create_sysfs_files(ehci); 652 653 return 0; 654 } 655 656 int ehci_setup(struct usb_hcd *hcd) 657 { 658 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 659 int retval; 660 661 ehci->regs = (void __iomem *)ehci->caps + 662 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase)); 663 dbg_hcs_params(ehci, "reset"); 664 dbg_hcc_params(ehci, "reset"); 665 666 /* cache this readonly data; minimize chip reads */ 667 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); 668 669 ehci->sbrn = HCD_USB2; 670 671 /* data structure init */ 672 retval = ehci_init(hcd); 673 if (retval) 674 return retval; 675 676 retval = ehci_halt(ehci); 677 if (retval) { 678 ehci_mem_cleanup(ehci); 679 return retval; 680 } 681 682 ehci_reset(ehci); 683 684 return 0; 685 } 686 EXPORT_SYMBOL_GPL(ehci_setup); 687 688 /*-------------------------------------------------------------------------*/ 689 690 static irqreturn_t ehci_irq (struct usb_hcd *hcd) 691 { 692 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 693 u32 status, masked_status, pcd_status = 0, cmd; 694 int bh; 695 unsigned long flags; 696 697 /* 698 * For threadirqs option we use spin_lock_irqsave() variant to prevent 699 * deadlock with ehci hrtimer callback, because hrtimer callbacks run 700 * in interrupt context even when threadirqs is specified. We can go 701 * back to spin_lock() variant when hrtimer callbacks become threaded. 702 */ 703 spin_lock_irqsave(&ehci->lock, flags); 704 705 status = ehci_readl(ehci, &ehci->regs->status); 706 707 /* e.g. cardbus physical eject */ 708 if (status == ~(u32) 0) { 709 ehci_dbg (ehci, "device removed\n"); 710 goto dead; 711 } 712 713 /* 714 * We don't use STS_FLR, but some controllers don't like it to 715 * remain on, so mask it out along with the other status bits. 716 */ 717 masked_status = status & (INTR_MASK | STS_FLR); 718 719 /* Shared IRQ? */ 720 if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) { 721 spin_unlock_irqrestore(&ehci->lock, flags); 722 return IRQ_NONE; 723 } 724 725 /* clear (just) interrupts */ 726 ehci_writel(ehci, masked_status, &ehci->regs->status); 727 cmd = ehci_readl(ehci, &ehci->regs->command); 728 bh = 0; 729 730 /* normal [4.15.1.2] or error [4.15.1.1] completion */ 731 if (likely ((status & (STS_INT|STS_ERR)) != 0)) { 732 if (likely ((status & STS_ERR) == 0)) 733 COUNT (ehci->stats.normal); 734 else 735 COUNT (ehci->stats.error); 736 bh = 1; 737 } 738 739 /* complete the unlinking of some qh [4.15.2.3] */ 740 if (status & STS_IAA) { 741 742 /* Turn off the IAA watchdog */ 743 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG); 744 745 /* 746 * Mild optimization: Allow another IAAD to reset the 747 * hrtimer, if one occurs before the next expiration. 748 * In theory we could always cancel the hrtimer, but 749 * tests show that about half the time it will be reset 750 * for some other event anyway. 751 */ 752 if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG) 753 ++ehci->next_hrtimer_event; 754 755 /* guard against (alleged) silicon errata */ 756 if (cmd & CMD_IAAD) 757 ehci_dbg(ehci, "IAA with IAAD still set?\n"); 758 if (ehci->iaa_in_progress) 759 COUNT(ehci->stats.iaa); 760 end_iaa_cycle(ehci); 761 } 762 763 /* remote wakeup [4.3.1] */ 764 if (status & STS_PCD) { 765 unsigned i = HCS_N_PORTS (ehci->hcs_params); 766 u32 ppcd = ~0; 767 768 /* kick root hub later */ 769 pcd_status = status; 770 771 /* resume root hub? */ 772 if (ehci->rh_state == EHCI_RH_SUSPENDED) 773 usb_hcd_resume_root_hub(hcd); 774 775 /* get per-port change detect bits */ 776 if (ehci->has_ppcd) 777 ppcd = status >> 16; 778 779 while (i--) { 780 int pstatus; 781 782 /* leverage per-port change bits feature */ 783 if (!(ppcd & (1 << i))) 784 continue; 785 pstatus = ehci_readl(ehci, 786 &ehci->regs->port_status[i]); 787 788 if (pstatus & PORT_OWNER) 789 continue; 790 if (!(test_bit(i, &ehci->suspended_ports) && 791 ((pstatus & PORT_RESUME) || 792 !(pstatus & PORT_SUSPEND)) && 793 (pstatus & PORT_PE) && 794 ehci->reset_done[i] == 0)) 795 continue; 796 797 /* start USB_RESUME_TIMEOUT msec resume signaling from 798 * this port, and make hub_wq collect 799 * PORT_STAT_C_SUSPEND to stop that signaling. 800 */ 801 ehci->reset_done[i] = jiffies + 802 msecs_to_jiffies(USB_RESUME_TIMEOUT); 803 set_bit(i, &ehci->resuming_ports); 804 ehci_dbg (ehci, "port %d remote wakeup\n", i + 1); 805 usb_hcd_start_port_resume(&hcd->self, i); 806 mod_timer(&hcd->rh_timer, ehci->reset_done[i]); 807 } 808 } 809 810 /* PCI errors [4.15.2.4] */ 811 if (unlikely ((status & STS_FATAL) != 0)) { 812 ehci_err(ehci, "fatal error\n"); 813 dbg_cmd(ehci, "fatal", cmd); 814 dbg_status(ehci, "fatal", status); 815 dead: 816 usb_hc_died(hcd); 817 818 /* Don't let the controller do anything more */ 819 ehci->shutdown = true; 820 ehci->rh_state = EHCI_RH_STOPPING; 821 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE); 822 ehci_writel(ehci, ehci->command, &ehci->regs->command); 823 ehci_writel(ehci, 0, &ehci->regs->intr_enable); 824 ehci_handle_controller_death(ehci); 825 826 /* Handle completions when the controller stops */ 827 bh = 0; 828 } 829 830 if (bh) 831 ehci_work (ehci); 832 spin_unlock_irqrestore(&ehci->lock, flags); 833 if (pcd_status) 834 usb_hcd_poll_rh_status(hcd); 835 return IRQ_HANDLED; 836 } 837 838 /*-------------------------------------------------------------------------*/ 839 840 /* 841 * non-error returns are a promise to giveback() the urb later 842 * we drop ownership so next owner (or urb unlink) can get it 843 * 844 * urb + dev is in hcd.self.controller.urb_list 845 * we're queueing TDs onto software and hardware lists 846 * 847 * hcd-specific init for hcpriv hasn't been done yet 848 * 849 * NOTE: control, bulk, and interrupt share the same code to append TDs 850 * to a (possibly active) QH, and the same QH scanning code. 851 */ 852 static int ehci_urb_enqueue ( 853 struct usb_hcd *hcd, 854 struct urb *urb, 855 gfp_t mem_flags 856 ) { 857 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 858 struct list_head qtd_list; 859 860 INIT_LIST_HEAD (&qtd_list); 861 862 switch (usb_pipetype (urb->pipe)) { 863 case PIPE_CONTROL: 864 /* qh_completions() code doesn't handle all the fault cases 865 * in multi-TD control transfers. Even 1KB is rare anyway. 866 */ 867 if (urb->transfer_buffer_length > (16 * 1024)) 868 return -EMSGSIZE; 869 /* FALLTHROUGH */ 870 /* case PIPE_BULK: */ 871 default: 872 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags)) 873 return -ENOMEM; 874 return submit_async(ehci, urb, &qtd_list, mem_flags); 875 876 case PIPE_INTERRUPT: 877 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags)) 878 return -ENOMEM; 879 return intr_submit(ehci, urb, &qtd_list, mem_flags); 880 881 case PIPE_ISOCHRONOUS: 882 if (urb->dev->speed == USB_SPEED_HIGH) 883 return itd_submit (ehci, urb, mem_flags); 884 else 885 return sitd_submit (ehci, urb, mem_flags); 886 } 887 } 888 889 /* remove from hardware lists 890 * completions normally happen asynchronously 891 */ 892 893 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) 894 { 895 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 896 struct ehci_qh *qh; 897 unsigned long flags; 898 int rc; 899 900 spin_lock_irqsave (&ehci->lock, flags); 901 rc = usb_hcd_check_unlink_urb(hcd, urb, status); 902 if (rc) 903 goto done; 904 905 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) { 906 /* 907 * We don't expedite dequeue for isochronous URBs. 908 * Just wait until they complete normally or their 909 * time slot expires. 910 */ 911 } else { 912 qh = (struct ehci_qh *) urb->hcpriv; 913 qh->unlink_reason |= QH_UNLINK_REQUESTED; 914 switch (qh->qh_state) { 915 case QH_STATE_LINKED: 916 if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) 917 start_unlink_intr(ehci, qh); 918 else 919 start_unlink_async(ehci, qh); 920 break; 921 case QH_STATE_COMPLETING: 922 qh->dequeue_during_giveback = 1; 923 break; 924 case QH_STATE_UNLINK: 925 case QH_STATE_UNLINK_WAIT: 926 /* already started */ 927 break; 928 case QH_STATE_IDLE: 929 /* QH might be waiting for a Clear-TT-Buffer */ 930 qh_completions(ehci, qh); 931 break; 932 } 933 } 934 done: 935 spin_unlock_irqrestore (&ehci->lock, flags); 936 return rc; 937 } 938 939 /*-------------------------------------------------------------------------*/ 940 941 // bulk qh holds the data toggle 942 943 static void 944 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep) 945 { 946 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 947 unsigned long flags; 948 struct ehci_qh *qh; 949 950 /* ASSERT: any requests/urbs are being unlinked */ 951 /* ASSERT: nobody can be submitting urbs for this any more */ 952 953 rescan: 954 spin_lock_irqsave (&ehci->lock, flags); 955 qh = ep->hcpriv; 956 if (!qh) 957 goto done; 958 959 /* endpoints can be iso streams. for now, we don't 960 * accelerate iso completions ... so spin a while. 961 */ 962 if (qh->hw == NULL) { 963 struct ehci_iso_stream *stream = ep->hcpriv; 964 965 if (!list_empty(&stream->td_list)) 966 goto idle_timeout; 967 968 /* BUG_ON(!list_empty(&stream->free_list)); */ 969 reserve_release_iso_bandwidth(ehci, stream, -1); 970 kfree(stream); 971 goto done; 972 } 973 974 qh->unlink_reason |= QH_UNLINK_REQUESTED; 975 switch (qh->qh_state) { 976 case QH_STATE_LINKED: 977 if (list_empty(&qh->qtd_list)) 978 qh->unlink_reason |= QH_UNLINK_QUEUE_EMPTY; 979 else 980 WARN_ON(1); 981 if (usb_endpoint_type(&ep->desc) != USB_ENDPOINT_XFER_INT) 982 start_unlink_async(ehci, qh); 983 else 984 start_unlink_intr(ehci, qh); 985 /* FALL THROUGH */ 986 case QH_STATE_COMPLETING: /* already in unlinking */ 987 case QH_STATE_UNLINK: /* wait for hw to finish? */ 988 case QH_STATE_UNLINK_WAIT: 989 idle_timeout: 990 spin_unlock_irqrestore (&ehci->lock, flags); 991 schedule_timeout_uninterruptible(1); 992 goto rescan; 993 case QH_STATE_IDLE: /* fully unlinked */ 994 if (qh->clearing_tt) 995 goto idle_timeout; 996 if (list_empty (&qh->qtd_list)) { 997 if (qh->ps.bw_uperiod) 998 reserve_release_intr_bandwidth(ehci, qh, -1); 999 qh_destroy(ehci, qh); 1000 break; 1001 } 1002 /* fall through */ 1003 default: 1004 /* caller was supposed to have unlinked any requests; 1005 * that's not our job. just leak this memory. 1006 */ 1007 ehci_err (ehci, "qh %p (#%02x) state %d%s\n", 1008 qh, ep->desc.bEndpointAddress, qh->qh_state, 1009 list_empty (&qh->qtd_list) ? "" : "(has tds)"); 1010 break; 1011 } 1012 done: 1013 ep->hcpriv = NULL; 1014 spin_unlock_irqrestore (&ehci->lock, flags); 1015 } 1016 1017 static void 1018 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep) 1019 { 1020 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 1021 struct ehci_qh *qh; 1022 int eptype = usb_endpoint_type(&ep->desc); 1023 int epnum = usb_endpoint_num(&ep->desc); 1024 int is_out = usb_endpoint_dir_out(&ep->desc); 1025 unsigned long flags; 1026 1027 if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT) 1028 return; 1029 1030 spin_lock_irqsave(&ehci->lock, flags); 1031 qh = ep->hcpriv; 1032 1033 /* For Bulk and Interrupt endpoints we maintain the toggle state 1034 * in the hardware; the toggle bits in udev aren't used at all. 1035 * When an endpoint is reset by usb_clear_halt() we must reset 1036 * the toggle bit in the QH. 1037 */ 1038 if (qh) { 1039 if (!list_empty(&qh->qtd_list)) { 1040 WARN_ONCE(1, "clear_halt for a busy endpoint\n"); 1041 } else { 1042 /* The toggle value in the QH can't be updated 1043 * while the QH is active. Unlink it now; 1044 * re-linking will call qh_refresh(). 1045 */ 1046 usb_settoggle(qh->ps.udev, epnum, is_out, 0); 1047 qh->unlink_reason |= QH_UNLINK_REQUESTED; 1048 if (eptype == USB_ENDPOINT_XFER_BULK) 1049 start_unlink_async(ehci, qh); 1050 else 1051 start_unlink_intr(ehci, qh); 1052 } 1053 } 1054 spin_unlock_irqrestore(&ehci->lock, flags); 1055 } 1056 1057 static int ehci_get_frame (struct usb_hcd *hcd) 1058 { 1059 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 1060 return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size; 1061 } 1062 1063 /*-------------------------------------------------------------------------*/ 1064 1065 /* Device addition and removal */ 1066 1067 static void ehci_remove_device(struct usb_hcd *hcd, struct usb_device *udev) 1068 { 1069 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 1070 1071 spin_lock_irq(&ehci->lock); 1072 drop_tt(udev); 1073 spin_unlock_irq(&ehci->lock); 1074 } 1075 1076 /*-------------------------------------------------------------------------*/ 1077 1078 #ifdef CONFIG_PM 1079 1080 /* suspend/resume, section 4.3 */ 1081 1082 /* These routines handle the generic parts of controller suspend/resume */ 1083 1084 int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup) 1085 { 1086 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 1087 1088 if (time_before(jiffies, ehci->next_statechange)) 1089 msleep(10); 1090 1091 /* 1092 * Root hub was already suspended. Disable IRQ emission and 1093 * mark HW unaccessible. The PM and USB cores make sure that 1094 * the root hub is either suspended or stopped. 1095 */ 1096 ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup); 1097 1098 spin_lock_irq(&ehci->lock); 1099 ehci_writel(ehci, 0, &ehci->regs->intr_enable); 1100 (void) ehci_readl(ehci, &ehci->regs->intr_enable); 1101 1102 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 1103 spin_unlock_irq(&ehci->lock); 1104 1105 synchronize_irq(hcd->irq); 1106 1107 /* Check for race with a wakeup request */ 1108 if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) { 1109 ehci_resume(hcd, false); 1110 return -EBUSY; 1111 } 1112 1113 return 0; 1114 } 1115 EXPORT_SYMBOL_GPL(ehci_suspend); 1116 1117 /* Returns 0 if power was preserved, 1 if power was lost */ 1118 int ehci_resume(struct usb_hcd *hcd, bool force_reset) 1119 { 1120 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 1121 1122 if (time_before(jiffies, ehci->next_statechange)) 1123 msleep(100); 1124 1125 /* Mark hardware accessible again as we are back to full power by now */ 1126 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 1127 1128 if (ehci->shutdown) 1129 return 0; /* Controller is dead */ 1130 1131 /* 1132 * If CF is still set and reset isn't forced 1133 * then we maintained suspend power. 1134 * Just undo the effect of ehci_suspend(). 1135 */ 1136 if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF && 1137 !force_reset) { 1138 int mask = INTR_MASK; 1139 1140 ehci_prepare_ports_for_controller_resume(ehci); 1141 1142 spin_lock_irq(&ehci->lock); 1143 if (ehci->shutdown) 1144 goto skip; 1145 1146 if (!hcd->self.root_hub->do_remote_wakeup) 1147 mask &= ~STS_PCD; 1148 ehci_writel(ehci, mask, &ehci->regs->intr_enable); 1149 ehci_readl(ehci, &ehci->regs->intr_enable); 1150 skip: 1151 spin_unlock_irq(&ehci->lock); 1152 return 0; 1153 } 1154 1155 /* 1156 * Else reset, to cope with power loss or resume from hibernation 1157 * having let the firmware kick in during reboot. 1158 */ 1159 usb_root_hub_lost_power(hcd->self.root_hub); 1160 (void) ehci_halt(ehci); 1161 (void) ehci_reset(ehci); 1162 1163 spin_lock_irq(&ehci->lock); 1164 if (ehci->shutdown) 1165 goto skip; 1166 1167 ehci_writel(ehci, ehci->command, &ehci->regs->command); 1168 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag); 1169 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */ 1170 1171 ehci->rh_state = EHCI_RH_SUSPENDED; 1172 spin_unlock_irq(&ehci->lock); 1173 1174 return 1; 1175 } 1176 EXPORT_SYMBOL_GPL(ehci_resume); 1177 1178 #endif 1179 1180 /*-------------------------------------------------------------------------*/ 1181 1182 /* 1183 * Generic structure: This gets copied for platform drivers so that 1184 * individual entries can be overridden as needed. 1185 */ 1186 1187 static const struct hc_driver ehci_hc_driver = { 1188 .description = hcd_name, 1189 .product_desc = "EHCI Host Controller", 1190 .hcd_priv_size = sizeof(struct ehci_hcd), 1191 1192 /* 1193 * generic hardware linkage 1194 */ 1195 .irq = ehci_irq, 1196 .flags = HCD_MEMORY | HCD_USB2 | HCD_BH, 1197 1198 /* 1199 * basic lifecycle operations 1200 */ 1201 .reset = ehci_setup, 1202 .start = ehci_run, 1203 .stop = ehci_stop, 1204 .shutdown = ehci_shutdown, 1205 1206 /* 1207 * managing i/o requests and associated device resources 1208 */ 1209 .urb_enqueue = ehci_urb_enqueue, 1210 .urb_dequeue = ehci_urb_dequeue, 1211 .endpoint_disable = ehci_endpoint_disable, 1212 .endpoint_reset = ehci_endpoint_reset, 1213 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete, 1214 1215 /* 1216 * scheduling support 1217 */ 1218 .get_frame_number = ehci_get_frame, 1219 1220 /* 1221 * root hub support 1222 */ 1223 .hub_status_data = ehci_hub_status_data, 1224 .hub_control = ehci_hub_control, 1225 .bus_suspend = ehci_bus_suspend, 1226 .bus_resume = ehci_bus_resume, 1227 .relinquish_port = ehci_relinquish_port, 1228 .port_handed_over = ehci_port_handed_over, 1229 1230 /* 1231 * device support 1232 */ 1233 .free_dev = ehci_remove_device, 1234 }; 1235 1236 void ehci_init_driver(struct hc_driver *drv, 1237 const struct ehci_driver_overrides *over) 1238 { 1239 /* Copy the generic table to drv and then apply the overrides */ 1240 *drv = ehci_hc_driver; 1241 1242 if (over) { 1243 drv->hcd_priv_size += over->extra_priv_size; 1244 if (over->reset) 1245 drv->reset = over->reset; 1246 if (over->port_power) 1247 drv->port_power = over->port_power; 1248 } 1249 } 1250 EXPORT_SYMBOL_GPL(ehci_init_driver); 1251 1252 /*-------------------------------------------------------------------------*/ 1253 1254 MODULE_DESCRIPTION(DRIVER_DESC); 1255 MODULE_AUTHOR (DRIVER_AUTHOR); 1256 MODULE_LICENSE ("GPL"); 1257 1258 #ifdef CONFIG_USB_EHCI_SH 1259 #include "ehci-sh.c" 1260 #define PLATFORM_DRIVER ehci_hcd_sh_driver 1261 #endif 1262 1263 #ifdef CONFIG_PPC_PS3 1264 #include "ehci-ps3.c" 1265 #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver 1266 #endif 1267 1268 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF 1269 #include "ehci-ppc-of.c" 1270 #define OF_PLATFORM_DRIVER ehci_hcd_ppc_of_driver 1271 #endif 1272 1273 #ifdef CONFIG_XPS_USB_HCD_XILINX 1274 #include "ehci-xilinx-of.c" 1275 #define XILINX_OF_PLATFORM_DRIVER ehci_hcd_xilinx_of_driver 1276 #endif 1277 1278 #ifdef CONFIG_TILE_USB 1279 #include "ehci-tilegx.c" 1280 #define PLATFORM_DRIVER ehci_hcd_tilegx_driver 1281 #endif 1282 1283 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP 1284 #include "ehci-pmcmsp.c" 1285 #define PLATFORM_DRIVER ehci_hcd_msp_driver 1286 #endif 1287 1288 #ifdef CONFIG_SPARC_LEON 1289 #include "ehci-grlib.c" 1290 #define PLATFORM_DRIVER ehci_grlib_driver 1291 #endif 1292 1293 #ifdef CONFIG_USB_EHCI_MV 1294 #include "ehci-mv.c" 1295 #define PLATFORM_DRIVER ehci_mv_driver 1296 #endif 1297 1298 static int __init ehci_hcd_init(void) 1299 { 1300 int retval = 0; 1301 1302 if (usb_disabled()) 1303 return -ENODEV; 1304 1305 printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name); 1306 set_bit(USB_EHCI_LOADED, &usb_hcds_loaded); 1307 if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) || 1308 test_bit(USB_OHCI_LOADED, &usb_hcds_loaded)) 1309 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded" 1310 " before uhci_hcd and ohci_hcd, not after\n"); 1311 1312 pr_debug("%s: block sizes: qh %zd qtd %zd itd %zd sitd %zd\n", 1313 hcd_name, 1314 sizeof(struct ehci_qh), sizeof(struct ehci_qtd), 1315 sizeof(struct ehci_itd), sizeof(struct ehci_sitd)); 1316 1317 #ifdef CONFIG_DYNAMIC_DEBUG 1318 ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root); 1319 if (!ehci_debug_root) { 1320 retval = -ENOENT; 1321 goto err_debug; 1322 } 1323 #endif 1324 1325 #ifdef PLATFORM_DRIVER 1326 retval = platform_driver_register(&PLATFORM_DRIVER); 1327 if (retval < 0) 1328 goto clean0; 1329 #endif 1330 1331 #ifdef PS3_SYSTEM_BUS_DRIVER 1332 retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER); 1333 if (retval < 0) 1334 goto clean2; 1335 #endif 1336 1337 #ifdef OF_PLATFORM_DRIVER 1338 retval = platform_driver_register(&OF_PLATFORM_DRIVER); 1339 if (retval < 0) 1340 goto clean3; 1341 #endif 1342 1343 #ifdef XILINX_OF_PLATFORM_DRIVER 1344 retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER); 1345 if (retval < 0) 1346 goto clean4; 1347 #endif 1348 return retval; 1349 1350 #ifdef XILINX_OF_PLATFORM_DRIVER 1351 /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */ 1352 clean4: 1353 #endif 1354 #ifdef OF_PLATFORM_DRIVER 1355 platform_driver_unregister(&OF_PLATFORM_DRIVER); 1356 clean3: 1357 #endif 1358 #ifdef PS3_SYSTEM_BUS_DRIVER 1359 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER); 1360 clean2: 1361 #endif 1362 #ifdef PLATFORM_DRIVER 1363 platform_driver_unregister(&PLATFORM_DRIVER); 1364 clean0: 1365 #endif 1366 #ifdef CONFIG_DYNAMIC_DEBUG 1367 debugfs_remove(ehci_debug_root); 1368 ehci_debug_root = NULL; 1369 err_debug: 1370 #endif 1371 clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded); 1372 return retval; 1373 } 1374 module_init(ehci_hcd_init); 1375 1376 static void __exit ehci_hcd_cleanup(void) 1377 { 1378 #ifdef XILINX_OF_PLATFORM_DRIVER 1379 platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); 1380 #endif 1381 #ifdef OF_PLATFORM_DRIVER 1382 platform_driver_unregister(&OF_PLATFORM_DRIVER); 1383 #endif 1384 #ifdef PLATFORM_DRIVER 1385 platform_driver_unregister(&PLATFORM_DRIVER); 1386 #endif 1387 #ifdef PS3_SYSTEM_BUS_DRIVER 1388 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER); 1389 #endif 1390 #ifdef CONFIG_DYNAMIC_DEBUG 1391 debugfs_remove(ehci_debug_root); 1392 #endif 1393 clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded); 1394 } 1395 module_exit(ehci_hcd_cleanup); 1396