xref: /openbmc/linux/drivers/usb/host/ehci-fsl.c (revision 05bcf503)
1 /*
2  * Copyright 2005-2009 MontaVista Software, Inc.
3  * Copyright 2008,2012      Freescale Semiconductor, Inc.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License as published by the
7  * Free Software Foundation; either version 2 of the License, or (at your
8  * option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful, but
11  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
13  * for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software Foundation,
17  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18  *
19  * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided
20  * by Hunter Wu.
21  * Power Management support by Dave Liu <daveliu@freescale.com>,
22  * Jerry Huang <Chang-Ming.Huang@freescale.com> and
23  * Anton Vorontsov <avorontsov@ru.mvista.com>.
24  */
25 
26 #include <linux/kernel.h>
27 #include <linux/types.h>
28 #include <linux/delay.h>
29 #include <linux/pm.h>
30 #include <linux/err.h>
31 #include <linux/platform_device.h>
32 #include <linux/fsl_devices.h>
33 
34 #include "ehci-fsl.h"
35 
36 /* configure so an HC device and id are always provided */
37 /* always called with process context; sleeping is OK */
38 
39 /**
40  * usb_hcd_fsl_probe - initialize FSL-based HCDs
41  * @drvier: Driver to be used for this HCD
42  * @pdev: USB Host Controller being probed
43  * Context: !in_interrupt()
44  *
45  * Allocates basic resources for this USB host controller.
46  *
47  */
48 static int usb_hcd_fsl_probe(const struct hc_driver *driver,
49 			     struct platform_device *pdev)
50 {
51 	struct fsl_usb2_platform_data *pdata;
52 	struct usb_hcd *hcd;
53 	struct resource *res;
54 	int irq;
55 	int retval;
56 
57 	pr_debug("initializing FSL-SOC USB Controller\n");
58 
59 	/* Need platform data for setup */
60 	pdata = (struct fsl_usb2_platform_data *)pdev->dev.platform_data;
61 	if (!pdata) {
62 		dev_err(&pdev->dev,
63 			"No platform data for %s.\n", dev_name(&pdev->dev));
64 		return -ENODEV;
65 	}
66 
67 	/*
68 	 * This is a host mode driver, verify that we're supposed to be
69 	 * in host mode.
70 	 */
71 	if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
72 	      (pdata->operating_mode == FSL_USB2_MPH_HOST) ||
73 	      (pdata->operating_mode == FSL_USB2_DR_OTG))) {
74 		dev_err(&pdev->dev,
75 			"Non Host Mode configured for %s. Wrong driver linked.\n",
76 			dev_name(&pdev->dev));
77 		return -ENODEV;
78 	}
79 
80 	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
81 	if (!res) {
82 		dev_err(&pdev->dev,
83 			"Found HC with no IRQ. Check %s setup!\n",
84 			dev_name(&pdev->dev));
85 		return -ENODEV;
86 	}
87 	irq = res->start;
88 
89 	hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
90 	if (!hcd) {
91 		retval = -ENOMEM;
92 		goto err1;
93 	}
94 
95 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
96 	if (!res) {
97 		dev_err(&pdev->dev,
98 			"Found HC with no register addr. Check %s setup!\n",
99 			dev_name(&pdev->dev));
100 		retval = -ENODEV;
101 		goto err2;
102 	}
103 	hcd->rsrc_start = res->start;
104 	hcd->rsrc_len = resource_size(res);
105 	if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
106 				driver->description)) {
107 		dev_dbg(&pdev->dev, "controller already in use\n");
108 		retval = -EBUSY;
109 		goto err2;
110 	}
111 	hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
112 
113 	if (hcd->regs == NULL) {
114 		dev_dbg(&pdev->dev, "error mapping memory\n");
115 		retval = -EFAULT;
116 		goto err3;
117 	}
118 
119 	pdata->regs = hcd->regs;
120 
121 	if (pdata->power_budget)
122 		hcd->power_budget = pdata->power_budget;
123 
124 	/*
125 	 * do platform specific init: check the clock, grab/config pins, etc.
126 	 */
127 	if (pdata->init && pdata->init(pdev)) {
128 		retval = -ENODEV;
129 		goto err4;
130 	}
131 
132 	/* Enable USB controller, 83xx or 8536 */
133 	if (pdata->have_sysif_regs)
134 		setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
135 
136 	/* Don't need to set host mode here. It will be done by tdi_reset() */
137 
138 	retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
139 	if (retval != 0)
140 		goto err4;
141 
142 #ifdef CONFIG_USB_OTG
143 	if (pdata->operating_mode == FSL_USB2_DR_OTG) {
144 		struct ehci_hcd *ehci = hcd_to_ehci(hcd);
145 
146 		hcd->phy = usb_get_phy(USB_PHY_TYPE_USB2);
147 		dev_dbg(&pdev->dev, "hcd=0x%p  ehci=0x%p, phy=0x%p\n",
148 			hcd, ehci, hcd->phy);
149 
150 		if (!IS_ERR_OR_NULL(hcd->phy)) {
151 			retval = otg_set_host(hcd->phy->otg,
152 					      &ehci_to_hcd(ehci)->self);
153 			if (retval) {
154 				usb_put_phy(hcd->phy);
155 				goto err4;
156 			}
157 		} else {
158 			dev_err(&pdev->dev, "can't find phy\n");
159 			retval = -ENODEV;
160 			goto err4;
161 		}
162 	}
163 #endif
164 	return retval;
165 
166       err4:
167 	iounmap(hcd->regs);
168       err3:
169 	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
170       err2:
171 	usb_put_hcd(hcd);
172       err1:
173 	dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
174 	if (pdata->exit)
175 		pdata->exit(pdev);
176 	return retval;
177 }
178 
179 /* may be called without controller electrically present */
180 /* may be called with controller, bus, and devices active */
181 
182 /**
183  * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs
184  * @dev: USB Host Controller being removed
185  * Context: !in_interrupt()
186  *
187  * Reverses the effect of usb_hcd_fsl_probe().
188  *
189  */
190 static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
191 			       struct platform_device *pdev)
192 {
193 	struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
194 
195 	if (!IS_ERR_OR_NULL(hcd->phy)) {
196 		otg_set_host(hcd->phy->otg, NULL);
197 		usb_put_phy(hcd->phy);
198 	}
199 
200 	usb_remove_hcd(hcd);
201 
202 	/*
203 	 * do platform specific un-initialization:
204 	 * release iomux pins, disable clock, etc.
205 	 */
206 	if (pdata->exit)
207 		pdata->exit(pdev);
208 	iounmap(hcd->regs);
209 	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
210 	usb_put_hcd(hcd);
211 }
212 
213 static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
214 			       enum fsl_usb2_phy_modes phy_mode,
215 			       unsigned int port_offset)
216 {
217 	u32 portsc;
218 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
219 	void __iomem *non_ehci = hcd->regs;
220 	struct device *dev = hcd->self.controller;
221 	struct fsl_usb2_platform_data *pdata = dev->platform_data;
222 
223 	if (pdata->controller_ver < 0) {
224 		dev_warn(hcd->self.controller, "Could not get controller version\n");
225 		return -ENODEV;
226 	}
227 
228 	portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
229 	portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
230 
231 	switch (phy_mode) {
232 	case FSL_USB2_PHY_ULPI:
233 		if (pdata->controller_ver) {
234 			/* controller version 1.6 or above */
235 			setbits32(non_ehci + FSL_SOC_USB_CTRL,
236 					ULPI_PHY_CLK_SEL);
237 			/*
238 			 * Due to controller issue of PHY_CLK_VALID in ULPI
239 			 * mode, we set USB_CTRL_USB_EN before checking
240 			 * PHY_CLK_VALID, otherwise PHY_CLK_VALID doesn't work.
241 			 */
242 			clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
243 					UTMI_PHY_EN, USB_CTRL_USB_EN);
244 		}
245 		portsc |= PORT_PTS_ULPI;
246 		break;
247 	case FSL_USB2_PHY_SERIAL:
248 		portsc |= PORT_PTS_SERIAL;
249 		break;
250 	case FSL_USB2_PHY_UTMI_WIDE:
251 		portsc |= PORT_PTS_PTW;
252 		/* fall through */
253 	case FSL_USB2_PHY_UTMI:
254 		if (pdata->controller_ver) {
255 			/* controller version 1.6 or above */
256 			setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
257 			mdelay(FSL_UTMI_PHY_DLY);  /* Delay for UTMI PHY CLK to
258 						become stable - 10ms*/
259 		}
260 		/* enable UTMI PHY */
261 		if (pdata->have_sysif_regs)
262 			setbits32(non_ehci + FSL_SOC_USB_CTRL,
263 				  CTRL_UTMI_PHY_EN);
264 		portsc |= PORT_PTS_UTMI;
265 		break;
266 	case FSL_USB2_PHY_NONE:
267 		break;
268 	}
269 
270 	if (pdata->controller_ver && (phy_mode == FSL_USB2_PHY_ULPI)) {
271 		/* check PHY_CLK_VALID to get phy clk valid */
272 		if (!spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
273 				PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0)) {
274 			printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
275 			return -EINVAL;
276 		}
277 	}
278 
279 	ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
280 
281 	if (phy_mode != FSL_USB2_PHY_ULPI)
282 		setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN);
283 
284 	return 0;
285 }
286 
287 static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
288 {
289 	struct usb_hcd *hcd = ehci_to_hcd(ehci);
290 	struct fsl_usb2_platform_data *pdata;
291 	void __iomem *non_ehci = hcd->regs;
292 
293 	pdata = hcd->self.controller->platform_data;
294 
295 	if (pdata->have_sysif_regs) {
296 		/*
297 		* Turn on cache snooping hardware, since some PowerPC platforms
298 		* wholly rely on hardware to deal with cache coherent
299 		*/
300 
301 		/* Setup Snooping for all the 4GB space */
302 		/* SNOOP1 starts from 0x0, size 2G */
303 		out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
304 		/* SNOOP2 starts from 0x80000000, size 2G */
305 		out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
306 	}
307 
308 	if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
309 			(pdata->operating_mode == FSL_USB2_DR_OTG))
310 		if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
311 			return -EINVAL;
312 
313 	if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
314 		unsigned int chip, rev, svr;
315 
316 		svr = mfspr(SPRN_SVR);
317 		chip = svr >> 16;
318 		rev = (svr >> 4) & 0xf;
319 
320 		/* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
321 		if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
322 			ehci->has_fsl_port_bug = 1;
323 
324 		if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
325 			if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
326 				return -EINVAL;
327 
328 		if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
329 			if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1))
330 				return -EINVAL;
331 	}
332 
333 	if (pdata->have_sysif_regs) {
334 #ifdef CONFIG_FSL_SOC_BOOKE
335 		out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
336 		out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
337 #else
338 		out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
339 		out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
340 #endif
341 		out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
342 	}
343 
344 	return 0;
345 }
346 
347 /* called after powerup, by probe or system-pm "wakeup" */
348 static int ehci_fsl_reinit(struct ehci_hcd *ehci)
349 {
350 	if (ehci_fsl_usb_setup(ehci))
351 		return -EINVAL;
352 	ehci_port_power(ehci, 0);
353 
354 	return 0;
355 }
356 
357 /* called during probe() after chip reset completes */
358 static int ehci_fsl_setup(struct usb_hcd *hcd)
359 {
360 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
361 	int retval;
362 	struct fsl_usb2_platform_data *pdata;
363 	struct device *dev;
364 
365 	dev = hcd->self.controller;
366 	pdata = hcd->self.controller->platform_data;
367 	ehci->big_endian_desc = pdata->big_endian_desc;
368 	ehci->big_endian_mmio = pdata->big_endian_mmio;
369 
370 	/* EHCI registers start at offset 0x100 */
371 	ehci->caps = hcd->regs + 0x100;
372 
373 	hcd->has_tt = 1;
374 
375 	retval = ehci_setup(hcd);
376 	if (retval)
377 		return retval;
378 
379 	if (of_device_is_compatible(dev->parent->of_node,
380 				    "fsl,mpc5121-usb2-dr")) {
381 		/*
382 		 * set SBUSCFG:AHBBRST so that control msgs don't
383 		 * fail when doing heavy PATA writes.
384 		 */
385 		ehci_writel(ehci, SBUSCFG_INCR8,
386 			    hcd->regs + FSL_SOC_USB_SBUSCFG);
387 	}
388 
389 	retval = ehci_fsl_reinit(ehci);
390 	return retval;
391 }
392 
393 struct ehci_fsl {
394 	struct ehci_hcd	ehci;
395 
396 #ifdef CONFIG_PM
397 	/* Saved USB PHY settings, need to restore after deep sleep. */
398 	u32 usb_ctrl;
399 #endif
400 };
401 
402 #ifdef CONFIG_PM
403 
404 #ifdef CONFIG_PPC_MPC512x
405 static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
406 {
407 	struct usb_hcd *hcd = dev_get_drvdata(dev);
408 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
409 	struct fsl_usb2_platform_data *pdata = dev->platform_data;
410 	u32 tmp;
411 
412 #ifdef DEBUG
413 	u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
414 	mode &= USBMODE_CM_MASK;
415 	tmp = ehci_readl(ehci, hcd->regs + 0x140);	/* usbcmd */
416 
417 	dev_dbg(dev, "suspend=%d already_suspended=%d "
418 		"mode=%d  usbcmd %08x\n", pdata->suspended,
419 		pdata->already_suspended, mode, tmp);
420 #endif
421 
422 	/*
423 	 * If the controller is already suspended, then this must be a
424 	 * PM suspend.  Remember this fact, so that we will leave the
425 	 * controller suspended at PM resume time.
426 	 */
427 	if (pdata->suspended) {
428 		dev_dbg(dev, "already suspended, leaving early\n");
429 		pdata->already_suspended = 1;
430 		return 0;
431 	}
432 
433 	dev_dbg(dev, "suspending...\n");
434 
435 	ehci->rh_state = EHCI_RH_SUSPENDED;
436 	dev->power.power_state = PMSG_SUSPEND;
437 
438 	/* ignore non-host interrupts */
439 	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
440 
441 	/* stop the controller */
442 	tmp = ehci_readl(ehci, &ehci->regs->command);
443 	tmp &= ~CMD_RUN;
444 	ehci_writel(ehci, tmp, &ehci->regs->command);
445 
446 	/* save EHCI registers */
447 	pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
448 	pdata->pm_command &= ~CMD_RUN;
449 	pdata->pm_status  = ehci_readl(ehci, &ehci->regs->status);
450 	pdata->pm_intr_enable  = ehci_readl(ehci, &ehci->regs->intr_enable);
451 	pdata->pm_frame_index  = ehci_readl(ehci, &ehci->regs->frame_index);
452 	pdata->pm_segment  = ehci_readl(ehci, &ehci->regs->segment);
453 	pdata->pm_frame_list  = ehci_readl(ehci, &ehci->regs->frame_list);
454 	pdata->pm_async_next  = ehci_readl(ehci, &ehci->regs->async_next);
455 	pdata->pm_configured_flag  =
456 		ehci_readl(ehci, &ehci->regs->configured_flag);
457 	pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
458 	pdata->pm_usbgenctrl = ehci_readl(ehci,
459 					  hcd->regs + FSL_SOC_USB_USBGENCTRL);
460 
461 	/* clear the W1C bits */
462 	pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
463 
464 	pdata->suspended = 1;
465 
466 	/* clear PP to cut power to the port */
467 	tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
468 	tmp &= ~PORT_POWER;
469 	ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
470 
471 	return 0;
472 }
473 
474 static int ehci_fsl_mpc512x_drv_resume(struct device *dev)
475 {
476 	struct usb_hcd *hcd = dev_get_drvdata(dev);
477 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
478 	struct fsl_usb2_platform_data *pdata = dev->platform_data;
479 	u32 tmp;
480 
481 	dev_dbg(dev, "suspend=%d already_suspended=%d\n",
482 		pdata->suspended, pdata->already_suspended);
483 
484 	/*
485 	 * If the controller was already suspended at suspend time,
486 	 * then don't resume it now.
487 	 */
488 	if (pdata->already_suspended) {
489 		dev_dbg(dev, "already suspended, leaving early\n");
490 		pdata->already_suspended = 0;
491 		return 0;
492 	}
493 
494 	if (!pdata->suspended) {
495 		dev_dbg(dev, "not suspended, leaving early\n");
496 		return 0;
497 	}
498 
499 	pdata->suspended = 0;
500 
501 	dev_dbg(dev, "resuming...\n");
502 
503 	/* set host mode */
504 	tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
505 	ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
506 
507 	ehci_writel(ehci, pdata->pm_usbgenctrl,
508 		    hcd->regs + FSL_SOC_USB_USBGENCTRL);
509 	ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
510 		    hcd->regs + FSL_SOC_USB_ISIPHYCTRL);
511 
512 	ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
513 
514 	/* restore EHCI registers */
515 	ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
516 	ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
517 	ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
518 	ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
519 	ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
520 	ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
521 	ehci_writel(ehci, pdata->pm_configured_flag,
522 		    &ehci->regs->configured_flag);
523 	ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
524 
525 	set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
526 	ehci->rh_state = EHCI_RH_RUNNING;
527 	dev->power.power_state = PMSG_ON;
528 
529 	tmp = ehci_readl(ehci, &ehci->regs->command);
530 	tmp |= CMD_RUN;
531 	ehci_writel(ehci, tmp, &ehci->regs->command);
532 
533 	usb_hcd_resume_root_hub(hcd);
534 
535 	return 0;
536 }
537 #else
538 static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
539 {
540 	return 0;
541 }
542 
543 static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
544 {
545 	return 0;
546 }
547 #endif /* CONFIG_PPC_MPC512x */
548 
549 static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
550 {
551 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
552 
553 	return container_of(ehci, struct ehci_fsl, ehci);
554 }
555 
556 static int ehci_fsl_drv_suspend(struct device *dev)
557 {
558 	struct usb_hcd *hcd = dev_get_drvdata(dev);
559 	struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
560 	void __iomem *non_ehci = hcd->regs;
561 
562 	if (of_device_is_compatible(dev->parent->of_node,
563 				    "fsl,mpc5121-usb2-dr")) {
564 		return ehci_fsl_mpc512x_drv_suspend(dev);
565 	}
566 
567 	ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
568 			device_may_wakeup(dev));
569 	if (!fsl_deep_sleep())
570 		return 0;
571 
572 	ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL);
573 	return 0;
574 }
575 
576 static int ehci_fsl_drv_resume(struct device *dev)
577 {
578 	struct usb_hcd *hcd = dev_get_drvdata(dev);
579 	struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
580 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
581 	void __iomem *non_ehci = hcd->regs;
582 
583 	if (of_device_is_compatible(dev->parent->of_node,
584 				    "fsl,mpc5121-usb2-dr")) {
585 		return ehci_fsl_mpc512x_drv_resume(dev);
586 	}
587 
588 	ehci_prepare_ports_for_controller_resume(ehci);
589 	if (!fsl_deep_sleep())
590 		return 0;
591 
592 	usb_root_hub_lost_power(hcd->self.root_hub);
593 
594 	/* Restore USB PHY settings and enable the controller. */
595 	out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl);
596 
597 	ehci_reset(ehci);
598 	ehci_fsl_reinit(ehci);
599 
600 	return 0;
601 }
602 
603 static int ehci_fsl_drv_restore(struct device *dev)
604 {
605 	struct usb_hcd *hcd = dev_get_drvdata(dev);
606 
607 	usb_root_hub_lost_power(hcd->self.root_hub);
608 	return 0;
609 }
610 
611 static struct dev_pm_ops ehci_fsl_pm_ops = {
612 	.suspend = ehci_fsl_drv_suspend,
613 	.resume = ehci_fsl_drv_resume,
614 	.restore = ehci_fsl_drv_restore,
615 };
616 
617 #define EHCI_FSL_PM_OPS		(&ehci_fsl_pm_ops)
618 #else
619 #define EHCI_FSL_PM_OPS		NULL
620 #endif /* CONFIG_PM */
621 
622 #ifdef CONFIG_USB_OTG
623 static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port)
624 {
625 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
626 	u32 status;
627 
628 	if (!port)
629 		return -EINVAL;
630 
631 	port--;
632 
633 	/* start port reset before HNP protocol time out */
634 	status = readl(&ehci->regs->port_status[port]);
635 	if (!(status & PORT_CONNECT))
636 		return -ENODEV;
637 
638 	/* khubd will finish the reset later */
639 	if (ehci_is_TDI(ehci)) {
640 		writel(PORT_RESET |
641 		       (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)),
642 		       &ehci->regs->port_status[port]);
643 	} else {
644 		writel(PORT_RESET, &ehci->regs->port_status[port]);
645 	}
646 
647 	return 0;
648 }
649 #else
650 #define ehci_start_port_reset	NULL
651 #endif /* CONFIG_USB_OTG */
652 
653 
654 static const struct hc_driver ehci_fsl_hc_driver = {
655 	.description = hcd_name,
656 	.product_desc = "Freescale On-Chip EHCI Host Controller",
657 	.hcd_priv_size = sizeof(struct ehci_fsl),
658 
659 	/*
660 	 * generic hardware linkage
661 	 */
662 	.irq = ehci_irq,
663 	.flags = HCD_USB2 | HCD_MEMORY,
664 
665 	/*
666 	 * basic lifecycle operations
667 	 */
668 	.reset = ehci_fsl_setup,
669 	.start = ehci_run,
670 	.stop = ehci_stop,
671 	.shutdown = ehci_shutdown,
672 
673 	/*
674 	 * managing i/o requests and associated device resources
675 	 */
676 	.urb_enqueue = ehci_urb_enqueue,
677 	.urb_dequeue = ehci_urb_dequeue,
678 	.endpoint_disable = ehci_endpoint_disable,
679 	.endpoint_reset = ehci_endpoint_reset,
680 
681 	/*
682 	 * scheduling support
683 	 */
684 	.get_frame_number = ehci_get_frame,
685 
686 	/*
687 	 * root hub support
688 	 */
689 	.hub_status_data = ehci_hub_status_data,
690 	.hub_control = ehci_hub_control,
691 	.bus_suspend = ehci_bus_suspend,
692 	.bus_resume = ehci_bus_resume,
693 	.start_port_reset = ehci_start_port_reset,
694 	.relinquish_port = ehci_relinquish_port,
695 	.port_handed_over = ehci_port_handed_over,
696 
697 	.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
698 };
699 
700 static int ehci_fsl_drv_probe(struct platform_device *pdev)
701 {
702 	if (usb_disabled())
703 		return -ENODEV;
704 
705 	/* FIXME we only want one one probe() not two */
706 	return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev);
707 }
708 
709 static int ehci_fsl_drv_remove(struct platform_device *pdev)
710 {
711 	struct usb_hcd *hcd = platform_get_drvdata(pdev);
712 
713 	/* FIXME we only want one one remove() not two */
714 	usb_hcd_fsl_remove(hcd, pdev);
715 	return 0;
716 }
717 
718 MODULE_ALIAS("platform:fsl-ehci");
719 
720 static struct platform_driver ehci_fsl_driver = {
721 	.probe = ehci_fsl_drv_probe,
722 	.remove = ehci_fsl_drv_remove,
723 	.shutdown = usb_hcd_platform_shutdown,
724 	.driver = {
725 		.name = "fsl-ehci",
726 		.pm = EHCI_FSL_PM_OPS,
727 	},
728 };
729