1 /* 2 * Copyright (c) 2001-2002 by David Brownell 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the 6 * Free Software Foundation; either version 2 of the License, or (at your 7 * option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, but 10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software Foundation, 16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 */ 18 19 /* this file is part of ehci-hcd.c */ 20 21 #define ehci_dbg(ehci, fmt, args...) \ 22 dev_dbg (ehci_to_hcd(ehci)->self.controller , fmt , ## args ) 23 #define ehci_err(ehci, fmt, args...) \ 24 dev_err (ehci_to_hcd(ehci)->self.controller , fmt , ## args ) 25 #define ehci_info(ehci, fmt, args...) \ 26 dev_info (ehci_to_hcd(ehci)->self.controller , fmt , ## args ) 27 #define ehci_warn(ehci, fmt, args...) \ 28 dev_warn (ehci_to_hcd(ehci)->self.controller , fmt , ## args ) 29 30 #ifdef EHCI_VERBOSE_DEBUG 31 # define vdbg dbg 32 # define ehci_vdbg ehci_dbg 33 #else 34 # define vdbg(fmt,args...) do { } while (0) 35 # define ehci_vdbg(ehci, fmt, args...) do { } while (0) 36 #endif 37 38 #ifdef DEBUG 39 40 /* check the values in the HCSPARAMS register 41 * (host controller _Structural_ parameters) 42 * see EHCI spec, Table 2-4 for each value 43 */ 44 static void dbg_hcs_params (struct ehci_hcd *ehci, char *label) 45 { 46 u32 params = ehci_readl(ehci, &ehci->caps->hcs_params); 47 48 ehci_dbg (ehci, 49 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n", 50 label, params, 51 HCS_DEBUG_PORT (params), 52 HCS_INDICATOR (params) ? " ind" : "", 53 HCS_N_CC (params), 54 HCS_N_PCC (params), 55 HCS_PORTROUTED (params) ? "" : " ordered", 56 HCS_PPC (params) ? "" : " !ppc", 57 HCS_N_PORTS (params) 58 ); 59 /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */ 60 if (HCS_PORTROUTED (params)) { 61 int i; 62 char buf [46], tmp [7], byte; 63 64 buf[0] = 0; 65 for (i = 0; i < HCS_N_PORTS (params); i++) { 66 // FIXME MIPS won't readb() ... 67 byte = readb (&ehci->caps->portroute[(i>>1)]); 68 sprintf(tmp, "%d ", 69 ((i & 0x1) ? ((byte)&0xf) : ((byte>>4)&0xf))); 70 strcat(buf, tmp); 71 } 72 ehci_dbg (ehci, "%s portroute %s\n", 73 label, buf); 74 } 75 } 76 #else 77 78 static inline void dbg_hcs_params (struct ehci_hcd *ehci, char *label) {} 79 80 #endif 81 82 #ifdef DEBUG 83 84 /* check the values in the HCCPARAMS register 85 * (host controller _Capability_ parameters) 86 * see EHCI Spec, Table 2-5 for each value 87 * */ 88 static void dbg_hcc_params (struct ehci_hcd *ehci, char *label) 89 { 90 u32 params = ehci_readl(ehci, &ehci->caps->hcc_params); 91 92 if (HCC_ISOC_CACHE (params)) { 93 ehci_dbg (ehci, 94 "%s hcc_params %04x caching frame %s%s%s\n", 95 label, params, 96 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024", 97 HCC_CANPARK(params) ? " park" : "", 98 HCC_64BIT_ADDR(params) ? " 64 bit addr" : ""); 99 } else { 100 ehci_dbg (ehci, 101 "%s hcc_params %04x thresh %d uframes %s%s%s\n", 102 label, 103 params, 104 HCC_ISOC_THRES(params), 105 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024", 106 HCC_CANPARK(params) ? " park" : "", 107 HCC_64BIT_ADDR(params) ? " 64 bit addr" : ""); 108 } 109 } 110 #else 111 112 static inline void dbg_hcc_params (struct ehci_hcd *ehci, char *label) {} 113 114 #endif 115 116 #ifdef DEBUG 117 118 static void __maybe_unused 119 dbg_qtd (const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd) 120 { 121 ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd, 122 hc32_to_cpup(ehci, &qtd->hw_next), 123 hc32_to_cpup(ehci, &qtd->hw_alt_next), 124 hc32_to_cpup(ehci, &qtd->hw_token), 125 hc32_to_cpup(ehci, &qtd->hw_buf [0])); 126 if (qtd->hw_buf [1]) 127 ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n", 128 hc32_to_cpup(ehci, &qtd->hw_buf[1]), 129 hc32_to_cpup(ehci, &qtd->hw_buf[2]), 130 hc32_to_cpup(ehci, &qtd->hw_buf[3]), 131 hc32_to_cpup(ehci, &qtd->hw_buf[4])); 132 } 133 134 static void __maybe_unused 135 dbg_qh (const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh) 136 { 137 ehci_dbg (ehci, "%s qh %p n%08x info %x %x qtd %x\n", label, 138 qh, qh->hw_next, qh->hw_info1, qh->hw_info2, 139 qh->hw_current); 140 dbg_qtd ("overlay", ehci, (struct ehci_qtd *) &qh->hw_qtd_next); 141 } 142 143 static void __maybe_unused 144 dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd) 145 { 146 ehci_dbg (ehci, "%s [%d] itd %p, next %08x, urb %p\n", 147 label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next), 148 itd->urb); 149 ehci_dbg (ehci, 150 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n", 151 hc32_to_cpu(ehci, itd->hw_transaction[0]), 152 hc32_to_cpu(ehci, itd->hw_transaction[1]), 153 hc32_to_cpu(ehci, itd->hw_transaction[2]), 154 hc32_to_cpu(ehci, itd->hw_transaction[3]), 155 hc32_to_cpu(ehci, itd->hw_transaction[4]), 156 hc32_to_cpu(ehci, itd->hw_transaction[5]), 157 hc32_to_cpu(ehci, itd->hw_transaction[6]), 158 hc32_to_cpu(ehci, itd->hw_transaction[7])); 159 ehci_dbg (ehci, 160 " buf: %08x %08x %08x %08x %08x %08x %08x\n", 161 hc32_to_cpu(ehci, itd->hw_bufp[0]), 162 hc32_to_cpu(ehci, itd->hw_bufp[1]), 163 hc32_to_cpu(ehci, itd->hw_bufp[2]), 164 hc32_to_cpu(ehci, itd->hw_bufp[3]), 165 hc32_to_cpu(ehci, itd->hw_bufp[4]), 166 hc32_to_cpu(ehci, itd->hw_bufp[5]), 167 hc32_to_cpu(ehci, itd->hw_bufp[6])); 168 ehci_dbg (ehci, " index: %d %d %d %d %d %d %d %d\n", 169 itd->index[0], itd->index[1], itd->index[2], 170 itd->index[3], itd->index[4], itd->index[5], 171 itd->index[6], itd->index[7]); 172 } 173 174 static void __maybe_unused 175 dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd) 176 { 177 ehci_dbg (ehci, "%s [%d] sitd %p, next %08x, urb %p\n", 178 label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next), 179 sitd->urb); 180 ehci_dbg (ehci, 181 " addr %08x sched %04x result %08x buf %08x %08x\n", 182 hc32_to_cpu(ehci, sitd->hw_fullspeed_ep), 183 hc32_to_cpu(ehci, sitd->hw_uframe), 184 hc32_to_cpu(ehci, sitd->hw_results), 185 hc32_to_cpu(ehci, sitd->hw_buf[0]), 186 hc32_to_cpu(ehci, sitd->hw_buf[1])); 187 } 188 189 static int __maybe_unused 190 dbg_status_buf (char *buf, unsigned len, const char *label, u32 status) 191 { 192 return scnprintf (buf, len, 193 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s", 194 label, label [0] ? " " : "", status, 195 (status & STS_ASS) ? " Async" : "", 196 (status & STS_PSS) ? " Periodic" : "", 197 (status & STS_RECL) ? " Recl" : "", 198 (status & STS_HALT) ? " Halt" : "", 199 (status & STS_IAA) ? " IAA" : "", 200 (status & STS_FATAL) ? " FATAL" : "", 201 (status & STS_FLR) ? " FLR" : "", 202 (status & STS_PCD) ? " PCD" : "", 203 (status & STS_ERR) ? " ERR" : "", 204 (status & STS_INT) ? " INT" : "" 205 ); 206 } 207 208 static int __maybe_unused 209 dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable) 210 { 211 return scnprintf (buf, len, 212 "%s%sintrenable %02x%s%s%s%s%s%s", 213 label, label [0] ? " " : "", enable, 214 (enable & STS_IAA) ? " IAA" : "", 215 (enable & STS_FATAL) ? " FATAL" : "", 216 (enable & STS_FLR) ? " FLR" : "", 217 (enable & STS_PCD) ? " PCD" : "", 218 (enable & STS_ERR) ? " ERR" : "", 219 (enable & STS_INT) ? " INT" : "" 220 ); 221 } 222 223 static const char *const fls_strings [] = 224 { "1024", "512", "256", "??" }; 225 226 static int 227 dbg_command_buf (char *buf, unsigned len, const char *label, u32 command) 228 { 229 return scnprintf (buf, len, 230 "%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s", 231 label, label [0] ? " " : "", command, 232 (command & CMD_PARK) ? "park" : "(park)", 233 CMD_PARK_CNT (command), 234 (command >> 16) & 0x3f, 235 (command & CMD_LRESET) ? " LReset" : "", 236 (command & CMD_IAAD) ? " IAAD" : "", 237 (command & CMD_ASE) ? " Async" : "", 238 (command & CMD_PSE) ? " Periodic" : "", 239 fls_strings [(command >> 2) & 0x3], 240 (command & CMD_RESET) ? " Reset" : "", 241 (command & CMD_RUN) ? "RUN" : "HALT" 242 ); 243 } 244 245 static int 246 dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status) 247 { 248 char *sig; 249 250 /* signaling state */ 251 switch (status & (3 << 10)) { 252 case 0 << 10: sig = "se0"; break; 253 case 1 << 10: sig = "k"; break; /* low speed */ 254 case 2 << 10: sig = "j"; break; 255 default: sig = "?"; break; 256 } 257 258 return scnprintf (buf, len, 259 "%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s", 260 label, label [0] ? " " : "", port, status, 261 (status & PORT_POWER) ? " POWER" : "", 262 (status & PORT_OWNER) ? " OWNER" : "", 263 sig, 264 (status & PORT_RESET) ? " RESET" : "", 265 (status & PORT_SUSPEND) ? " SUSPEND" : "", 266 (status & PORT_RESUME) ? " RESUME" : "", 267 (status & PORT_OCC) ? " OCC" : "", 268 (status & PORT_OC) ? " OC" : "", 269 (status & PORT_PEC) ? " PEC" : "", 270 (status & PORT_PE) ? " PE" : "", 271 (status & PORT_CSC) ? " CSC" : "", 272 (status & PORT_CONNECT) ? " CONNECT" : ""); 273 } 274 275 #else 276 static inline void __maybe_unused 277 dbg_qh (char *label, struct ehci_hcd *ehci, struct ehci_qh *qh) 278 {} 279 280 static inline int __maybe_unused 281 dbg_status_buf (char *buf, unsigned len, const char *label, u32 status) 282 { return 0; } 283 284 static inline int __maybe_unused 285 dbg_command_buf (char *buf, unsigned len, const char *label, u32 command) 286 { return 0; } 287 288 static inline int __maybe_unused 289 dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable) 290 { return 0; } 291 292 static inline int __maybe_unused 293 dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status) 294 { return 0; } 295 296 #endif /* DEBUG */ 297 298 /* functions have the "wrong" filename when they're output... */ 299 #define dbg_status(ehci, label, status) { \ 300 char _buf [80]; \ 301 dbg_status_buf (_buf, sizeof _buf, label, status); \ 302 ehci_dbg (ehci, "%s\n", _buf); \ 303 } 304 305 #define dbg_cmd(ehci, label, command) { \ 306 char _buf [80]; \ 307 dbg_command_buf (_buf, sizeof _buf, label, command); \ 308 ehci_dbg (ehci, "%s\n", _buf); \ 309 } 310 311 #define dbg_port(ehci, label, port, status) { \ 312 char _buf [80]; \ 313 dbg_port_buf (_buf, sizeof _buf, label, port, status); \ 314 ehci_dbg (ehci, "%s\n", _buf); \ 315 } 316 317 /*-------------------------------------------------------------------------*/ 318 319 #ifdef STUB_DEBUG_FILES 320 321 static inline void create_debug_files (struct ehci_hcd *bus) { } 322 static inline void remove_debug_files (struct ehci_hcd *bus) { } 323 324 #else 325 326 /* troubleshooting help: expose state in debugfs */ 327 328 static int debug_async_open(struct inode *, struct file *); 329 static int debug_periodic_open(struct inode *, struct file *); 330 static int debug_registers_open(struct inode *, struct file *); 331 static int debug_async_open(struct inode *, struct file *); 332 static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*); 333 static int debug_close(struct inode *, struct file *); 334 335 static const struct file_operations debug_async_fops = { 336 .owner = THIS_MODULE, 337 .open = debug_async_open, 338 .read = debug_output, 339 .release = debug_close, 340 }; 341 static const struct file_operations debug_periodic_fops = { 342 .owner = THIS_MODULE, 343 .open = debug_periodic_open, 344 .read = debug_output, 345 .release = debug_close, 346 }; 347 static const struct file_operations debug_registers_fops = { 348 .owner = THIS_MODULE, 349 .open = debug_registers_open, 350 .read = debug_output, 351 .release = debug_close, 352 }; 353 354 static struct dentry *ehci_debug_root; 355 356 struct debug_buffer { 357 ssize_t (*fill_func)(struct debug_buffer *); /* fill method */ 358 struct usb_bus *bus; 359 struct mutex mutex; /* protect filling of buffer */ 360 size_t count; /* number of characters filled into buffer */ 361 char *page; 362 }; 363 364 #define speed_char(info1) ({ char tmp; \ 365 switch (info1 & (3 << 12)) { \ 366 case 0 << 12: tmp = 'f'; break; \ 367 case 1 << 12: tmp = 'l'; break; \ 368 case 2 << 12: tmp = 'h'; break; \ 369 default: tmp = '?'; break; \ 370 }; tmp; }) 371 372 static inline char token_mark(struct ehci_hcd *ehci, __hc32 token) 373 { 374 __u32 v = hc32_to_cpu(ehci, token); 375 376 if (v & QTD_STS_ACTIVE) 377 return '*'; 378 if (v & QTD_STS_HALT) 379 return '-'; 380 if (!IS_SHORT_READ (v)) 381 return ' '; 382 /* tries to advance through hw_alt_next */ 383 return '/'; 384 } 385 386 static void qh_lines ( 387 struct ehci_hcd *ehci, 388 struct ehci_qh *qh, 389 char **nextp, 390 unsigned *sizep 391 ) 392 { 393 u32 scratch; 394 u32 hw_curr; 395 struct list_head *entry; 396 struct ehci_qtd *td; 397 unsigned temp; 398 unsigned size = *sizep; 399 char *next = *nextp; 400 char mark; 401 u32 list_end = EHCI_LIST_END(ehci); 402 403 if (qh->hw_qtd_next == list_end) /* NEC does this */ 404 mark = '@'; 405 else 406 mark = token_mark(ehci, qh->hw_token); 407 if (mark == '/') { /* qh_alt_next controls qh advance? */ 408 if ((qh->hw_alt_next & QTD_MASK(ehci)) 409 == ehci->async->hw_alt_next) 410 mark = '#'; /* blocked */ 411 else if (qh->hw_alt_next == list_end) 412 mark = '.'; /* use hw_qtd_next */ 413 /* else alt_next points to some other qtd */ 414 } 415 scratch = hc32_to_cpup(ehci, &qh->hw_info1); 416 hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &qh->hw_current) : 0; 417 temp = scnprintf (next, size, 418 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)", 419 qh, scratch & 0x007f, 420 speed_char (scratch), 421 (scratch >> 8) & 0x000f, 422 scratch, hc32_to_cpup(ehci, &qh->hw_info2), 423 hc32_to_cpup(ehci, &qh->hw_token), mark, 424 (cpu_to_hc32(ehci, QTD_TOGGLE) & qh->hw_token) 425 ? "data1" : "data0", 426 (hc32_to_cpup(ehci, &qh->hw_alt_next) >> 1) & 0x0f); 427 size -= temp; 428 next += temp; 429 430 /* hc may be modifying the list as we read it ... */ 431 list_for_each (entry, &qh->qtd_list) { 432 td = list_entry (entry, struct ehci_qtd, qtd_list); 433 scratch = hc32_to_cpup(ehci, &td->hw_token); 434 mark = ' '; 435 if (hw_curr == td->qtd_dma) 436 mark = '*'; 437 else if (qh->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma)) 438 mark = '+'; 439 else if (QTD_LENGTH (scratch)) { 440 if (td->hw_alt_next == ehci->async->hw_alt_next) 441 mark = '#'; 442 else if (td->hw_alt_next != list_end) 443 mark = '/'; 444 } 445 temp = snprintf (next, size, 446 "\n\t%p%c%s len=%d %08x urb %p", 447 td, mark, ({ char *tmp; 448 switch ((scratch>>8)&0x03) { 449 case 0: tmp = "out"; break; 450 case 1: tmp = "in"; break; 451 case 2: tmp = "setup"; break; 452 default: tmp = "?"; break; 453 } tmp;}), 454 (scratch >> 16) & 0x7fff, 455 scratch, 456 td->urb); 457 if (temp < 0) 458 temp = 0; 459 else if (size < temp) 460 temp = size; 461 size -= temp; 462 next += temp; 463 if (temp == size) 464 goto done; 465 } 466 467 temp = snprintf (next, size, "\n"); 468 if (temp < 0) 469 temp = 0; 470 else if (size < temp) 471 temp = size; 472 size -= temp; 473 next += temp; 474 475 done: 476 *sizep = size; 477 *nextp = next; 478 } 479 480 static ssize_t fill_async_buffer(struct debug_buffer *buf) 481 { 482 struct usb_hcd *hcd; 483 struct ehci_hcd *ehci; 484 unsigned long flags; 485 unsigned temp, size; 486 char *next; 487 struct ehci_qh *qh; 488 489 hcd = bus_to_hcd(buf->bus); 490 ehci = hcd_to_ehci (hcd); 491 next = buf->page; 492 size = PAGE_SIZE; 493 494 *next = 0; 495 496 /* dumps a snapshot of the async schedule. 497 * usually empty except for long-term bulk reads, or head. 498 * one QH per line, and TDs we know about 499 */ 500 spin_lock_irqsave (&ehci->lock, flags); 501 for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh) 502 qh_lines (ehci, qh, &next, &size); 503 if (ehci->reclaim && size > 0) { 504 temp = scnprintf (next, size, "\nreclaim =\n"); 505 size -= temp; 506 next += temp; 507 508 for (qh = ehci->reclaim; size > 0 && qh; qh = qh->reclaim) 509 qh_lines (ehci, qh, &next, &size); 510 } 511 spin_unlock_irqrestore (&ehci->lock, flags); 512 513 return strlen(buf->page); 514 } 515 516 #define DBG_SCHED_LIMIT 64 517 static ssize_t fill_periodic_buffer(struct debug_buffer *buf) 518 { 519 struct usb_hcd *hcd; 520 struct ehci_hcd *ehci; 521 unsigned long flags; 522 union ehci_shadow p, *seen; 523 unsigned temp, size, seen_count; 524 char *next; 525 unsigned i; 526 __hc32 tag; 527 528 if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC))) 529 return 0; 530 seen_count = 0; 531 532 hcd = bus_to_hcd(buf->bus); 533 ehci = hcd_to_ehci (hcd); 534 next = buf->page; 535 size = PAGE_SIZE; 536 537 temp = scnprintf (next, size, "size = %d\n", ehci->periodic_size); 538 size -= temp; 539 next += temp; 540 541 /* dump a snapshot of the periodic schedule. 542 * iso changes, interrupt usually doesn't. 543 */ 544 spin_lock_irqsave (&ehci->lock, flags); 545 for (i = 0; i < ehci->periodic_size; i++) { 546 p = ehci->pshadow [i]; 547 if (likely (!p.ptr)) 548 continue; 549 tag = Q_NEXT_TYPE(ehci, ehci->periodic [i]); 550 551 temp = scnprintf (next, size, "%4d: ", i); 552 size -= temp; 553 next += temp; 554 555 do { 556 switch (hc32_to_cpu(ehci, tag)) { 557 case Q_TYPE_QH: 558 temp = scnprintf (next, size, " qh%d-%04x/%p", 559 p.qh->period, 560 hc32_to_cpup(ehci, 561 &p.qh->hw_info2) 562 /* uframe masks */ 563 & (QH_CMASK | QH_SMASK), 564 p.qh); 565 size -= temp; 566 next += temp; 567 /* don't repeat what follows this qh */ 568 for (temp = 0; temp < seen_count; temp++) { 569 if (seen [temp].ptr != p.ptr) 570 continue; 571 if (p.qh->qh_next.ptr) 572 temp = scnprintf (next, size, 573 " ..."); 574 p.ptr = NULL; 575 break; 576 } 577 /* show more info the first time around */ 578 if (temp == seen_count && p.ptr) { 579 u32 scratch = hc32_to_cpup(ehci, 580 &p.qh->hw_info1); 581 struct ehci_qtd *qtd; 582 char *type = ""; 583 584 /* count tds, get ep direction */ 585 temp = 0; 586 list_for_each_entry (qtd, 587 &p.qh->qtd_list, 588 qtd_list) { 589 temp++; 590 switch (0x03 & (hc32_to_cpu( 591 ehci, 592 qtd->hw_token) >> 8)) { 593 case 0: type = "out"; continue; 594 case 1: type = "in"; continue; 595 } 596 } 597 598 temp = scnprintf (next, size, 599 " (%c%d ep%d%s " 600 "[%d/%d] q%d p%d)", 601 speed_char (scratch), 602 scratch & 0x007f, 603 (scratch >> 8) & 0x000f, type, 604 p.qh->usecs, p.qh->c_usecs, 605 temp, 606 0x7ff & (scratch >> 16)); 607 608 if (seen_count < DBG_SCHED_LIMIT) 609 seen [seen_count++].qh = p.qh; 610 } else 611 temp = 0; 612 if (p.qh) { 613 tag = Q_NEXT_TYPE(ehci, p.qh->hw_next); 614 p = p.qh->qh_next; 615 } 616 break; 617 case Q_TYPE_FSTN: 618 temp = scnprintf (next, size, 619 " fstn-%8x/%p", p.fstn->hw_prev, 620 p.fstn); 621 tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next); 622 p = p.fstn->fstn_next; 623 break; 624 case Q_TYPE_ITD: 625 temp = scnprintf (next, size, 626 " itd/%p", p.itd); 627 tag = Q_NEXT_TYPE(ehci, p.itd->hw_next); 628 p = p.itd->itd_next; 629 break; 630 case Q_TYPE_SITD: 631 temp = scnprintf (next, size, 632 " sitd%d-%04x/%p", 633 p.sitd->stream->interval, 634 hc32_to_cpup(ehci, &p.sitd->hw_uframe) 635 & 0x0000ffff, 636 p.sitd); 637 tag = Q_NEXT_TYPE(ehci, p.sitd->hw_next); 638 p = p.sitd->sitd_next; 639 break; 640 } 641 size -= temp; 642 next += temp; 643 } while (p.ptr); 644 645 temp = scnprintf (next, size, "\n"); 646 size -= temp; 647 next += temp; 648 } 649 spin_unlock_irqrestore (&ehci->lock, flags); 650 kfree (seen); 651 652 return PAGE_SIZE - size; 653 } 654 #undef DBG_SCHED_LIMIT 655 656 static ssize_t fill_registers_buffer(struct debug_buffer *buf) 657 { 658 struct usb_hcd *hcd; 659 struct ehci_hcd *ehci; 660 unsigned long flags; 661 unsigned temp, size, i; 662 char *next, scratch [80]; 663 static char fmt [] = "%*s\n"; 664 static char label [] = ""; 665 666 hcd = bus_to_hcd(buf->bus); 667 ehci = hcd_to_ehci (hcd); 668 next = buf->page; 669 size = PAGE_SIZE; 670 671 spin_lock_irqsave (&ehci->lock, flags); 672 673 if (buf->bus->controller->power.power_state.event) { 674 size = scnprintf (next, size, 675 "bus %s, device %s (driver " DRIVER_VERSION ")\n" 676 "%s\n" 677 "SUSPENDED (no register access)\n", 678 hcd->self.controller->bus->name, 679 hcd->self.controller->bus_id, 680 hcd->product_desc); 681 goto done; 682 } 683 684 /* Capability Registers */ 685 i = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase)); 686 temp = scnprintf (next, size, 687 "bus %s, device %s (driver " DRIVER_VERSION ")\n" 688 "%s\n" 689 "EHCI %x.%02x, hcd state %d\n", 690 hcd->self.controller->bus->name, 691 hcd->self.controller->bus_id, 692 hcd->product_desc, 693 i >> 8, i & 0x0ff, hcd->state); 694 size -= temp; 695 next += temp; 696 697 #ifdef CONFIG_PCI 698 /* EHCI 0.96 and later may have "extended capabilities" */ 699 if (hcd->self.controller->bus == &pci_bus_type) { 700 struct pci_dev *pdev; 701 u32 offset, cap, cap2; 702 unsigned count = 256/4; 703 704 pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller); 705 offset = HCC_EXT_CAPS(ehci_readl(ehci, 706 &ehci->caps->hcc_params)); 707 while (offset && count--) { 708 pci_read_config_dword (pdev, offset, &cap); 709 switch (cap & 0xff) { 710 case 1: 711 temp = scnprintf (next, size, 712 "ownership %08x%s%s\n", cap, 713 (cap & (1 << 24)) ? " linux" : "", 714 (cap & (1 << 16)) ? " firmware" : ""); 715 size -= temp; 716 next += temp; 717 718 offset += 4; 719 pci_read_config_dword (pdev, offset, &cap2); 720 temp = scnprintf (next, size, 721 "SMI sts/enable 0x%08x\n", cap2); 722 size -= temp; 723 next += temp; 724 break; 725 case 0: /* illegal reserved capability */ 726 cap = 0; 727 /* FALLTHROUGH */ 728 default: /* unknown */ 729 break; 730 } 731 temp = (cap >> 8) & 0xff; 732 } 733 } 734 #endif 735 736 // FIXME interpret both types of params 737 i = ehci_readl(ehci, &ehci->caps->hcs_params); 738 temp = scnprintf (next, size, "structural params 0x%08x\n", i); 739 size -= temp; 740 next += temp; 741 742 i = ehci_readl(ehci, &ehci->caps->hcc_params); 743 temp = scnprintf (next, size, "capability params 0x%08x\n", i); 744 size -= temp; 745 next += temp; 746 747 /* Operational Registers */ 748 temp = dbg_status_buf (scratch, sizeof scratch, label, 749 ehci_readl(ehci, &ehci->regs->status)); 750 temp = scnprintf (next, size, fmt, temp, scratch); 751 size -= temp; 752 next += temp; 753 754 temp = dbg_command_buf (scratch, sizeof scratch, label, 755 ehci_readl(ehci, &ehci->regs->command)); 756 temp = scnprintf (next, size, fmt, temp, scratch); 757 size -= temp; 758 next += temp; 759 760 temp = dbg_intr_buf (scratch, sizeof scratch, label, 761 ehci_readl(ehci, &ehci->regs->intr_enable)); 762 temp = scnprintf (next, size, fmt, temp, scratch); 763 size -= temp; 764 next += temp; 765 766 temp = scnprintf (next, size, "uframe %04x\n", 767 ehci_readl(ehci, &ehci->regs->frame_index)); 768 size -= temp; 769 next += temp; 770 771 for (i = 1; i <= HCS_N_PORTS (ehci->hcs_params); i++) { 772 temp = dbg_port_buf (scratch, sizeof scratch, label, i, 773 ehci_readl(ehci, 774 &ehci->regs->port_status[i - 1])); 775 temp = scnprintf (next, size, fmt, temp, scratch); 776 size -= temp; 777 next += temp; 778 if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) { 779 temp = scnprintf (next, size, 780 " debug control %08x\n", 781 ehci_readl(ehci, 782 &ehci->debug->control)); 783 size -= temp; 784 next += temp; 785 } 786 } 787 788 if (ehci->reclaim) { 789 temp = scnprintf(next, size, "reclaim qh %p\n", ehci->reclaim); 790 size -= temp; 791 next += temp; 792 } 793 794 #ifdef EHCI_STATS 795 temp = scnprintf (next, size, 796 "irq normal %ld err %ld reclaim %ld (lost %ld)\n", 797 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim, 798 ehci->stats.lost_iaa); 799 size -= temp; 800 next += temp; 801 802 temp = scnprintf (next, size, "complete %ld unlink %ld\n", 803 ehci->stats.complete, ehci->stats.unlink); 804 size -= temp; 805 next += temp; 806 #endif 807 808 done: 809 spin_unlock_irqrestore (&ehci->lock, flags); 810 811 return PAGE_SIZE - size; 812 } 813 814 static struct debug_buffer *alloc_buffer(struct usb_bus *bus, 815 ssize_t (*fill_func)(struct debug_buffer *)) 816 { 817 struct debug_buffer *buf; 818 819 buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL); 820 821 if (buf) { 822 buf->bus = bus; 823 buf->fill_func = fill_func; 824 mutex_init(&buf->mutex); 825 } 826 827 return buf; 828 } 829 830 static int fill_buffer(struct debug_buffer *buf) 831 { 832 int ret = 0; 833 834 if (!buf->page) 835 buf->page = (char *)get_zeroed_page(GFP_KERNEL); 836 837 if (!buf->page) { 838 ret = -ENOMEM; 839 goto out; 840 } 841 842 ret = buf->fill_func(buf); 843 844 if (ret >= 0) { 845 buf->count = ret; 846 ret = 0; 847 } 848 849 out: 850 return ret; 851 } 852 853 static ssize_t debug_output(struct file *file, char __user *user_buf, 854 size_t len, loff_t *offset) 855 { 856 struct debug_buffer *buf = file->private_data; 857 int ret = 0; 858 859 mutex_lock(&buf->mutex); 860 if (buf->count == 0) { 861 ret = fill_buffer(buf); 862 if (ret != 0) { 863 mutex_unlock(&buf->mutex); 864 goto out; 865 } 866 } 867 mutex_unlock(&buf->mutex); 868 869 ret = simple_read_from_buffer(user_buf, len, offset, 870 buf->page, buf->count); 871 872 out: 873 return ret; 874 875 } 876 877 static int debug_close(struct inode *inode, struct file *file) 878 { 879 struct debug_buffer *buf = file->private_data; 880 881 if (buf) { 882 if (buf->page) 883 free_page((unsigned long)buf->page); 884 kfree(buf); 885 } 886 887 return 0; 888 } 889 static int debug_async_open(struct inode *inode, struct file *file) 890 { 891 file->private_data = alloc_buffer(inode->i_private, fill_async_buffer); 892 893 return file->private_data ? 0 : -ENOMEM; 894 } 895 896 static int debug_periodic_open(struct inode *inode, struct file *file) 897 { 898 file->private_data = alloc_buffer(inode->i_private, 899 fill_periodic_buffer); 900 901 return file->private_data ? 0 : -ENOMEM; 902 } 903 904 static int debug_registers_open(struct inode *inode, struct file *file) 905 { 906 file->private_data = alloc_buffer(inode->i_private, 907 fill_registers_buffer); 908 909 return file->private_data ? 0 : -ENOMEM; 910 } 911 912 static inline void create_debug_files (struct ehci_hcd *ehci) 913 { 914 struct usb_bus *bus = &ehci_to_hcd(ehci)->self; 915 916 ehci->debug_dir = debugfs_create_dir(bus->bus_name, ehci_debug_root); 917 if (!ehci->debug_dir) 918 goto dir_error; 919 920 ehci->debug_async = debugfs_create_file("async", S_IRUGO, 921 ehci->debug_dir, bus, 922 &debug_async_fops); 923 if (!ehci->debug_async) 924 goto async_error; 925 926 ehci->debug_periodic = debugfs_create_file("periodic", S_IRUGO, 927 ehci->debug_dir, bus, 928 &debug_periodic_fops); 929 if (!ehci->debug_periodic) 930 goto periodic_error; 931 932 ehci->debug_registers = debugfs_create_file("registers", S_IRUGO, 933 ehci->debug_dir, bus, 934 &debug_registers_fops); 935 if (!ehci->debug_registers) 936 goto registers_error; 937 return; 938 939 registers_error: 940 debugfs_remove(ehci->debug_periodic); 941 periodic_error: 942 debugfs_remove(ehci->debug_async); 943 async_error: 944 debugfs_remove(ehci->debug_dir); 945 dir_error: 946 ehci->debug_periodic = NULL; 947 ehci->debug_async = NULL; 948 ehci->debug_dir = NULL; 949 } 950 951 static inline void remove_debug_files (struct ehci_hcd *ehci) 952 { 953 debugfs_remove(ehci->debug_registers); 954 debugfs_remove(ehci->debug_periodic); 955 debugfs_remove(ehci->debug_async); 956 debugfs_remove(ehci->debug_dir); 957 } 958 959 #endif /* STUB_DEBUG_FILES */ 960