1 /* 2 * Copyright (c) 2001-2002 by David Brownell 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the 6 * Free Software Foundation; either version 2 of the License, or (at your 7 * option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, but 10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software Foundation, 16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 */ 18 19 /* this file is part of ehci-hcd.c */ 20 21 #define ehci_dbg(ehci, fmt, args...) \ 22 dev_dbg (ehci_to_hcd(ehci)->self.controller , fmt , ## args ) 23 #define ehci_err(ehci, fmt, args...) \ 24 dev_err (ehci_to_hcd(ehci)->self.controller , fmt , ## args ) 25 #define ehci_info(ehci, fmt, args...) \ 26 dev_info (ehci_to_hcd(ehci)->self.controller , fmt , ## args ) 27 #define ehci_warn(ehci, fmt, args...) \ 28 dev_warn (ehci_to_hcd(ehci)->self.controller , fmt , ## args ) 29 30 #ifdef VERBOSE_DEBUG 31 # define vdbg dbg 32 # define ehci_vdbg ehci_dbg 33 #else 34 # define vdbg(fmt,args...) do { } while (0) 35 # define ehci_vdbg(ehci, fmt, args...) do { } while (0) 36 #endif 37 38 #ifdef DEBUG 39 40 /* check the values in the HCSPARAMS register 41 * (host controller _Structural_ parameters) 42 * see EHCI spec, Table 2-4 for each value 43 */ 44 static void dbg_hcs_params (struct ehci_hcd *ehci, char *label) 45 { 46 u32 params = ehci_readl(ehci, &ehci->caps->hcs_params); 47 48 ehci_dbg (ehci, 49 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n", 50 label, params, 51 HCS_DEBUG_PORT (params), 52 HCS_INDICATOR (params) ? " ind" : "", 53 HCS_N_CC (params), 54 HCS_N_PCC (params), 55 HCS_PORTROUTED (params) ? "" : " ordered", 56 HCS_PPC (params) ? "" : " !ppc", 57 HCS_N_PORTS (params) 58 ); 59 /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */ 60 if (HCS_PORTROUTED (params)) { 61 int i; 62 char buf [46], tmp [7], byte; 63 64 buf[0] = 0; 65 for (i = 0; i < HCS_N_PORTS (params); i++) { 66 // FIXME MIPS won't readb() ... 67 byte = readb (&ehci->caps->portroute[(i>>1)]); 68 sprintf(tmp, "%d ", 69 ((i & 0x1) ? ((byte)&0xf) : ((byte>>4)&0xf))); 70 strcat(buf, tmp); 71 } 72 ehci_dbg (ehci, "%s portroute %s\n", 73 label, buf); 74 } 75 } 76 #else 77 78 static inline void dbg_hcs_params (struct ehci_hcd *ehci, char *label) {} 79 80 #endif 81 82 #ifdef DEBUG 83 84 /* check the values in the HCCPARAMS register 85 * (host controller _Capability_ parameters) 86 * see EHCI Spec, Table 2-5 for each value 87 * */ 88 static void dbg_hcc_params (struct ehci_hcd *ehci, char *label) 89 { 90 u32 params = ehci_readl(ehci, &ehci->caps->hcc_params); 91 92 if (HCC_ISOC_CACHE (params)) { 93 ehci_dbg (ehci, 94 "%s hcc_params %04x caching frame %s%s%s\n", 95 label, params, 96 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024", 97 HCC_CANPARK(params) ? " park" : "", 98 HCC_64BIT_ADDR(params) ? " 64 bit addr" : ""); 99 } else { 100 ehci_dbg (ehci, 101 "%s hcc_params %04x thresh %d uframes %s%s%s\n", 102 label, 103 params, 104 HCC_ISOC_THRES(params), 105 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024", 106 HCC_CANPARK(params) ? " park" : "", 107 HCC_64BIT_ADDR(params) ? " 64 bit addr" : ""); 108 } 109 } 110 #else 111 112 static inline void dbg_hcc_params (struct ehci_hcd *ehci, char *label) {} 113 114 #endif 115 116 #ifdef DEBUG 117 118 static void __maybe_unused 119 dbg_qtd (const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd) 120 { 121 ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd, 122 hc32_to_cpup(ehci, &qtd->hw_next), 123 hc32_to_cpup(ehci, &qtd->hw_alt_next), 124 hc32_to_cpup(ehci, &qtd->hw_token), 125 hc32_to_cpup(ehci, &qtd->hw_buf [0])); 126 if (qtd->hw_buf [1]) 127 ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n", 128 hc32_to_cpup(ehci, &qtd->hw_buf[1]), 129 hc32_to_cpup(ehci, &qtd->hw_buf[2]), 130 hc32_to_cpup(ehci, &qtd->hw_buf[3]), 131 hc32_to_cpup(ehci, &qtd->hw_buf[4])); 132 } 133 134 static void __maybe_unused 135 dbg_qh (const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh) 136 { 137 ehci_dbg (ehci, "%s qh %p n%08x info %x %x qtd %x\n", label, 138 qh, qh->hw_next, qh->hw_info1, qh->hw_info2, 139 qh->hw_current); 140 dbg_qtd ("overlay", ehci, (struct ehci_qtd *) &qh->hw_qtd_next); 141 } 142 143 static void __maybe_unused 144 dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd) 145 { 146 ehci_dbg (ehci, "%s [%d] itd %p, next %08x, urb %p\n", 147 label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next), 148 itd->urb); 149 ehci_dbg (ehci, 150 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n", 151 hc32_to_cpu(ehci, itd->hw_transaction[0]), 152 hc32_to_cpu(ehci, itd->hw_transaction[1]), 153 hc32_to_cpu(ehci, itd->hw_transaction[2]), 154 hc32_to_cpu(ehci, itd->hw_transaction[3]), 155 hc32_to_cpu(ehci, itd->hw_transaction[4]), 156 hc32_to_cpu(ehci, itd->hw_transaction[5]), 157 hc32_to_cpu(ehci, itd->hw_transaction[6]), 158 hc32_to_cpu(ehci, itd->hw_transaction[7])); 159 ehci_dbg (ehci, 160 " buf: %08x %08x %08x %08x %08x %08x %08x\n", 161 hc32_to_cpu(ehci, itd->hw_bufp[0]), 162 hc32_to_cpu(ehci, itd->hw_bufp[1]), 163 hc32_to_cpu(ehci, itd->hw_bufp[2]), 164 hc32_to_cpu(ehci, itd->hw_bufp[3]), 165 hc32_to_cpu(ehci, itd->hw_bufp[4]), 166 hc32_to_cpu(ehci, itd->hw_bufp[5]), 167 hc32_to_cpu(ehci, itd->hw_bufp[6])); 168 ehci_dbg (ehci, " index: %d %d %d %d %d %d %d %d\n", 169 itd->index[0], itd->index[1], itd->index[2], 170 itd->index[3], itd->index[4], itd->index[5], 171 itd->index[6], itd->index[7]); 172 } 173 174 static void __maybe_unused 175 dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd) 176 { 177 ehci_dbg (ehci, "%s [%d] sitd %p, next %08x, urb %p\n", 178 label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next), 179 sitd->urb); 180 ehci_dbg (ehci, 181 " addr %08x sched %04x result %08x buf %08x %08x\n", 182 hc32_to_cpu(ehci, sitd->hw_fullspeed_ep), 183 hc32_to_cpu(ehci, sitd->hw_uframe), 184 hc32_to_cpu(ehci, sitd->hw_results), 185 hc32_to_cpu(ehci, sitd->hw_buf[0]), 186 hc32_to_cpu(ehci, sitd->hw_buf[1])); 187 } 188 189 static int __maybe_unused 190 dbg_status_buf (char *buf, unsigned len, const char *label, u32 status) 191 { 192 return scnprintf (buf, len, 193 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s", 194 label, label [0] ? " " : "", status, 195 (status & STS_ASS) ? " Async" : "", 196 (status & STS_PSS) ? " Periodic" : "", 197 (status & STS_RECL) ? " Recl" : "", 198 (status & STS_HALT) ? " Halt" : "", 199 (status & STS_IAA) ? " IAA" : "", 200 (status & STS_FATAL) ? " FATAL" : "", 201 (status & STS_FLR) ? " FLR" : "", 202 (status & STS_PCD) ? " PCD" : "", 203 (status & STS_ERR) ? " ERR" : "", 204 (status & STS_INT) ? " INT" : "" 205 ); 206 } 207 208 static int __maybe_unused 209 dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable) 210 { 211 return scnprintf (buf, len, 212 "%s%sintrenable %02x%s%s%s%s%s%s", 213 label, label [0] ? " " : "", enable, 214 (enable & STS_IAA) ? " IAA" : "", 215 (enable & STS_FATAL) ? " FATAL" : "", 216 (enable & STS_FLR) ? " FLR" : "", 217 (enable & STS_PCD) ? " PCD" : "", 218 (enable & STS_ERR) ? " ERR" : "", 219 (enable & STS_INT) ? " INT" : "" 220 ); 221 } 222 223 static const char *const fls_strings [] = 224 { "1024", "512", "256", "??" }; 225 226 static int 227 dbg_command_buf (char *buf, unsigned len, const char *label, u32 command) 228 { 229 return scnprintf (buf, len, 230 "%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s", 231 label, label [0] ? " " : "", command, 232 (command & CMD_PARK) ? "park" : "(park)", 233 CMD_PARK_CNT (command), 234 (command >> 16) & 0x3f, 235 (command & CMD_LRESET) ? " LReset" : "", 236 (command & CMD_IAAD) ? " IAAD" : "", 237 (command & CMD_ASE) ? " Async" : "", 238 (command & CMD_PSE) ? " Periodic" : "", 239 fls_strings [(command >> 2) & 0x3], 240 (command & CMD_RESET) ? " Reset" : "", 241 (command & CMD_RUN) ? "RUN" : "HALT" 242 ); 243 } 244 245 static int 246 dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status) 247 { 248 char *sig; 249 250 /* signaling state */ 251 switch (status & (3 << 10)) { 252 case 0 << 10: sig = "se0"; break; 253 case 1 << 10: sig = "k"; break; /* low speed */ 254 case 2 << 10: sig = "j"; break; 255 default: sig = "?"; break; 256 } 257 258 return scnprintf (buf, len, 259 "%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s", 260 label, label [0] ? " " : "", port, status, 261 (status & PORT_POWER) ? " POWER" : "", 262 (status & PORT_OWNER) ? " OWNER" : "", 263 sig, 264 (status & PORT_RESET) ? " RESET" : "", 265 (status & PORT_SUSPEND) ? " SUSPEND" : "", 266 (status & PORT_RESUME) ? " RESUME" : "", 267 (status & PORT_OCC) ? " OCC" : "", 268 (status & PORT_OC) ? " OC" : "", 269 (status & PORT_PEC) ? " PEC" : "", 270 (status & PORT_PE) ? " PE" : "", 271 (status & PORT_CSC) ? " CSC" : "", 272 (status & PORT_CONNECT) ? " CONNECT" : ""); 273 } 274 275 #else 276 static inline void __maybe_unused 277 dbg_qh (char *label, struct ehci_hcd *ehci, struct ehci_qh *qh) 278 {} 279 280 static inline int __maybe_unused 281 dbg_status_buf (char *buf, unsigned len, const char *label, u32 status) 282 { return 0; } 283 284 static inline int __maybe_unused 285 dbg_command_buf (char *buf, unsigned len, const char *label, u32 command) 286 { return 0; } 287 288 static inline int __maybe_unused 289 dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable) 290 { return 0; } 291 292 static inline int __maybe_unused 293 dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status) 294 { return 0; } 295 296 #endif /* DEBUG */ 297 298 /* functions have the "wrong" filename when they're output... */ 299 #define dbg_status(ehci, label, status) { \ 300 char _buf [80]; \ 301 dbg_status_buf (_buf, sizeof _buf, label, status); \ 302 ehci_dbg (ehci, "%s\n", _buf); \ 303 } 304 305 #define dbg_cmd(ehci, label, command) { \ 306 char _buf [80]; \ 307 dbg_command_buf (_buf, sizeof _buf, label, command); \ 308 ehci_dbg (ehci, "%s\n", _buf); \ 309 } 310 311 #define dbg_port(ehci, label, port, status) { \ 312 char _buf [80]; \ 313 dbg_port_buf (_buf, sizeof _buf, label, port, status); \ 314 ehci_dbg (ehci, "%s\n", _buf); \ 315 } 316 317 /*-------------------------------------------------------------------------*/ 318 319 #ifdef STUB_DEBUG_FILES 320 321 static inline void create_debug_files (struct ehci_hcd *bus) { } 322 static inline void remove_debug_files (struct ehci_hcd *bus) { } 323 324 #else 325 326 /* troubleshooting help: expose state in debugfs */ 327 328 static int debug_async_open(struct inode *, struct file *); 329 static int debug_periodic_open(struct inode *, struct file *); 330 static int debug_registers_open(struct inode *, struct file *); 331 static int debug_async_open(struct inode *, struct file *); 332 static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*); 333 static int debug_close(struct inode *, struct file *); 334 335 static const struct file_operations debug_async_fops = { 336 .owner = THIS_MODULE, 337 .open = debug_async_open, 338 .read = debug_output, 339 .release = debug_close, 340 }; 341 static const struct file_operations debug_periodic_fops = { 342 .owner = THIS_MODULE, 343 .open = debug_periodic_open, 344 .read = debug_output, 345 .release = debug_close, 346 }; 347 static const struct file_operations debug_registers_fops = { 348 .owner = THIS_MODULE, 349 .open = debug_registers_open, 350 .read = debug_output, 351 .release = debug_close, 352 }; 353 354 static struct dentry *ehci_debug_root; 355 356 struct debug_buffer { 357 ssize_t (*fill_func)(struct debug_buffer *); /* fill method */ 358 struct usb_bus *bus; 359 struct mutex mutex; /* protect filling of buffer */ 360 size_t count; /* number of characters filled into buffer */ 361 char *output_buf; 362 size_t alloc_size; 363 }; 364 365 #define speed_char(info1) ({ char tmp; \ 366 switch (info1 & (3 << 12)) { \ 367 case 0 << 12: tmp = 'f'; break; \ 368 case 1 << 12: tmp = 'l'; break; \ 369 case 2 << 12: tmp = 'h'; break; \ 370 default: tmp = '?'; break; \ 371 }; tmp; }) 372 373 static inline char token_mark(struct ehci_hcd *ehci, __hc32 token) 374 { 375 __u32 v = hc32_to_cpu(ehci, token); 376 377 if (v & QTD_STS_ACTIVE) 378 return '*'; 379 if (v & QTD_STS_HALT) 380 return '-'; 381 if (!IS_SHORT_READ (v)) 382 return ' '; 383 /* tries to advance through hw_alt_next */ 384 return '/'; 385 } 386 387 static void qh_lines ( 388 struct ehci_hcd *ehci, 389 struct ehci_qh *qh, 390 char **nextp, 391 unsigned *sizep 392 ) 393 { 394 u32 scratch; 395 u32 hw_curr; 396 struct list_head *entry; 397 struct ehci_qtd *td; 398 unsigned temp; 399 unsigned size = *sizep; 400 char *next = *nextp; 401 char mark; 402 __le32 list_end = EHCI_LIST_END(ehci); 403 404 if (qh->hw_qtd_next == list_end) /* NEC does this */ 405 mark = '@'; 406 else 407 mark = token_mark(ehci, qh->hw_token); 408 if (mark == '/') { /* qh_alt_next controls qh advance? */ 409 if ((qh->hw_alt_next & QTD_MASK(ehci)) 410 == ehci->async->hw_alt_next) 411 mark = '#'; /* blocked */ 412 else if (qh->hw_alt_next == list_end) 413 mark = '.'; /* use hw_qtd_next */ 414 /* else alt_next points to some other qtd */ 415 } 416 scratch = hc32_to_cpup(ehci, &qh->hw_info1); 417 hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &qh->hw_current) : 0; 418 temp = scnprintf (next, size, 419 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)", 420 qh, scratch & 0x007f, 421 speed_char (scratch), 422 (scratch >> 8) & 0x000f, 423 scratch, hc32_to_cpup(ehci, &qh->hw_info2), 424 hc32_to_cpup(ehci, &qh->hw_token), mark, 425 (cpu_to_hc32(ehci, QTD_TOGGLE) & qh->hw_token) 426 ? "data1" : "data0", 427 (hc32_to_cpup(ehci, &qh->hw_alt_next) >> 1) & 0x0f); 428 size -= temp; 429 next += temp; 430 431 /* hc may be modifying the list as we read it ... */ 432 list_for_each (entry, &qh->qtd_list) { 433 td = list_entry (entry, struct ehci_qtd, qtd_list); 434 scratch = hc32_to_cpup(ehci, &td->hw_token); 435 mark = ' '; 436 if (hw_curr == td->qtd_dma) 437 mark = '*'; 438 else if (qh->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma)) 439 mark = '+'; 440 else if (QTD_LENGTH (scratch)) { 441 if (td->hw_alt_next == ehci->async->hw_alt_next) 442 mark = '#'; 443 else if (td->hw_alt_next != list_end) 444 mark = '/'; 445 } 446 temp = snprintf (next, size, 447 "\n\t%p%c%s len=%d %08x urb %p", 448 td, mark, ({ char *tmp; 449 switch ((scratch>>8)&0x03) { 450 case 0: tmp = "out"; break; 451 case 1: tmp = "in"; break; 452 case 2: tmp = "setup"; break; 453 default: tmp = "?"; break; 454 } tmp;}), 455 (scratch >> 16) & 0x7fff, 456 scratch, 457 td->urb); 458 if (temp < 0) 459 temp = 0; 460 else if (size < temp) 461 temp = size; 462 size -= temp; 463 next += temp; 464 if (temp == size) 465 goto done; 466 } 467 468 temp = snprintf (next, size, "\n"); 469 if (temp < 0) 470 temp = 0; 471 else if (size < temp) 472 temp = size; 473 size -= temp; 474 next += temp; 475 476 done: 477 *sizep = size; 478 *nextp = next; 479 } 480 481 static ssize_t fill_async_buffer(struct debug_buffer *buf) 482 { 483 struct usb_hcd *hcd; 484 struct ehci_hcd *ehci; 485 unsigned long flags; 486 unsigned temp, size; 487 char *next; 488 struct ehci_qh *qh; 489 490 hcd = bus_to_hcd(buf->bus); 491 ehci = hcd_to_ehci (hcd); 492 next = buf->output_buf; 493 size = buf->alloc_size; 494 495 *next = 0; 496 497 /* dumps a snapshot of the async schedule. 498 * usually empty except for long-term bulk reads, or head. 499 * one QH per line, and TDs we know about 500 */ 501 spin_lock_irqsave (&ehci->lock, flags); 502 for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh) 503 qh_lines (ehci, qh, &next, &size); 504 if (ehci->reclaim && size > 0) { 505 temp = scnprintf (next, size, "\nreclaim =\n"); 506 size -= temp; 507 next += temp; 508 509 for (qh = ehci->reclaim; size > 0 && qh; qh = qh->reclaim) 510 qh_lines (ehci, qh, &next, &size); 511 } 512 spin_unlock_irqrestore (&ehci->lock, flags); 513 514 return strlen(buf->output_buf); 515 } 516 517 #define DBG_SCHED_LIMIT 64 518 static ssize_t fill_periodic_buffer(struct debug_buffer *buf) 519 { 520 struct usb_hcd *hcd; 521 struct ehci_hcd *ehci; 522 unsigned long flags; 523 union ehci_shadow p, *seen; 524 unsigned temp, size, seen_count; 525 char *next; 526 unsigned i; 527 __hc32 tag; 528 529 if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC))) 530 return 0; 531 seen_count = 0; 532 533 hcd = bus_to_hcd(buf->bus); 534 ehci = hcd_to_ehci (hcd); 535 next = buf->output_buf; 536 size = buf->alloc_size; 537 538 temp = scnprintf (next, size, "size = %d\n", ehci->periodic_size); 539 size -= temp; 540 next += temp; 541 542 /* dump a snapshot of the periodic schedule. 543 * iso changes, interrupt usually doesn't. 544 */ 545 spin_lock_irqsave (&ehci->lock, flags); 546 for (i = 0; i < ehci->periodic_size; i++) { 547 p = ehci->pshadow [i]; 548 if (likely (!p.ptr)) 549 continue; 550 tag = Q_NEXT_TYPE(ehci, ehci->periodic [i]); 551 552 temp = scnprintf (next, size, "%4d: ", i); 553 size -= temp; 554 next += temp; 555 556 do { 557 switch (hc32_to_cpu(ehci, tag)) { 558 case Q_TYPE_QH: 559 temp = scnprintf (next, size, " qh%d-%04x/%p", 560 p.qh->period, 561 hc32_to_cpup(ehci, 562 &p.qh->hw_info2) 563 /* uframe masks */ 564 & (QH_CMASK | QH_SMASK), 565 p.qh); 566 size -= temp; 567 next += temp; 568 /* don't repeat what follows this qh */ 569 for (temp = 0; temp < seen_count; temp++) { 570 if (seen [temp].ptr != p.ptr) 571 continue; 572 if (p.qh->qh_next.ptr) { 573 temp = scnprintf (next, size, 574 " ..."); 575 size -= temp; 576 next += temp; 577 } 578 break; 579 } 580 /* show more info the first time around */ 581 if (temp == seen_count) { 582 u32 scratch = hc32_to_cpup(ehci, 583 &p.qh->hw_info1); 584 struct ehci_qtd *qtd; 585 char *type = ""; 586 587 /* count tds, get ep direction */ 588 temp = 0; 589 list_for_each_entry (qtd, 590 &p.qh->qtd_list, 591 qtd_list) { 592 temp++; 593 switch (0x03 & (hc32_to_cpu( 594 ehci, 595 qtd->hw_token) >> 8)) { 596 case 0: type = "out"; continue; 597 case 1: type = "in"; continue; 598 } 599 } 600 601 temp = scnprintf (next, size, 602 " (%c%d ep%d%s " 603 "[%d/%d] q%d p%d)", 604 speed_char (scratch), 605 scratch & 0x007f, 606 (scratch >> 8) & 0x000f, type, 607 p.qh->usecs, p.qh->c_usecs, 608 temp, 609 0x7ff & (scratch >> 16)); 610 611 if (seen_count < DBG_SCHED_LIMIT) 612 seen [seen_count++].qh = p.qh; 613 } else 614 temp = 0; 615 if (p.qh) { 616 tag = Q_NEXT_TYPE(ehci, p.qh->hw_next); 617 p = p.qh->qh_next; 618 } 619 break; 620 case Q_TYPE_FSTN: 621 temp = scnprintf (next, size, 622 " fstn-%8x/%p", p.fstn->hw_prev, 623 p.fstn); 624 tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next); 625 p = p.fstn->fstn_next; 626 break; 627 case Q_TYPE_ITD: 628 temp = scnprintf (next, size, 629 " itd/%p", p.itd); 630 tag = Q_NEXT_TYPE(ehci, p.itd->hw_next); 631 p = p.itd->itd_next; 632 break; 633 case Q_TYPE_SITD: 634 temp = scnprintf (next, size, 635 " sitd%d-%04x/%p", 636 p.sitd->stream->interval, 637 hc32_to_cpup(ehci, &p.sitd->hw_uframe) 638 & 0x0000ffff, 639 p.sitd); 640 tag = Q_NEXT_TYPE(ehci, p.sitd->hw_next); 641 p = p.sitd->sitd_next; 642 break; 643 } 644 size -= temp; 645 next += temp; 646 } while (p.ptr); 647 648 temp = scnprintf (next, size, "\n"); 649 size -= temp; 650 next += temp; 651 } 652 spin_unlock_irqrestore (&ehci->lock, flags); 653 kfree (seen); 654 655 return buf->alloc_size - size; 656 } 657 #undef DBG_SCHED_LIMIT 658 659 static ssize_t fill_registers_buffer(struct debug_buffer *buf) 660 { 661 struct usb_hcd *hcd; 662 struct ehci_hcd *ehci; 663 unsigned long flags; 664 unsigned temp, size, i; 665 char *next, scratch [80]; 666 static char fmt [] = "%*s\n"; 667 static char label [] = ""; 668 669 hcd = bus_to_hcd(buf->bus); 670 ehci = hcd_to_ehci (hcd); 671 next = buf->output_buf; 672 size = buf->alloc_size; 673 674 spin_lock_irqsave (&ehci->lock, flags); 675 676 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) { 677 size = scnprintf (next, size, 678 "bus %s, device %s\n" 679 "%s\n" 680 "SUSPENDED (no register access)\n", 681 hcd->self.controller->bus->name, 682 dev_name(hcd->self.controller), 683 hcd->product_desc); 684 goto done; 685 } 686 687 /* Capability Registers */ 688 i = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase)); 689 temp = scnprintf (next, size, 690 "bus %s, device %s\n" 691 "%s\n" 692 "EHCI %x.%02x, hcd state %d\n", 693 hcd->self.controller->bus->name, 694 dev_name(hcd->self.controller), 695 hcd->product_desc, 696 i >> 8, i & 0x0ff, hcd->state); 697 size -= temp; 698 next += temp; 699 700 #ifdef CONFIG_PCI 701 /* EHCI 0.96 and later may have "extended capabilities" */ 702 if (hcd->self.controller->bus == &pci_bus_type) { 703 struct pci_dev *pdev; 704 u32 offset, cap, cap2; 705 unsigned count = 256/4; 706 707 pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller); 708 offset = HCC_EXT_CAPS(ehci_readl(ehci, 709 &ehci->caps->hcc_params)); 710 while (offset && count--) { 711 pci_read_config_dword (pdev, offset, &cap); 712 switch (cap & 0xff) { 713 case 1: 714 temp = scnprintf (next, size, 715 "ownership %08x%s%s\n", cap, 716 (cap & (1 << 24)) ? " linux" : "", 717 (cap & (1 << 16)) ? " firmware" : ""); 718 size -= temp; 719 next += temp; 720 721 offset += 4; 722 pci_read_config_dword (pdev, offset, &cap2); 723 temp = scnprintf (next, size, 724 "SMI sts/enable 0x%08x\n", cap2); 725 size -= temp; 726 next += temp; 727 break; 728 case 0: /* illegal reserved capability */ 729 cap = 0; 730 /* FALLTHROUGH */ 731 default: /* unknown */ 732 break; 733 } 734 temp = (cap >> 8) & 0xff; 735 } 736 } 737 #endif 738 739 // FIXME interpret both types of params 740 i = ehci_readl(ehci, &ehci->caps->hcs_params); 741 temp = scnprintf (next, size, "structural params 0x%08x\n", i); 742 size -= temp; 743 next += temp; 744 745 i = ehci_readl(ehci, &ehci->caps->hcc_params); 746 temp = scnprintf (next, size, "capability params 0x%08x\n", i); 747 size -= temp; 748 next += temp; 749 750 /* Operational Registers */ 751 temp = dbg_status_buf (scratch, sizeof scratch, label, 752 ehci_readl(ehci, &ehci->regs->status)); 753 temp = scnprintf (next, size, fmt, temp, scratch); 754 size -= temp; 755 next += temp; 756 757 temp = dbg_command_buf (scratch, sizeof scratch, label, 758 ehci_readl(ehci, &ehci->regs->command)); 759 temp = scnprintf (next, size, fmt, temp, scratch); 760 size -= temp; 761 next += temp; 762 763 temp = dbg_intr_buf (scratch, sizeof scratch, label, 764 ehci_readl(ehci, &ehci->regs->intr_enable)); 765 temp = scnprintf (next, size, fmt, temp, scratch); 766 size -= temp; 767 next += temp; 768 769 temp = scnprintf (next, size, "uframe %04x\n", 770 ehci_readl(ehci, &ehci->regs->frame_index)); 771 size -= temp; 772 next += temp; 773 774 for (i = 1; i <= HCS_N_PORTS (ehci->hcs_params); i++) { 775 temp = dbg_port_buf (scratch, sizeof scratch, label, i, 776 ehci_readl(ehci, 777 &ehci->regs->port_status[i - 1])); 778 temp = scnprintf (next, size, fmt, temp, scratch); 779 size -= temp; 780 next += temp; 781 if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) { 782 temp = scnprintf (next, size, 783 " debug control %08x\n", 784 ehci_readl(ehci, 785 &ehci->debug->control)); 786 size -= temp; 787 next += temp; 788 } 789 } 790 791 if (ehci->reclaim) { 792 temp = scnprintf(next, size, "reclaim qh %p\n", ehci->reclaim); 793 size -= temp; 794 next += temp; 795 } 796 797 #ifdef EHCI_STATS 798 temp = scnprintf (next, size, 799 "irq normal %ld err %ld reclaim %ld (lost %ld)\n", 800 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim, 801 ehci->stats.lost_iaa); 802 size -= temp; 803 next += temp; 804 805 temp = scnprintf (next, size, "complete %ld unlink %ld\n", 806 ehci->stats.complete, ehci->stats.unlink); 807 size -= temp; 808 next += temp; 809 #endif 810 811 done: 812 spin_unlock_irqrestore (&ehci->lock, flags); 813 814 return buf->alloc_size - size; 815 } 816 817 static struct debug_buffer *alloc_buffer(struct usb_bus *bus, 818 ssize_t (*fill_func)(struct debug_buffer *)) 819 { 820 struct debug_buffer *buf; 821 822 buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL); 823 824 if (buf) { 825 buf->bus = bus; 826 buf->fill_func = fill_func; 827 mutex_init(&buf->mutex); 828 buf->alloc_size = PAGE_SIZE; 829 } 830 831 return buf; 832 } 833 834 static int fill_buffer(struct debug_buffer *buf) 835 { 836 int ret = 0; 837 838 if (!buf->output_buf) 839 buf->output_buf = (char *)vmalloc(buf->alloc_size); 840 841 if (!buf->output_buf) { 842 ret = -ENOMEM; 843 goto out; 844 } 845 846 ret = buf->fill_func(buf); 847 848 if (ret >= 0) { 849 buf->count = ret; 850 ret = 0; 851 } 852 853 out: 854 return ret; 855 } 856 857 static ssize_t debug_output(struct file *file, char __user *user_buf, 858 size_t len, loff_t *offset) 859 { 860 struct debug_buffer *buf = file->private_data; 861 int ret = 0; 862 863 mutex_lock(&buf->mutex); 864 if (buf->count == 0) { 865 ret = fill_buffer(buf); 866 if (ret != 0) { 867 mutex_unlock(&buf->mutex); 868 goto out; 869 } 870 } 871 mutex_unlock(&buf->mutex); 872 873 ret = simple_read_from_buffer(user_buf, len, offset, 874 buf->output_buf, buf->count); 875 876 out: 877 return ret; 878 879 } 880 881 static int debug_close(struct inode *inode, struct file *file) 882 { 883 struct debug_buffer *buf = file->private_data; 884 885 if (buf) { 886 if (buf->output_buf) 887 vfree(buf->output_buf); 888 kfree(buf); 889 } 890 891 return 0; 892 } 893 static int debug_async_open(struct inode *inode, struct file *file) 894 { 895 file->private_data = alloc_buffer(inode->i_private, fill_async_buffer); 896 897 return file->private_data ? 0 : -ENOMEM; 898 } 899 900 static int debug_periodic_open(struct inode *inode, struct file *file) 901 { 902 struct debug_buffer *buf; 903 buf = alloc_buffer(inode->i_private, fill_periodic_buffer); 904 if (!buf) 905 return -ENOMEM; 906 907 buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8)*PAGE_SIZE; 908 file->private_data = buf; 909 return 0; 910 } 911 912 static int debug_registers_open(struct inode *inode, struct file *file) 913 { 914 file->private_data = alloc_buffer(inode->i_private, 915 fill_registers_buffer); 916 917 return file->private_data ? 0 : -ENOMEM; 918 } 919 920 static inline void create_debug_files (struct ehci_hcd *ehci) 921 { 922 struct usb_bus *bus = &ehci_to_hcd(ehci)->self; 923 924 ehci->debug_dir = debugfs_create_dir(bus->bus_name, ehci_debug_root); 925 if (!ehci->debug_dir) 926 goto dir_error; 927 928 ehci->debug_async = debugfs_create_file("async", S_IRUGO, 929 ehci->debug_dir, bus, 930 &debug_async_fops); 931 if (!ehci->debug_async) 932 goto async_error; 933 934 ehci->debug_periodic = debugfs_create_file("periodic", S_IRUGO, 935 ehci->debug_dir, bus, 936 &debug_periodic_fops); 937 if (!ehci->debug_periodic) 938 goto periodic_error; 939 940 ehci->debug_registers = debugfs_create_file("registers", S_IRUGO, 941 ehci->debug_dir, bus, 942 &debug_registers_fops); 943 if (!ehci->debug_registers) 944 goto registers_error; 945 return; 946 947 registers_error: 948 debugfs_remove(ehci->debug_periodic); 949 periodic_error: 950 debugfs_remove(ehci->debug_async); 951 async_error: 952 debugfs_remove(ehci->debug_dir); 953 dir_error: 954 ehci->debug_periodic = NULL; 955 ehci->debug_async = NULL; 956 ehci->debug_dir = NULL; 957 } 958 959 static inline void remove_debug_files (struct ehci_hcd *ehci) 960 { 961 debugfs_remove(ehci->debug_registers); 962 debugfs_remove(ehci->debug_periodic); 963 debugfs_remove(ehci->debug_async); 964 debugfs_remove(ehci->debug_dir); 965 } 966 967 #endif /* STUB_DEBUG_FILES */ 968