1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Handles the Intel 27x USB Device Controller (UDC) 4 * 5 * Inspired by original driver by Frank Becker, David Brownell, and others. 6 * Copyright (C) 2008 Robert Jarzmik 7 */ 8 #include <linux/module.h> 9 #include <linux/kernel.h> 10 #include <linux/types.h> 11 #include <linux/errno.h> 12 #include <linux/err.h> 13 #include <linux/platform_device.h> 14 #include <linux/delay.h> 15 #include <linux/list.h> 16 #include <linux/interrupt.h> 17 #include <linux/proc_fs.h> 18 #include <linux/clk.h> 19 #include <linux/irq.h> 20 #include <linux/gpio.h> 21 #include <linux/gpio/consumer.h> 22 #include <linux/slab.h> 23 #include <linux/prefetch.h> 24 #include <linux/byteorder/generic.h> 25 #include <linux/platform_data/pxa2xx_udc.h> 26 #include <linux/of_device.h> 27 #include <linux/of_gpio.h> 28 29 #include <linux/usb.h> 30 #include <linux/usb/ch9.h> 31 #include <linux/usb/gadget.h> 32 #include <linux/usb/phy.h> 33 34 #include "pxa27x_udc.h" 35 36 /* 37 * This driver handles the USB Device Controller (UDC) in Intel's PXA 27x 38 * series processors. 39 * 40 * Such controller drivers work with a gadget driver. The gadget driver 41 * returns descriptors, implements configuration and data protocols used 42 * by the host to interact with this device, and allocates endpoints to 43 * the different protocol interfaces. The controller driver virtualizes 44 * usb hardware so that the gadget drivers will be more portable. 45 * 46 * This UDC hardware wants to implement a bit too much USB protocol. The 47 * biggest issues are: that the endpoints have to be set up before the 48 * controller can be enabled (minor, and not uncommon); and each endpoint 49 * can only have one configuration, interface and alternative interface 50 * number (major, and very unusual). Once set up, these cannot be changed 51 * without a controller reset. 52 * 53 * The workaround is to setup all combinations necessary for the gadgets which 54 * will work with this driver. This is done in pxa_udc structure, statically. 55 * See pxa_udc, udc_usb_ep versus pxa_ep, and matching function find_pxa_ep. 56 * (You could modify this if needed. Some drivers have a "fifo_mode" module 57 * parameter to facilitate such changes.) 58 * 59 * The combinations have been tested with these gadgets : 60 * - zero gadget 61 * - file storage gadget 62 * - ether gadget 63 * 64 * The driver doesn't use DMA, only IO access and IRQ callbacks. No use is 65 * made of UDC's double buffering either. USB "On-The-Go" is not implemented. 66 * 67 * All the requests are handled the same way : 68 * - the drivers tries to handle the request directly to the IO 69 * - if the IO fifo is not big enough, the remaining is send/received in 70 * interrupt handling. 71 */ 72 73 #define DRIVER_VERSION "2008-04-18" 74 #define DRIVER_DESC "PXA 27x USB Device Controller driver" 75 76 static const char driver_name[] = "pxa27x_udc"; 77 static struct pxa_udc *the_controller; 78 79 static void handle_ep(struct pxa_ep *ep); 80 81 /* 82 * Debug filesystem 83 */ 84 #ifdef CONFIG_USB_GADGET_DEBUG_FS 85 86 #include <linux/debugfs.h> 87 #include <linux/uaccess.h> 88 #include <linux/seq_file.h> 89 90 static int state_dbg_show(struct seq_file *s, void *p) 91 { 92 struct pxa_udc *udc = s->private; 93 u32 tmp; 94 95 if (!udc->driver) 96 return -ENODEV; 97 98 /* basic device status */ 99 seq_printf(s, DRIVER_DESC "\n" 100 "%s version: %s\n" 101 "Gadget driver: %s\n", 102 driver_name, DRIVER_VERSION, 103 udc->driver ? udc->driver->driver.name : "(none)"); 104 105 tmp = udc_readl(udc, UDCCR); 106 seq_printf(s, 107 "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), con=%d,inter=%d,altinter=%d\n", 108 tmp, 109 (tmp & UDCCR_OEN) ? " oen":"", 110 (tmp & UDCCR_AALTHNP) ? " aalthnp":"", 111 (tmp & UDCCR_AHNP) ? " rem" : "", 112 (tmp & UDCCR_BHNP) ? " rstir" : "", 113 (tmp & UDCCR_DWRE) ? " dwre" : "", 114 (tmp & UDCCR_SMAC) ? " smac" : "", 115 (tmp & UDCCR_EMCE) ? " emce" : "", 116 (tmp & UDCCR_UDR) ? " udr" : "", 117 (tmp & UDCCR_UDA) ? " uda" : "", 118 (tmp & UDCCR_UDE) ? " ude" : "", 119 (tmp & UDCCR_ACN) >> UDCCR_ACN_S, 120 (tmp & UDCCR_AIN) >> UDCCR_AIN_S, 121 (tmp & UDCCR_AAISN) >> UDCCR_AAISN_S); 122 /* registers for device and ep0 */ 123 seq_printf(s, "udcicr0=0x%08x udcicr1=0x%08x\n", 124 udc_readl(udc, UDCICR0), udc_readl(udc, UDCICR1)); 125 seq_printf(s, "udcisr0=0x%08x udcisr1=0x%08x\n", 126 udc_readl(udc, UDCISR0), udc_readl(udc, UDCISR1)); 127 seq_printf(s, "udcfnr=%d\n", udc_readl(udc, UDCFNR)); 128 seq_printf(s, "irqs: reset=%lu, suspend=%lu, resume=%lu, reconfig=%lu\n", 129 udc->stats.irqs_reset, udc->stats.irqs_suspend, 130 udc->stats.irqs_resume, udc->stats.irqs_reconfig); 131 132 return 0; 133 } 134 DEFINE_SHOW_ATTRIBUTE(state_dbg); 135 136 static int queues_dbg_show(struct seq_file *s, void *p) 137 { 138 struct pxa_udc *udc = s->private; 139 struct pxa_ep *ep; 140 struct pxa27x_request *req; 141 int i, maxpkt; 142 143 if (!udc->driver) 144 return -ENODEV; 145 146 /* dump endpoint queues */ 147 for (i = 0; i < NR_PXA_ENDPOINTS; i++) { 148 ep = &udc->pxa_ep[i]; 149 maxpkt = ep->fifo_size; 150 seq_printf(s, "%-12s max_pkt=%d %s\n", 151 EPNAME(ep), maxpkt, "pio"); 152 153 if (list_empty(&ep->queue)) { 154 seq_puts(s, "\t(nothing queued)\n"); 155 continue; 156 } 157 158 list_for_each_entry(req, &ep->queue, queue) { 159 seq_printf(s, "\treq %p len %d/%d buf %p\n", 160 &req->req, req->req.actual, 161 req->req.length, req->req.buf); 162 } 163 } 164 165 return 0; 166 } 167 DEFINE_SHOW_ATTRIBUTE(queues_dbg); 168 169 static int eps_dbg_show(struct seq_file *s, void *p) 170 { 171 struct pxa_udc *udc = s->private; 172 struct pxa_ep *ep; 173 int i; 174 u32 tmp; 175 176 if (!udc->driver) 177 return -ENODEV; 178 179 ep = &udc->pxa_ep[0]; 180 tmp = udc_ep_readl(ep, UDCCSR); 181 seq_printf(s, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n", 182 tmp, 183 (tmp & UDCCSR0_SA) ? " sa" : "", 184 (tmp & UDCCSR0_RNE) ? " rne" : "", 185 (tmp & UDCCSR0_FST) ? " fst" : "", 186 (tmp & UDCCSR0_SST) ? " sst" : "", 187 (tmp & UDCCSR0_DME) ? " dme" : "", 188 (tmp & UDCCSR0_IPR) ? " ipr" : "", 189 (tmp & UDCCSR0_OPC) ? " opc" : ""); 190 for (i = 0; i < NR_PXA_ENDPOINTS; i++) { 191 ep = &udc->pxa_ep[i]; 192 tmp = i? udc_ep_readl(ep, UDCCR) : udc_readl(udc, UDCCR); 193 seq_printf(s, "%-12s: IN %lu(%lu reqs), OUT %lu(%lu reqs), irqs=%lu, udccr=0x%08x, udccsr=0x%03x, udcbcr=%d\n", 194 EPNAME(ep), 195 ep->stats.in_bytes, ep->stats.in_ops, 196 ep->stats.out_bytes, ep->stats.out_ops, 197 ep->stats.irqs, 198 tmp, udc_ep_readl(ep, UDCCSR), 199 udc_ep_readl(ep, UDCBCR)); 200 } 201 202 return 0; 203 } 204 DEFINE_SHOW_ATTRIBUTE(eps_dbg); 205 206 static void pxa_init_debugfs(struct pxa_udc *udc) 207 { 208 struct dentry *root; 209 210 root = debugfs_create_dir(udc->gadget.name, usb_debug_root); 211 udc->debugfs_root = root; 212 213 debugfs_create_file("udcstate", 0400, root, udc, &state_dbg_fops); 214 debugfs_create_file("queues", 0400, root, udc, &queues_dbg_fops); 215 debugfs_create_file("epstate", 0400, root, udc, &eps_dbg_fops); 216 } 217 218 static void pxa_cleanup_debugfs(struct pxa_udc *udc) 219 { 220 debugfs_remove_recursive(udc->debugfs_root); 221 } 222 223 #else 224 static inline void pxa_init_debugfs(struct pxa_udc *udc) 225 { 226 } 227 228 static inline void pxa_cleanup_debugfs(struct pxa_udc *udc) 229 { 230 } 231 #endif 232 233 /** 234 * is_match_usb_pxa - check if usb_ep and pxa_ep match 235 * @udc_usb_ep: usb endpoint 236 * @ep: pxa endpoint 237 * @config: configuration required in pxa_ep 238 * @interface: interface required in pxa_ep 239 * @altsetting: altsetting required in pxa_ep 240 * 241 * Returns 1 if all criteria match between pxa and usb endpoint, 0 otherwise 242 */ 243 static int is_match_usb_pxa(struct udc_usb_ep *udc_usb_ep, struct pxa_ep *ep, 244 int config, int interface, int altsetting) 245 { 246 if (usb_endpoint_num(&udc_usb_ep->desc) != ep->addr) 247 return 0; 248 if (usb_endpoint_dir_in(&udc_usb_ep->desc) != ep->dir_in) 249 return 0; 250 if (usb_endpoint_type(&udc_usb_ep->desc) != ep->type) 251 return 0; 252 if ((ep->config != config) || (ep->interface != interface) 253 || (ep->alternate != altsetting)) 254 return 0; 255 return 1; 256 } 257 258 /** 259 * find_pxa_ep - find pxa_ep structure matching udc_usb_ep 260 * @udc: pxa udc 261 * @udc_usb_ep: udc_usb_ep structure 262 * 263 * Match udc_usb_ep and all pxa_ep available, to see if one matches. 264 * This is necessary because of the strong pxa hardware restriction requiring 265 * that once pxa endpoints are initialized, their configuration is freezed, and 266 * no change can be made to their address, direction, or in which configuration, 267 * interface or altsetting they are active ... which differs from more usual 268 * models which have endpoints be roughly just addressable fifos, and leave 269 * configuration events up to gadget drivers (like all control messages). 270 * 271 * Note that there is still a blurred point here : 272 * - we rely on UDCCR register "active interface" and "active altsetting". 273 * This is a nonsense in regard of USB spec, where multiple interfaces are 274 * active at the same time. 275 * - if we knew for sure that the pxa can handle multiple interface at the 276 * same time, assuming Intel's Developer Guide is wrong, this function 277 * should be reviewed, and a cache of couples (iface, altsetting) should 278 * be kept in the pxa_udc structure. In this case this function would match 279 * against the cache of couples instead of the "last altsetting" set up. 280 * 281 * Returns the matched pxa_ep structure or NULL if none found 282 */ 283 static struct pxa_ep *find_pxa_ep(struct pxa_udc *udc, 284 struct udc_usb_ep *udc_usb_ep) 285 { 286 int i; 287 struct pxa_ep *ep; 288 int cfg = udc->config; 289 int iface = udc->last_interface; 290 int alt = udc->last_alternate; 291 292 if (udc_usb_ep == &udc->udc_usb_ep[0]) 293 return &udc->pxa_ep[0]; 294 295 for (i = 1; i < NR_PXA_ENDPOINTS; i++) { 296 ep = &udc->pxa_ep[i]; 297 if (is_match_usb_pxa(udc_usb_ep, ep, cfg, iface, alt)) 298 return ep; 299 } 300 return NULL; 301 } 302 303 /** 304 * update_pxa_ep_matches - update pxa_ep cached values in all udc_usb_ep 305 * @udc: pxa udc 306 * 307 * Context: in_interrupt() 308 * 309 * Updates all pxa_ep fields in udc_usb_ep structures, if this field was 310 * previously set up (and is not NULL). The update is necessary is a 311 * configuration change or altsetting change was issued by the USB host. 312 */ 313 static void update_pxa_ep_matches(struct pxa_udc *udc) 314 { 315 int i; 316 struct udc_usb_ep *udc_usb_ep; 317 318 for (i = 1; i < NR_USB_ENDPOINTS; i++) { 319 udc_usb_ep = &udc->udc_usb_ep[i]; 320 if (udc_usb_ep->pxa_ep) 321 udc_usb_ep->pxa_ep = find_pxa_ep(udc, udc_usb_ep); 322 } 323 } 324 325 /** 326 * pio_irq_enable - Enables irq generation for one endpoint 327 * @ep: udc endpoint 328 */ 329 static void pio_irq_enable(struct pxa_ep *ep) 330 { 331 struct pxa_udc *udc = ep->dev; 332 int index = EPIDX(ep); 333 u32 udcicr0 = udc_readl(udc, UDCICR0); 334 u32 udcicr1 = udc_readl(udc, UDCICR1); 335 336 if (index < 16) 337 udc_writel(udc, UDCICR0, udcicr0 | (3 << (index * 2))); 338 else 339 udc_writel(udc, UDCICR1, udcicr1 | (3 << ((index - 16) * 2))); 340 } 341 342 /** 343 * pio_irq_disable - Disables irq generation for one endpoint 344 * @ep: udc endpoint 345 */ 346 static void pio_irq_disable(struct pxa_ep *ep) 347 { 348 struct pxa_udc *udc = ep->dev; 349 int index = EPIDX(ep); 350 u32 udcicr0 = udc_readl(udc, UDCICR0); 351 u32 udcicr1 = udc_readl(udc, UDCICR1); 352 353 if (index < 16) 354 udc_writel(udc, UDCICR0, udcicr0 & ~(3 << (index * 2))); 355 else 356 udc_writel(udc, UDCICR1, udcicr1 & ~(3 << ((index - 16) * 2))); 357 } 358 359 /** 360 * udc_set_mask_UDCCR - set bits in UDCCR 361 * @udc: udc device 362 * @mask: bits to set in UDCCR 363 * 364 * Sets bits in UDCCR, leaving DME and FST bits as they were. 365 */ 366 static inline void udc_set_mask_UDCCR(struct pxa_udc *udc, int mask) 367 { 368 u32 udccr = udc_readl(udc, UDCCR); 369 udc_writel(udc, UDCCR, 370 (udccr & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS)); 371 } 372 373 /** 374 * udc_clear_mask_UDCCR - clears bits in UDCCR 375 * @udc: udc device 376 * @mask: bit to clear in UDCCR 377 * 378 * Clears bits in UDCCR, leaving DME and FST bits as they were. 379 */ 380 static inline void udc_clear_mask_UDCCR(struct pxa_udc *udc, int mask) 381 { 382 u32 udccr = udc_readl(udc, UDCCR); 383 udc_writel(udc, UDCCR, 384 (udccr & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS)); 385 } 386 387 /** 388 * ep_write_UDCCSR - set bits in UDCCSR 389 * @udc: udc device 390 * @mask: bits to set in UDCCR 391 * 392 * Sets bits in UDCCSR (UDCCSR0 and UDCCSR*). 393 * 394 * A specific case is applied to ep0 : the ACM bit is always set to 1, for 395 * SET_INTERFACE and SET_CONFIGURATION. 396 */ 397 static inline void ep_write_UDCCSR(struct pxa_ep *ep, int mask) 398 { 399 if (is_ep0(ep)) 400 mask |= UDCCSR0_ACM; 401 udc_ep_writel(ep, UDCCSR, mask); 402 } 403 404 /** 405 * ep_count_bytes_remain - get how many bytes in udc endpoint 406 * @ep: udc endpoint 407 * 408 * Returns number of bytes in OUT fifos. Broken for IN fifos (-EOPNOTSUPP) 409 */ 410 static int ep_count_bytes_remain(struct pxa_ep *ep) 411 { 412 if (ep->dir_in) 413 return -EOPNOTSUPP; 414 return udc_ep_readl(ep, UDCBCR) & 0x3ff; 415 } 416 417 /** 418 * ep_is_empty - checks if ep has byte ready for reading 419 * @ep: udc endpoint 420 * 421 * If endpoint is the control endpoint, checks if there are bytes in the 422 * control endpoint fifo. If endpoint is a data endpoint, checks if bytes 423 * are ready for reading on OUT endpoint. 424 * 425 * Returns 0 if ep not empty, 1 if ep empty, -EOPNOTSUPP if IN endpoint 426 */ 427 static int ep_is_empty(struct pxa_ep *ep) 428 { 429 int ret; 430 431 if (!is_ep0(ep) && ep->dir_in) 432 return -EOPNOTSUPP; 433 if (is_ep0(ep)) 434 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR0_RNE); 435 else 436 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNE); 437 return ret; 438 } 439 440 /** 441 * ep_is_full - checks if ep has place to write bytes 442 * @ep: udc endpoint 443 * 444 * If endpoint is not the control endpoint and is an IN endpoint, checks if 445 * there is place to write bytes into the endpoint. 446 * 447 * Returns 0 if ep not full, 1 if ep full, -EOPNOTSUPP if OUT endpoint 448 */ 449 static int ep_is_full(struct pxa_ep *ep) 450 { 451 if (is_ep0(ep)) 452 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_IPR); 453 if (!ep->dir_in) 454 return -EOPNOTSUPP; 455 return (!(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNF)); 456 } 457 458 /** 459 * epout_has_pkt - checks if OUT endpoint fifo has a packet available 460 * @ep: pxa endpoint 461 * 462 * Returns 1 if a complete packet is available, 0 if not, -EOPNOTSUPP for IN ep. 463 */ 464 static int epout_has_pkt(struct pxa_ep *ep) 465 { 466 if (!is_ep0(ep) && ep->dir_in) 467 return -EOPNOTSUPP; 468 if (is_ep0(ep)) 469 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_OPC); 470 return (udc_ep_readl(ep, UDCCSR) & UDCCSR_PC); 471 } 472 473 /** 474 * set_ep0state - Set ep0 automata state 475 * @dev: udc device 476 * @state: state 477 */ 478 static void set_ep0state(struct pxa_udc *udc, int state) 479 { 480 struct pxa_ep *ep = &udc->pxa_ep[0]; 481 char *old_stname = EP0_STNAME(udc); 482 483 udc->ep0state = state; 484 ep_dbg(ep, "state=%s->%s, udccsr0=0x%03x, udcbcr=%d\n", old_stname, 485 EP0_STNAME(udc), udc_ep_readl(ep, UDCCSR), 486 udc_ep_readl(ep, UDCBCR)); 487 } 488 489 /** 490 * ep0_idle - Put control endpoint into idle state 491 * @dev: udc device 492 */ 493 static void ep0_idle(struct pxa_udc *dev) 494 { 495 set_ep0state(dev, WAIT_FOR_SETUP); 496 } 497 498 /** 499 * inc_ep_stats_reqs - Update ep stats counts 500 * @ep: physical endpoint 501 * @req: usb request 502 * @is_in: ep direction (USB_DIR_IN or 0) 503 * 504 */ 505 static void inc_ep_stats_reqs(struct pxa_ep *ep, int is_in) 506 { 507 if (is_in) 508 ep->stats.in_ops++; 509 else 510 ep->stats.out_ops++; 511 } 512 513 /** 514 * inc_ep_stats_bytes - Update ep stats counts 515 * @ep: physical endpoint 516 * @count: bytes transferred on endpoint 517 * @is_in: ep direction (USB_DIR_IN or 0) 518 */ 519 static void inc_ep_stats_bytes(struct pxa_ep *ep, int count, int is_in) 520 { 521 if (is_in) 522 ep->stats.in_bytes += count; 523 else 524 ep->stats.out_bytes += count; 525 } 526 527 /** 528 * pxa_ep_setup - Sets up an usb physical endpoint 529 * @ep: pxa27x physical endpoint 530 * 531 * Find the physical pxa27x ep, and setup its UDCCR 532 */ 533 static void pxa_ep_setup(struct pxa_ep *ep) 534 { 535 u32 new_udccr; 536 537 new_udccr = ((ep->config << UDCCONR_CN_S) & UDCCONR_CN) 538 | ((ep->interface << UDCCONR_IN_S) & UDCCONR_IN) 539 | ((ep->alternate << UDCCONR_AISN_S) & UDCCONR_AISN) 540 | ((EPADDR(ep) << UDCCONR_EN_S) & UDCCONR_EN) 541 | ((EPXFERTYPE(ep) << UDCCONR_ET_S) & UDCCONR_ET) 542 | ((ep->dir_in) ? UDCCONR_ED : 0) 543 | ((ep->fifo_size << UDCCONR_MPS_S) & UDCCONR_MPS) 544 | UDCCONR_EE; 545 546 udc_ep_writel(ep, UDCCR, new_udccr); 547 } 548 549 /** 550 * pxa_eps_setup - Sets up all usb physical endpoints 551 * @dev: udc device 552 * 553 * Setup all pxa physical endpoints, except ep0 554 */ 555 static void pxa_eps_setup(struct pxa_udc *dev) 556 { 557 unsigned int i; 558 559 dev_dbg(dev->dev, "%s: dev=%p\n", __func__, dev); 560 561 for (i = 1; i < NR_PXA_ENDPOINTS; i++) 562 pxa_ep_setup(&dev->pxa_ep[i]); 563 } 564 565 /** 566 * pxa_ep_alloc_request - Allocate usb request 567 * @_ep: usb endpoint 568 * @gfp_flags: 569 * 570 * For the pxa27x, these can just wrap kmalloc/kfree. gadget drivers 571 * must still pass correctly initialized endpoints, since other controller 572 * drivers may care about how it's currently set up (dma issues etc). 573 */ 574 static struct usb_request * 575 pxa_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) 576 { 577 struct pxa27x_request *req; 578 579 req = kzalloc(sizeof *req, gfp_flags); 580 if (!req) 581 return NULL; 582 583 INIT_LIST_HEAD(&req->queue); 584 req->in_use = 0; 585 req->udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep); 586 587 return &req->req; 588 } 589 590 /** 591 * pxa_ep_free_request - Free usb request 592 * @_ep: usb endpoint 593 * @_req: usb request 594 * 595 * Wrapper around kfree to free _req 596 */ 597 static void pxa_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) 598 { 599 struct pxa27x_request *req; 600 601 req = container_of(_req, struct pxa27x_request, req); 602 WARN_ON(!list_empty(&req->queue)); 603 kfree(req); 604 } 605 606 /** 607 * ep_add_request - add a request to the endpoint's queue 608 * @ep: usb endpoint 609 * @req: usb request 610 * 611 * Context: ep->lock held 612 * 613 * Queues the request in the endpoint's queue, and enables the interrupts 614 * on the endpoint. 615 */ 616 static void ep_add_request(struct pxa_ep *ep, struct pxa27x_request *req) 617 { 618 if (unlikely(!req)) 619 return; 620 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req, 621 req->req.length, udc_ep_readl(ep, UDCCSR)); 622 623 req->in_use = 1; 624 list_add_tail(&req->queue, &ep->queue); 625 pio_irq_enable(ep); 626 } 627 628 /** 629 * ep_del_request - removes a request from the endpoint's queue 630 * @ep: usb endpoint 631 * @req: usb request 632 * 633 * Context: ep->lock held 634 * 635 * Unqueue the request from the endpoint's queue. If there are no more requests 636 * on the endpoint, and if it's not the control endpoint, interrupts are 637 * disabled on the endpoint. 638 */ 639 static void ep_del_request(struct pxa_ep *ep, struct pxa27x_request *req) 640 { 641 if (unlikely(!req)) 642 return; 643 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req, 644 req->req.length, udc_ep_readl(ep, UDCCSR)); 645 646 list_del_init(&req->queue); 647 req->in_use = 0; 648 if (!is_ep0(ep) && list_empty(&ep->queue)) 649 pio_irq_disable(ep); 650 } 651 652 /** 653 * req_done - Complete an usb request 654 * @ep: pxa physical endpoint 655 * @req: pxa request 656 * @status: usb request status sent to gadget API 657 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held 658 * 659 * Context: ep->lock held if flags not NULL, else ep->lock released 660 * 661 * Retire a pxa27x usb request. Endpoint must be locked. 662 */ 663 static void req_done(struct pxa_ep *ep, struct pxa27x_request *req, int status, 664 unsigned long *pflags) 665 { 666 unsigned long flags; 667 668 ep_del_request(ep, req); 669 if (likely(req->req.status == -EINPROGRESS)) 670 req->req.status = status; 671 else 672 status = req->req.status; 673 674 if (status && status != -ESHUTDOWN) 675 ep_dbg(ep, "complete req %p stat %d len %u/%u\n", 676 &req->req, status, 677 req->req.actual, req->req.length); 678 679 if (pflags) 680 spin_unlock_irqrestore(&ep->lock, *pflags); 681 local_irq_save(flags); 682 usb_gadget_giveback_request(&req->udc_usb_ep->usb_ep, &req->req); 683 local_irq_restore(flags); 684 if (pflags) 685 spin_lock_irqsave(&ep->lock, *pflags); 686 } 687 688 /** 689 * ep_end_out_req - Ends endpoint OUT request 690 * @ep: physical endpoint 691 * @req: pxa request 692 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held 693 * 694 * Context: ep->lock held or released (see req_done()) 695 * 696 * Ends endpoint OUT request (completes usb request). 697 */ 698 static void ep_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req, 699 unsigned long *pflags) 700 { 701 inc_ep_stats_reqs(ep, !USB_DIR_IN); 702 req_done(ep, req, 0, pflags); 703 } 704 705 /** 706 * ep0_end_out_req - Ends control endpoint OUT request (ends data stage) 707 * @ep: physical endpoint 708 * @req: pxa request 709 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held 710 * 711 * Context: ep->lock held or released (see req_done()) 712 * 713 * Ends control endpoint OUT request (completes usb request), and puts 714 * control endpoint into idle state 715 */ 716 static void ep0_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req, 717 unsigned long *pflags) 718 { 719 set_ep0state(ep->dev, OUT_STATUS_STAGE); 720 ep_end_out_req(ep, req, pflags); 721 ep0_idle(ep->dev); 722 } 723 724 /** 725 * ep_end_in_req - Ends endpoint IN request 726 * @ep: physical endpoint 727 * @req: pxa request 728 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held 729 * 730 * Context: ep->lock held or released (see req_done()) 731 * 732 * Ends endpoint IN request (completes usb request). 733 */ 734 static void ep_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req, 735 unsigned long *pflags) 736 { 737 inc_ep_stats_reqs(ep, USB_DIR_IN); 738 req_done(ep, req, 0, pflags); 739 } 740 741 /** 742 * ep0_end_in_req - Ends control endpoint IN request (ends data stage) 743 * @ep: physical endpoint 744 * @req: pxa request 745 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held 746 * 747 * Context: ep->lock held or released (see req_done()) 748 * 749 * Ends control endpoint IN request (completes usb request), and puts 750 * control endpoint into status state 751 */ 752 static void ep0_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req, 753 unsigned long *pflags) 754 { 755 set_ep0state(ep->dev, IN_STATUS_STAGE); 756 ep_end_in_req(ep, req, pflags); 757 } 758 759 /** 760 * nuke - Dequeue all requests 761 * @ep: pxa endpoint 762 * @status: usb request status 763 * 764 * Context: ep->lock released 765 * 766 * Dequeues all requests on an endpoint. As a side effect, interrupts will be 767 * disabled on that endpoint (because no more requests). 768 */ 769 static void nuke(struct pxa_ep *ep, int status) 770 { 771 struct pxa27x_request *req; 772 unsigned long flags; 773 774 spin_lock_irqsave(&ep->lock, flags); 775 while (!list_empty(&ep->queue)) { 776 req = list_entry(ep->queue.next, struct pxa27x_request, queue); 777 req_done(ep, req, status, &flags); 778 } 779 spin_unlock_irqrestore(&ep->lock, flags); 780 } 781 782 /** 783 * read_packet - transfer 1 packet from an OUT endpoint into request 784 * @ep: pxa physical endpoint 785 * @req: usb request 786 * 787 * Takes bytes from OUT endpoint and transfers them info the usb request. 788 * If there is less space in request than bytes received in OUT endpoint, 789 * bytes are left in the OUT endpoint. 790 * 791 * Returns how many bytes were actually transferred 792 */ 793 static int read_packet(struct pxa_ep *ep, struct pxa27x_request *req) 794 { 795 u32 *buf; 796 int bytes_ep, bufferspace, count, i; 797 798 bytes_ep = ep_count_bytes_remain(ep); 799 bufferspace = req->req.length - req->req.actual; 800 801 buf = (u32 *)(req->req.buf + req->req.actual); 802 prefetchw(buf); 803 804 if (likely(!ep_is_empty(ep))) 805 count = min(bytes_ep, bufferspace); 806 else /* zlp */ 807 count = 0; 808 809 for (i = count; i > 0; i -= 4) 810 *buf++ = udc_ep_readl(ep, UDCDR); 811 req->req.actual += count; 812 813 ep_write_UDCCSR(ep, UDCCSR_PC); 814 815 return count; 816 } 817 818 /** 819 * write_packet - transfer 1 packet from request into an IN endpoint 820 * @ep: pxa physical endpoint 821 * @req: usb request 822 * @max: max bytes that fit into endpoint 823 * 824 * Takes bytes from usb request, and transfers them into the physical 825 * endpoint. If there are no bytes to transfer, doesn't write anything 826 * to physical endpoint. 827 * 828 * Returns how many bytes were actually transferred. 829 */ 830 static int write_packet(struct pxa_ep *ep, struct pxa27x_request *req, 831 unsigned int max) 832 { 833 int length, count, remain, i; 834 u32 *buf; 835 u8 *buf_8; 836 837 buf = (u32 *)(req->req.buf + req->req.actual); 838 prefetch(buf); 839 840 length = min(req->req.length - req->req.actual, max); 841 req->req.actual += length; 842 843 remain = length & 0x3; 844 count = length & ~(0x3); 845 for (i = count; i > 0 ; i -= 4) 846 udc_ep_writel(ep, UDCDR, *buf++); 847 848 buf_8 = (u8 *)buf; 849 for (i = remain; i > 0; i--) 850 udc_ep_writeb(ep, UDCDR, *buf_8++); 851 852 ep_vdbg(ep, "length=%d+%d, udccsr=0x%03x\n", count, remain, 853 udc_ep_readl(ep, UDCCSR)); 854 855 return length; 856 } 857 858 /** 859 * read_fifo - Transfer packets from OUT endpoint into usb request 860 * @ep: pxa physical endpoint 861 * @req: usb request 862 * 863 * Context: callable when in_interrupt() 864 * 865 * Unload as many packets as possible from the fifo we use for usb OUT 866 * transfers and put them into the request. Caller should have made sure 867 * there's at least one packet ready. 868 * Doesn't complete the request, that's the caller's job 869 * 870 * Returns 1 if the request completed, 0 otherwise 871 */ 872 static int read_fifo(struct pxa_ep *ep, struct pxa27x_request *req) 873 { 874 int count, is_short, completed = 0; 875 876 while (epout_has_pkt(ep)) { 877 count = read_packet(ep, req); 878 inc_ep_stats_bytes(ep, count, !USB_DIR_IN); 879 880 is_short = (count < ep->fifo_size); 881 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n", 882 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "", 883 &req->req, req->req.actual, req->req.length); 884 885 /* completion */ 886 if (is_short || req->req.actual == req->req.length) { 887 completed = 1; 888 break; 889 } 890 /* finished that packet. the next one may be waiting... */ 891 } 892 return completed; 893 } 894 895 /** 896 * write_fifo - transfer packets from usb request into an IN endpoint 897 * @ep: pxa physical endpoint 898 * @req: pxa usb request 899 * 900 * Write to an IN endpoint fifo, as many packets as possible. 901 * irqs will use this to write the rest later. 902 * caller guarantees at least one packet buffer is ready (or a zlp). 903 * Doesn't complete the request, that's the caller's job 904 * 905 * Returns 1 if request fully transferred, 0 if partial transfer 906 */ 907 static int write_fifo(struct pxa_ep *ep, struct pxa27x_request *req) 908 { 909 unsigned max; 910 int count, is_short, is_last = 0, completed = 0, totcount = 0; 911 u32 udccsr; 912 913 max = ep->fifo_size; 914 do { 915 udccsr = udc_ep_readl(ep, UDCCSR); 916 if (udccsr & UDCCSR_PC) { 917 ep_vdbg(ep, "Clearing Transmit Complete, udccsr=%x\n", 918 udccsr); 919 ep_write_UDCCSR(ep, UDCCSR_PC); 920 } 921 if (udccsr & UDCCSR_TRN) { 922 ep_vdbg(ep, "Clearing Underrun on, udccsr=%x\n", 923 udccsr); 924 ep_write_UDCCSR(ep, UDCCSR_TRN); 925 } 926 927 count = write_packet(ep, req, max); 928 inc_ep_stats_bytes(ep, count, USB_DIR_IN); 929 totcount += count; 930 931 /* last packet is usually short (or a zlp) */ 932 if (unlikely(count < max)) { 933 is_last = 1; 934 is_short = 1; 935 } else { 936 if (likely(req->req.length > req->req.actual) 937 || req->req.zero) 938 is_last = 0; 939 else 940 is_last = 1; 941 /* interrupt/iso maxpacket may not fill the fifo */ 942 is_short = unlikely(max < ep->fifo_size); 943 } 944 945 if (is_short) 946 ep_write_UDCCSR(ep, UDCCSR_SP); 947 948 /* requests complete when all IN data is in the FIFO */ 949 if (is_last) { 950 completed = 1; 951 break; 952 } 953 } while (!ep_is_full(ep)); 954 955 ep_dbg(ep, "wrote count:%d bytes%s%s, left:%d req=%p\n", 956 totcount, is_last ? "/L" : "", is_short ? "/S" : "", 957 req->req.length - req->req.actual, &req->req); 958 959 return completed; 960 } 961 962 /** 963 * read_ep0_fifo - Transfer packets from control endpoint into usb request 964 * @ep: control endpoint 965 * @req: pxa usb request 966 * 967 * Special ep0 version of the above read_fifo. Reads as many bytes from control 968 * endpoint as can be read, and stores them into usb request (limited by request 969 * maximum length). 970 * 971 * Returns 0 if usb request only partially filled, 1 if fully filled 972 */ 973 static int read_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req) 974 { 975 int count, is_short, completed = 0; 976 977 while (epout_has_pkt(ep)) { 978 count = read_packet(ep, req); 979 ep_write_UDCCSR(ep, UDCCSR0_OPC); 980 inc_ep_stats_bytes(ep, count, !USB_DIR_IN); 981 982 is_short = (count < ep->fifo_size); 983 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n", 984 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "", 985 &req->req, req->req.actual, req->req.length); 986 987 if (is_short || req->req.actual >= req->req.length) { 988 completed = 1; 989 break; 990 } 991 } 992 993 return completed; 994 } 995 996 /** 997 * write_ep0_fifo - Send a request to control endpoint (ep0 in) 998 * @ep: control endpoint 999 * @req: request 1000 * 1001 * Context: callable when in_interrupt() 1002 * 1003 * Sends a request (or a part of the request) to the control endpoint (ep0 in). 1004 * If the request doesn't fit, the remaining part will be sent from irq. 1005 * The request is considered fully written only if either : 1006 * - last write transferred all remaining bytes, but fifo was not fully filled 1007 * - last write was a 0 length write 1008 * 1009 * Returns 1 if request fully written, 0 if request only partially sent 1010 */ 1011 static int write_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req) 1012 { 1013 unsigned count; 1014 int is_last, is_short; 1015 1016 count = write_packet(ep, req, EP0_FIFO_SIZE); 1017 inc_ep_stats_bytes(ep, count, USB_DIR_IN); 1018 1019 is_short = (count < EP0_FIFO_SIZE); 1020 is_last = ((count == 0) || (count < EP0_FIFO_SIZE)); 1021 1022 /* Sends either a short packet or a 0 length packet */ 1023 if (unlikely(is_short)) 1024 ep_write_UDCCSR(ep, UDCCSR0_IPR); 1025 1026 ep_dbg(ep, "in %d bytes%s%s, %d left, req=%p, udccsr0=0x%03x\n", 1027 count, is_short ? "/S" : "", is_last ? "/L" : "", 1028 req->req.length - req->req.actual, 1029 &req->req, udc_ep_readl(ep, UDCCSR)); 1030 1031 return is_last; 1032 } 1033 1034 /** 1035 * pxa_ep_queue - Queue a request into an IN endpoint 1036 * @_ep: usb endpoint 1037 * @_req: usb request 1038 * @gfp_flags: flags 1039 * 1040 * Context: normally called when !in_interrupt, but callable when in_interrupt() 1041 * in the special case of ep0 setup : 1042 * (irq->handle_ep0_ctrl_req->gadget_setup->pxa_ep_queue) 1043 * 1044 * Returns 0 if succedeed, error otherwise 1045 */ 1046 static int pxa_ep_queue(struct usb_ep *_ep, struct usb_request *_req, 1047 gfp_t gfp_flags) 1048 { 1049 struct udc_usb_ep *udc_usb_ep; 1050 struct pxa_ep *ep; 1051 struct pxa27x_request *req; 1052 struct pxa_udc *dev; 1053 unsigned long flags; 1054 int rc = 0; 1055 int is_first_req; 1056 unsigned length; 1057 int recursion_detected; 1058 1059 req = container_of(_req, struct pxa27x_request, req); 1060 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep); 1061 1062 if (unlikely(!_req || !_req->complete || !_req->buf)) 1063 return -EINVAL; 1064 1065 if (unlikely(!_ep)) 1066 return -EINVAL; 1067 1068 ep = udc_usb_ep->pxa_ep; 1069 if (unlikely(!ep)) 1070 return -EINVAL; 1071 1072 dev = ep->dev; 1073 if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) { 1074 ep_dbg(ep, "bogus device state\n"); 1075 return -ESHUTDOWN; 1076 } 1077 1078 /* iso is always one packet per request, that's the only way 1079 * we can report per-packet status. that also helps with dma. 1080 */ 1081 if (unlikely(EPXFERTYPE_is_ISO(ep) 1082 && req->req.length > ep->fifo_size)) 1083 return -EMSGSIZE; 1084 1085 spin_lock_irqsave(&ep->lock, flags); 1086 recursion_detected = ep->in_handle_ep; 1087 1088 is_first_req = list_empty(&ep->queue); 1089 ep_dbg(ep, "queue req %p(first=%s), len %d buf %p\n", 1090 _req, is_first_req ? "yes" : "no", 1091 _req->length, _req->buf); 1092 1093 if (!ep->enabled) { 1094 _req->status = -ESHUTDOWN; 1095 rc = -ESHUTDOWN; 1096 goto out_locked; 1097 } 1098 1099 if (req->in_use) { 1100 ep_err(ep, "refusing to queue req %p (already queued)\n", req); 1101 goto out_locked; 1102 } 1103 1104 length = _req->length; 1105 _req->status = -EINPROGRESS; 1106 _req->actual = 0; 1107 1108 ep_add_request(ep, req); 1109 spin_unlock_irqrestore(&ep->lock, flags); 1110 1111 if (is_ep0(ep)) { 1112 switch (dev->ep0state) { 1113 case WAIT_ACK_SET_CONF_INTERF: 1114 if (length == 0) { 1115 ep_end_in_req(ep, req, NULL); 1116 } else { 1117 ep_err(ep, "got a request of %d bytes while" 1118 "in state WAIT_ACK_SET_CONF_INTERF\n", 1119 length); 1120 ep_del_request(ep, req); 1121 rc = -EL2HLT; 1122 } 1123 ep0_idle(ep->dev); 1124 break; 1125 case IN_DATA_STAGE: 1126 if (!ep_is_full(ep)) 1127 if (write_ep0_fifo(ep, req)) 1128 ep0_end_in_req(ep, req, NULL); 1129 break; 1130 case OUT_DATA_STAGE: 1131 if ((length == 0) || !epout_has_pkt(ep)) 1132 if (read_ep0_fifo(ep, req)) 1133 ep0_end_out_req(ep, req, NULL); 1134 break; 1135 default: 1136 ep_err(ep, "odd state %s to send me a request\n", 1137 EP0_STNAME(ep->dev)); 1138 ep_del_request(ep, req); 1139 rc = -EL2HLT; 1140 break; 1141 } 1142 } else { 1143 if (!recursion_detected) 1144 handle_ep(ep); 1145 } 1146 1147 out: 1148 return rc; 1149 out_locked: 1150 spin_unlock_irqrestore(&ep->lock, flags); 1151 goto out; 1152 } 1153 1154 /** 1155 * pxa_ep_dequeue - Dequeue one request 1156 * @_ep: usb endpoint 1157 * @_req: usb request 1158 * 1159 * Return 0 if no error, -EINVAL or -ECONNRESET otherwise 1160 */ 1161 static int pxa_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) 1162 { 1163 struct pxa_ep *ep; 1164 struct udc_usb_ep *udc_usb_ep; 1165 struct pxa27x_request *req; 1166 unsigned long flags; 1167 int rc = -EINVAL; 1168 1169 if (!_ep) 1170 return rc; 1171 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep); 1172 ep = udc_usb_ep->pxa_ep; 1173 if (!ep || is_ep0(ep)) 1174 return rc; 1175 1176 spin_lock_irqsave(&ep->lock, flags); 1177 1178 /* make sure it's actually queued on this endpoint */ 1179 list_for_each_entry(req, &ep->queue, queue) { 1180 if (&req->req == _req) { 1181 rc = 0; 1182 break; 1183 } 1184 } 1185 1186 spin_unlock_irqrestore(&ep->lock, flags); 1187 if (!rc) 1188 req_done(ep, req, -ECONNRESET, NULL); 1189 return rc; 1190 } 1191 1192 /** 1193 * pxa_ep_set_halt - Halts operations on one endpoint 1194 * @_ep: usb endpoint 1195 * @value: 1196 * 1197 * Returns 0 if no error, -EINVAL, -EROFS, -EAGAIN otherwise 1198 */ 1199 static int pxa_ep_set_halt(struct usb_ep *_ep, int value) 1200 { 1201 struct pxa_ep *ep; 1202 struct udc_usb_ep *udc_usb_ep; 1203 unsigned long flags; 1204 int rc; 1205 1206 1207 if (!_ep) 1208 return -EINVAL; 1209 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep); 1210 ep = udc_usb_ep->pxa_ep; 1211 if (!ep || is_ep0(ep)) 1212 return -EINVAL; 1213 1214 if (value == 0) { 1215 /* 1216 * This path (reset toggle+halt) is needed to implement 1217 * SET_INTERFACE on normal hardware. but it can't be 1218 * done from software on the PXA UDC, and the hardware 1219 * forgets to do it as part of SET_INTERFACE automagic. 1220 */ 1221 ep_dbg(ep, "only host can clear halt\n"); 1222 return -EROFS; 1223 } 1224 1225 spin_lock_irqsave(&ep->lock, flags); 1226 1227 rc = -EAGAIN; 1228 if (ep->dir_in && (ep_is_full(ep) || !list_empty(&ep->queue))) 1229 goto out; 1230 1231 /* FST, FEF bits are the same for control and non control endpoints */ 1232 rc = 0; 1233 ep_write_UDCCSR(ep, UDCCSR_FST | UDCCSR_FEF); 1234 if (is_ep0(ep)) 1235 set_ep0state(ep->dev, STALL); 1236 1237 out: 1238 spin_unlock_irqrestore(&ep->lock, flags); 1239 return rc; 1240 } 1241 1242 /** 1243 * pxa_ep_fifo_status - Get how many bytes in physical endpoint 1244 * @_ep: usb endpoint 1245 * 1246 * Returns number of bytes in OUT fifos. Broken for IN fifos. 1247 */ 1248 static int pxa_ep_fifo_status(struct usb_ep *_ep) 1249 { 1250 struct pxa_ep *ep; 1251 struct udc_usb_ep *udc_usb_ep; 1252 1253 if (!_ep) 1254 return -ENODEV; 1255 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep); 1256 ep = udc_usb_ep->pxa_ep; 1257 if (!ep || is_ep0(ep)) 1258 return -ENODEV; 1259 1260 if (ep->dir_in) 1261 return -EOPNOTSUPP; 1262 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN || ep_is_empty(ep)) 1263 return 0; 1264 else 1265 return ep_count_bytes_remain(ep) + 1; 1266 } 1267 1268 /** 1269 * pxa_ep_fifo_flush - Flushes one endpoint 1270 * @_ep: usb endpoint 1271 * 1272 * Discards all data in one endpoint(IN or OUT), except control endpoint. 1273 */ 1274 static void pxa_ep_fifo_flush(struct usb_ep *_ep) 1275 { 1276 struct pxa_ep *ep; 1277 struct udc_usb_ep *udc_usb_ep; 1278 unsigned long flags; 1279 1280 if (!_ep) 1281 return; 1282 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep); 1283 ep = udc_usb_ep->pxa_ep; 1284 if (!ep || is_ep0(ep)) 1285 return; 1286 1287 spin_lock_irqsave(&ep->lock, flags); 1288 1289 if (unlikely(!list_empty(&ep->queue))) 1290 ep_dbg(ep, "called while queue list not empty\n"); 1291 ep_dbg(ep, "called\n"); 1292 1293 /* for OUT, just read and discard the FIFO contents. */ 1294 if (!ep->dir_in) { 1295 while (!ep_is_empty(ep)) 1296 udc_ep_readl(ep, UDCDR); 1297 } else { 1298 /* most IN status is the same, but ISO can't stall */ 1299 ep_write_UDCCSR(ep, 1300 UDCCSR_PC | UDCCSR_FEF | UDCCSR_TRN 1301 | (EPXFERTYPE_is_ISO(ep) ? 0 : UDCCSR_SST)); 1302 } 1303 1304 spin_unlock_irqrestore(&ep->lock, flags); 1305 } 1306 1307 /** 1308 * pxa_ep_enable - Enables usb endpoint 1309 * @_ep: usb endpoint 1310 * @desc: usb endpoint descriptor 1311 * 1312 * Nothing much to do here, as ep configuration is done once and for all 1313 * before udc is enabled. After udc enable, no physical endpoint configuration 1314 * can be changed. 1315 * Function makes sanity checks and flushes the endpoint. 1316 */ 1317 static int pxa_ep_enable(struct usb_ep *_ep, 1318 const struct usb_endpoint_descriptor *desc) 1319 { 1320 struct pxa_ep *ep; 1321 struct udc_usb_ep *udc_usb_ep; 1322 struct pxa_udc *udc; 1323 1324 if (!_ep || !desc) 1325 return -EINVAL; 1326 1327 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep); 1328 if (udc_usb_ep->pxa_ep) { 1329 ep = udc_usb_ep->pxa_ep; 1330 ep_warn(ep, "usb_ep %s already enabled, doing nothing\n", 1331 _ep->name); 1332 } else { 1333 ep = find_pxa_ep(udc_usb_ep->dev, udc_usb_ep); 1334 } 1335 1336 if (!ep || is_ep0(ep)) { 1337 dev_err(udc_usb_ep->dev->dev, 1338 "unable to match pxa_ep for ep %s\n", 1339 _ep->name); 1340 return -EINVAL; 1341 } 1342 1343 if ((desc->bDescriptorType != USB_DT_ENDPOINT) 1344 || (ep->type != usb_endpoint_type(desc))) { 1345 ep_err(ep, "type mismatch\n"); 1346 return -EINVAL; 1347 } 1348 1349 if (ep->fifo_size < usb_endpoint_maxp(desc)) { 1350 ep_err(ep, "bad maxpacket\n"); 1351 return -ERANGE; 1352 } 1353 1354 udc_usb_ep->pxa_ep = ep; 1355 udc = ep->dev; 1356 1357 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { 1358 ep_err(ep, "bogus device state\n"); 1359 return -ESHUTDOWN; 1360 } 1361 1362 ep->enabled = 1; 1363 1364 /* flush fifo (mostly for OUT buffers) */ 1365 pxa_ep_fifo_flush(_ep); 1366 1367 ep_dbg(ep, "enabled\n"); 1368 return 0; 1369 } 1370 1371 /** 1372 * pxa_ep_disable - Disable usb endpoint 1373 * @_ep: usb endpoint 1374 * 1375 * Same as for pxa_ep_enable, no physical endpoint configuration can be 1376 * changed. 1377 * Function flushes the endpoint and related requests. 1378 */ 1379 static int pxa_ep_disable(struct usb_ep *_ep) 1380 { 1381 struct pxa_ep *ep; 1382 struct udc_usb_ep *udc_usb_ep; 1383 1384 if (!_ep) 1385 return -EINVAL; 1386 1387 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep); 1388 ep = udc_usb_ep->pxa_ep; 1389 if (!ep || is_ep0(ep) || !list_empty(&ep->queue)) 1390 return -EINVAL; 1391 1392 ep->enabled = 0; 1393 nuke(ep, -ESHUTDOWN); 1394 1395 pxa_ep_fifo_flush(_ep); 1396 udc_usb_ep->pxa_ep = NULL; 1397 1398 ep_dbg(ep, "disabled\n"); 1399 return 0; 1400 } 1401 1402 static const struct usb_ep_ops pxa_ep_ops = { 1403 .enable = pxa_ep_enable, 1404 .disable = pxa_ep_disable, 1405 1406 .alloc_request = pxa_ep_alloc_request, 1407 .free_request = pxa_ep_free_request, 1408 1409 .queue = pxa_ep_queue, 1410 .dequeue = pxa_ep_dequeue, 1411 1412 .set_halt = pxa_ep_set_halt, 1413 .fifo_status = pxa_ep_fifo_status, 1414 .fifo_flush = pxa_ep_fifo_flush, 1415 }; 1416 1417 /** 1418 * dplus_pullup - Connect or disconnect pullup resistor to D+ pin 1419 * @udc: udc device 1420 * @on: 0 if disconnect pullup resistor, 1 otherwise 1421 * Context: any 1422 * 1423 * Handle D+ pullup resistor, make the device visible to the usb bus, and 1424 * declare it as a full speed usb device 1425 */ 1426 static void dplus_pullup(struct pxa_udc *udc, int on) 1427 { 1428 if (udc->gpiod) { 1429 gpiod_set_value(udc->gpiod, on); 1430 } else if (udc->udc_command) { 1431 if (on) 1432 udc->udc_command(PXA2XX_UDC_CMD_CONNECT); 1433 else 1434 udc->udc_command(PXA2XX_UDC_CMD_DISCONNECT); 1435 } 1436 udc->pullup_on = on; 1437 } 1438 1439 /** 1440 * pxa_udc_get_frame - Returns usb frame number 1441 * @_gadget: usb gadget 1442 */ 1443 static int pxa_udc_get_frame(struct usb_gadget *_gadget) 1444 { 1445 struct pxa_udc *udc = to_gadget_udc(_gadget); 1446 1447 return (udc_readl(udc, UDCFNR) & 0x7ff); 1448 } 1449 1450 /** 1451 * pxa_udc_wakeup - Force udc device out of suspend 1452 * @_gadget: usb gadget 1453 * 1454 * Returns 0 if successful, error code otherwise 1455 */ 1456 static int pxa_udc_wakeup(struct usb_gadget *_gadget) 1457 { 1458 struct pxa_udc *udc = to_gadget_udc(_gadget); 1459 1460 /* host may not have enabled remote wakeup */ 1461 if ((udc_readl(udc, UDCCR) & UDCCR_DWRE) == 0) 1462 return -EHOSTUNREACH; 1463 udc_set_mask_UDCCR(udc, UDCCR_UDR); 1464 return 0; 1465 } 1466 1467 static void udc_enable(struct pxa_udc *udc); 1468 static void udc_disable(struct pxa_udc *udc); 1469 1470 /** 1471 * should_enable_udc - Tells if UDC should be enabled 1472 * @udc: udc device 1473 * Context: any 1474 * 1475 * The UDC should be enabled if : 1476 1477 * - the pullup resistor is connected 1478 * - and a gadget driver is bound 1479 * - and vbus is sensed (or no vbus sense is available) 1480 * 1481 * Returns 1 if UDC should be enabled, 0 otherwise 1482 */ 1483 static int should_enable_udc(struct pxa_udc *udc) 1484 { 1485 int put_on; 1486 1487 put_on = ((udc->pullup_on) && (udc->driver)); 1488 put_on &= ((udc->vbus_sensed) || (IS_ERR_OR_NULL(udc->transceiver))); 1489 return put_on; 1490 } 1491 1492 /** 1493 * should_disable_udc - Tells if UDC should be disabled 1494 * @udc: udc device 1495 * Context: any 1496 * 1497 * The UDC should be disabled if : 1498 * - the pullup resistor is not connected 1499 * - or no gadget driver is bound 1500 * - or no vbus is sensed (when vbus sesing is available) 1501 * 1502 * Returns 1 if UDC should be disabled 1503 */ 1504 static int should_disable_udc(struct pxa_udc *udc) 1505 { 1506 int put_off; 1507 1508 put_off = ((!udc->pullup_on) || (!udc->driver)); 1509 put_off |= ((!udc->vbus_sensed) && (!IS_ERR_OR_NULL(udc->transceiver))); 1510 return put_off; 1511 } 1512 1513 /** 1514 * pxa_udc_pullup - Offer manual D+ pullup control 1515 * @_gadget: usb gadget using the control 1516 * @is_active: 0 if disconnect, else connect D+ pullup resistor 1517 * Context: !in_interrupt() 1518 * 1519 * Returns 0 if OK, -EOPNOTSUPP if udc driver doesn't handle D+ pullup 1520 */ 1521 static int pxa_udc_pullup(struct usb_gadget *_gadget, int is_active) 1522 { 1523 struct pxa_udc *udc = to_gadget_udc(_gadget); 1524 1525 if (!udc->gpiod && !udc->udc_command) 1526 return -EOPNOTSUPP; 1527 1528 dplus_pullup(udc, is_active); 1529 1530 if (should_enable_udc(udc)) 1531 udc_enable(udc); 1532 if (should_disable_udc(udc)) 1533 udc_disable(udc); 1534 return 0; 1535 } 1536 1537 /** 1538 * pxa_udc_vbus_session - Called by external transceiver to enable/disable udc 1539 * @_gadget: usb gadget 1540 * @is_active: 0 if should disable the udc, 1 if should enable 1541 * 1542 * Enables the udc, and optionnaly activates D+ pullup resistor. Or disables the 1543 * udc, and deactivates D+ pullup resistor. 1544 * 1545 * Returns 0 1546 */ 1547 static int pxa_udc_vbus_session(struct usb_gadget *_gadget, int is_active) 1548 { 1549 struct pxa_udc *udc = to_gadget_udc(_gadget); 1550 1551 udc->vbus_sensed = is_active; 1552 if (should_enable_udc(udc)) 1553 udc_enable(udc); 1554 if (should_disable_udc(udc)) 1555 udc_disable(udc); 1556 1557 return 0; 1558 } 1559 1560 /** 1561 * pxa_udc_vbus_draw - Called by gadget driver after SET_CONFIGURATION completed 1562 * @_gadget: usb gadget 1563 * @mA: current drawn 1564 * 1565 * Context: !in_interrupt() 1566 * 1567 * Called after a configuration was chosen by a USB host, to inform how much 1568 * current can be drawn by the device from VBus line. 1569 * 1570 * Returns 0 or -EOPNOTSUPP if no transceiver is handling the udc 1571 */ 1572 static int pxa_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA) 1573 { 1574 struct pxa_udc *udc; 1575 1576 udc = to_gadget_udc(_gadget); 1577 if (!IS_ERR_OR_NULL(udc->transceiver)) 1578 return usb_phy_set_power(udc->transceiver, mA); 1579 return -EOPNOTSUPP; 1580 } 1581 1582 /** 1583 * pxa_udc_phy_event - Called by phy upon VBus event 1584 * @nb: notifier block 1585 * @action: phy action, is vbus connect or disconnect 1586 * @data: the usb_gadget structure in pxa_udc 1587 * 1588 * Called by the USB Phy when a cable connect or disconnect is sensed. 1589 * 1590 * Returns 0 1591 */ 1592 static int pxa_udc_phy_event(struct notifier_block *nb, unsigned long action, 1593 void *data) 1594 { 1595 struct usb_gadget *gadget = data; 1596 1597 switch (action) { 1598 case USB_EVENT_VBUS: 1599 usb_gadget_vbus_connect(gadget); 1600 return NOTIFY_OK; 1601 case USB_EVENT_NONE: 1602 usb_gadget_vbus_disconnect(gadget); 1603 return NOTIFY_OK; 1604 default: 1605 return NOTIFY_DONE; 1606 } 1607 } 1608 1609 static struct notifier_block pxa27x_udc_phy = { 1610 .notifier_call = pxa_udc_phy_event, 1611 }; 1612 1613 static int pxa27x_udc_start(struct usb_gadget *g, 1614 struct usb_gadget_driver *driver); 1615 static int pxa27x_udc_stop(struct usb_gadget *g); 1616 1617 static const struct usb_gadget_ops pxa_udc_ops = { 1618 .get_frame = pxa_udc_get_frame, 1619 .wakeup = pxa_udc_wakeup, 1620 .pullup = pxa_udc_pullup, 1621 .vbus_session = pxa_udc_vbus_session, 1622 .vbus_draw = pxa_udc_vbus_draw, 1623 .udc_start = pxa27x_udc_start, 1624 .udc_stop = pxa27x_udc_stop, 1625 }; 1626 1627 /** 1628 * udc_disable - disable udc device controller 1629 * @udc: udc device 1630 * Context: any 1631 * 1632 * Disables the udc device : disables clocks, udc interrupts, control endpoint 1633 * interrupts. 1634 */ 1635 static void udc_disable(struct pxa_udc *udc) 1636 { 1637 if (!udc->enabled) 1638 return; 1639 1640 udc_writel(udc, UDCICR0, 0); 1641 udc_writel(udc, UDCICR1, 0); 1642 1643 udc_clear_mask_UDCCR(udc, UDCCR_UDE); 1644 1645 ep0_idle(udc); 1646 udc->gadget.speed = USB_SPEED_UNKNOWN; 1647 clk_disable(udc->clk); 1648 1649 udc->enabled = 0; 1650 } 1651 1652 /** 1653 * udc_init_data - Initialize udc device data structures 1654 * @dev: udc device 1655 * 1656 * Initializes gadget endpoint list, endpoints locks. No action is taken 1657 * on the hardware. 1658 */ 1659 static void udc_init_data(struct pxa_udc *dev) 1660 { 1661 int i; 1662 struct pxa_ep *ep; 1663 1664 /* device/ep0 records init */ 1665 INIT_LIST_HEAD(&dev->gadget.ep_list); 1666 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); 1667 dev->udc_usb_ep[0].pxa_ep = &dev->pxa_ep[0]; 1668 dev->gadget.quirk_altset_not_supp = 1; 1669 ep0_idle(dev); 1670 1671 /* PXA endpoints init */ 1672 for (i = 0; i < NR_PXA_ENDPOINTS; i++) { 1673 ep = &dev->pxa_ep[i]; 1674 1675 ep->enabled = is_ep0(ep); 1676 INIT_LIST_HEAD(&ep->queue); 1677 spin_lock_init(&ep->lock); 1678 } 1679 1680 /* USB endpoints init */ 1681 for (i = 1; i < NR_USB_ENDPOINTS; i++) { 1682 list_add_tail(&dev->udc_usb_ep[i].usb_ep.ep_list, 1683 &dev->gadget.ep_list); 1684 usb_ep_set_maxpacket_limit(&dev->udc_usb_ep[i].usb_ep, 1685 dev->udc_usb_ep[i].usb_ep.maxpacket); 1686 } 1687 } 1688 1689 /** 1690 * udc_enable - Enables the udc device 1691 * @dev: udc device 1692 * 1693 * Enables the udc device : enables clocks, udc interrupts, control endpoint 1694 * interrupts, sets usb as UDC client and setups endpoints. 1695 */ 1696 static void udc_enable(struct pxa_udc *udc) 1697 { 1698 if (udc->enabled) 1699 return; 1700 1701 clk_enable(udc->clk); 1702 udc_writel(udc, UDCICR0, 0); 1703 udc_writel(udc, UDCICR1, 0); 1704 udc_clear_mask_UDCCR(udc, UDCCR_UDE); 1705 1706 ep0_idle(udc); 1707 udc->gadget.speed = USB_SPEED_FULL; 1708 memset(&udc->stats, 0, sizeof(udc->stats)); 1709 1710 pxa_eps_setup(udc); 1711 udc_set_mask_UDCCR(udc, UDCCR_UDE); 1712 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_ACM); 1713 udelay(2); 1714 if (udc_readl(udc, UDCCR) & UDCCR_EMCE) 1715 dev_err(udc->dev, "Configuration errors, udc disabled\n"); 1716 1717 /* 1718 * Caller must be able to sleep in order to cope with startup transients 1719 */ 1720 msleep(100); 1721 1722 /* enable suspend/resume and reset irqs */ 1723 udc_writel(udc, UDCICR1, 1724 UDCICR1_IECC | UDCICR1_IERU 1725 | UDCICR1_IESU | UDCICR1_IERS); 1726 1727 /* enable ep0 irqs */ 1728 pio_irq_enable(&udc->pxa_ep[0]); 1729 1730 udc->enabled = 1; 1731 } 1732 1733 /** 1734 * pxa27x_start - Register gadget driver 1735 * @driver: gadget driver 1736 * @bind: bind function 1737 * 1738 * When a driver is successfully registered, it will receive control requests 1739 * including set_configuration(), which enables non-control requests. Then 1740 * usb traffic follows until a disconnect is reported. Then a host may connect 1741 * again, or the driver might get unbound. 1742 * 1743 * Note that the udc is not automatically enabled. Check function 1744 * should_enable_udc(). 1745 * 1746 * Returns 0 if no error, -EINVAL, -ENODEV, -EBUSY otherwise 1747 */ 1748 static int pxa27x_udc_start(struct usb_gadget *g, 1749 struct usb_gadget_driver *driver) 1750 { 1751 struct pxa_udc *udc = to_pxa(g); 1752 int retval; 1753 1754 /* first hook up the driver ... */ 1755 udc->driver = driver; 1756 1757 if (!IS_ERR_OR_NULL(udc->transceiver)) { 1758 retval = otg_set_peripheral(udc->transceiver->otg, 1759 &udc->gadget); 1760 if (retval) { 1761 dev_err(udc->dev, "can't bind to transceiver\n"); 1762 goto fail; 1763 } 1764 } 1765 1766 if (should_enable_udc(udc)) 1767 udc_enable(udc); 1768 return 0; 1769 1770 fail: 1771 udc->driver = NULL; 1772 return retval; 1773 } 1774 1775 /** 1776 * stop_activity - Stops udc endpoints 1777 * @udc: udc device 1778 * @driver: gadget driver 1779 * 1780 * Disables all udc endpoints (even control endpoint), report disconnect to 1781 * the gadget user. 1782 */ 1783 static void stop_activity(struct pxa_udc *udc) 1784 { 1785 int i; 1786 1787 udc->gadget.speed = USB_SPEED_UNKNOWN; 1788 1789 for (i = 0; i < NR_USB_ENDPOINTS; i++) 1790 pxa_ep_disable(&udc->udc_usb_ep[i].usb_ep); 1791 } 1792 1793 /** 1794 * pxa27x_udc_stop - Unregister the gadget driver 1795 * @driver: gadget driver 1796 * 1797 * Returns 0 if no error, -ENODEV, -EINVAL otherwise 1798 */ 1799 static int pxa27x_udc_stop(struct usb_gadget *g) 1800 { 1801 struct pxa_udc *udc = to_pxa(g); 1802 1803 stop_activity(udc); 1804 udc_disable(udc); 1805 1806 udc->driver = NULL; 1807 1808 if (!IS_ERR_OR_NULL(udc->transceiver)) 1809 return otg_set_peripheral(udc->transceiver->otg, NULL); 1810 return 0; 1811 } 1812 1813 /** 1814 * handle_ep0_ctrl_req - handle control endpoint control request 1815 * @udc: udc device 1816 * @req: control request 1817 */ 1818 static void handle_ep0_ctrl_req(struct pxa_udc *udc, 1819 struct pxa27x_request *req) 1820 { 1821 struct pxa_ep *ep = &udc->pxa_ep[0]; 1822 union { 1823 struct usb_ctrlrequest r; 1824 u32 word[2]; 1825 } u; 1826 int i; 1827 int have_extrabytes = 0; 1828 unsigned long flags; 1829 1830 nuke(ep, -EPROTO); 1831 spin_lock_irqsave(&ep->lock, flags); 1832 1833 /* 1834 * In the PXA320 manual, in the section about Back-to-Back setup 1835 * packets, it describes this situation. The solution is to set OPC to 1836 * get rid of the status packet, and then continue with the setup 1837 * packet. Generalize to pxa27x CPUs. 1838 */ 1839 if (epout_has_pkt(ep) && (ep_count_bytes_remain(ep) == 0)) 1840 ep_write_UDCCSR(ep, UDCCSR0_OPC); 1841 1842 /* read SETUP packet */ 1843 for (i = 0; i < 2; i++) { 1844 if (unlikely(ep_is_empty(ep))) 1845 goto stall; 1846 u.word[i] = udc_ep_readl(ep, UDCDR); 1847 } 1848 1849 have_extrabytes = !ep_is_empty(ep); 1850 while (!ep_is_empty(ep)) { 1851 i = udc_ep_readl(ep, UDCDR); 1852 ep_err(ep, "wrong to have extra bytes for setup : 0x%08x\n", i); 1853 } 1854 1855 ep_dbg(ep, "SETUP %02x.%02x v%04x i%04x l%04x\n", 1856 u.r.bRequestType, u.r.bRequest, 1857 le16_to_cpu(u.r.wValue), le16_to_cpu(u.r.wIndex), 1858 le16_to_cpu(u.r.wLength)); 1859 if (unlikely(have_extrabytes)) 1860 goto stall; 1861 1862 if (u.r.bRequestType & USB_DIR_IN) 1863 set_ep0state(udc, IN_DATA_STAGE); 1864 else 1865 set_ep0state(udc, OUT_DATA_STAGE); 1866 1867 /* Tell UDC to enter Data Stage */ 1868 ep_write_UDCCSR(ep, UDCCSR0_SA | UDCCSR0_OPC); 1869 1870 spin_unlock_irqrestore(&ep->lock, flags); 1871 i = udc->driver->setup(&udc->gadget, &u.r); 1872 spin_lock_irqsave(&ep->lock, flags); 1873 if (i < 0) 1874 goto stall; 1875 out: 1876 spin_unlock_irqrestore(&ep->lock, flags); 1877 return; 1878 stall: 1879 ep_dbg(ep, "protocol STALL, udccsr0=%03x err %d\n", 1880 udc_ep_readl(ep, UDCCSR), i); 1881 ep_write_UDCCSR(ep, UDCCSR0_FST | UDCCSR0_FTF); 1882 set_ep0state(udc, STALL); 1883 goto out; 1884 } 1885 1886 /** 1887 * handle_ep0 - Handle control endpoint data transfers 1888 * @udc: udc device 1889 * @fifo_irq: 1 if triggered by fifo service type irq 1890 * @opc_irq: 1 if triggered by output packet complete type irq 1891 * 1892 * Context : when in_interrupt() or with ep->lock held 1893 * 1894 * Tries to transfer all pending request data into the endpoint and/or 1895 * transfer all pending data in the endpoint into usb requests. 1896 * Handles states of ep0 automata. 1897 * 1898 * PXA27x hardware handles several standard usb control requests without 1899 * driver notification. The requests fully handled by hardware are : 1900 * SET_ADDRESS, SET_FEATURE, CLEAR_FEATURE, GET_CONFIGURATION, GET_INTERFACE, 1901 * GET_STATUS 1902 * The requests handled by hardware, but with irq notification are : 1903 * SYNCH_FRAME, SET_CONFIGURATION, SET_INTERFACE 1904 * The remaining standard requests really handled by handle_ep0 are : 1905 * GET_DESCRIPTOR, SET_DESCRIPTOR, specific requests. 1906 * Requests standardized outside of USB 2.0 chapter 9 are handled more 1907 * uniformly, by gadget drivers. 1908 * 1909 * The control endpoint state machine is _not_ USB spec compliant, it's even 1910 * hardly compliant with Intel PXA270 developers guide. 1911 * The key points which inferred this state machine are : 1912 * - on every setup token, bit UDCCSR0_SA is raised and held until cleared by 1913 * software. 1914 * - on every OUT packet received, UDCCSR0_OPC is raised and held until 1915 * cleared by software. 1916 * - clearing UDCCSR0_OPC always flushes ep0. If in setup stage, never do it 1917 * before reading ep0. 1918 * This is true only for PXA27x. This is not true anymore for PXA3xx family 1919 * (check Back-to-Back setup packet in developers guide). 1920 * - irq can be called on a "packet complete" event (opc_irq=1), while 1921 * UDCCSR0_OPC is not yet raised (delta can be as big as 100ms 1922 * from experimentation). 1923 * - as UDCCSR0_SA can be activated while in irq handling, and clearing 1924 * UDCCSR0_OPC would flush the setup data, we almost never clear UDCCSR0_OPC 1925 * => we never actually read the "status stage" packet of an IN data stage 1926 * => this is not documented in Intel documentation 1927 * - hardware as no idea of STATUS STAGE, it only handle SETUP STAGE and DATA 1928 * STAGE. The driver add STATUS STAGE to send last zero length packet in 1929 * OUT_STATUS_STAGE. 1930 * - special attention was needed for IN_STATUS_STAGE. If a packet complete 1931 * event is detected, we terminate the status stage without ackowledging the 1932 * packet (not to risk to loose a potential SETUP packet) 1933 */ 1934 static void handle_ep0(struct pxa_udc *udc, int fifo_irq, int opc_irq) 1935 { 1936 u32 udccsr0; 1937 struct pxa_ep *ep = &udc->pxa_ep[0]; 1938 struct pxa27x_request *req = NULL; 1939 int completed = 0; 1940 1941 if (!list_empty(&ep->queue)) 1942 req = list_entry(ep->queue.next, struct pxa27x_request, queue); 1943 1944 udccsr0 = udc_ep_readl(ep, UDCCSR); 1945 ep_dbg(ep, "state=%s, req=%p, udccsr0=0x%03x, udcbcr=%d, irq_msk=%x\n", 1946 EP0_STNAME(udc), req, udccsr0, udc_ep_readl(ep, UDCBCR), 1947 (fifo_irq << 1 | opc_irq)); 1948 1949 if (udccsr0 & UDCCSR0_SST) { 1950 ep_dbg(ep, "clearing stall status\n"); 1951 nuke(ep, -EPIPE); 1952 ep_write_UDCCSR(ep, UDCCSR0_SST); 1953 ep0_idle(udc); 1954 } 1955 1956 if (udccsr0 & UDCCSR0_SA) { 1957 nuke(ep, 0); 1958 set_ep0state(udc, SETUP_STAGE); 1959 } 1960 1961 switch (udc->ep0state) { 1962 case WAIT_FOR_SETUP: 1963 /* 1964 * Hardware bug : beware, we cannot clear OPC, since we would 1965 * miss a potential OPC irq for a setup packet. 1966 * So, we only do ... nothing, and hope for a next irq with 1967 * UDCCSR0_SA set. 1968 */ 1969 break; 1970 case SETUP_STAGE: 1971 udccsr0 &= UDCCSR0_CTRL_REQ_MASK; 1972 if (likely(udccsr0 == UDCCSR0_CTRL_REQ_MASK)) 1973 handle_ep0_ctrl_req(udc, req); 1974 break; 1975 case IN_DATA_STAGE: /* GET_DESCRIPTOR */ 1976 if (epout_has_pkt(ep)) 1977 ep_write_UDCCSR(ep, UDCCSR0_OPC); 1978 if (req && !ep_is_full(ep)) 1979 completed = write_ep0_fifo(ep, req); 1980 if (completed) 1981 ep0_end_in_req(ep, req, NULL); 1982 break; 1983 case OUT_DATA_STAGE: /* SET_DESCRIPTOR */ 1984 if (epout_has_pkt(ep) && req) 1985 completed = read_ep0_fifo(ep, req); 1986 if (completed) 1987 ep0_end_out_req(ep, req, NULL); 1988 break; 1989 case STALL: 1990 ep_write_UDCCSR(ep, UDCCSR0_FST); 1991 break; 1992 case IN_STATUS_STAGE: 1993 /* 1994 * Hardware bug : beware, we cannot clear OPC, since we would 1995 * miss a potential PC irq for a setup packet. 1996 * So, we only put the ep0 into WAIT_FOR_SETUP state. 1997 */ 1998 if (opc_irq) 1999 ep0_idle(udc); 2000 break; 2001 case OUT_STATUS_STAGE: 2002 case WAIT_ACK_SET_CONF_INTERF: 2003 ep_warn(ep, "should never get in %s state here!!!\n", 2004 EP0_STNAME(ep->dev)); 2005 ep0_idle(udc); 2006 break; 2007 } 2008 } 2009 2010 /** 2011 * handle_ep - Handle endpoint data tranfers 2012 * @ep: pxa physical endpoint 2013 * 2014 * Tries to transfer all pending request data into the endpoint and/or 2015 * transfer all pending data in the endpoint into usb requests. 2016 * 2017 * Is always called when in_interrupt() and with ep->lock released. 2018 */ 2019 static void handle_ep(struct pxa_ep *ep) 2020 { 2021 struct pxa27x_request *req; 2022 int completed; 2023 u32 udccsr; 2024 int is_in = ep->dir_in; 2025 int loop = 0; 2026 unsigned long flags; 2027 2028 spin_lock_irqsave(&ep->lock, flags); 2029 if (ep->in_handle_ep) 2030 goto recursion_detected; 2031 ep->in_handle_ep = 1; 2032 2033 do { 2034 completed = 0; 2035 udccsr = udc_ep_readl(ep, UDCCSR); 2036 2037 if (likely(!list_empty(&ep->queue))) 2038 req = list_entry(ep->queue.next, 2039 struct pxa27x_request, queue); 2040 else 2041 req = NULL; 2042 2043 ep_dbg(ep, "req:%p, udccsr 0x%03x loop=%d\n", 2044 req, udccsr, loop++); 2045 2046 if (unlikely(udccsr & (UDCCSR_SST | UDCCSR_TRN))) 2047 udc_ep_writel(ep, UDCCSR, 2048 udccsr & (UDCCSR_SST | UDCCSR_TRN)); 2049 if (!req) 2050 break; 2051 2052 if (unlikely(is_in)) { 2053 if (likely(!ep_is_full(ep))) 2054 completed = write_fifo(ep, req); 2055 } else { 2056 if (likely(epout_has_pkt(ep))) 2057 completed = read_fifo(ep, req); 2058 } 2059 2060 if (completed) { 2061 if (is_in) 2062 ep_end_in_req(ep, req, &flags); 2063 else 2064 ep_end_out_req(ep, req, &flags); 2065 } 2066 } while (completed); 2067 2068 ep->in_handle_ep = 0; 2069 recursion_detected: 2070 spin_unlock_irqrestore(&ep->lock, flags); 2071 } 2072 2073 /** 2074 * pxa27x_change_configuration - Handle SET_CONF usb request notification 2075 * @udc: udc device 2076 * @config: usb configuration 2077 * 2078 * Post the request to upper level. 2079 * Don't use any pxa specific harware configuration capabilities 2080 */ 2081 static void pxa27x_change_configuration(struct pxa_udc *udc, int config) 2082 { 2083 struct usb_ctrlrequest req ; 2084 2085 dev_dbg(udc->dev, "config=%d\n", config); 2086 2087 udc->config = config; 2088 udc->last_interface = 0; 2089 udc->last_alternate = 0; 2090 2091 req.bRequestType = 0; 2092 req.bRequest = USB_REQ_SET_CONFIGURATION; 2093 req.wValue = config; 2094 req.wIndex = 0; 2095 req.wLength = 0; 2096 2097 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF); 2098 udc->driver->setup(&udc->gadget, &req); 2099 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN); 2100 } 2101 2102 /** 2103 * pxa27x_change_interface - Handle SET_INTERF usb request notification 2104 * @udc: udc device 2105 * @iface: interface number 2106 * @alt: alternate setting number 2107 * 2108 * Post the request to upper level. 2109 * Don't use any pxa specific harware configuration capabilities 2110 */ 2111 static void pxa27x_change_interface(struct pxa_udc *udc, int iface, int alt) 2112 { 2113 struct usb_ctrlrequest req; 2114 2115 dev_dbg(udc->dev, "interface=%d, alternate setting=%d\n", iface, alt); 2116 2117 udc->last_interface = iface; 2118 udc->last_alternate = alt; 2119 2120 req.bRequestType = USB_RECIP_INTERFACE; 2121 req.bRequest = USB_REQ_SET_INTERFACE; 2122 req.wValue = alt; 2123 req.wIndex = iface; 2124 req.wLength = 0; 2125 2126 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF); 2127 udc->driver->setup(&udc->gadget, &req); 2128 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN); 2129 } 2130 2131 /* 2132 * irq_handle_data - Handle data transfer 2133 * @irq: irq IRQ number 2134 * @udc: dev pxa_udc device structure 2135 * 2136 * Called from irq handler, transferts data to or from endpoint to queue 2137 */ 2138 static void irq_handle_data(int irq, struct pxa_udc *udc) 2139 { 2140 int i; 2141 struct pxa_ep *ep; 2142 u32 udcisr0 = udc_readl(udc, UDCISR0) & UDCCISR0_EP_MASK; 2143 u32 udcisr1 = udc_readl(udc, UDCISR1) & UDCCISR1_EP_MASK; 2144 2145 if (udcisr0 & UDCISR_INT_MASK) { 2146 udc->pxa_ep[0].stats.irqs++; 2147 udc_writel(udc, UDCISR0, UDCISR_INT(0, UDCISR_INT_MASK)); 2148 handle_ep0(udc, !!(udcisr0 & UDCICR_FIFOERR), 2149 !!(udcisr0 & UDCICR_PKTCOMPL)); 2150 } 2151 2152 udcisr0 >>= 2; 2153 for (i = 1; udcisr0 != 0 && i < 16; udcisr0 >>= 2, i++) { 2154 if (!(udcisr0 & UDCISR_INT_MASK)) 2155 continue; 2156 2157 udc_writel(udc, UDCISR0, UDCISR_INT(i, UDCISR_INT_MASK)); 2158 2159 WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep)); 2160 if (i < ARRAY_SIZE(udc->pxa_ep)) { 2161 ep = &udc->pxa_ep[i]; 2162 ep->stats.irqs++; 2163 handle_ep(ep); 2164 } 2165 } 2166 2167 for (i = 16; udcisr1 != 0 && i < 24; udcisr1 >>= 2, i++) { 2168 udc_writel(udc, UDCISR1, UDCISR_INT(i - 16, UDCISR_INT_MASK)); 2169 if (!(udcisr1 & UDCISR_INT_MASK)) 2170 continue; 2171 2172 WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep)); 2173 if (i < ARRAY_SIZE(udc->pxa_ep)) { 2174 ep = &udc->pxa_ep[i]; 2175 ep->stats.irqs++; 2176 handle_ep(ep); 2177 } 2178 } 2179 2180 } 2181 2182 /** 2183 * irq_udc_suspend - Handle IRQ "UDC Suspend" 2184 * @udc: udc device 2185 */ 2186 static void irq_udc_suspend(struct pxa_udc *udc) 2187 { 2188 udc_writel(udc, UDCISR1, UDCISR1_IRSU); 2189 udc->stats.irqs_suspend++; 2190 2191 if (udc->gadget.speed != USB_SPEED_UNKNOWN 2192 && udc->driver && udc->driver->suspend) 2193 udc->driver->suspend(&udc->gadget); 2194 ep0_idle(udc); 2195 } 2196 2197 /** 2198 * irq_udc_resume - Handle IRQ "UDC Resume" 2199 * @udc: udc device 2200 */ 2201 static void irq_udc_resume(struct pxa_udc *udc) 2202 { 2203 udc_writel(udc, UDCISR1, UDCISR1_IRRU); 2204 udc->stats.irqs_resume++; 2205 2206 if (udc->gadget.speed != USB_SPEED_UNKNOWN 2207 && udc->driver && udc->driver->resume) 2208 udc->driver->resume(&udc->gadget); 2209 } 2210 2211 /** 2212 * irq_udc_reconfig - Handle IRQ "UDC Change Configuration" 2213 * @udc: udc device 2214 */ 2215 static void irq_udc_reconfig(struct pxa_udc *udc) 2216 { 2217 unsigned config, interface, alternate, config_change; 2218 u32 udccr = udc_readl(udc, UDCCR); 2219 2220 udc_writel(udc, UDCISR1, UDCISR1_IRCC); 2221 udc->stats.irqs_reconfig++; 2222 2223 config = (udccr & UDCCR_ACN) >> UDCCR_ACN_S; 2224 config_change = (config != udc->config); 2225 pxa27x_change_configuration(udc, config); 2226 2227 interface = (udccr & UDCCR_AIN) >> UDCCR_AIN_S; 2228 alternate = (udccr & UDCCR_AAISN) >> UDCCR_AAISN_S; 2229 pxa27x_change_interface(udc, interface, alternate); 2230 2231 if (config_change) 2232 update_pxa_ep_matches(udc); 2233 udc_set_mask_UDCCR(udc, UDCCR_SMAC); 2234 } 2235 2236 /** 2237 * irq_udc_reset - Handle IRQ "UDC Reset" 2238 * @udc: udc device 2239 */ 2240 static void irq_udc_reset(struct pxa_udc *udc) 2241 { 2242 u32 udccr = udc_readl(udc, UDCCR); 2243 struct pxa_ep *ep = &udc->pxa_ep[0]; 2244 2245 dev_info(udc->dev, "USB reset\n"); 2246 udc_writel(udc, UDCISR1, UDCISR1_IRRS); 2247 udc->stats.irqs_reset++; 2248 2249 if ((udccr & UDCCR_UDA) == 0) { 2250 dev_dbg(udc->dev, "USB reset start\n"); 2251 stop_activity(udc); 2252 } 2253 udc->gadget.speed = USB_SPEED_FULL; 2254 memset(&udc->stats, 0, sizeof udc->stats); 2255 2256 nuke(ep, -EPROTO); 2257 ep_write_UDCCSR(ep, UDCCSR0_FTF | UDCCSR0_OPC); 2258 ep0_idle(udc); 2259 } 2260 2261 /** 2262 * pxa_udc_irq - Main irq handler 2263 * @irq: irq number 2264 * @_dev: udc device 2265 * 2266 * Handles all udc interrupts 2267 */ 2268 static irqreturn_t pxa_udc_irq(int irq, void *_dev) 2269 { 2270 struct pxa_udc *udc = _dev; 2271 u32 udcisr0 = udc_readl(udc, UDCISR0); 2272 u32 udcisr1 = udc_readl(udc, UDCISR1); 2273 u32 udccr = udc_readl(udc, UDCCR); 2274 u32 udcisr1_spec; 2275 2276 dev_vdbg(udc->dev, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, " 2277 "UDCCR:0x%08x\n", udcisr0, udcisr1, udccr); 2278 2279 udcisr1_spec = udcisr1 & 0xf8000000; 2280 if (unlikely(udcisr1_spec & UDCISR1_IRSU)) 2281 irq_udc_suspend(udc); 2282 if (unlikely(udcisr1_spec & UDCISR1_IRRU)) 2283 irq_udc_resume(udc); 2284 if (unlikely(udcisr1_spec & UDCISR1_IRCC)) 2285 irq_udc_reconfig(udc); 2286 if (unlikely(udcisr1_spec & UDCISR1_IRRS)) 2287 irq_udc_reset(udc); 2288 2289 if ((udcisr0 & UDCCISR0_EP_MASK) | (udcisr1 & UDCCISR1_EP_MASK)) 2290 irq_handle_data(irq, udc); 2291 2292 return IRQ_HANDLED; 2293 } 2294 2295 static struct pxa_udc memory = { 2296 .gadget = { 2297 .ops = &pxa_udc_ops, 2298 .ep0 = &memory.udc_usb_ep[0].usb_ep, 2299 .name = driver_name, 2300 .dev = { 2301 .init_name = "gadget", 2302 }, 2303 }, 2304 2305 .udc_usb_ep = { 2306 USB_EP_CTRL, 2307 USB_EP_OUT_BULK(1), 2308 USB_EP_IN_BULK(2), 2309 USB_EP_IN_ISO(3), 2310 USB_EP_OUT_ISO(4), 2311 USB_EP_IN_INT(5), 2312 }, 2313 2314 .pxa_ep = { 2315 PXA_EP_CTRL, 2316 /* Endpoints for gadget zero */ 2317 PXA_EP_OUT_BULK(1, 1, 3, 0, 0), 2318 PXA_EP_IN_BULK(2, 2, 3, 0, 0), 2319 /* Endpoints for ether gadget, file storage gadget */ 2320 PXA_EP_OUT_BULK(3, 1, 1, 0, 0), 2321 PXA_EP_IN_BULK(4, 2, 1, 0, 0), 2322 PXA_EP_IN_ISO(5, 3, 1, 0, 0), 2323 PXA_EP_OUT_ISO(6, 4, 1, 0, 0), 2324 PXA_EP_IN_INT(7, 5, 1, 0, 0), 2325 /* Endpoints for RNDIS, serial */ 2326 PXA_EP_OUT_BULK(8, 1, 2, 0, 0), 2327 PXA_EP_IN_BULK(9, 2, 2, 0, 0), 2328 PXA_EP_IN_INT(10, 5, 2, 0, 0), 2329 /* 2330 * All the following endpoints are only for completion. They 2331 * won't never work, as multiple interfaces are really broken on 2332 * the pxa. 2333 */ 2334 PXA_EP_OUT_BULK(11, 1, 2, 1, 0), 2335 PXA_EP_IN_BULK(12, 2, 2, 1, 0), 2336 /* Endpoint for CDC Ether */ 2337 PXA_EP_OUT_BULK(13, 1, 1, 1, 1), 2338 PXA_EP_IN_BULK(14, 2, 1, 1, 1), 2339 } 2340 }; 2341 2342 #if defined(CONFIG_OF) 2343 static const struct of_device_id udc_pxa_dt_ids[] = { 2344 { .compatible = "marvell,pxa270-udc" }, 2345 {} 2346 }; 2347 MODULE_DEVICE_TABLE(of, udc_pxa_dt_ids); 2348 #endif 2349 2350 /** 2351 * pxa_udc_probe - probes the udc device 2352 * @_dev: platform device 2353 * 2354 * Perform basic init : allocates udc clock, creates sysfs files, requests 2355 * irq. 2356 */ 2357 static int pxa_udc_probe(struct platform_device *pdev) 2358 { 2359 struct pxa_udc *udc = &memory; 2360 int retval = 0, gpio; 2361 struct pxa2xx_udc_mach_info *mach = dev_get_platdata(&pdev->dev); 2362 unsigned long gpio_flags; 2363 2364 if (mach) { 2365 gpio_flags = mach->gpio_pullup_inverted ? GPIOF_ACTIVE_LOW : 0; 2366 gpio = mach->gpio_pullup; 2367 if (gpio_is_valid(gpio)) { 2368 retval = devm_gpio_request_one(&pdev->dev, gpio, 2369 gpio_flags, 2370 "USB D+ pullup"); 2371 if (retval) 2372 return retval; 2373 udc->gpiod = gpio_to_desc(mach->gpio_pullup); 2374 } 2375 udc->udc_command = mach->udc_command; 2376 } else { 2377 udc->gpiod = devm_gpiod_get(&pdev->dev, NULL, GPIOD_ASIS); 2378 } 2379 2380 udc->regs = devm_platform_ioremap_resource(pdev, 0); 2381 if (IS_ERR(udc->regs)) 2382 return PTR_ERR(udc->regs); 2383 udc->irq = platform_get_irq(pdev, 0); 2384 if (udc->irq < 0) 2385 return udc->irq; 2386 2387 udc->dev = &pdev->dev; 2388 if (of_have_populated_dt()) { 2389 udc->transceiver = 2390 devm_usb_get_phy_by_phandle(udc->dev, "phys", 0); 2391 if (IS_ERR(udc->transceiver)) 2392 return PTR_ERR(udc->transceiver); 2393 } else { 2394 udc->transceiver = usb_get_phy(USB_PHY_TYPE_USB2); 2395 } 2396 2397 if (IS_ERR(udc->gpiod)) { 2398 dev_err(&pdev->dev, "Couldn't find or request D+ gpio : %ld\n", 2399 PTR_ERR(udc->gpiod)); 2400 return PTR_ERR(udc->gpiod); 2401 } 2402 if (udc->gpiod) 2403 gpiod_direction_output(udc->gpiod, 0); 2404 2405 udc->clk = devm_clk_get(&pdev->dev, NULL); 2406 if (IS_ERR(udc->clk)) 2407 return PTR_ERR(udc->clk); 2408 2409 retval = clk_prepare(udc->clk); 2410 if (retval) 2411 return retval; 2412 2413 udc->vbus_sensed = 0; 2414 2415 the_controller = udc; 2416 platform_set_drvdata(pdev, udc); 2417 udc_init_data(udc); 2418 2419 /* irq setup after old hardware state is cleaned up */ 2420 retval = devm_request_irq(&pdev->dev, udc->irq, pxa_udc_irq, 2421 IRQF_SHARED, driver_name, udc); 2422 if (retval != 0) { 2423 dev_err(udc->dev, "%s: can't get irq %i, err %d\n", 2424 driver_name, udc->irq, retval); 2425 goto err; 2426 } 2427 2428 if (!IS_ERR_OR_NULL(udc->transceiver)) 2429 usb_register_notifier(udc->transceiver, &pxa27x_udc_phy); 2430 retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget); 2431 if (retval) 2432 goto err_add_gadget; 2433 2434 pxa_init_debugfs(udc); 2435 if (should_enable_udc(udc)) 2436 udc_enable(udc); 2437 return 0; 2438 2439 err_add_gadget: 2440 if (!IS_ERR_OR_NULL(udc->transceiver)) 2441 usb_unregister_notifier(udc->transceiver, &pxa27x_udc_phy); 2442 err: 2443 clk_unprepare(udc->clk); 2444 return retval; 2445 } 2446 2447 /** 2448 * pxa_udc_remove - removes the udc device driver 2449 * @_dev: platform device 2450 */ 2451 static int pxa_udc_remove(struct platform_device *_dev) 2452 { 2453 struct pxa_udc *udc = platform_get_drvdata(_dev); 2454 2455 usb_del_gadget_udc(&udc->gadget); 2456 pxa_cleanup_debugfs(udc); 2457 2458 if (!IS_ERR_OR_NULL(udc->transceiver)) { 2459 usb_unregister_notifier(udc->transceiver, &pxa27x_udc_phy); 2460 usb_put_phy(udc->transceiver); 2461 } 2462 2463 udc->transceiver = NULL; 2464 the_controller = NULL; 2465 clk_unprepare(udc->clk); 2466 2467 return 0; 2468 } 2469 2470 static void pxa_udc_shutdown(struct platform_device *_dev) 2471 { 2472 struct pxa_udc *udc = platform_get_drvdata(_dev); 2473 2474 if (udc_readl(udc, UDCCR) & UDCCR_UDE) 2475 udc_disable(udc); 2476 } 2477 2478 #ifdef CONFIG_PXA27x 2479 extern void pxa27x_clear_otgph(void); 2480 #else 2481 #define pxa27x_clear_otgph() do {} while (0) 2482 #endif 2483 2484 #ifdef CONFIG_PM 2485 /** 2486 * pxa_udc_suspend - Suspend udc device 2487 * @_dev: platform device 2488 * @state: suspend state 2489 * 2490 * Suspends udc : saves configuration registers (UDCCR*), then disables the udc 2491 * device. 2492 */ 2493 static int pxa_udc_suspend(struct platform_device *_dev, pm_message_t state) 2494 { 2495 struct pxa_udc *udc = platform_get_drvdata(_dev); 2496 struct pxa_ep *ep; 2497 2498 ep = &udc->pxa_ep[0]; 2499 udc->udccsr0 = udc_ep_readl(ep, UDCCSR); 2500 2501 udc_disable(udc); 2502 udc->pullup_resume = udc->pullup_on; 2503 dplus_pullup(udc, 0); 2504 2505 if (udc->driver) 2506 udc->driver->disconnect(&udc->gadget); 2507 2508 return 0; 2509 } 2510 2511 /** 2512 * pxa_udc_resume - Resume udc device 2513 * @_dev: platform device 2514 * 2515 * Resumes udc : restores configuration registers (UDCCR*), then enables the udc 2516 * device. 2517 */ 2518 static int pxa_udc_resume(struct platform_device *_dev) 2519 { 2520 struct pxa_udc *udc = platform_get_drvdata(_dev); 2521 struct pxa_ep *ep; 2522 2523 ep = &udc->pxa_ep[0]; 2524 udc_ep_writel(ep, UDCCSR, udc->udccsr0 & (UDCCSR0_FST | UDCCSR0_DME)); 2525 2526 dplus_pullup(udc, udc->pullup_resume); 2527 if (should_enable_udc(udc)) 2528 udc_enable(udc); 2529 /* 2530 * We do not handle OTG yet. 2531 * 2532 * OTGPH bit is set when sleep mode is entered. 2533 * it indicates that OTG pad is retaining its state. 2534 * Upon exit from sleep mode and before clearing OTGPH, 2535 * Software must configure the USB OTG pad, UDC, and UHC 2536 * to the state they were in before entering sleep mode. 2537 */ 2538 pxa27x_clear_otgph(); 2539 2540 return 0; 2541 } 2542 #endif 2543 2544 /* work with hotplug and coldplug */ 2545 MODULE_ALIAS("platform:pxa27x-udc"); 2546 2547 static struct platform_driver udc_driver = { 2548 .driver = { 2549 .name = "pxa27x-udc", 2550 .of_match_table = of_match_ptr(udc_pxa_dt_ids), 2551 }, 2552 .probe = pxa_udc_probe, 2553 .remove = pxa_udc_remove, 2554 .shutdown = pxa_udc_shutdown, 2555 #ifdef CONFIG_PM 2556 .suspend = pxa_udc_suspend, 2557 .resume = pxa_udc_resume 2558 #endif 2559 }; 2560 2561 module_platform_driver(udc_driver); 2562 2563 MODULE_DESCRIPTION(DRIVER_DESC); 2564 MODULE_AUTHOR("Robert Jarzmik"); 2565 MODULE_LICENSE("GPL"); 2566