1 /*
2  * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
3  *
4  * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
5  * Copyright (C) 2003 Robert Schwebel, Pengutronix
6  * Copyright (C) 2003 Benedikt Spranger, Pengutronix
7  * Copyright (C) 2003 David Brownell
8  * Copyright (C) 2003 Joshua Wise
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation; either version 2 of the License, or
13  * (at your option) any later version.
14  */
15 
16 /* #define VERBOSE_DEBUG */
17 
18 #include <linux/device.h>
19 #include <linux/gpio.h>
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/ioport.h>
23 #include <linux/types.h>
24 #include <linux/errno.h>
25 #include <linux/err.h>
26 #include <linux/delay.h>
27 #include <linux/slab.h>
28 #include <linux/timer.h>
29 #include <linux/list.h>
30 #include <linux/interrupt.h>
31 #include <linux/mm.h>
32 #include <linux/platform_data/pxa2xx_udc.h>
33 #include <linux/platform_device.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/irq.h>
36 #include <linux/clk.h>
37 #include <linux/seq_file.h>
38 #include <linux/debugfs.h>
39 #include <linux/io.h>
40 #include <linux/prefetch.h>
41 
42 #include <asm/byteorder.h>
43 #include <asm/dma.h>
44 #include <asm/mach-types.h>
45 #include <asm/unaligned.h>
46 
47 #include <linux/usb/ch9.h>
48 #include <linux/usb/gadget.h>
49 #include <linux/usb/otg.h>
50 
51 /*
52  * This driver is PXA25x only.  Grab the right register definitions.
53  */
54 #ifdef CONFIG_ARCH_PXA
55 #include <mach/pxa25x-udc.h>
56 #include <mach/hardware.h>
57 #endif
58 
59 #ifdef CONFIG_ARCH_LUBBOCK
60 #include <mach/lubbock.h>
61 #endif
62 
63 /*
64  * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
65  * series processors.  The UDC for the IXP 4xx series is very similar.
66  * There are fifteen endpoints, in addition to ep0.
67  *
68  * Such controller drivers work with a gadget driver.  The gadget driver
69  * returns descriptors, implements configuration and data protocols used
70  * by the host to interact with this device, and allocates endpoints to
71  * the different protocol interfaces.  The controller driver virtualizes
72  * usb hardware so that the gadget drivers will be more portable.
73  *
74  * This UDC hardware wants to implement a bit too much USB protocol, so
75  * it constrains the sorts of USB configuration change events that work.
76  * The errata for these chips are misleading; some "fixed" bugs from
77  * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
78  *
79  * Note that the UDC hardware supports DMA (except on IXP) but that's
80  * not used here.  IN-DMA (to host) is simple enough, when the data is
81  * suitably aligned (16 bytes) ... the network stack doesn't do that,
82  * other software can.  OUT-DMA is buggy in most chip versions, as well
83  * as poorly designed (data toggle not automatic).  So this driver won't
84  * bother using DMA.  (Mostly-working IN-DMA support was available in
85  * kernels before 2.6.23, but was never enabled or well tested.)
86  */
87 
88 #define	DRIVER_VERSION	"30-June-2007"
89 #define	DRIVER_DESC	"PXA 25x USB Device Controller driver"
90 
91 
92 static const char driver_name [] = "pxa25x_udc";
93 
94 static const char ep0name [] = "ep0";
95 
96 
97 #ifdef CONFIG_ARCH_IXP4XX
98 
99 /* cpu-specific register addresses are compiled in to this code */
100 #ifdef CONFIG_ARCH_PXA
101 #error "Can't configure both IXP and PXA"
102 #endif
103 
104 /* IXP doesn't yet support <linux/clk.h> */
105 #define clk_get(dev,name)	NULL
106 #define clk_enable(clk)		do { } while (0)
107 #define clk_disable(clk)	do { } while (0)
108 #define clk_put(clk)		do { } while (0)
109 
110 #endif
111 
112 #include "pxa25x_udc.h"
113 
114 
115 #ifdef	CONFIG_USB_PXA25X_SMALL
116 #define SIZE_STR	" (small)"
117 #else
118 #define SIZE_STR	""
119 #endif
120 
121 /* ---------------------------------------------------------------------------
122  *	endpoint related parts of the api to the usb controller hardware,
123  *	used by gadget driver; and the inner talker-to-hardware core.
124  * ---------------------------------------------------------------------------
125  */
126 
127 static void pxa25x_ep_fifo_flush (struct usb_ep *ep);
128 static void nuke (struct pxa25x_ep *, int status);
129 
130 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
131 static void pullup_off(void)
132 {
133 	struct pxa2xx_udc_mach_info		*mach = the_controller->mach;
134 	int off_level = mach->gpio_pullup_inverted;
135 
136 	if (gpio_is_valid(mach->gpio_pullup))
137 		gpio_set_value(mach->gpio_pullup, off_level);
138 	else if (mach->udc_command)
139 		mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
140 }
141 
142 static void pullup_on(void)
143 {
144 	struct pxa2xx_udc_mach_info		*mach = the_controller->mach;
145 	int on_level = !mach->gpio_pullup_inverted;
146 
147 	if (gpio_is_valid(mach->gpio_pullup))
148 		gpio_set_value(mach->gpio_pullup, on_level);
149 	else if (mach->udc_command)
150 		mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
151 }
152 
153 static void pio_irq_enable(int bEndpointAddress)
154 {
155         bEndpointAddress &= 0xf;
156         if (bEndpointAddress < 8)
157                 UICR0 &= ~(1 << bEndpointAddress);
158         else {
159                 bEndpointAddress -= 8;
160                 UICR1 &= ~(1 << bEndpointAddress);
161 	}
162 }
163 
164 static void pio_irq_disable(int bEndpointAddress)
165 {
166         bEndpointAddress &= 0xf;
167         if (bEndpointAddress < 8)
168                 UICR0 |= 1 << bEndpointAddress;
169         else {
170                 bEndpointAddress -= 8;
171                 UICR1 |= 1 << bEndpointAddress;
172         }
173 }
174 
175 /* The UDCCR reg contains mask and interrupt status bits,
176  * so using '|=' isn't safe as it may ack an interrupt.
177  */
178 #define UDCCR_MASK_BITS         (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
179 
180 static inline void udc_set_mask_UDCCR(int mask)
181 {
182 	UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
183 }
184 
185 static inline void udc_clear_mask_UDCCR(int mask)
186 {
187 	UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
188 }
189 
190 static inline void udc_ack_int_UDCCR(int mask)
191 {
192 	/* udccr contains the bits we dont want to change */
193 	__u32 udccr = UDCCR & UDCCR_MASK_BITS;
194 
195 	UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
196 }
197 
198 /*
199  * endpoint enable/disable
200  *
201  * we need to verify the descriptors used to enable endpoints.  since pxa25x
202  * endpoint configurations are fixed, and are pretty much always enabled,
203  * there's not a lot to manage here.
204  *
205  * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
206  * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
207  * for a single interface (with only the default altsetting) and for gadget
208  * drivers that don't halt endpoints (not reset by set_interface).  that also
209  * means that if you use ISO, you must violate the USB spec rule that all
210  * iso endpoints must be in non-default altsettings.
211  */
212 static int pxa25x_ep_enable (struct usb_ep *_ep,
213 		const struct usb_endpoint_descriptor *desc)
214 {
215 	struct pxa25x_ep        *ep;
216 	struct pxa25x_udc       *dev;
217 
218 	ep = container_of (_ep, struct pxa25x_ep, ep);
219 	if (!_ep || !desc || _ep->name == ep0name
220 			|| desc->bDescriptorType != USB_DT_ENDPOINT
221 			|| ep->bEndpointAddress != desc->bEndpointAddress
222 			|| ep->fifo_size < usb_endpoint_maxp (desc)) {
223 		DMSG("%s, bad ep or descriptor\n", __func__);
224 		return -EINVAL;
225 	}
226 
227 	/* xfer types must match, except that interrupt ~= bulk */
228 	if (ep->bmAttributes != desc->bmAttributes
229 			&& ep->bmAttributes != USB_ENDPOINT_XFER_BULK
230 			&& desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
231 		DMSG("%s, %s type mismatch\n", __func__, _ep->name);
232 		return -EINVAL;
233 	}
234 
235 	/* hardware _could_ do smaller, but driver doesn't */
236 	if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
237 				&& usb_endpoint_maxp (desc)
238 						!= BULK_FIFO_SIZE)
239 			|| !desc->wMaxPacketSize) {
240 		DMSG("%s, bad %s maxpacket\n", __func__, _ep->name);
241 		return -ERANGE;
242 	}
243 
244 	dev = ep->dev;
245 	if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
246 		DMSG("%s, bogus device state\n", __func__);
247 		return -ESHUTDOWN;
248 	}
249 
250 	ep->ep.desc = desc;
251 	ep->stopped = 0;
252 	ep->pio_irqs = 0;
253 	ep->ep.maxpacket = usb_endpoint_maxp (desc);
254 
255 	/* flush fifo (mostly for OUT buffers) */
256 	pxa25x_ep_fifo_flush (_ep);
257 
258 	/* ... reset halt state too, if we could ... */
259 
260 	DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
261 	return 0;
262 }
263 
264 static int pxa25x_ep_disable (struct usb_ep *_ep)
265 {
266 	struct pxa25x_ep	*ep;
267 	unsigned long		flags;
268 
269 	ep = container_of (_ep, struct pxa25x_ep, ep);
270 	if (!_ep || !ep->ep.desc) {
271 		DMSG("%s, %s not enabled\n", __func__,
272 			_ep ? ep->ep.name : NULL);
273 		return -EINVAL;
274 	}
275 	local_irq_save(flags);
276 
277 	nuke (ep, -ESHUTDOWN);
278 
279 	/* flush fifo (mostly for IN buffers) */
280 	pxa25x_ep_fifo_flush (_ep);
281 
282 	ep->ep.desc = NULL;
283 	ep->stopped = 1;
284 
285 	local_irq_restore(flags);
286 	DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
287 	return 0;
288 }
289 
290 /*-------------------------------------------------------------------------*/
291 
292 /* for the pxa25x, these can just wrap kmalloc/kfree.  gadget drivers
293  * must still pass correctly initialized endpoints, since other controller
294  * drivers may care about how it's currently set up (dma issues etc).
295  */
296 
297 /*
298  *	pxa25x_ep_alloc_request - allocate a request data structure
299  */
300 static struct usb_request *
301 pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
302 {
303 	struct pxa25x_request *req;
304 
305 	req = kzalloc(sizeof(*req), gfp_flags);
306 	if (!req)
307 		return NULL;
308 
309 	INIT_LIST_HEAD (&req->queue);
310 	return &req->req;
311 }
312 
313 
314 /*
315  *	pxa25x_ep_free_request - deallocate a request data structure
316  */
317 static void
318 pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
319 {
320 	struct pxa25x_request	*req;
321 
322 	req = container_of (_req, struct pxa25x_request, req);
323 	WARN_ON(!list_empty (&req->queue));
324 	kfree(req);
325 }
326 
327 /*-------------------------------------------------------------------------*/
328 
329 /*
330  *	done - retire a request; caller blocked irqs
331  */
332 static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)
333 {
334 	unsigned		stopped = ep->stopped;
335 
336 	list_del_init(&req->queue);
337 
338 	if (likely (req->req.status == -EINPROGRESS))
339 		req->req.status = status;
340 	else
341 		status = req->req.status;
342 
343 	if (status && status != -ESHUTDOWN)
344 		DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
345 			ep->ep.name, &req->req, status,
346 			req->req.actual, req->req.length);
347 
348 	/* don't modify queue heads during completion callback */
349 	ep->stopped = 1;
350 	usb_gadget_giveback_request(&ep->ep, &req->req);
351 	ep->stopped = stopped;
352 }
353 
354 
355 static inline void ep0_idle (struct pxa25x_udc *dev)
356 {
357 	dev->ep0state = EP0_IDLE;
358 }
359 
360 static int
361 write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
362 {
363 	u8		*buf;
364 	unsigned	length, count;
365 
366 	buf = req->req.buf + req->req.actual;
367 	prefetch(buf);
368 
369 	/* how big will this packet be? */
370 	length = min(req->req.length - req->req.actual, max);
371 	req->req.actual += length;
372 
373 	count = length;
374 	while (likely(count--))
375 		*uddr = *buf++;
376 
377 	return length;
378 }
379 
380 /*
381  * write to an IN endpoint fifo, as many packets as possible.
382  * irqs will use this to write the rest later.
383  * caller guarantees at least one packet buffer is ready (or a zlp).
384  */
385 static int
386 write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
387 {
388 	unsigned		max;
389 
390 	max = usb_endpoint_maxp(ep->ep.desc);
391 	do {
392 		unsigned	count;
393 		int		is_last, is_short;
394 
395 		count = write_packet(ep->reg_uddr, req, max);
396 
397 		/* last packet is usually short (or a zlp) */
398 		if (unlikely (count != max))
399 			is_last = is_short = 1;
400 		else {
401 			if (likely(req->req.length != req->req.actual)
402 					|| req->req.zero)
403 				is_last = 0;
404 			else
405 				is_last = 1;
406 			/* interrupt/iso maxpacket may not fill the fifo */
407 			is_short = unlikely (max < ep->fifo_size);
408 		}
409 
410 		DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
411 			ep->ep.name, count,
412 			is_last ? "/L" : "", is_short ? "/S" : "",
413 			req->req.length - req->req.actual, req);
414 
415 		/* let loose that packet. maybe try writing another one,
416 		 * double buffering might work.  TSP, TPC, and TFS
417 		 * bit values are the same for all normal IN endpoints.
418 		 */
419 		*ep->reg_udccs = UDCCS_BI_TPC;
420 		if (is_short)
421 			*ep->reg_udccs = UDCCS_BI_TSP;
422 
423 		/* requests complete when all IN data is in the FIFO */
424 		if (is_last) {
425 			done (ep, req, 0);
426 			if (list_empty(&ep->queue))
427 				pio_irq_disable (ep->bEndpointAddress);
428 			return 1;
429 		}
430 
431 		// TODO experiment: how robust can fifo mode tweaking be?
432 		// double buffering is off in the default fifo mode, which
433 		// prevents TFS from being set here.
434 
435 	} while (*ep->reg_udccs & UDCCS_BI_TFS);
436 	return 0;
437 }
438 
439 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
440  * ep0 data stage.  these chips want very simple state transitions.
441  */
442 static inline
443 void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
444 {
445 	UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
446 	USIR0 = USIR0_IR0;
447 	dev->req_pending = 0;
448 	DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
449 		__func__, tag, UDCCS0, flags);
450 }
451 
452 static int
453 write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
454 {
455 	unsigned	count;
456 	int		is_short;
457 
458 	count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
459 	ep->dev->stats.write.bytes += count;
460 
461 	/* last packet "must be" short (or a zlp) */
462 	is_short = (count != EP0_FIFO_SIZE);
463 
464 	DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
465 		req->req.length - req->req.actual, req);
466 
467 	if (unlikely (is_short)) {
468 		if (ep->dev->req_pending)
469 			ep0start(ep->dev, UDCCS0_IPR, "short IN");
470 		else
471 			UDCCS0 = UDCCS0_IPR;
472 
473 		count = req->req.length;
474 		done (ep, req, 0);
475 		ep0_idle(ep->dev);
476 #ifndef CONFIG_ARCH_IXP4XX
477 #if 1
478 		/* This seems to get rid of lost status irqs in some cases:
479 		 * host responds quickly, or next request involves config
480 		 * change automagic, or should have been hidden, or ...
481 		 *
482 		 * FIXME get rid of all udelays possible...
483 		 */
484 		if (count >= EP0_FIFO_SIZE) {
485 			count = 100;
486 			do {
487 				if ((UDCCS0 & UDCCS0_OPR) != 0) {
488 					/* clear OPR, generate ack */
489 					UDCCS0 = UDCCS0_OPR;
490 					break;
491 				}
492 				count--;
493 				udelay(1);
494 			} while (count);
495 		}
496 #endif
497 #endif
498 	} else if (ep->dev->req_pending)
499 		ep0start(ep->dev, 0, "IN");
500 	return is_short;
501 }
502 
503 
504 /*
505  * read_fifo -  unload packet(s) from the fifo we use for usb OUT
506  * transfers and put them into the request.  caller should have made
507  * sure there's at least one packet ready.
508  *
509  * returns true if the request completed because of short packet or the
510  * request buffer having filled (and maybe overran till end-of-packet).
511  */
512 static int
513 read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
514 {
515 	for (;;) {
516 		u32		udccs;
517 		u8		*buf;
518 		unsigned	bufferspace, count, is_short;
519 
520 		/* make sure there's a packet in the FIFO.
521 		 * UDCCS_{BO,IO}_RPC are all the same bit value.
522 		 * UDCCS_{BO,IO}_RNE are all the same bit value.
523 		 */
524 		udccs = *ep->reg_udccs;
525 		if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
526 			break;
527 		buf = req->req.buf + req->req.actual;
528 		prefetchw(buf);
529 		bufferspace = req->req.length - req->req.actual;
530 
531 		/* read all bytes from this packet */
532 		if (likely (udccs & UDCCS_BO_RNE)) {
533 			count = 1 + (0x0ff & *ep->reg_ubcr);
534 			req->req.actual += min (count, bufferspace);
535 		} else /* zlp */
536 			count = 0;
537 		is_short = (count < ep->ep.maxpacket);
538 		DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
539 			ep->ep.name, udccs, count,
540 			is_short ? "/S" : "",
541 			req, req->req.actual, req->req.length);
542 		while (likely (count-- != 0)) {
543 			u8	byte = (u8) *ep->reg_uddr;
544 
545 			if (unlikely (bufferspace == 0)) {
546 				/* this happens when the driver's buffer
547 				 * is smaller than what the host sent.
548 				 * discard the extra data.
549 				 */
550 				if (req->req.status != -EOVERFLOW)
551 					DMSG("%s overflow %d\n",
552 						ep->ep.name, count);
553 				req->req.status = -EOVERFLOW;
554 			} else {
555 				*buf++ = byte;
556 				bufferspace--;
557 			}
558 		}
559 		*ep->reg_udccs =  UDCCS_BO_RPC;
560 		/* RPC/RSP/RNE could now reflect the other packet buffer */
561 
562 		/* iso is one request per packet */
563 		if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
564 			if (udccs & UDCCS_IO_ROF)
565 				req->req.status = -EHOSTUNREACH;
566 			/* more like "is_done" */
567 			is_short = 1;
568 		}
569 
570 		/* completion */
571 		if (is_short || req->req.actual == req->req.length) {
572 			done (ep, req, 0);
573 			if (list_empty(&ep->queue))
574 				pio_irq_disable (ep->bEndpointAddress);
575 			return 1;
576 		}
577 
578 		/* finished that packet.  the next one may be waiting... */
579 	}
580 	return 0;
581 }
582 
583 /*
584  * special ep0 version of the above.  no UBCR0 or double buffering; status
585  * handshaking is magic.  most device protocols don't need control-OUT.
586  * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
587  * protocols do use them.
588  */
589 static int
590 read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
591 {
592 	u8		*buf, byte;
593 	unsigned	bufferspace;
594 
595 	buf = req->req.buf + req->req.actual;
596 	bufferspace = req->req.length - req->req.actual;
597 
598 	while (UDCCS0 & UDCCS0_RNE) {
599 		byte = (u8) UDDR0;
600 
601 		if (unlikely (bufferspace == 0)) {
602 			/* this happens when the driver's buffer
603 			 * is smaller than what the host sent.
604 			 * discard the extra data.
605 			 */
606 			if (req->req.status != -EOVERFLOW)
607 				DMSG("%s overflow\n", ep->ep.name);
608 			req->req.status = -EOVERFLOW;
609 		} else {
610 			*buf++ = byte;
611 			req->req.actual++;
612 			bufferspace--;
613 		}
614 	}
615 
616 	UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
617 
618 	/* completion */
619 	if (req->req.actual >= req->req.length)
620 		return 1;
621 
622 	/* finished that packet.  the next one may be waiting... */
623 	return 0;
624 }
625 
626 /*-------------------------------------------------------------------------*/
627 
628 static int
629 pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
630 {
631 	struct pxa25x_request	*req;
632 	struct pxa25x_ep	*ep;
633 	struct pxa25x_udc	*dev;
634 	unsigned long		flags;
635 
636 	req = container_of(_req, struct pxa25x_request, req);
637 	if (unlikely (!_req || !_req->complete || !_req->buf
638 			|| !list_empty(&req->queue))) {
639 		DMSG("%s, bad params\n", __func__);
640 		return -EINVAL;
641 	}
642 
643 	ep = container_of(_ep, struct pxa25x_ep, ep);
644 	if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
645 		DMSG("%s, bad ep\n", __func__);
646 		return -EINVAL;
647 	}
648 
649 	dev = ep->dev;
650 	if (unlikely (!dev->driver
651 			|| dev->gadget.speed == USB_SPEED_UNKNOWN)) {
652 		DMSG("%s, bogus device state\n", __func__);
653 		return -ESHUTDOWN;
654 	}
655 
656 	/* iso is always one packet per request, that's the only way
657 	 * we can report per-packet status.  that also helps with dma.
658 	 */
659 	if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
660 			&& req->req.length > usb_endpoint_maxp(ep->ep.desc)))
661 		return -EMSGSIZE;
662 
663 	DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
664 		_ep->name, _req, _req->length, _req->buf);
665 
666 	local_irq_save(flags);
667 
668 	_req->status = -EINPROGRESS;
669 	_req->actual = 0;
670 
671 	/* kickstart this i/o queue? */
672 	if (list_empty(&ep->queue) && !ep->stopped) {
673 		if (ep->ep.desc == NULL/* ep0 */) {
674 			unsigned	length = _req->length;
675 
676 			switch (dev->ep0state) {
677 			case EP0_IN_DATA_PHASE:
678 				dev->stats.write.ops++;
679 				if (write_ep0_fifo(ep, req))
680 					req = NULL;
681 				break;
682 
683 			case EP0_OUT_DATA_PHASE:
684 				dev->stats.read.ops++;
685 				/* messy ... */
686 				if (dev->req_config) {
687 					DBG(DBG_VERBOSE, "ep0 config ack%s\n",
688 						dev->has_cfr ?  "" : " raced");
689 					if (dev->has_cfr)
690 						UDCCFR = UDCCFR_AREN|UDCCFR_ACM
691 							|UDCCFR_MB1;
692 					done(ep, req, 0);
693 					dev->ep0state = EP0_END_XFER;
694 					local_irq_restore (flags);
695 					return 0;
696 				}
697 				if (dev->req_pending)
698 					ep0start(dev, UDCCS0_IPR, "OUT");
699 				if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
700 						&& read_ep0_fifo(ep, req))) {
701 					ep0_idle(dev);
702 					done(ep, req, 0);
703 					req = NULL;
704 				}
705 				break;
706 
707 			default:
708 				DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
709 				local_irq_restore (flags);
710 				return -EL2HLT;
711 			}
712 		/* can the FIFO can satisfy the request immediately? */
713 		} else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
714 			if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
715 					&& write_fifo(ep, req))
716 				req = NULL;
717 		} else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
718 				&& read_fifo(ep, req)) {
719 			req = NULL;
720 		}
721 
722 		if (likely(req && ep->ep.desc))
723 			pio_irq_enable(ep->bEndpointAddress);
724 	}
725 
726 	/* pio or dma irq handler advances the queue. */
727 	if (likely(req != NULL))
728 		list_add_tail(&req->queue, &ep->queue);
729 	local_irq_restore(flags);
730 
731 	return 0;
732 }
733 
734 
735 /*
736  *	nuke - dequeue ALL requests
737  */
738 static void nuke(struct pxa25x_ep *ep, int status)
739 {
740 	struct pxa25x_request *req;
741 
742 	/* called with irqs blocked */
743 	while (!list_empty(&ep->queue)) {
744 		req = list_entry(ep->queue.next,
745 				struct pxa25x_request,
746 				queue);
747 		done(ep, req, status);
748 	}
749 	if (ep->ep.desc)
750 		pio_irq_disable (ep->bEndpointAddress);
751 }
752 
753 
754 /* dequeue JUST ONE request */
755 static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
756 {
757 	struct pxa25x_ep	*ep;
758 	struct pxa25x_request	*req;
759 	unsigned long		flags;
760 
761 	ep = container_of(_ep, struct pxa25x_ep, ep);
762 	if (!_ep || ep->ep.name == ep0name)
763 		return -EINVAL;
764 
765 	local_irq_save(flags);
766 
767 	/* make sure it's actually queued on this endpoint */
768 	list_for_each_entry (req, &ep->queue, queue) {
769 		if (&req->req == _req)
770 			break;
771 	}
772 	if (&req->req != _req) {
773 		local_irq_restore(flags);
774 		return -EINVAL;
775 	}
776 
777 	done(ep, req, -ECONNRESET);
778 
779 	local_irq_restore(flags);
780 	return 0;
781 }
782 
783 /*-------------------------------------------------------------------------*/
784 
785 static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
786 {
787 	struct pxa25x_ep	*ep;
788 	unsigned long		flags;
789 
790 	ep = container_of(_ep, struct pxa25x_ep, ep);
791 	if (unlikely (!_ep
792 			|| (!ep->ep.desc && ep->ep.name != ep0name))
793 			|| ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
794 		DMSG("%s, bad ep\n", __func__);
795 		return -EINVAL;
796 	}
797 	if (value == 0) {
798 		/* this path (reset toggle+halt) is needed to implement
799 		 * SET_INTERFACE on normal hardware.  but it can't be
800 		 * done from software on the PXA UDC, and the hardware
801 		 * forgets to do it as part of SET_INTERFACE automagic.
802 		 */
803 		DMSG("only host can clear %s halt\n", _ep->name);
804 		return -EROFS;
805 	}
806 
807 	local_irq_save(flags);
808 
809 	if ((ep->bEndpointAddress & USB_DIR_IN) != 0
810 			&& ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
811 			   || !list_empty(&ep->queue))) {
812 		local_irq_restore(flags);
813 		return -EAGAIN;
814 	}
815 
816 	/* FST bit is the same for control, bulk in, bulk out, interrupt in */
817 	*ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
818 
819 	/* ep0 needs special care */
820 	if (!ep->ep.desc) {
821 		start_watchdog(ep->dev);
822 		ep->dev->req_pending = 0;
823 		ep->dev->ep0state = EP0_STALL;
824 
825 	/* and bulk/intr endpoints like dropping stalls too */
826 	} else {
827 		unsigned i;
828 		for (i = 0; i < 1000; i += 20) {
829 			if (*ep->reg_udccs & UDCCS_BI_SST)
830 				break;
831 			udelay(20);
832 		}
833 	}
834 	local_irq_restore(flags);
835 
836 	DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
837 	return 0;
838 }
839 
840 static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
841 {
842 	struct pxa25x_ep        *ep;
843 
844 	ep = container_of(_ep, struct pxa25x_ep, ep);
845 	if (!_ep) {
846 		DMSG("%s, bad ep\n", __func__);
847 		return -ENODEV;
848 	}
849 	/* pxa can't report unclaimed bytes from IN fifos */
850 	if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
851 		return -EOPNOTSUPP;
852 	if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
853 			|| (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
854 		return 0;
855 	else
856 		return (*ep->reg_ubcr & 0xfff) + 1;
857 }
858 
859 static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
860 {
861 	struct pxa25x_ep        *ep;
862 
863 	ep = container_of(_ep, struct pxa25x_ep, ep);
864 	if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
865 		DMSG("%s, bad ep\n", __func__);
866 		return;
867 	}
868 
869 	/* toggle and halt bits stay unchanged */
870 
871 	/* for OUT, just read and discard the FIFO contents. */
872 	if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
873 		while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
874 			(void) *ep->reg_uddr;
875 		return;
876 	}
877 
878 	/* most IN status is the same, but ISO can't stall */
879 	*ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
880 		| (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
881 			? 0 : UDCCS_BI_SST);
882 }
883 
884 
885 static struct usb_ep_ops pxa25x_ep_ops = {
886 	.enable		= pxa25x_ep_enable,
887 	.disable	= pxa25x_ep_disable,
888 
889 	.alloc_request	= pxa25x_ep_alloc_request,
890 	.free_request	= pxa25x_ep_free_request,
891 
892 	.queue		= pxa25x_ep_queue,
893 	.dequeue	= pxa25x_ep_dequeue,
894 
895 	.set_halt	= pxa25x_ep_set_halt,
896 	.fifo_status	= pxa25x_ep_fifo_status,
897 	.fifo_flush	= pxa25x_ep_fifo_flush,
898 };
899 
900 
901 /* ---------------------------------------------------------------------------
902  *	device-scoped parts of the api to the usb controller hardware
903  * ---------------------------------------------------------------------------
904  */
905 
906 static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
907 {
908 	return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
909 }
910 
911 static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
912 {
913 	/* host may not have enabled remote wakeup */
914 	if ((UDCCS0 & UDCCS0_DRWF) == 0)
915 		return -EHOSTUNREACH;
916 	udc_set_mask_UDCCR(UDCCR_RSM);
917 	return 0;
918 }
919 
920 static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);
921 static void udc_enable (struct pxa25x_udc *);
922 static void udc_disable(struct pxa25x_udc *);
923 
924 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
925  * in active use.
926  */
927 static int pullup(struct pxa25x_udc *udc)
928 {
929 	int is_active = udc->vbus && udc->pullup && !udc->suspended;
930 	DMSG("%s\n", is_active ? "active" : "inactive");
931 	if (is_active) {
932 		if (!udc->active) {
933 			udc->active = 1;
934 			/* Enable clock for USB device */
935 			clk_enable(udc->clk);
936 			udc_enable(udc);
937 		}
938 	} else {
939 		if (udc->active) {
940 			if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
941 				DMSG("disconnect %s\n", udc->driver
942 					? udc->driver->driver.name
943 					: "(no driver)");
944 				stop_activity(udc, udc->driver);
945 			}
946 			udc_disable(udc);
947 			/* Disable clock for USB device */
948 			clk_disable(udc->clk);
949 			udc->active = 0;
950 		}
951 
952 	}
953 	return 0;
954 }
955 
956 /* VBUS reporting logically comes from a transceiver */
957 static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
958 {
959 	struct pxa25x_udc	*udc;
960 
961 	udc = container_of(_gadget, struct pxa25x_udc, gadget);
962 	udc->vbus = is_active;
963 	DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
964 	pullup(udc);
965 	return 0;
966 }
967 
968 /* drivers may have software control over D+ pullup */
969 static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)
970 {
971 	struct pxa25x_udc	*udc;
972 
973 	udc = container_of(_gadget, struct pxa25x_udc, gadget);
974 
975 	/* not all boards support pullup control */
976 	if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
977 		return -EOPNOTSUPP;
978 
979 	udc->pullup = (is_active != 0);
980 	pullup(udc);
981 	return 0;
982 }
983 
984 /* boards may consume current from VBUS, up to 100-500mA based on config.
985  * the 500uA suspend ceiling means that exclusively vbus-powered PXA designs
986  * violate USB specs.
987  */
988 static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
989 {
990 	struct pxa25x_udc	*udc;
991 
992 	udc = container_of(_gadget, struct pxa25x_udc, gadget);
993 
994 	if (!IS_ERR_OR_NULL(udc->transceiver))
995 		return usb_phy_set_power(udc->transceiver, mA);
996 	return -EOPNOTSUPP;
997 }
998 
999 static int pxa25x_udc_start(struct usb_gadget *g,
1000 		struct usb_gadget_driver *driver);
1001 static int pxa25x_udc_stop(struct usb_gadget *g);
1002 
1003 static const struct usb_gadget_ops pxa25x_udc_ops = {
1004 	.get_frame	= pxa25x_udc_get_frame,
1005 	.wakeup		= pxa25x_udc_wakeup,
1006 	.vbus_session	= pxa25x_udc_vbus_session,
1007 	.pullup		= pxa25x_udc_pullup,
1008 	.vbus_draw	= pxa25x_udc_vbus_draw,
1009 	.udc_start	= pxa25x_udc_start,
1010 	.udc_stop	= pxa25x_udc_stop,
1011 };
1012 
1013 /*-------------------------------------------------------------------------*/
1014 
1015 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1016 
1017 static int
1018 udc_seq_show(struct seq_file *m, void *_d)
1019 {
1020 	struct pxa25x_udc	*dev = m->private;
1021 	unsigned long		flags;
1022 	int			i;
1023 	u32			tmp;
1024 
1025 	local_irq_save(flags);
1026 
1027 	/* basic device status */
1028 	seq_printf(m, DRIVER_DESC "\n"
1029 		"%s version: %s\nGadget driver: %s\nHost %s\n\n",
1030 		driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1031 		dev->driver ? dev->driver->driver.name : "(none)",
1032 		dev->gadget.speed == USB_SPEED_FULL ? "full speed" : "disconnected");
1033 
1034 	/* registers for device and ep0 */
1035 	seq_printf(m,
1036 		"uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1037 		UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1038 
1039 	tmp = UDCCR;
1040 	seq_printf(m,
1041 		"udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1042 		(tmp & UDCCR_REM) ? " rem" : "",
1043 		(tmp & UDCCR_RSTIR) ? " rstir" : "",
1044 		(tmp & UDCCR_SRM) ? " srm" : "",
1045 		(tmp & UDCCR_SUSIR) ? " susir" : "",
1046 		(tmp & UDCCR_RESIR) ? " resir" : "",
1047 		(tmp & UDCCR_RSM) ? " rsm" : "",
1048 		(tmp & UDCCR_UDA) ? " uda" : "",
1049 		(tmp & UDCCR_UDE) ? " ude" : "");
1050 
1051 	tmp = UDCCS0;
1052 	seq_printf(m,
1053 		"udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1054 		(tmp & UDCCS0_SA) ? " sa" : "",
1055 		(tmp & UDCCS0_RNE) ? " rne" : "",
1056 		(tmp & UDCCS0_FST) ? " fst" : "",
1057 		(tmp & UDCCS0_SST) ? " sst" : "",
1058 		(tmp & UDCCS0_DRWF) ? " dwrf" : "",
1059 		(tmp & UDCCS0_FTF) ? " ftf" : "",
1060 		(tmp & UDCCS0_IPR) ? " ipr" : "",
1061 		(tmp & UDCCS0_OPR) ? " opr" : "");
1062 
1063 	if (dev->has_cfr) {
1064 		tmp = UDCCFR;
1065 		seq_printf(m,
1066 			"udccfr %02X =%s%s\n", tmp,
1067 			(tmp & UDCCFR_AREN) ? " aren" : "",
1068 			(tmp & UDCCFR_ACM) ? " acm" : "");
1069 	}
1070 
1071 	if (dev->gadget.speed != USB_SPEED_FULL || !dev->driver)
1072 		goto done;
1073 
1074 	seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1075 		dev->stats.write.bytes, dev->stats.write.ops,
1076 		dev->stats.read.bytes, dev->stats.read.ops,
1077 		dev->stats.irqs);
1078 
1079 	/* dump endpoint queues */
1080 	for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1081 		struct pxa25x_ep	*ep = &dev->ep [i];
1082 		struct pxa25x_request	*req;
1083 
1084 		if (i != 0) {
1085 			const struct usb_endpoint_descriptor	*desc;
1086 
1087 			desc = ep->ep.desc;
1088 			if (!desc)
1089 				continue;
1090 			tmp = *dev->ep [i].reg_udccs;
1091 			seq_printf(m,
1092 				"%s max %d %s udccs %02x irqs %lu\n",
1093 				ep->ep.name, usb_endpoint_maxp(desc),
1094 				"pio", tmp, ep->pio_irqs);
1095 			/* TODO translate all five groups of udccs bits! */
1096 
1097 		} else /* ep0 should only have one transfer queued */
1098 			seq_printf(m, "ep0 max 16 pio irqs %lu\n",
1099 				ep->pio_irqs);
1100 
1101 		if (list_empty(&ep->queue)) {
1102 			seq_printf(m, "\t(nothing queued)\n");
1103 			continue;
1104 		}
1105 		list_for_each_entry(req, &ep->queue, queue) {
1106 			seq_printf(m,
1107 					"\treq %p len %d/%d buf %p\n",
1108 					&req->req, req->req.actual,
1109 					req->req.length, req->req.buf);
1110 		}
1111 	}
1112 
1113 done:
1114 	local_irq_restore(flags);
1115 	return 0;
1116 }
1117 
1118 static int
1119 udc_debugfs_open(struct inode *inode, struct file *file)
1120 {
1121 	return single_open(file, udc_seq_show, inode->i_private);
1122 }
1123 
1124 static const struct file_operations debug_fops = {
1125 	.open		= udc_debugfs_open,
1126 	.read		= seq_read,
1127 	.llseek		= seq_lseek,
1128 	.release	= single_release,
1129 	.owner		= THIS_MODULE,
1130 };
1131 
1132 #define create_debug_files(dev) \
1133 	do { \
1134 		dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
1135 			S_IRUGO, NULL, dev, &debug_fops); \
1136 	} while (0)
1137 #define remove_debug_files(dev) debugfs_remove(dev->debugfs_udc)
1138 
1139 #else	/* !CONFIG_USB_GADGET_DEBUG_FILES */
1140 
1141 #define create_debug_files(dev) do {} while (0)
1142 #define remove_debug_files(dev) do {} while (0)
1143 
1144 #endif	/* CONFIG_USB_GADGET_DEBUG_FILES */
1145 
1146 /*-------------------------------------------------------------------------*/
1147 
1148 /*
1149  *	udc_disable - disable USB device controller
1150  */
1151 static void udc_disable(struct pxa25x_udc *dev)
1152 {
1153 	/* block all irqs */
1154 	udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1155 	UICR0 = UICR1 = 0xff;
1156 	UFNRH = UFNRH_SIM;
1157 
1158 	/* if hardware supports it, disconnect from usb */
1159 	pullup_off();
1160 
1161 	udc_clear_mask_UDCCR(UDCCR_UDE);
1162 
1163 	ep0_idle (dev);
1164 	dev->gadget.speed = USB_SPEED_UNKNOWN;
1165 }
1166 
1167 
1168 /*
1169  *	udc_reinit - initialize software state
1170  */
1171 static void udc_reinit(struct pxa25x_udc *dev)
1172 {
1173 	u32	i;
1174 
1175 	/* device/ep0 records init */
1176 	INIT_LIST_HEAD (&dev->gadget.ep_list);
1177 	INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1178 	dev->ep0state = EP0_IDLE;
1179 
1180 	/* basic endpoint records init */
1181 	for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1182 		struct pxa25x_ep *ep = &dev->ep[i];
1183 
1184 		if (i != 0)
1185 			list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1186 
1187 		ep->ep.desc = NULL;
1188 		ep->stopped = 0;
1189 		INIT_LIST_HEAD (&ep->queue);
1190 		ep->pio_irqs = 0;
1191 		usb_ep_set_maxpacket_limit(&ep->ep, ep->ep.maxpacket);
1192 	}
1193 
1194 	/* the rest was statically initialized, and is read-only */
1195 }
1196 
1197 /* until it's enabled, this UDC should be completely invisible
1198  * to any USB host.
1199  */
1200 static void udc_enable (struct pxa25x_udc *dev)
1201 {
1202 	udc_clear_mask_UDCCR(UDCCR_UDE);
1203 
1204 	/* try to clear these bits before we enable the udc */
1205 	udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1206 
1207 	ep0_idle(dev);
1208 	dev->gadget.speed = USB_SPEED_UNKNOWN;
1209 	dev->stats.irqs = 0;
1210 
1211 	/*
1212 	 * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1213 	 * - enable UDC
1214 	 * - if RESET is already in progress, ack interrupt
1215 	 * - unmask reset interrupt
1216 	 */
1217 	udc_set_mask_UDCCR(UDCCR_UDE);
1218 	if (!(UDCCR & UDCCR_UDA))
1219 		udc_ack_int_UDCCR(UDCCR_RSTIR);
1220 
1221 	if (dev->has_cfr /* UDC_RES2 is defined */) {
1222 		/* pxa255 (a0+) can avoid a set_config race that could
1223 		 * prevent gadget drivers from configuring correctly
1224 		 */
1225 		UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1226 	} else {
1227 		/* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1228 		 * which could result in missing packets and interrupts.
1229 		 * supposedly one bit per endpoint, controlling whether it
1230 		 * double buffers or not; ACM/AREN bits fit into the holes.
1231 		 * zero bits (like USIR0_IRx) disable double buffering.
1232 		 */
1233 		UDC_RES1 = 0x00;
1234 		UDC_RES2 = 0x00;
1235 	}
1236 
1237 	/* enable suspend/resume and reset irqs */
1238 	udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1239 
1240 	/* enable ep0 irqs */
1241 	UICR0 &= ~UICR0_IM0;
1242 
1243 	/* if hardware supports it, pullup D+ and wait for reset */
1244 	pullup_on();
1245 }
1246 
1247 
1248 /* when a driver is successfully registered, it will receive
1249  * control requests including set_configuration(), which enables
1250  * non-control requests.  then usb traffic follows until a
1251  * disconnect is reported.  then a host may connect again, or
1252  * the driver might get unbound.
1253  */
1254 static int pxa25x_udc_start(struct usb_gadget *g,
1255 		struct usb_gadget_driver *driver)
1256 {
1257 	struct pxa25x_udc	*dev = to_pxa25x(g);
1258 	int			retval;
1259 
1260 	/* first hook up the driver ... */
1261 	dev->driver = driver;
1262 	dev->pullup = 1;
1263 
1264 	/* ... then enable host detection and ep0; and we're ready
1265 	 * for set_configuration as well as eventual disconnect.
1266 	 */
1267 	/* connect to bus through transceiver */
1268 	if (!IS_ERR_OR_NULL(dev->transceiver)) {
1269 		retval = otg_set_peripheral(dev->transceiver->otg,
1270 						&dev->gadget);
1271 		if (retval)
1272 			goto bind_fail;
1273 	}
1274 
1275 	dump_state(dev);
1276 	return 0;
1277 bind_fail:
1278 	return retval;
1279 }
1280 
1281 static void
1282 reset_gadget(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
1283 {
1284 	int i;
1285 
1286 	/* don't disconnect drivers more than once */
1287 	if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1288 		driver = NULL;
1289 	dev->gadget.speed = USB_SPEED_UNKNOWN;
1290 
1291 	/* prevent new request submissions, kill any outstanding requests  */
1292 	for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1293 		struct pxa25x_ep *ep = &dev->ep[i];
1294 
1295 		ep->stopped = 1;
1296 		nuke(ep, -ESHUTDOWN);
1297 	}
1298 	del_timer_sync(&dev->timer);
1299 
1300 	/* report reset; the driver is already quiesced */
1301 	if (driver)
1302 		usb_gadget_udc_reset(&dev->gadget, driver);
1303 
1304 	/* re-init driver-visible data structures */
1305 	udc_reinit(dev);
1306 }
1307 
1308 static void
1309 stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
1310 {
1311 	int i;
1312 
1313 	/* don't disconnect drivers more than once */
1314 	if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1315 		driver = NULL;
1316 	dev->gadget.speed = USB_SPEED_UNKNOWN;
1317 
1318 	/* prevent new request submissions, kill any outstanding requests  */
1319 	for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1320 		struct pxa25x_ep *ep = &dev->ep[i];
1321 
1322 		ep->stopped = 1;
1323 		nuke(ep, -ESHUTDOWN);
1324 	}
1325 	del_timer_sync(&dev->timer);
1326 
1327 	/* report disconnect; the driver is already quiesced */
1328 	if (driver)
1329 		driver->disconnect(&dev->gadget);
1330 
1331 	/* re-init driver-visible data structures */
1332 	udc_reinit(dev);
1333 }
1334 
1335 static int pxa25x_udc_stop(struct usb_gadget*g)
1336 {
1337 	struct pxa25x_udc	*dev = to_pxa25x(g);
1338 
1339 	local_irq_disable();
1340 	dev->pullup = 0;
1341 	stop_activity(dev, NULL);
1342 	local_irq_enable();
1343 
1344 	if (!IS_ERR_OR_NULL(dev->transceiver))
1345 		(void) otg_set_peripheral(dev->transceiver->otg, NULL);
1346 
1347 	dev->driver = NULL;
1348 
1349 	dump_state(dev);
1350 
1351 	return 0;
1352 }
1353 
1354 /*-------------------------------------------------------------------------*/
1355 
1356 #ifdef CONFIG_ARCH_LUBBOCK
1357 
1358 /* Lubbock has separate connect and disconnect irqs.  More typical designs
1359  * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1360  */
1361 
1362 static irqreturn_t
1363 lubbock_vbus_irq(int irq, void *_dev)
1364 {
1365 	struct pxa25x_udc	*dev = _dev;
1366 	int			vbus;
1367 
1368 	dev->stats.irqs++;
1369 	switch (irq) {
1370 	case LUBBOCK_USB_IRQ:
1371 		vbus = 1;
1372 		disable_irq(LUBBOCK_USB_IRQ);
1373 		enable_irq(LUBBOCK_USB_DISC_IRQ);
1374 		break;
1375 	case LUBBOCK_USB_DISC_IRQ:
1376 		vbus = 0;
1377 		disable_irq(LUBBOCK_USB_DISC_IRQ);
1378 		enable_irq(LUBBOCK_USB_IRQ);
1379 		break;
1380 	default:
1381 		return IRQ_NONE;
1382 	}
1383 
1384 	pxa25x_udc_vbus_session(&dev->gadget, vbus);
1385 	return IRQ_HANDLED;
1386 }
1387 
1388 #endif
1389 
1390 
1391 /*-------------------------------------------------------------------------*/
1392 
1393 static inline void clear_ep_state (struct pxa25x_udc *dev)
1394 {
1395 	unsigned i;
1396 
1397 	/* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1398 	 * fifos, and pending transactions mustn't be continued in any case.
1399 	 */
1400 	for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1401 		nuke(&dev->ep[i], -ECONNABORTED);
1402 }
1403 
1404 static void udc_watchdog(unsigned long _dev)
1405 {
1406 	struct pxa25x_udc	*dev = (void *)_dev;
1407 
1408 	local_irq_disable();
1409 	if (dev->ep0state == EP0_STALL
1410 			&& (UDCCS0 & UDCCS0_FST) == 0
1411 			&& (UDCCS0 & UDCCS0_SST) == 0) {
1412 		UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1413 		DBG(DBG_VERBOSE, "ep0 re-stall\n");
1414 		start_watchdog(dev);
1415 	}
1416 	local_irq_enable();
1417 }
1418 
1419 static void handle_ep0 (struct pxa25x_udc *dev)
1420 {
1421 	u32			udccs0 = UDCCS0;
1422 	struct pxa25x_ep	*ep = &dev->ep [0];
1423 	struct pxa25x_request	*req;
1424 	union {
1425 		struct usb_ctrlrequest	r;
1426 		u8			raw [8];
1427 		u32			word [2];
1428 	} u;
1429 
1430 	if (list_empty(&ep->queue))
1431 		req = NULL;
1432 	else
1433 		req = list_entry(ep->queue.next, struct pxa25x_request, queue);
1434 
1435 	/* clear stall status */
1436 	if (udccs0 & UDCCS0_SST) {
1437 		nuke(ep, -EPIPE);
1438 		UDCCS0 = UDCCS0_SST;
1439 		del_timer(&dev->timer);
1440 		ep0_idle(dev);
1441 	}
1442 
1443 	/* previous request unfinished?  non-error iff back-to-back ... */
1444 	if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1445 		nuke(ep, 0);
1446 		del_timer(&dev->timer);
1447 		ep0_idle(dev);
1448 	}
1449 
1450 	switch (dev->ep0state) {
1451 	case EP0_IDLE:
1452 		/* late-breaking status? */
1453 		udccs0 = UDCCS0;
1454 
1455 		/* start control request? */
1456 		if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1457 				== (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1458 			int i;
1459 
1460 			nuke (ep, -EPROTO);
1461 
1462 			/* read SETUP packet */
1463 			for (i = 0; i < 8; i++) {
1464 				if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1465 bad_setup:
1466 					DMSG("SETUP %d!\n", i);
1467 					goto stall;
1468 				}
1469 				u.raw [i] = (u8) UDDR0;
1470 			}
1471 			if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1472 				goto bad_setup;
1473 
1474 got_setup:
1475 			DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1476 				u.r.bRequestType, u.r.bRequest,
1477 				le16_to_cpu(u.r.wValue),
1478 				le16_to_cpu(u.r.wIndex),
1479 				le16_to_cpu(u.r.wLength));
1480 
1481 			/* cope with automagic for some standard requests. */
1482 			dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1483 						== USB_TYPE_STANDARD;
1484 			dev->req_config = 0;
1485 			dev->req_pending = 1;
1486 			switch (u.r.bRequest) {
1487 			/* hardware restricts gadget drivers here! */
1488 			case USB_REQ_SET_CONFIGURATION:
1489 				if (u.r.bRequestType == USB_RECIP_DEVICE) {
1490 					/* reflect hardware's automagic
1491 					 * up to the gadget driver.
1492 					 */
1493 config_change:
1494 					dev->req_config = 1;
1495 					clear_ep_state(dev);
1496 					/* if !has_cfr, there's no synch
1497 					 * else use AREN (later) not SA|OPR
1498 					 * USIR0_IR0 acts edge sensitive
1499 					 */
1500 				}
1501 				break;
1502 			/* ... and here, even more ... */
1503 			case USB_REQ_SET_INTERFACE:
1504 				if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1505 					/* udc hardware is broken by design:
1506 					 *  - altsetting may only be zero;
1507 					 *  - hw resets all interfaces' eps;
1508 					 *  - ep reset doesn't include halt(?).
1509 					 */
1510 					DMSG("broken set_interface (%d/%d)\n",
1511 						le16_to_cpu(u.r.wIndex),
1512 						le16_to_cpu(u.r.wValue));
1513 					goto config_change;
1514 				}
1515 				break;
1516 			/* hardware was supposed to hide this */
1517 			case USB_REQ_SET_ADDRESS:
1518 				if (u.r.bRequestType == USB_RECIP_DEVICE) {
1519 					ep0start(dev, 0, "address");
1520 					return;
1521 				}
1522 				break;
1523 			}
1524 
1525 			if (u.r.bRequestType & USB_DIR_IN)
1526 				dev->ep0state = EP0_IN_DATA_PHASE;
1527 			else
1528 				dev->ep0state = EP0_OUT_DATA_PHASE;
1529 
1530 			i = dev->driver->setup(&dev->gadget, &u.r);
1531 			if (i < 0) {
1532 				/* hardware automagic preventing STALL... */
1533 				if (dev->req_config) {
1534 					/* hardware sometimes neglects to tell
1535 					 * tell us about config change events,
1536 					 * so later ones may fail...
1537 					 */
1538 					WARNING("config change %02x fail %d?\n",
1539 						u.r.bRequest, i);
1540 					return;
1541 					/* TODO experiment:  if has_cfr,
1542 					 * hardware didn't ACK; maybe we
1543 					 * could actually STALL!
1544 					 */
1545 				}
1546 				DBG(DBG_VERBOSE, "protocol STALL, "
1547 					"%02x err %d\n", UDCCS0, i);
1548 stall:
1549 				/* the watchdog timer helps deal with cases
1550 				 * where udc seems to clear FST wrongly, and
1551 				 * then NAKs instead of STALLing.
1552 				 */
1553 				ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1554 				start_watchdog(dev);
1555 				dev->ep0state = EP0_STALL;
1556 
1557 			/* deferred i/o == no response yet */
1558 			} else if (dev->req_pending) {
1559 				if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1560 						|| dev->req_std || u.r.wLength))
1561 					ep0start(dev, 0, "defer");
1562 				else
1563 					ep0start(dev, UDCCS0_IPR, "defer/IPR");
1564 			}
1565 
1566 			/* expect at least one data or status stage irq */
1567 			return;
1568 
1569 		} else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1570 				== (UDCCS0_OPR|UDCCS0_SA))) {
1571 			unsigned i;
1572 
1573 			/* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1574 			 * still observed on a pxa255 a0.
1575 			 */
1576 			DBG(DBG_VERBOSE, "e131\n");
1577 			nuke(ep, -EPROTO);
1578 
1579 			/* read SETUP data, but don't trust it too much */
1580 			for (i = 0; i < 8; i++)
1581 				u.raw [i] = (u8) UDDR0;
1582 			if ((u.r.bRequestType & USB_RECIP_MASK)
1583 					> USB_RECIP_OTHER)
1584 				goto stall;
1585 			if (u.word [0] == 0 && u.word [1] == 0)
1586 				goto stall;
1587 			goto got_setup;
1588 		} else {
1589 			/* some random early IRQ:
1590 			 * - we acked FST
1591 			 * - IPR cleared
1592 			 * - OPR got set, without SA (likely status stage)
1593 			 */
1594 			UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1595 		}
1596 		break;
1597 	case EP0_IN_DATA_PHASE:			/* GET_DESCRIPTOR etc */
1598 		if (udccs0 & UDCCS0_OPR) {
1599 			UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1600 			DBG(DBG_VERBOSE, "ep0in premature status\n");
1601 			if (req)
1602 				done(ep, req, 0);
1603 			ep0_idle(dev);
1604 		} else /* irq was IPR clearing */ {
1605 			if (req) {
1606 				/* this IN packet might finish the request */
1607 				(void) write_ep0_fifo(ep, req);
1608 			} /* else IN token before response was written */
1609 		}
1610 		break;
1611 	case EP0_OUT_DATA_PHASE:		/* SET_DESCRIPTOR etc */
1612 		if (udccs0 & UDCCS0_OPR) {
1613 			if (req) {
1614 				/* this OUT packet might finish the request */
1615 				if (read_ep0_fifo(ep, req))
1616 					done(ep, req, 0);
1617 				/* else more OUT packets expected */
1618 			} /* else OUT token before read was issued */
1619 		} else /* irq was IPR clearing */ {
1620 			DBG(DBG_VERBOSE, "ep0out premature status\n");
1621 			if (req)
1622 				done(ep, req, 0);
1623 			ep0_idle(dev);
1624 		}
1625 		break;
1626 	case EP0_END_XFER:
1627 		if (req)
1628 			done(ep, req, 0);
1629 		/* ack control-IN status (maybe in-zlp was skipped)
1630 		 * also appears after some config change events.
1631 		 */
1632 		if (udccs0 & UDCCS0_OPR)
1633 			UDCCS0 = UDCCS0_OPR;
1634 		ep0_idle(dev);
1635 		break;
1636 	case EP0_STALL:
1637 		UDCCS0 = UDCCS0_FST;
1638 		break;
1639 	}
1640 	USIR0 = USIR0_IR0;
1641 }
1642 
1643 static void handle_ep(struct pxa25x_ep *ep)
1644 {
1645 	struct pxa25x_request	*req;
1646 	int			is_in = ep->bEndpointAddress & USB_DIR_IN;
1647 	int			completed;
1648 	u32			udccs, tmp;
1649 
1650 	do {
1651 		completed = 0;
1652 		if (likely (!list_empty(&ep->queue)))
1653 			req = list_entry(ep->queue.next,
1654 					struct pxa25x_request, queue);
1655 		else
1656 			req = NULL;
1657 
1658 		// TODO check FST handling
1659 
1660 		udccs = *ep->reg_udccs;
1661 		if (unlikely(is_in)) {	/* irq from TPC, SST, or (ISO) TUR */
1662 			tmp = UDCCS_BI_TUR;
1663 			if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1664 				tmp |= UDCCS_BI_SST;
1665 			tmp &= udccs;
1666 			if (likely (tmp))
1667 				*ep->reg_udccs = tmp;
1668 			if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1669 				completed = write_fifo(ep, req);
1670 
1671 		} else {	/* irq from RPC (or for ISO, ROF) */
1672 			if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1673 				tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1674 			else
1675 				tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1676 			tmp &= udccs;
1677 			if (likely(tmp))
1678 				*ep->reg_udccs = tmp;
1679 
1680 			/* fifos can hold packets, ready for reading... */
1681 			if (likely(req)) {
1682 				completed = read_fifo(ep, req);
1683 			} else
1684 				pio_irq_disable (ep->bEndpointAddress);
1685 		}
1686 		ep->pio_irqs++;
1687 	} while (completed);
1688 }
1689 
1690 /*
1691  *	pxa25x_udc_irq - interrupt handler
1692  *
1693  * avoid delays in ep0 processing. the control handshaking isn't always
1694  * under software control (pxa250c0 and the pxa255 are better), and delays
1695  * could cause usb protocol errors.
1696  */
1697 static irqreturn_t
1698 pxa25x_udc_irq(int irq, void *_dev)
1699 {
1700 	struct pxa25x_udc	*dev = _dev;
1701 	int			handled;
1702 
1703 	dev->stats.irqs++;
1704 	do {
1705 		u32		udccr = UDCCR;
1706 
1707 		handled = 0;
1708 
1709 		/* SUSpend Interrupt Request */
1710 		if (unlikely(udccr & UDCCR_SUSIR)) {
1711 			udc_ack_int_UDCCR(UDCCR_SUSIR);
1712 			handled = 1;
1713 			DBG(DBG_VERBOSE, "USB suspend\n");
1714 
1715 			if (dev->gadget.speed != USB_SPEED_UNKNOWN
1716 					&& dev->driver
1717 					&& dev->driver->suspend)
1718 				dev->driver->suspend(&dev->gadget);
1719 			ep0_idle (dev);
1720 		}
1721 
1722 		/* RESume Interrupt Request */
1723 		if (unlikely(udccr & UDCCR_RESIR)) {
1724 			udc_ack_int_UDCCR(UDCCR_RESIR);
1725 			handled = 1;
1726 			DBG(DBG_VERBOSE, "USB resume\n");
1727 
1728 			if (dev->gadget.speed != USB_SPEED_UNKNOWN
1729 					&& dev->driver
1730 					&& dev->driver->resume)
1731 				dev->driver->resume(&dev->gadget);
1732 		}
1733 
1734 		/* ReSeT Interrupt Request - USB reset */
1735 		if (unlikely(udccr & UDCCR_RSTIR)) {
1736 			udc_ack_int_UDCCR(UDCCR_RSTIR);
1737 			handled = 1;
1738 
1739 			if ((UDCCR & UDCCR_UDA) == 0) {
1740 				DBG(DBG_VERBOSE, "USB reset start\n");
1741 
1742 				/* reset driver and endpoints,
1743 				 * in case that's not yet done
1744 				 */
1745 				reset_gadget(dev, dev->driver);
1746 
1747 			} else {
1748 				DBG(DBG_VERBOSE, "USB reset end\n");
1749 				dev->gadget.speed = USB_SPEED_FULL;
1750 				memset(&dev->stats, 0, sizeof dev->stats);
1751 				/* driver and endpoints are still reset */
1752 			}
1753 
1754 		} else {
1755 			u32	usir0 = USIR0 & ~UICR0;
1756 			u32	usir1 = USIR1 & ~UICR1;
1757 			int	i;
1758 
1759 			if (unlikely (!usir0 && !usir1))
1760 				continue;
1761 
1762 			DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1763 
1764 			/* control traffic */
1765 			if (usir0 & USIR0_IR0) {
1766 				dev->ep[0].pio_irqs++;
1767 				handle_ep0(dev);
1768 				handled = 1;
1769 			}
1770 
1771 			/* endpoint data transfers */
1772 			for (i = 0; i < 8; i++) {
1773 				u32	tmp = 1 << i;
1774 
1775 				if (i && (usir0 & tmp)) {
1776 					handle_ep(&dev->ep[i]);
1777 					USIR0 |= tmp;
1778 					handled = 1;
1779 				}
1780 #ifndef	CONFIG_USB_PXA25X_SMALL
1781 				if (usir1 & tmp) {
1782 					handle_ep(&dev->ep[i+8]);
1783 					USIR1 |= tmp;
1784 					handled = 1;
1785 				}
1786 #endif
1787 			}
1788 		}
1789 
1790 		/* we could also ask for 1 msec SOF (SIR) interrupts */
1791 
1792 	} while (handled);
1793 	return IRQ_HANDLED;
1794 }
1795 
1796 /*-------------------------------------------------------------------------*/
1797 
1798 static void nop_release (struct device *dev)
1799 {
1800 	DMSG("%s %s\n", __func__, dev_name(dev));
1801 }
1802 
1803 /* this uses load-time allocation and initialization (instead of
1804  * doing it at run-time) to save code, eliminate fault paths, and
1805  * be more obviously correct.
1806  */
1807 static struct pxa25x_udc memory = {
1808 	.gadget = {
1809 		.ops		= &pxa25x_udc_ops,
1810 		.ep0		= &memory.ep[0].ep,
1811 		.name		= driver_name,
1812 		.dev = {
1813 			.init_name	= "gadget",
1814 			.release	= nop_release,
1815 		},
1816 	},
1817 
1818 	/* control endpoint */
1819 	.ep[0] = {
1820 		.ep = {
1821 			.name		= ep0name,
1822 			.ops		= &pxa25x_ep_ops,
1823 			.maxpacket	= EP0_FIFO_SIZE,
1824 		},
1825 		.dev		= &memory,
1826 		.reg_udccs	= &UDCCS0,
1827 		.reg_uddr	= &UDDR0,
1828 	},
1829 
1830 	/* first group of endpoints */
1831 	.ep[1] = {
1832 		.ep = {
1833 			.name		= "ep1in-bulk",
1834 			.ops		= &pxa25x_ep_ops,
1835 			.maxpacket	= BULK_FIFO_SIZE,
1836 		},
1837 		.dev		= &memory,
1838 		.fifo_size	= BULK_FIFO_SIZE,
1839 		.bEndpointAddress = USB_DIR_IN | 1,
1840 		.bmAttributes	= USB_ENDPOINT_XFER_BULK,
1841 		.reg_udccs	= &UDCCS1,
1842 		.reg_uddr	= &UDDR1,
1843 	},
1844 	.ep[2] = {
1845 		.ep = {
1846 			.name		= "ep2out-bulk",
1847 			.ops		= &pxa25x_ep_ops,
1848 			.maxpacket	= BULK_FIFO_SIZE,
1849 		},
1850 		.dev		= &memory,
1851 		.fifo_size	= BULK_FIFO_SIZE,
1852 		.bEndpointAddress = 2,
1853 		.bmAttributes	= USB_ENDPOINT_XFER_BULK,
1854 		.reg_udccs	= &UDCCS2,
1855 		.reg_ubcr	= &UBCR2,
1856 		.reg_uddr	= &UDDR2,
1857 	},
1858 #ifndef CONFIG_USB_PXA25X_SMALL
1859 	.ep[3] = {
1860 		.ep = {
1861 			.name		= "ep3in-iso",
1862 			.ops		= &pxa25x_ep_ops,
1863 			.maxpacket	= ISO_FIFO_SIZE,
1864 		},
1865 		.dev		= &memory,
1866 		.fifo_size	= ISO_FIFO_SIZE,
1867 		.bEndpointAddress = USB_DIR_IN | 3,
1868 		.bmAttributes	= USB_ENDPOINT_XFER_ISOC,
1869 		.reg_udccs	= &UDCCS3,
1870 		.reg_uddr	= &UDDR3,
1871 	},
1872 	.ep[4] = {
1873 		.ep = {
1874 			.name		= "ep4out-iso",
1875 			.ops		= &pxa25x_ep_ops,
1876 			.maxpacket	= ISO_FIFO_SIZE,
1877 		},
1878 		.dev		= &memory,
1879 		.fifo_size	= ISO_FIFO_SIZE,
1880 		.bEndpointAddress = 4,
1881 		.bmAttributes	= USB_ENDPOINT_XFER_ISOC,
1882 		.reg_udccs	= &UDCCS4,
1883 		.reg_ubcr	= &UBCR4,
1884 		.reg_uddr	= &UDDR4,
1885 	},
1886 	.ep[5] = {
1887 		.ep = {
1888 			.name		= "ep5in-int",
1889 			.ops		= &pxa25x_ep_ops,
1890 			.maxpacket	= INT_FIFO_SIZE,
1891 		},
1892 		.dev		= &memory,
1893 		.fifo_size	= INT_FIFO_SIZE,
1894 		.bEndpointAddress = USB_DIR_IN | 5,
1895 		.bmAttributes	= USB_ENDPOINT_XFER_INT,
1896 		.reg_udccs	= &UDCCS5,
1897 		.reg_uddr	= &UDDR5,
1898 	},
1899 
1900 	/* second group of endpoints */
1901 	.ep[6] = {
1902 		.ep = {
1903 			.name		= "ep6in-bulk",
1904 			.ops		= &pxa25x_ep_ops,
1905 			.maxpacket	= BULK_FIFO_SIZE,
1906 		},
1907 		.dev		= &memory,
1908 		.fifo_size	= BULK_FIFO_SIZE,
1909 		.bEndpointAddress = USB_DIR_IN | 6,
1910 		.bmAttributes	= USB_ENDPOINT_XFER_BULK,
1911 		.reg_udccs	= &UDCCS6,
1912 		.reg_uddr	= &UDDR6,
1913 	},
1914 	.ep[7] = {
1915 		.ep = {
1916 			.name		= "ep7out-bulk",
1917 			.ops		= &pxa25x_ep_ops,
1918 			.maxpacket	= BULK_FIFO_SIZE,
1919 		},
1920 		.dev		= &memory,
1921 		.fifo_size	= BULK_FIFO_SIZE,
1922 		.bEndpointAddress = 7,
1923 		.bmAttributes	= USB_ENDPOINT_XFER_BULK,
1924 		.reg_udccs	= &UDCCS7,
1925 		.reg_ubcr	= &UBCR7,
1926 		.reg_uddr	= &UDDR7,
1927 	},
1928 	.ep[8] = {
1929 		.ep = {
1930 			.name		= "ep8in-iso",
1931 			.ops		= &pxa25x_ep_ops,
1932 			.maxpacket	= ISO_FIFO_SIZE,
1933 		},
1934 		.dev		= &memory,
1935 		.fifo_size	= ISO_FIFO_SIZE,
1936 		.bEndpointAddress = USB_DIR_IN | 8,
1937 		.bmAttributes	= USB_ENDPOINT_XFER_ISOC,
1938 		.reg_udccs	= &UDCCS8,
1939 		.reg_uddr	= &UDDR8,
1940 	},
1941 	.ep[9] = {
1942 		.ep = {
1943 			.name		= "ep9out-iso",
1944 			.ops		= &pxa25x_ep_ops,
1945 			.maxpacket	= ISO_FIFO_SIZE,
1946 		},
1947 		.dev		= &memory,
1948 		.fifo_size	= ISO_FIFO_SIZE,
1949 		.bEndpointAddress = 9,
1950 		.bmAttributes	= USB_ENDPOINT_XFER_ISOC,
1951 		.reg_udccs	= &UDCCS9,
1952 		.reg_ubcr	= &UBCR9,
1953 		.reg_uddr	= &UDDR9,
1954 	},
1955 	.ep[10] = {
1956 		.ep = {
1957 			.name		= "ep10in-int",
1958 			.ops		= &pxa25x_ep_ops,
1959 			.maxpacket	= INT_FIFO_SIZE,
1960 		},
1961 		.dev		= &memory,
1962 		.fifo_size	= INT_FIFO_SIZE,
1963 		.bEndpointAddress = USB_DIR_IN | 10,
1964 		.bmAttributes	= USB_ENDPOINT_XFER_INT,
1965 		.reg_udccs	= &UDCCS10,
1966 		.reg_uddr	= &UDDR10,
1967 	},
1968 
1969 	/* third group of endpoints */
1970 	.ep[11] = {
1971 		.ep = {
1972 			.name		= "ep11in-bulk",
1973 			.ops		= &pxa25x_ep_ops,
1974 			.maxpacket	= BULK_FIFO_SIZE,
1975 		},
1976 		.dev		= &memory,
1977 		.fifo_size	= BULK_FIFO_SIZE,
1978 		.bEndpointAddress = USB_DIR_IN | 11,
1979 		.bmAttributes	= USB_ENDPOINT_XFER_BULK,
1980 		.reg_udccs	= &UDCCS11,
1981 		.reg_uddr	= &UDDR11,
1982 	},
1983 	.ep[12] = {
1984 		.ep = {
1985 			.name		= "ep12out-bulk",
1986 			.ops		= &pxa25x_ep_ops,
1987 			.maxpacket	= BULK_FIFO_SIZE,
1988 		},
1989 		.dev		= &memory,
1990 		.fifo_size	= BULK_FIFO_SIZE,
1991 		.bEndpointAddress = 12,
1992 		.bmAttributes	= USB_ENDPOINT_XFER_BULK,
1993 		.reg_udccs	= &UDCCS12,
1994 		.reg_ubcr	= &UBCR12,
1995 		.reg_uddr	= &UDDR12,
1996 	},
1997 	.ep[13] = {
1998 		.ep = {
1999 			.name		= "ep13in-iso",
2000 			.ops		= &pxa25x_ep_ops,
2001 			.maxpacket	= ISO_FIFO_SIZE,
2002 		},
2003 		.dev		= &memory,
2004 		.fifo_size	= ISO_FIFO_SIZE,
2005 		.bEndpointAddress = USB_DIR_IN | 13,
2006 		.bmAttributes	= USB_ENDPOINT_XFER_ISOC,
2007 		.reg_udccs	= &UDCCS13,
2008 		.reg_uddr	= &UDDR13,
2009 	},
2010 	.ep[14] = {
2011 		.ep = {
2012 			.name		= "ep14out-iso",
2013 			.ops		= &pxa25x_ep_ops,
2014 			.maxpacket	= ISO_FIFO_SIZE,
2015 		},
2016 		.dev		= &memory,
2017 		.fifo_size	= ISO_FIFO_SIZE,
2018 		.bEndpointAddress = 14,
2019 		.bmAttributes	= USB_ENDPOINT_XFER_ISOC,
2020 		.reg_udccs	= &UDCCS14,
2021 		.reg_ubcr	= &UBCR14,
2022 		.reg_uddr	= &UDDR14,
2023 	},
2024 	.ep[15] = {
2025 		.ep = {
2026 			.name		= "ep15in-int",
2027 			.ops		= &pxa25x_ep_ops,
2028 			.maxpacket	= INT_FIFO_SIZE,
2029 		},
2030 		.dev		= &memory,
2031 		.fifo_size	= INT_FIFO_SIZE,
2032 		.bEndpointAddress = USB_DIR_IN | 15,
2033 		.bmAttributes	= USB_ENDPOINT_XFER_INT,
2034 		.reg_udccs	= &UDCCS15,
2035 		.reg_uddr	= &UDDR15,
2036 	},
2037 #endif /* !CONFIG_USB_PXA25X_SMALL */
2038 };
2039 
2040 #define CP15R0_VENDOR_MASK	0xffffe000
2041 
2042 #if	defined(CONFIG_ARCH_PXA)
2043 #define CP15R0_XSCALE_VALUE	0x69052000	/* intel/arm/xscale */
2044 
2045 #elif	defined(CONFIG_ARCH_IXP4XX)
2046 #define CP15R0_XSCALE_VALUE	0x69054000	/* intel/arm/ixp4xx */
2047 
2048 #endif
2049 
2050 #define CP15R0_PROD_MASK	0x000003f0
2051 #define PXA25x			0x00000100	/* and PXA26x */
2052 #define PXA210			0x00000120
2053 
2054 #define CP15R0_REV_MASK		0x0000000f
2055 
2056 #define CP15R0_PRODREV_MASK	(CP15R0_PROD_MASK | CP15R0_REV_MASK)
2057 
2058 #define PXA255_A0		0x00000106	/* or PXA260_B1 */
2059 #define PXA250_C0		0x00000105	/* or PXA26x_B0 */
2060 #define PXA250_B2		0x00000104
2061 #define PXA250_B1		0x00000103	/* or PXA260_A0 */
2062 #define PXA250_B0		0x00000102
2063 #define PXA250_A1		0x00000101
2064 #define PXA250_A0		0x00000100
2065 
2066 #define PXA210_C0		0x00000125
2067 #define PXA210_B2		0x00000124
2068 #define PXA210_B1		0x00000123
2069 #define PXA210_B0		0x00000122
2070 #define IXP425_A0		0x000001c1
2071 #define IXP425_B0		0x000001f1
2072 #define IXP465_AD		0x00000200
2073 
2074 /*
2075  *	probe - binds to the platform device
2076  */
2077 static int pxa25x_udc_probe(struct platform_device *pdev)
2078 {
2079 	struct pxa25x_udc *dev = &memory;
2080 	int retval, irq;
2081 	u32 chiprev;
2082 
2083 	pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2084 
2085 	/* insist on Intel/ARM/XScale */
2086 	asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2087 	if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2088 		pr_err("%s: not XScale!\n", driver_name);
2089 		return -ENODEV;
2090 	}
2091 
2092 	/* trigger chiprev-specific logic */
2093 	switch (chiprev & CP15R0_PRODREV_MASK) {
2094 #if	defined(CONFIG_ARCH_PXA)
2095 	case PXA255_A0:
2096 		dev->has_cfr = 1;
2097 		break;
2098 	case PXA250_A0:
2099 	case PXA250_A1:
2100 		/* A0/A1 "not released"; ep 13, 15 unusable */
2101 		/* fall through */
2102 	case PXA250_B2: case PXA210_B2:
2103 	case PXA250_B1: case PXA210_B1:
2104 	case PXA250_B0: case PXA210_B0:
2105 		/* OUT-DMA is broken ... */
2106 		/* fall through */
2107 	case PXA250_C0: case PXA210_C0:
2108 		break;
2109 #elif	defined(CONFIG_ARCH_IXP4XX)
2110 	case IXP425_A0:
2111 	case IXP425_B0:
2112 	case IXP465_AD:
2113 		dev->has_cfr = 1;
2114 		break;
2115 #endif
2116 	default:
2117 		pr_err("%s: unrecognized processor: %08x\n",
2118 			driver_name, chiprev);
2119 		/* iop3xx, ixp4xx, ... */
2120 		return -ENODEV;
2121 	}
2122 
2123 	irq = platform_get_irq(pdev, 0);
2124 	if (irq < 0)
2125 		return -ENODEV;
2126 
2127 	dev->clk = devm_clk_get(&pdev->dev, NULL);
2128 	if (IS_ERR(dev->clk))
2129 		return PTR_ERR(dev->clk);
2130 
2131 	pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2132 		dev->has_cfr ? "" : " (!cfr)",
2133 		SIZE_STR "(pio)"
2134 		);
2135 
2136 	/* other non-static parts of init */
2137 	dev->dev = &pdev->dev;
2138 	dev->mach = dev_get_platdata(&pdev->dev);
2139 
2140 	dev->transceiver = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2);
2141 
2142 	if (gpio_is_valid(dev->mach->gpio_pullup)) {
2143 		retval = devm_gpio_request(&pdev->dev, dev->mach->gpio_pullup,
2144 					   "pca25x_udc GPIO PULLUP");
2145 		if (retval) {
2146 			dev_dbg(&pdev->dev,
2147 				"can't get pullup gpio %d, err: %d\n",
2148 				dev->mach->gpio_pullup, retval);
2149 			goto err;
2150 		}
2151 		gpio_direction_output(dev->mach->gpio_pullup, 0);
2152 	}
2153 
2154 	init_timer(&dev->timer);
2155 	dev->timer.function = udc_watchdog;
2156 	dev->timer.data = (unsigned long) dev;
2157 
2158 	the_controller = dev;
2159 	platform_set_drvdata(pdev, dev);
2160 
2161 	udc_disable(dev);
2162 	udc_reinit(dev);
2163 
2164 	dev->vbus = 0;
2165 
2166 	/* irq setup after old hardware state is cleaned up */
2167 	retval = devm_request_irq(&pdev->dev, irq, pxa25x_udc_irq, 0,
2168 				  driver_name, dev);
2169 	if (retval != 0) {
2170 		pr_err("%s: can't get irq %d, err %d\n",
2171 			driver_name, irq, retval);
2172 		goto err;
2173 	}
2174 	dev->got_irq = 1;
2175 
2176 #ifdef CONFIG_ARCH_LUBBOCK
2177 	if (machine_is_lubbock()) {
2178 		retval = devm_request_irq(&pdev->dev, LUBBOCK_USB_DISC_IRQ,
2179 					  lubbock_vbus_irq, 0, driver_name,
2180 					  dev);
2181 		if (retval != 0) {
2182 			pr_err("%s: can't get irq %i, err %d\n",
2183 				driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2184 			goto err;
2185 		}
2186 		retval = devm_request_irq(&pdev->dev, LUBBOCK_USB_IRQ,
2187 					  lubbock_vbus_irq, 0, driver_name,
2188 					  dev);
2189 		if (retval != 0) {
2190 			pr_err("%s: can't get irq %i, err %d\n",
2191 				driver_name, LUBBOCK_USB_IRQ, retval);
2192 			goto err;
2193 		}
2194 	} else
2195 #endif
2196 	create_debug_files(dev);
2197 
2198 	retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);
2199 	if (!retval)
2200 		return retval;
2201 
2202 	remove_debug_files(dev);
2203  err:
2204 	if (!IS_ERR_OR_NULL(dev->transceiver))
2205 		dev->transceiver = NULL;
2206 	return retval;
2207 }
2208 
2209 static void pxa25x_udc_shutdown(struct platform_device *_dev)
2210 {
2211 	pullup_off();
2212 }
2213 
2214 static int pxa25x_udc_remove(struct platform_device *pdev)
2215 {
2216 	struct pxa25x_udc *dev = platform_get_drvdata(pdev);
2217 
2218 	if (dev->driver)
2219 		return -EBUSY;
2220 
2221 	usb_del_gadget_udc(&dev->gadget);
2222 	dev->pullup = 0;
2223 	pullup(dev);
2224 
2225 	remove_debug_files(dev);
2226 
2227 	if (!IS_ERR_OR_NULL(dev->transceiver))
2228 		dev->transceiver = NULL;
2229 
2230 	the_controller = NULL;
2231 	return 0;
2232 }
2233 
2234 /*-------------------------------------------------------------------------*/
2235 
2236 #ifdef	CONFIG_PM
2237 
2238 /* USB suspend (controlled by the host) and system suspend (controlled
2239  * by the PXA) don't necessarily work well together.  If USB is active,
2240  * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2241  * mode, or any deeper PM saving state.
2242  *
2243  * For now, we punt and forcibly disconnect from the USB host when PXA
2244  * enters any suspend state.  While we're disconnected, we always disable
2245  * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2246  * Boards without software pullup control shouldn't use those states.
2247  * VBUS IRQs should probably be ignored so that the PXA device just acts
2248  * "dead" to USB hosts until system resume.
2249  */
2250 static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)
2251 {
2252 	struct pxa25x_udc	*udc = platform_get_drvdata(dev);
2253 	unsigned long flags;
2254 
2255 	if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
2256 		WARNING("USB host won't detect disconnect!\n");
2257 	udc->suspended = 1;
2258 
2259 	local_irq_save(flags);
2260 	pullup(udc);
2261 	local_irq_restore(flags);
2262 
2263 	return 0;
2264 }
2265 
2266 static int pxa25x_udc_resume(struct platform_device *dev)
2267 {
2268 	struct pxa25x_udc	*udc = platform_get_drvdata(dev);
2269 	unsigned long flags;
2270 
2271 	udc->suspended = 0;
2272 	local_irq_save(flags);
2273 	pullup(udc);
2274 	local_irq_restore(flags);
2275 
2276 	return 0;
2277 }
2278 
2279 #else
2280 #define	pxa25x_udc_suspend	NULL
2281 #define	pxa25x_udc_resume	NULL
2282 #endif
2283 
2284 /*-------------------------------------------------------------------------*/
2285 
2286 static struct platform_driver udc_driver = {
2287 	.shutdown	= pxa25x_udc_shutdown,
2288 	.probe		= pxa25x_udc_probe,
2289 	.remove		= pxa25x_udc_remove,
2290 	.suspend	= pxa25x_udc_suspend,
2291 	.resume		= pxa25x_udc_resume,
2292 	.driver		= {
2293 		.name	= "pxa25x-udc",
2294 	},
2295 };
2296 
2297 module_platform_driver(udc_driver);
2298 
2299 MODULE_DESCRIPTION(DRIVER_DESC);
2300 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2301 MODULE_LICENSE("GPL");
2302 MODULE_ALIAS("platform:pxa25x-udc");
2303