1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 290fccb52SAndrzej Pietrasiewicz /* 390fccb52SAndrzej Pietrasiewicz * omap_udc.h -- for omap 3.2 udc, with OTG support 490fccb52SAndrzej Pietrasiewicz * 590fccb52SAndrzej Pietrasiewicz * 2004 (C) Texas Instruments, Inc. 690fccb52SAndrzej Pietrasiewicz * 2004 (C) David Brownell 790fccb52SAndrzej Pietrasiewicz */ 890fccb52SAndrzej Pietrasiewicz 990fccb52SAndrzej Pietrasiewicz /* 1090fccb52SAndrzej Pietrasiewicz * USB device/endpoint management registers 1190fccb52SAndrzej Pietrasiewicz */ 1290fccb52SAndrzej Pietrasiewicz 1390fccb52SAndrzej Pietrasiewicz #define UDC_REV (UDC_BASE + 0x0) /* Revision */ 1490fccb52SAndrzej Pietrasiewicz #define UDC_EP_NUM (UDC_BASE + 0x4) /* Which endpoint */ 1590fccb52SAndrzej Pietrasiewicz # define UDC_SETUP_SEL (1 << 6) 1690fccb52SAndrzej Pietrasiewicz # define UDC_EP_SEL (1 << 5) 1790fccb52SAndrzej Pietrasiewicz # define UDC_EP_DIR (1 << 4) 1890fccb52SAndrzej Pietrasiewicz /* low 4 bits for endpoint number */ 1990fccb52SAndrzej Pietrasiewicz #define UDC_DATA (UDC_BASE + 0x08) /* Endpoint FIFO */ 2090fccb52SAndrzej Pietrasiewicz #define UDC_CTRL (UDC_BASE + 0x0C) /* Endpoint control */ 2190fccb52SAndrzej Pietrasiewicz # define UDC_CLR_HALT (1 << 7) 2290fccb52SAndrzej Pietrasiewicz # define UDC_SET_HALT (1 << 6) 2390fccb52SAndrzej Pietrasiewicz # define UDC_CLRDATA_TOGGLE (1 << 3) 2490fccb52SAndrzej Pietrasiewicz # define UDC_SET_FIFO_EN (1 << 2) 2590fccb52SAndrzej Pietrasiewicz # define UDC_CLR_EP (1 << 1) 2690fccb52SAndrzej Pietrasiewicz # define UDC_RESET_EP (1 << 0) 2790fccb52SAndrzej Pietrasiewicz #define UDC_STAT_FLG (UDC_BASE + 0x10) /* Endpoint status */ 2890fccb52SAndrzej Pietrasiewicz # define UDC_NO_RXPACKET (1 << 15) 2990fccb52SAndrzej Pietrasiewicz # define UDC_MISS_IN (1 << 14) 3090fccb52SAndrzej Pietrasiewicz # define UDC_DATA_FLUSH (1 << 13) 3190fccb52SAndrzej Pietrasiewicz # define UDC_ISO_ERR (1 << 12) 3290fccb52SAndrzej Pietrasiewicz # define UDC_ISO_FIFO_EMPTY (1 << 9) 3390fccb52SAndrzej Pietrasiewicz # define UDC_ISO_FIFO_FULL (1 << 8) 3490fccb52SAndrzej Pietrasiewicz # define UDC_EP_HALTED (1 << 6) 3590fccb52SAndrzej Pietrasiewicz # define UDC_STALL (1 << 5) 3690fccb52SAndrzej Pietrasiewicz # define UDC_NAK (1 << 4) 3790fccb52SAndrzej Pietrasiewicz # define UDC_ACK (1 << 3) 3890fccb52SAndrzej Pietrasiewicz # define UDC_FIFO_EN (1 << 2) 3990fccb52SAndrzej Pietrasiewicz # define UDC_NON_ISO_FIFO_EMPTY (1 << 1) 4090fccb52SAndrzej Pietrasiewicz # define UDC_NON_ISO_FIFO_FULL (1 << 0) 4190fccb52SAndrzej Pietrasiewicz #define UDC_RXFSTAT (UDC_BASE + 0x14) /* OUT bytecount */ 4290fccb52SAndrzej Pietrasiewicz #define UDC_SYSCON1 (UDC_BASE + 0x18) /* System config 1 */ 4390fccb52SAndrzej Pietrasiewicz # define UDC_CFG_LOCK (1 << 8) 4490fccb52SAndrzej Pietrasiewicz # define UDC_DATA_ENDIAN (1 << 7) 4590fccb52SAndrzej Pietrasiewicz # define UDC_DMA_ENDIAN (1 << 6) 4690fccb52SAndrzej Pietrasiewicz # define UDC_NAK_EN (1 << 4) 4790fccb52SAndrzej Pietrasiewicz # define UDC_AUTODECODE_DIS (1 << 3) 4890fccb52SAndrzej Pietrasiewicz # define UDC_SELF_PWR (1 << 2) 4990fccb52SAndrzej Pietrasiewicz # define UDC_SOFF_DIS (1 << 1) 5090fccb52SAndrzej Pietrasiewicz # define UDC_PULLUP_EN (1 << 0) 5190fccb52SAndrzej Pietrasiewicz #define UDC_SYSCON2 (UDC_BASE + 0x1C) /* System config 2 */ 5290fccb52SAndrzej Pietrasiewicz # define UDC_RMT_WKP (1 << 6) 5390fccb52SAndrzej Pietrasiewicz # define UDC_STALL_CMD (1 << 5) 5490fccb52SAndrzej Pietrasiewicz # define UDC_DEV_CFG (1 << 3) 5590fccb52SAndrzej Pietrasiewicz # define UDC_CLR_CFG (1 << 2) 5690fccb52SAndrzej Pietrasiewicz #define UDC_DEVSTAT (UDC_BASE + 0x20) /* Device status */ 5790fccb52SAndrzej Pietrasiewicz # define UDC_B_HNP_ENABLE (1 << 9) 5890fccb52SAndrzej Pietrasiewicz # define UDC_A_HNP_SUPPORT (1 << 8) 5990fccb52SAndrzej Pietrasiewicz # define UDC_A_ALT_HNP_SUPPORT (1 << 7) 6090fccb52SAndrzej Pietrasiewicz # define UDC_R_WK_OK (1 << 6) 6190fccb52SAndrzej Pietrasiewicz # define UDC_USB_RESET (1 << 5) 6290fccb52SAndrzej Pietrasiewicz # define UDC_SUS (1 << 4) 6390fccb52SAndrzej Pietrasiewicz # define UDC_CFG (1 << 3) 6490fccb52SAndrzej Pietrasiewicz # define UDC_ADD (1 << 2) 6590fccb52SAndrzej Pietrasiewicz # define UDC_DEF (1 << 1) 6690fccb52SAndrzej Pietrasiewicz # define UDC_ATT (1 << 0) 6790fccb52SAndrzej Pietrasiewicz #define UDC_SOF (UDC_BASE + 0x24) /* Start of frame */ 6890fccb52SAndrzej Pietrasiewicz # define UDC_FT_LOCK (1 << 12) 6990fccb52SAndrzej Pietrasiewicz # define UDC_TS_OK (1 << 11) 7090fccb52SAndrzej Pietrasiewicz # define UDC_TS 0x03ff 7190fccb52SAndrzej Pietrasiewicz #define UDC_IRQ_EN (UDC_BASE + 0x28) /* Interrupt enable */ 7290fccb52SAndrzej Pietrasiewicz # define UDC_SOF_IE (1 << 7) 7390fccb52SAndrzej Pietrasiewicz # define UDC_EPN_RX_IE (1 << 5) 7490fccb52SAndrzej Pietrasiewicz # define UDC_EPN_TX_IE (1 << 4) 7590fccb52SAndrzej Pietrasiewicz # define UDC_DS_CHG_IE (1 << 3) 7690fccb52SAndrzej Pietrasiewicz # define UDC_EP0_IE (1 << 0) 7790fccb52SAndrzej Pietrasiewicz #define UDC_DMA_IRQ_EN (UDC_BASE + 0x2C) /* DMA irq enable */ 7890fccb52SAndrzej Pietrasiewicz /* rx/tx dma channels numbered 1-3 not 0-2 */ 7990fccb52SAndrzej Pietrasiewicz # define UDC_TX_DONE_IE(n) (1 << (4 * (n) - 2)) 8090fccb52SAndrzej Pietrasiewicz # define UDC_RX_CNT_IE(n) (1 << (4 * (n) - 3)) 8190fccb52SAndrzej Pietrasiewicz # define UDC_RX_EOT_IE(n) (1 << (4 * (n) - 4)) 8290fccb52SAndrzej Pietrasiewicz #define UDC_IRQ_SRC (UDC_BASE + 0x30) /* Interrupt source */ 8390fccb52SAndrzej Pietrasiewicz # define UDC_TXN_DONE (1 << 10) 8490fccb52SAndrzej Pietrasiewicz # define UDC_RXN_CNT (1 << 9) 8590fccb52SAndrzej Pietrasiewicz # define UDC_RXN_EOT (1 << 8) 8690fccb52SAndrzej Pietrasiewicz # define UDC_IRQ_SOF (1 << 7) 8790fccb52SAndrzej Pietrasiewicz # define UDC_EPN_RX (1 << 5) 8890fccb52SAndrzej Pietrasiewicz # define UDC_EPN_TX (1 << 4) 8990fccb52SAndrzej Pietrasiewicz # define UDC_DS_CHG (1 << 3) 9090fccb52SAndrzej Pietrasiewicz # define UDC_SETUP (1 << 2) 9190fccb52SAndrzej Pietrasiewicz # define UDC_EP0_RX (1 << 1) 9290fccb52SAndrzej Pietrasiewicz # define UDC_EP0_TX (1 << 0) 9390fccb52SAndrzej Pietrasiewicz # define UDC_IRQ_SRC_MASK 0x7bf 9490fccb52SAndrzej Pietrasiewicz #define UDC_EPN_STAT (UDC_BASE + 0x34) /* EP irq status */ 9590fccb52SAndrzej Pietrasiewicz #define UDC_DMAN_STAT (UDC_BASE + 0x38) /* DMA irq status */ 9690fccb52SAndrzej Pietrasiewicz # define UDC_DMA_RX_SB (1 << 12) 9790fccb52SAndrzej Pietrasiewicz # define UDC_DMA_RX_SRC(x) (((x)>>8) & 0xf) 9890fccb52SAndrzej Pietrasiewicz # define UDC_DMA_TX_SRC(x) (((x)>>0) & 0xf) 9990fccb52SAndrzej Pietrasiewicz 10090fccb52SAndrzej Pietrasiewicz 10190fccb52SAndrzej Pietrasiewicz /* DMA configuration registers: up to three channels in each direction. */ 10290fccb52SAndrzej Pietrasiewicz #define UDC_RXDMA_CFG (UDC_BASE + 0x40) /* 3 eps for RX DMA */ 10390fccb52SAndrzej Pietrasiewicz # define UDC_DMA_REQ (1 << 12) 10490fccb52SAndrzej Pietrasiewicz #define UDC_TXDMA_CFG (UDC_BASE + 0x44) /* 3 eps for TX DMA */ 10590fccb52SAndrzej Pietrasiewicz #define UDC_DATA_DMA (UDC_BASE + 0x48) /* rx/tx fifo addr */ 10690fccb52SAndrzej Pietrasiewicz 10790fccb52SAndrzej Pietrasiewicz /* rx/tx dma control, numbering channels 1-3 not 0-2 */ 10890fccb52SAndrzej Pietrasiewicz #define UDC_TXDMA(chan) (UDC_BASE + 0x50 - 4 + 4 * (chan)) 10990fccb52SAndrzej Pietrasiewicz # define UDC_TXN_EOT (1 << 15) /* bytes vs packets */ 11090fccb52SAndrzej Pietrasiewicz # define UDC_TXN_START (1 << 14) /* start transfer */ 11190fccb52SAndrzej Pietrasiewicz # define UDC_TXN_TSC 0x03ff /* units in xfer */ 11290fccb52SAndrzej Pietrasiewicz #define UDC_RXDMA(chan) (UDC_BASE + 0x60 - 4 + 4 * (chan)) 11390fccb52SAndrzej Pietrasiewicz # define UDC_RXN_STOP (1 << 15) /* enable EOT irq */ 11490fccb52SAndrzej Pietrasiewicz # define UDC_RXN_TC 0x00ff /* packets in xfer */ 11590fccb52SAndrzej Pietrasiewicz 11690fccb52SAndrzej Pietrasiewicz 11790fccb52SAndrzej Pietrasiewicz /* 11890fccb52SAndrzej Pietrasiewicz * Endpoint configuration registers (used before CFG_LOCK is set) 11990fccb52SAndrzej Pietrasiewicz * UDC_EP_TX(0) is unused 12090fccb52SAndrzej Pietrasiewicz */ 12190fccb52SAndrzej Pietrasiewicz #define UDC_EP_RX(endpoint) (UDC_BASE + 0x80 + (endpoint)*4) 12290fccb52SAndrzej Pietrasiewicz # define UDC_EPN_RX_VALID (1 << 15) 12390fccb52SAndrzej Pietrasiewicz # define UDC_EPN_RX_DB (1 << 14) 12490fccb52SAndrzej Pietrasiewicz /* buffer size in bits 13, 12 */ 12590fccb52SAndrzej Pietrasiewicz # define UDC_EPN_RX_ISO (1 << 11) 12690fccb52SAndrzej Pietrasiewicz /* buffer pointer in low 11 bits */ 12790fccb52SAndrzej Pietrasiewicz #define UDC_EP_TX(endpoint) (UDC_BASE + 0xc0 + (endpoint)*4) 12890fccb52SAndrzej Pietrasiewicz /* same bitfields as in RX */ 12990fccb52SAndrzej Pietrasiewicz 13090fccb52SAndrzej Pietrasiewicz /*-------------------------------------------------------------------------*/ 13190fccb52SAndrzej Pietrasiewicz 13290fccb52SAndrzej Pietrasiewicz struct omap_req { 13390fccb52SAndrzej Pietrasiewicz struct usb_request req; 13490fccb52SAndrzej Pietrasiewicz struct list_head queue; 13590fccb52SAndrzej Pietrasiewicz unsigned dma_bytes; 13690fccb52SAndrzej Pietrasiewicz unsigned mapped:1; 13790fccb52SAndrzej Pietrasiewicz }; 13890fccb52SAndrzej Pietrasiewicz 13990fccb52SAndrzej Pietrasiewicz struct omap_ep { 14090fccb52SAndrzej Pietrasiewicz struct usb_ep ep; 14190fccb52SAndrzej Pietrasiewicz struct list_head queue; 14290fccb52SAndrzej Pietrasiewicz unsigned long irqs; 14390fccb52SAndrzej Pietrasiewicz struct list_head iso; 14490fccb52SAndrzej Pietrasiewicz char name[14]; 14590fccb52SAndrzej Pietrasiewicz u16 maxpacket; 14690fccb52SAndrzej Pietrasiewicz u8 bEndpointAddress; 14790fccb52SAndrzej Pietrasiewicz u8 bmAttributes; 14890fccb52SAndrzej Pietrasiewicz unsigned double_buf:1; 14990fccb52SAndrzej Pietrasiewicz unsigned stopped:1; 15090fccb52SAndrzej Pietrasiewicz unsigned fnf:1; 15190fccb52SAndrzej Pietrasiewicz unsigned has_dma:1; 15290fccb52SAndrzej Pietrasiewicz u8 ackwait; 15390fccb52SAndrzej Pietrasiewicz u8 dma_channel; 15490fccb52SAndrzej Pietrasiewicz u16 dma_counter; 15590fccb52SAndrzej Pietrasiewicz int lch; 15690fccb52SAndrzej Pietrasiewicz struct omap_udc *udc; 15790fccb52SAndrzej Pietrasiewicz struct timer_list timer; 15890fccb52SAndrzej Pietrasiewicz }; 15990fccb52SAndrzej Pietrasiewicz 16090fccb52SAndrzej Pietrasiewicz struct omap_udc { 16190fccb52SAndrzej Pietrasiewicz struct usb_gadget gadget; 16290fccb52SAndrzej Pietrasiewicz struct usb_gadget_driver *driver; 16390fccb52SAndrzej Pietrasiewicz spinlock_t lock; 16490fccb52SAndrzej Pietrasiewicz struct omap_ep ep[32]; 16590fccb52SAndrzej Pietrasiewicz u16 devstat; 16690fccb52SAndrzej Pietrasiewicz u16 clr_halt; 16790fccb52SAndrzej Pietrasiewicz struct usb_phy *transceiver; 16890fccb52SAndrzej Pietrasiewicz struct list_head iso; 16990fccb52SAndrzej Pietrasiewicz unsigned softconnect:1; 17090fccb52SAndrzej Pietrasiewicz unsigned vbus_active:1; 17190fccb52SAndrzej Pietrasiewicz unsigned ep0_pending:1; 17290fccb52SAndrzej Pietrasiewicz unsigned ep0_in:1; 17390fccb52SAndrzej Pietrasiewicz unsigned ep0_set_config:1; 17490fccb52SAndrzej Pietrasiewicz unsigned ep0_reset_config:1; 17590fccb52SAndrzej Pietrasiewicz unsigned ep0_setup:1; 17690fccb52SAndrzej Pietrasiewicz struct completion *done; 17790fccb52SAndrzej Pietrasiewicz struct clk *dc_clk; 17890fccb52SAndrzej Pietrasiewicz struct clk *hhc_clk; 17990fccb52SAndrzej Pietrasiewicz unsigned clk_requested:1; 18090fccb52SAndrzej Pietrasiewicz }; 18190fccb52SAndrzej Pietrasiewicz 18290fccb52SAndrzej Pietrasiewicz /*-------------------------------------------------------------------------*/ 18390fccb52SAndrzej Pietrasiewicz 18490fccb52SAndrzej Pietrasiewicz #ifdef VERBOSE 18590fccb52SAndrzej Pietrasiewicz # define VDBG DBG 18690fccb52SAndrzej Pietrasiewicz #else 18790fccb52SAndrzej Pietrasiewicz # define VDBG(stuff...) do{}while(0) 18890fccb52SAndrzej Pietrasiewicz #endif 18990fccb52SAndrzej Pietrasiewicz 19090fccb52SAndrzej Pietrasiewicz #define ERR(stuff...) pr_err("udc: " stuff) 191a4e6a852SJoe Perches #define WARNING(stuff...) pr_warn("udc: " stuff) 19290fccb52SAndrzej Pietrasiewicz #define INFO(stuff...) pr_info("udc: " stuff) 19390fccb52SAndrzej Pietrasiewicz #define DBG(stuff...) pr_debug("udc: " stuff) 19490fccb52SAndrzej Pietrasiewicz 19590fccb52SAndrzej Pietrasiewicz /*-------------------------------------------------------------------------*/ 19690fccb52SAndrzej Pietrasiewicz 19790fccb52SAndrzej Pietrasiewicz /* MOD_CONF_CTRL_0 */ 19890fccb52SAndrzej Pietrasiewicz #define VBUS_W2FC_1510 (1 << 17) /* 0 gpio0, 1 dvdd2 pin */ 19990fccb52SAndrzej Pietrasiewicz 20090fccb52SAndrzej Pietrasiewicz /* FUNC_MUX_CTRL_0 */ 20190fccb52SAndrzej Pietrasiewicz #define VBUS_CTRL_1510 (1 << 19) /* 1 connected (software) */ 20290fccb52SAndrzej Pietrasiewicz #define VBUS_MODE_1510 (1 << 18) /* 0 hardware, 1 software */ 20390fccb52SAndrzej Pietrasiewicz 20490fccb52SAndrzej Pietrasiewicz #define HMC_1510 ((omap_readl(MOD_CONF_CTRL_0) >> 1) & 0x3f) 20590fccb52SAndrzej Pietrasiewicz #define HMC_1610 (omap_readl(OTG_SYSCON_2) & 0x3f) 20690fccb52SAndrzej Pietrasiewicz #define HMC (cpu_is_omap15xx() ? HMC_1510 : HMC_1610) 20790fccb52SAndrzej Pietrasiewicz 208