xref: /openbmc/linux/drivers/usb/gadget/udc/net2280.h (revision 0bf49ffb)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * NetChip 2280 high/full speed USB device controller.
4  * Unlike many such controllers, this one talks PCI.
5  */
6 
7 /*
8  * Copyright (C) 2002 NetChip Technology, Inc. (http://www.netchip.com)
9  * Copyright (C) 2003 David Brownell
10  * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
11  */
12 
13 #include <linux/usb/net2280.h>
14 #include <linux/usb/usb338x.h>
15 
16 /*-------------------------------------------------------------------------*/
17 
18 #ifdef	__KERNEL__
19 
20 /* indexed registers [11.10] are accessed indirectly
21  * caller must own the device lock.
22  */
23 
24 static inline u32 get_idx_reg(struct net2280_regs __iomem *regs, u32 index)
25 {
26 	writel(index, &regs->idxaddr);
27 	/* NOTE:  synchs device/cpu memory views */
28 	return readl(&regs->idxdata);
29 }
30 
31 static inline void
32 set_idx_reg(struct net2280_regs __iomem *regs, u32 index, u32 value)
33 {
34 	writel(index, &regs->idxaddr);
35 	writel(value, &regs->idxdata);
36 	/* posted, may not be visible yet */
37 }
38 
39 #endif	/* __KERNEL__ */
40 
41 #define PCI_VENDOR_ID_PLX_LEGACY 0x17cc
42 
43 #define PLX_LEGACY		BIT(0)
44 #define PLX_2280		BIT(1)
45 #define PLX_SUPERSPEED		BIT(2)
46 #define PLX_PCIE		BIT(3)
47 
48 #define REG_DIAG		0x0
49 #define     RETRY_COUNTER                                       16
50 #define     FORCE_PCI_SERR                                      11
51 #define     FORCE_PCI_INTERRUPT                                 10
52 #define     FORCE_USB_INTERRUPT                                 9
53 #define     FORCE_CPU_INTERRUPT                                 8
54 #define     ILLEGAL_BYTE_ENABLES                                5
55 #define     FAST_TIMES                                          4
56 #define     FORCE_RECEIVE_ERROR                                 2
57 #define     FORCE_TRANSMIT_CRC_ERROR                            0
58 #define REG_FRAME		0x02	/* from last sof */
59 #define REG_CHIPREV		0x03	/* in bcd */
60 #define	REG_HS_NAK_RATE		0x0a	/* NAK per N uframes */
61 
62 #define	CHIPREV_1	0x0100
63 #define	CHIPREV_1A	0x0110
64 
65 /* DEFECT 7374 */
66 #define DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS         200
67 #define DEFECT_7374_PROCESSOR_WAIT_TIME             10
68 
69 /* ep0 max packet size */
70 #define EP0_SS_MAX_PACKET_SIZE  0x200
71 #define EP0_HS_MAX_PACKET_SIZE  0x40
72 #ifdef	__KERNEL__
73 
74 /*-------------------------------------------------------------------------*/
75 
76 /* [8.3] for scatter/gather i/o
77  * use struct net2280_dma_regs bitfields
78  */
79 struct net2280_dma {
80 	__le32		dmacount;
81 	__le32		dmaaddr;		/* the buffer */
82 	__le32		dmadesc;		/* next dma descriptor */
83 	__le32		_reserved;
84 } __aligned(16);
85 
86 /*-------------------------------------------------------------------------*/
87 
88 /* DRIVER DATA STRUCTURES and UTILITIES */
89 
90 struct net2280_ep {
91 	struct usb_ep				ep;
92 	struct net2280_ep_regs __iomem *cfg;
93 	struct net2280_ep_regs			__iomem *regs;
94 	struct net2280_dma_regs			__iomem *dma;
95 	struct net2280_dma			*dummy;
96 	dma_addr_t				td_dma;	/* of dummy */
97 	struct net2280				*dev;
98 	unsigned long				irqs;
99 
100 	/* analogous to a host-side qh */
101 	struct list_head			queue;
102 	const struct usb_endpoint_descriptor	*desc;
103 	unsigned				num : 8,
104 						fifo_size : 12,
105 						in_fifo_validate : 1,
106 						out_overflow : 1,
107 						stopped : 1,
108 						wedged : 1,
109 						is_in : 1,
110 						is_iso : 1,
111 						responded : 1;
112 };
113 
114 static inline void allow_status(struct net2280_ep *ep)
115 {
116 	/* ep0 only */
117 	writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE) |
118 		BIT(CLEAR_NAK_OUT_PACKETS) |
119 		BIT(CLEAR_NAK_OUT_PACKETS_MODE),
120 		&ep->regs->ep_rsp);
121 	ep->stopped = 1;
122 }
123 
124 static inline void allow_status_338x(struct net2280_ep *ep)
125 {
126 	/*
127 	 * Control Status Phase Handshake was set by the chip when the setup
128 	 * packet arrived. While set, the chip automatically NAKs the host's
129 	 * Status Phase tokens.
130 	 */
131 	writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE), &ep->regs->ep_rsp);
132 
133 	ep->stopped = 1;
134 
135 	/* TD 9.9 Halt Endpoint test.  TD 9.22 set feature test. */
136 	ep->responded = 0;
137 }
138 
139 struct net2280_request {
140 	struct usb_request		req;
141 	struct net2280_dma		*td;
142 	dma_addr_t			td_dma;
143 	struct list_head		queue;
144 	unsigned			mapped : 1,
145 					valid : 1;
146 };
147 
148 struct net2280 {
149 	/* each pci device provides one gadget, several endpoints */
150 	struct usb_gadget		gadget;
151 	spinlock_t			lock;
152 	struct net2280_ep		ep[9];
153 	struct usb_gadget_driver	*driver;
154 	unsigned			enabled : 1,
155 					protocol_stall : 1,
156 					softconnect : 1,
157 					got_irq : 1,
158 					region:1,
159 					added:1,
160 					u1_enable:1,
161 					u2_enable:1,
162 					ltm_enable:1,
163 					wakeup_enable:1,
164 					addressed_state:1,
165 					bug7734_patched:1;
166 	u16				chiprev;
167 	int enhanced_mode;
168 	int n_ep;
169 	kernel_ulong_t			quirks;
170 
171 
172 	/* pci state used to access those endpoints */
173 	struct pci_dev			*pdev;
174 	struct net2280_regs		__iomem *regs;
175 	struct net2280_usb_regs		__iomem *usb;
176 	struct usb338x_usb_ext_regs	__iomem *usb_ext;
177 	struct net2280_pci_regs		__iomem *pci;
178 	struct net2280_dma_regs		__iomem *dma;
179 	struct net2280_dep_regs		__iomem *dep;
180 	struct net2280_ep_regs		__iomem *epregs;
181 	struct usb338x_ll_regs		__iomem *llregs;
182 	struct usb338x_pl_regs		__iomem *plregs;
183 
184 	struct dma_pool			*requests;
185 	/* statistics...*/
186 };
187 
188 static inline void set_halt(struct net2280_ep *ep)
189 {
190 	/* ep0 and bulk/intr endpoints */
191 	writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE) |
192 		/* set NAK_OUT for erratum 0114 */
193 		((ep->dev->chiprev == CHIPREV_1) << SET_NAK_OUT_PACKETS) |
194 		BIT(SET_ENDPOINT_HALT),
195 		&ep->regs->ep_rsp);
196 }
197 
198 static inline void clear_halt(struct net2280_ep *ep)
199 {
200 	/* ep0 and bulk/intr endpoints */
201 	writel(BIT(CLEAR_ENDPOINT_HALT) |
202 		BIT(CLEAR_ENDPOINT_TOGGLE) |
203 		    /*
204 		     * unless the gadget driver left a short packet in the
205 		     * fifo, this reverses the erratum 0114 workaround.
206 		     */
207 		((ep->dev->chiprev == CHIPREV_1) << CLEAR_NAK_OUT_PACKETS),
208 		&ep->regs->ep_rsp);
209 }
210 
211 /*
212  * FSM value for Defect 7374 (U1U2 Test) is managed in
213  * chip's SCRATCH register:
214  */
215 #define DEFECT7374_FSM_FIELD    28
216 
217 /* Waiting for Control Read:
218  *  - A transition to this state indicates a fresh USB connection,
219  *    before the first Setup Packet. The connection speed is not
220  *    known. Firmware is waiting for the first Control Read.
221  *  - Starting state: This state can be thought of as the FSM's typical
222  *    starting state.
223  *  - Tip: Upon the first SS Control Read the FSM never
224  *    returns to this state.
225  */
226 #define DEFECT7374_FSM_WAITING_FOR_CONTROL_READ BIT(DEFECT7374_FSM_FIELD)
227 
228 /* Non-SS Control Read:
229  *  - A transition to this state indicates detection of the first HS
230  *    or FS Control Read.
231  *  - Tip: Upon the first SS Control Read the FSM never
232  *    returns to this state.
233  */
234 #define	DEFECT7374_FSM_NON_SS_CONTROL_READ (2 << DEFECT7374_FSM_FIELD)
235 
236 /* SS Control Read:
237  *  - A transition to this state indicates detection of the
238  *    first SS Control Read.
239  *  - This state indicates workaround completion. Workarounds no longer
240  *    need to be applied (as long as the chip remains powered up).
241  *  - Tip: Once in this state the FSM state does not change (until
242  *    the chip's power is lost and restored).
243  *  - This can be thought of as the final state of the FSM;
244  *    the FSM 'locks-up' in this state until the chip loses power.
245  */
246 #define DEFECT7374_FSM_SS_CONTROL_READ (3 << DEFECT7374_FSM_FIELD)
247 
248 #ifdef USE_RDK_LEDS
249 
250 static inline void net2280_led_init(struct net2280 *dev)
251 {
252 	/* LED3 (green) is on during USB activity. note erratum 0113. */
253 	writel(BIT(GPIO3_LED_SELECT) |
254 		BIT(GPIO3_OUTPUT_ENABLE) |
255 		BIT(GPIO2_OUTPUT_ENABLE) |
256 		BIT(GPIO1_OUTPUT_ENABLE) |
257 		BIT(GPIO0_OUTPUT_ENABLE),
258 		&dev->regs->gpioctl);
259 }
260 
261 /* indicate speed with bi-color LED 0/1 */
262 static inline
263 void net2280_led_speed(struct net2280 *dev, enum usb_device_speed speed)
264 {
265 	u32	val = readl(&dev->regs->gpioctl);
266 	switch (speed) {
267 	case USB_SPEED_SUPER:		/* green + red */
268 		val |= BIT(GPIO0_DATA) | BIT(GPIO1_DATA);
269 		break;
270 	case USB_SPEED_HIGH:		/* green */
271 		val &= ~BIT(GPIO0_DATA);
272 		val |= BIT(GPIO1_DATA);
273 		break;
274 	case USB_SPEED_FULL:		/* red */
275 		val &= ~BIT(GPIO1_DATA);
276 		val |= BIT(GPIO0_DATA);
277 		break;
278 	default:			/* (off/black) */
279 		val &= ~(BIT(GPIO1_DATA) | BIT(GPIO0_DATA));
280 		break;
281 	}
282 	writel(val, &dev->regs->gpioctl);
283 }
284 
285 /* indicate power with LED 2 */
286 static inline void net2280_led_active(struct net2280 *dev, int is_active)
287 {
288 	u32	val = readl(&dev->regs->gpioctl);
289 
290 	/* FIXME this LED never seems to turn on.*/
291 	if (is_active)
292 		val |= GPIO2_DATA;
293 	else
294 		val &= ~GPIO2_DATA;
295 	writel(val, &dev->regs->gpioctl);
296 }
297 
298 static inline void net2280_led_shutdown(struct net2280 *dev)
299 {
300 	/* turn off all four GPIO*_DATA bits */
301 	writel(readl(&dev->regs->gpioctl) & ~0x0f,
302 			&dev->regs->gpioctl);
303 }
304 
305 #else
306 
307 #define net2280_led_init(dev)		do { } while (0)
308 #define net2280_led_speed(dev, speed)	do { } while (0)
309 #define net2280_led_shutdown(dev)	do { } while (0)
310 
311 #endif
312 
313 /*-------------------------------------------------------------------------*/
314 
315 #define ep_dbg(ndev, fmt, args...) \
316 	dev_dbg((&((ndev)->pdev->dev)), fmt, ##args)
317 
318 #define ep_vdbg(ndev, fmt, args...) \
319 	dev_vdbg((&((ndev)->pdev->dev)), fmt, ##args)
320 
321 #define ep_info(ndev, fmt, args...) \
322 	dev_info((&((ndev)->pdev->dev)), fmt, ##args)
323 
324 #define ep_warn(ndev, fmt, args...) \
325 	dev_warn((&((ndev)->pdev->dev)), fmt, ##args)
326 
327 #define ep_err(ndev, fmt, args...) \
328 	dev_err((&((ndev)->pdev->dev)), fmt, ##args)
329 
330 /*-------------------------------------------------------------------------*/
331 
332 static inline void set_fifo_bytecount(struct net2280_ep *ep, unsigned count)
333 {
334 	if (ep->dev->pdev->vendor == 0x17cc)
335 		writeb(count, 2 + (u8 __iomem *) &ep->regs->ep_cfg);
336 	else{
337 		u32 tmp = readl(&ep->cfg->ep_cfg) &
338 					(~(0x07 << EP_FIFO_BYTE_COUNT));
339 		writel(tmp | (count << EP_FIFO_BYTE_COUNT), &ep->cfg->ep_cfg);
340 	}
341 }
342 
343 static inline void start_out_naking(struct net2280_ep *ep)
344 {
345 	/* NOTE:  hardware races lurk here, and PING protocol issues */
346 	writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
347 	/* synch with device */
348 	readl(&ep->regs->ep_rsp);
349 }
350 
351 static inline void stop_out_naking(struct net2280_ep *ep)
352 {
353 	u32	tmp;
354 
355 	tmp = readl(&ep->regs->ep_stat);
356 	if ((tmp & BIT(NAK_OUT_PACKETS)) != 0)
357 		writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
358 }
359 
360 
361 static inline void set_max_speed(struct net2280_ep *ep, u32 max)
362 {
363 	u32 reg;
364 	static const u32 ep_enhanced[9] = { 0x10, 0x60, 0x30, 0x80,
365 					  0x50, 0x20, 0x70, 0x40, 0x90 };
366 
367 	if (ep->dev->enhanced_mode) {
368 		reg = ep_enhanced[ep->num];
369 		switch (ep->dev->gadget.speed) {
370 		case USB_SPEED_SUPER:
371 			reg += 2;
372 			break;
373 		case USB_SPEED_FULL:
374 			reg += 1;
375 			break;
376 		case USB_SPEED_HIGH:
377 		default:
378 			break;
379 		}
380 	} else {
381 		reg = (ep->num + 1) * 0x10;
382 		if (ep->dev->gadget.speed != USB_SPEED_HIGH)
383 			reg += 1;
384 	}
385 
386 	set_idx_reg(ep->dev->regs, reg, max);
387 }
388 
389 #endif	/* __KERNEL__ */
390