1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Driver for the Atmel USBA high speed USB device controller 4 * 5 * Copyright (C) 2005-2007 Atmel Corporation 6 */ 7 #ifndef __LINUX_USB_GADGET_USBA_UDC_H__ 8 #define __LINUX_USB_GADGET_USBA_UDC_H__ 9 10 /* USB register offsets */ 11 #define USBA_CTRL 0x0000 12 #define USBA_FNUM 0x0004 13 #define USBA_INT_ENB 0x0010 14 #define USBA_INT_STA 0x0014 15 #define USBA_INT_CLR 0x0018 16 #define USBA_EPT_RST 0x001c 17 #define USBA_TST 0x00e0 18 19 /* USB endpoint register offsets */ 20 #define USBA_EPT_CFG 0x0000 21 #define USBA_EPT_CTL_ENB 0x0004 22 #define USBA_EPT_CTL_DIS 0x0008 23 #define USBA_EPT_CTL 0x000c 24 #define USBA_EPT_SET_STA 0x0014 25 #define USBA_EPT_CLR_STA 0x0018 26 #define USBA_EPT_STA 0x001c 27 28 /* USB DMA register offsets */ 29 #define USBA_DMA_NXT_DSC 0x0000 30 #define USBA_DMA_ADDRESS 0x0004 31 #define USBA_DMA_CONTROL 0x0008 32 #define USBA_DMA_STATUS 0x000c 33 34 /* Bitfields in CTRL */ 35 #define USBA_DEV_ADDR_OFFSET 0 36 #define USBA_DEV_ADDR_SIZE 7 37 #define USBA_FADDR_EN (1 << 7) 38 #define USBA_EN_USBA (1 << 8) 39 #define USBA_DETACH (1 << 9) 40 #define USBA_REMOTE_WAKE_UP (1 << 10) 41 #define USBA_PULLD_DIS (1 << 11) 42 43 #define USBA_ENABLE_MASK (USBA_EN_USBA | USBA_PULLD_DIS) 44 #define USBA_DISABLE_MASK USBA_DETACH 45 46 /* Bitfields in FNUM */ 47 #define USBA_MICRO_FRAME_NUM_OFFSET 0 48 #define USBA_MICRO_FRAME_NUM_SIZE 3 49 #define USBA_FRAME_NUMBER_OFFSET 3 50 #define USBA_FRAME_NUMBER_SIZE 11 51 #define USBA_FRAME_NUM_ERROR (1 << 31) 52 53 /* Bitfields in INT_ENB/INT_STA/INT_CLR */ 54 #define USBA_HIGH_SPEED (1 << 0) 55 #define USBA_DET_SUSPEND (1 << 1) 56 #define USBA_MICRO_SOF (1 << 2) 57 #define USBA_SOF (1 << 3) 58 #define USBA_END_OF_RESET (1 << 4) 59 #define USBA_WAKE_UP (1 << 5) 60 #define USBA_END_OF_RESUME (1 << 6) 61 #define USBA_UPSTREAM_RESUME (1 << 7) 62 #define USBA_EPT_INT_OFFSET 8 63 #define USBA_EPT_INT_SIZE 16 64 #define USBA_DMA_INT_OFFSET 24 65 #define USBA_DMA_INT_SIZE 8 66 67 /* Bitfields in EPT_RST */ 68 #define USBA_RST_OFFSET 0 69 #define USBA_RST_SIZE 16 70 71 /* Bitfields in USBA_TST */ 72 #define USBA_SPEED_CFG_OFFSET 0 73 #define USBA_SPEED_CFG_SIZE 2 74 #define USBA_TST_J_MODE (1 << 2) 75 #define USBA_TST_K_MODE (1 << 3) 76 #define USBA_TST_PKT_MODE (1 << 4) 77 #define USBA_OPMODE2 (1 << 5) 78 79 /* Bitfields in EPT_CFG */ 80 #define USBA_EPT_SIZE_OFFSET 0 81 #define USBA_EPT_SIZE_SIZE 3 82 #define USBA_EPT_DIR_IN (1 << 3) 83 #define USBA_EPT_TYPE_OFFSET 4 84 #define USBA_EPT_TYPE_SIZE 2 85 #define USBA_BK_NUMBER_OFFSET 6 86 #define USBA_BK_NUMBER_SIZE 2 87 #define USBA_NB_TRANS_OFFSET 8 88 #define USBA_NB_TRANS_SIZE 2 89 #define USBA_EPT_MAPPED (1 << 31) 90 91 /* Bitfields in EPT_CTL/EPT_CTL_ENB/EPT_CTL_DIS */ 92 #define USBA_EPT_ENABLE (1 << 0) 93 #define USBA_AUTO_VALID (1 << 1) 94 #define USBA_INTDIS_DMA (1 << 3) 95 #define USBA_NYET_DIS (1 << 4) 96 #define USBA_DATAX_RX (1 << 6) 97 #define USBA_MDATA_RX (1 << 7) 98 /* Bits 8-15 and 31 enable interrupts for respective bits in EPT_STA */ 99 #define USBA_BUSY_BANK_IE (1 << 18) 100 101 /* Bitfields in EPT_SET_STA/EPT_CLR_STA/EPT_STA */ 102 #define USBA_FORCE_STALL (1 << 5) 103 #define USBA_TOGGLE_CLR (1 << 6) 104 #define USBA_TOGGLE_SEQ_OFFSET 6 105 #define USBA_TOGGLE_SEQ_SIZE 2 106 #define USBA_ERR_OVFLW (1 << 8) 107 #define USBA_RX_BK_RDY (1 << 9) 108 #define USBA_KILL_BANK (1 << 9) 109 #define USBA_TX_COMPLETE (1 << 10) 110 #define USBA_TX_PK_RDY (1 << 11) 111 #define USBA_ISO_ERR_TRANS (1 << 11) 112 #define USBA_RX_SETUP (1 << 12) 113 #define USBA_ISO_ERR_FLOW (1 << 12) 114 #define USBA_STALL_SENT (1 << 13) 115 #define USBA_ISO_ERR_CRC (1 << 13) 116 #define USBA_ISO_ERR_NBTRANS (1 << 13) 117 #define USBA_NAK_IN (1 << 14) 118 #define USBA_ISO_ERR_FLUSH (1 << 14) 119 #define USBA_NAK_OUT (1 << 15) 120 #define USBA_CURRENT_BANK_OFFSET 16 121 #define USBA_CURRENT_BANK_SIZE 2 122 #define USBA_BUSY_BANKS_OFFSET 18 123 #define USBA_BUSY_BANKS_SIZE 2 124 #define USBA_BYTE_COUNT_OFFSET 20 125 #define USBA_BYTE_COUNT_SIZE 11 126 #define USBA_SHORT_PACKET (1 << 31) 127 128 /* Bitfields in DMA_CONTROL */ 129 #define USBA_DMA_CH_EN (1 << 0) 130 #define USBA_DMA_LINK (1 << 1) 131 #define USBA_DMA_END_TR_EN (1 << 2) 132 #define USBA_DMA_END_BUF_EN (1 << 3) 133 #define USBA_DMA_END_TR_IE (1 << 4) 134 #define USBA_DMA_END_BUF_IE (1 << 5) 135 #define USBA_DMA_DESC_LOAD_IE (1 << 6) 136 #define USBA_DMA_BURST_LOCK (1 << 7) 137 #define USBA_DMA_BUF_LEN_OFFSET 16 138 #define USBA_DMA_BUF_LEN_SIZE 16 139 140 /* Bitfields in DMA_STATUS */ 141 #define USBA_DMA_CH_ACTIVE (1 << 1) 142 #define USBA_DMA_END_TR_ST (1 << 4) 143 #define USBA_DMA_END_BUF_ST (1 << 5) 144 #define USBA_DMA_DESC_LOAD_ST (1 << 6) 145 146 /* Constants for SPEED_CFG */ 147 #define USBA_SPEED_CFG_NORMAL 0 148 #define USBA_SPEED_CFG_FORCE_HIGH 2 149 #define USBA_SPEED_CFG_FORCE_FULL 3 150 151 /* Constants for EPT_SIZE */ 152 #define USBA_EPT_SIZE_8 0 153 #define USBA_EPT_SIZE_16 1 154 #define USBA_EPT_SIZE_32 2 155 #define USBA_EPT_SIZE_64 3 156 #define USBA_EPT_SIZE_128 4 157 #define USBA_EPT_SIZE_256 5 158 #define USBA_EPT_SIZE_512 6 159 #define USBA_EPT_SIZE_1024 7 160 161 /* Constants for EPT_TYPE */ 162 #define USBA_EPT_TYPE_CONTROL 0 163 #define USBA_EPT_TYPE_ISO 1 164 #define USBA_EPT_TYPE_BULK 2 165 #define USBA_EPT_TYPE_INT 3 166 167 /* Constants for BK_NUMBER */ 168 #define USBA_BK_NUMBER_ZERO 0 169 #define USBA_BK_NUMBER_ONE 1 170 #define USBA_BK_NUMBER_DOUBLE 2 171 #define USBA_BK_NUMBER_TRIPLE 3 172 173 /* Bit manipulation macros */ 174 #define USBA_BF(name, value) \ 175 (((value) & ((1 << USBA_##name##_SIZE) - 1)) \ 176 << USBA_##name##_OFFSET) 177 #define USBA_BFEXT(name, value) \ 178 (((value) >> USBA_##name##_OFFSET) \ 179 & ((1 << USBA_##name##_SIZE) - 1)) 180 #define USBA_BFINS(name, value, old) \ 181 (((old) & ~(((1 << USBA_##name##_SIZE) - 1) \ 182 << USBA_##name##_OFFSET)) \ 183 | USBA_BF(name, value)) 184 185 /* Register access macros */ 186 #define usba_readl(udc, reg) \ 187 readl_relaxed((udc)->regs + USBA_##reg) 188 #define usba_writel(udc, reg, value) \ 189 writel_relaxed((value), (udc)->regs + USBA_##reg) 190 #define usba_ep_readl(ep, reg) \ 191 readl_relaxed((ep)->ep_regs + USBA_EPT_##reg) 192 #define usba_ep_writel(ep, reg, value) \ 193 writel_relaxed((value), (ep)->ep_regs + USBA_EPT_##reg) 194 #define usba_dma_readl(ep, reg) \ 195 readl_relaxed((ep)->dma_regs + USBA_DMA_##reg) 196 #define usba_dma_writel(ep, reg, value) \ 197 writel_relaxed((value), (ep)->dma_regs + USBA_DMA_##reg) 198 199 /* Calculate base address for a given endpoint or DMA controller */ 200 #define USBA_EPT_BASE(x) (0x100 + (x) * 0x20) 201 #define USBA_DMA_BASE(x) (0x300 + (x) * 0x10) 202 #define USBA_FIFO_BASE(x) ((x) << 16) 203 204 /* Synth parameters */ 205 #define USBA_NR_DMAS 7 206 207 #define EP0_FIFO_SIZE 64 208 #define EP0_EPT_SIZE USBA_EPT_SIZE_64 209 #define EP0_NR_BANKS 1 210 211 #define FIFO_IOMEM_ID 0 212 #define CTRL_IOMEM_ID 1 213 214 #define DBG_ERR 0x0001 /* report all error returns */ 215 #define DBG_HW 0x0002 /* debug hardware initialization */ 216 #define DBG_GADGET 0x0004 /* calls to/from gadget driver */ 217 #define DBG_INT 0x0008 /* interrupts */ 218 #define DBG_BUS 0x0010 /* report changes in bus state */ 219 #define DBG_QUEUE 0x0020 /* debug request queue processing */ 220 #define DBG_FIFO 0x0040 /* debug FIFO contents */ 221 #define DBG_DMA 0x0080 /* debug DMA handling */ 222 #define DBG_REQ 0x0100 /* print out queued request length */ 223 #define DBG_ALL 0xffff 224 #define DBG_NONE 0x0000 225 226 #define DEBUG_LEVEL (DBG_ERR) 227 228 #define DBG(level, fmt, ...) \ 229 do { \ 230 if ((level) & DEBUG_LEVEL) \ 231 pr_debug("udc: " fmt, ## __VA_ARGS__); \ 232 } while (0) 233 234 enum usba_ctrl_state { 235 WAIT_FOR_SETUP, 236 DATA_STAGE_IN, 237 DATA_STAGE_OUT, 238 STATUS_STAGE_IN, 239 STATUS_STAGE_OUT, 240 STATUS_STAGE_ADDR, 241 STATUS_STAGE_TEST, 242 }; 243 /* 244 EP_STATE_IDLE, 245 EP_STATE_SETUP, 246 EP_STATE_IN_DATA, 247 EP_STATE_OUT_DATA, 248 EP_STATE_SET_ADDR_STATUS, 249 EP_STATE_RX_STATUS, 250 EP_STATE_TX_STATUS, 251 EP_STATE_HALT, 252 */ 253 254 struct usba_dma_desc { 255 dma_addr_t next; 256 dma_addr_t addr; 257 u32 ctrl; 258 }; 259 260 struct usba_fifo_cfg { 261 u8 hw_ep_num; 262 u16 fifo_size; 263 u8 nr_banks; 264 }; 265 266 struct usba_ep { 267 int state; 268 void __iomem *ep_regs; 269 void __iomem *dma_regs; 270 void __iomem *fifo; 271 char name[8]; 272 struct usb_ep ep; 273 struct usba_udc *udc; 274 275 struct list_head queue; 276 277 u16 fifo_size; 278 u8 nr_banks; 279 u8 index; 280 unsigned int can_dma:1; 281 unsigned int can_isoc:1; 282 unsigned int is_isoc:1; 283 unsigned int is_in:1; 284 unsigned long ept_cfg; 285 #ifdef CONFIG_USB_GADGET_DEBUG_FS 286 u32 last_dma_status; 287 struct dentry *debugfs_dir; 288 struct dentry *debugfs_queue; 289 struct dentry *debugfs_dma_status; 290 struct dentry *debugfs_state; 291 #endif 292 }; 293 294 struct usba_request { 295 struct usb_request req; 296 struct list_head queue; 297 298 u32 ctrl; 299 300 unsigned int submitted:1; 301 unsigned int last_transaction:1; 302 unsigned int using_dma:1; 303 unsigned int mapped:1; 304 }; 305 306 struct usba_udc_errata { 307 void (*toggle_bias)(struct usba_udc *udc, int is_on); 308 void (*pulse_bias)(struct usba_udc *udc); 309 }; 310 311 struct usba_udc { 312 /* Protect hw registers from concurrent modifications */ 313 spinlock_t lock; 314 315 /* Mutex to prevent concurrent start or stop */ 316 struct mutex vbus_mutex; 317 318 void __iomem *regs; 319 void __iomem *fifo; 320 321 struct usb_gadget gadget; 322 struct usb_gadget_driver *driver; 323 struct platform_device *pdev; 324 const struct usba_udc_errata *errata; 325 int irq; 326 int vbus_pin; 327 int vbus_pin_inverted; 328 int num_ep; 329 int configured_ep; 330 struct usba_fifo_cfg *fifo_cfg; 331 struct clk *pclk; 332 struct clk *hclk; 333 struct usba_ep *usba_ep; 334 bool bias_pulse_needed; 335 bool clocked; 336 337 u16 devstatus; 338 339 u16 test_mode; 340 int vbus_prev; 341 342 u32 int_enb_cache; 343 344 #ifdef CONFIG_USB_GADGET_DEBUG_FS 345 struct dentry *debugfs_root; 346 struct dentry *debugfs_regs; 347 #endif 348 349 struct regmap *pmc; 350 }; 351 352 static inline struct usba_ep *to_usba_ep(struct usb_ep *ep) 353 { 354 return container_of(ep, struct usba_ep, ep); 355 } 356 357 static inline struct usba_request *to_usba_req(struct usb_request *req) 358 { 359 return container_of(req, struct usba_request, req); 360 } 361 362 static inline struct usba_udc *to_usba_udc(struct usb_gadget *gadget) 363 { 364 return container_of(gadget, struct usba_udc, gadget); 365 } 366 367 #define ep_is_control(ep) ((ep)->index == 0) 368 #define ep_is_idle(ep) ((ep)->state == EP_STATE_IDLE) 369 370 #endif /* __LINUX_USB_GADGET_USBA_UDC_H */ 371