1 /* 2 * Driver for the Atmel USBA high speed USB device controller 3 * 4 * Copyright (C) 2005-2007 Atmel Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 #include <linux/clk.h> 11 #include <linux/clk/at91_pmc.h> 12 #include <linux/module.h> 13 #include <linux/init.h> 14 #include <linux/interrupt.h> 15 #include <linux/io.h> 16 #include <linux/slab.h> 17 #include <linux/device.h> 18 #include <linux/dma-mapping.h> 19 #include <linux/list.h> 20 #include <linux/platform_device.h> 21 #include <linux/usb/ch9.h> 22 #include <linux/usb/gadget.h> 23 #include <linux/usb/atmel_usba_udc.h> 24 #include <linux/delay.h> 25 #include <linux/of.h> 26 #include <linux/of_gpio.h> 27 28 #include <asm/gpio.h> 29 30 #include "atmel_usba_udc.h" 31 32 #ifdef CONFIG_USB_GADGET_DEBUG_FS 33 #include <linux/debugfs.h> 34 #include <linux/uaccess.h> 35 36 static int queue_dbg_open(struct inode *inode, struct file *file) 37 { 38 struct usba_ep *ep = inode->i_private; 39 struct usba_request *req, *req_copy; 40 struct list_head *queue_data; 41 42 queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL); 43 if (!queue_data) 44 return -ENOMEM; 45 INIT_LIST_HEAD(queue_data); 46 47 spin_lock_irq(&ep->udc->lock); 48 list_for_each_entry(req, &ep->queue, queue) { 49 req_copy = kmemdup(req, sizeof(*req_copy), GFP_ATOMIC); 50 if (!req_copy) 51 goto fail; 52 list_add_tail(&req_copy->queue, queue_data); 53 } 54 spin_unlock_irq(&ep->udc->lock); 55 56 file->private_data = queue_data; 57 return 0; 58 59 fail: 60 spin_unlock_irq(&ep->udc->lock); 61 list_for_each_entry_safe(req, req_copy, queue_data, queue) { 62 list_del(&req->queue); 63 kfree(req); 64 } 65 kfree(queue_data); 66 return -ENOMEM; 67 } 68 69 /* 70 * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0 71 * 72 * b: buffer address 73 * l: buffer length 74 * I/i: interrupt/no interrupt 75 * Z/z: zero/no zero 76 * S/s: short ok/short not ok 77 * s: status 78 * n: nr_packets 79 * F/f: submitted/not submitted to FIFO 80 * D/d: using/not using DMA 81 * L/l: last transaction/not last transaction 82 */ 83 static ssize_t queue_dbg_read(struct file *file, char __user *buf, 84 size_t nbytes, loff_t *ppos) 85 { 86 struct list_head *queue = file->private_data; 87 struct usba_request *req, *tmp_req; 88 size_t len, remaining, actual = 0; 89 char tmpbuf[38]; 90 91 if (!access_ok(VERIFY_WRITE, buf, nbytes)) 92 return -EFAULT; 93 94 inode_lock(file_inode(file)); 95 list_for_each_entry_safe(req, tmp_req, queue, queue) { 96 len = snprintf(tmpbuf, sizeof(tmpbuf), 97 "%8p %08x %c%c%c %5d %c%c%c\n", 98 req->req.buf, req->req.length, 99 req->req.no_interrupt ? 'i' : 'I', 100 req->req.zero ? 'Z' : 'z', 101 req->req.short_not_ok ? 's' : 'S', 102 req->req.status, 103 req->submitted ? 'F' : 'f', 104 req->using_dma ? 'D' : 'd', 105 req->last_transaction ? 'L' : 'l'); 106 len = min(len, sizeof(tmpbuf)); 107 if (len > nbytes) 108 break; 109 110 list_del(&req->queue); 111 kfree(req); 112 113 remaining = __copy_to_user(buf, tmpbuf, len); 114 actual += len - remaining; 115 if (remaining) 116 break; 117 118 nbytes -= len; 119 buf += len; 120 } 121 inode_unlock(file_inode(file)); 122 123 return actual; 124 } 125 126 static int queue_dbg_release(struct inode *inode, struct file *file) 127 { 128 struct list_head *queue_data = file->private_data; 129 struct usba_request *req, *tmp_req; 130 131 list_for_each_entry_safe(req, tmp_req, queue_data, queue) { 132 list_del(&req->queue); 133 kfree(req); 134 } 135 kfree(queue_data); 136 return 0; 137 } 138 139 static int regs_dbg_open(struct inode *inode, struct file *file) 140 { 141 struct usba_udc *udc; 142 unsigned int i; 143 u32 *data; 144 int ret = -ENOMEM; 145 146 inode_lock(inode); 147 udc = inode->i_private; 148 data = kmalloc(inode->i_size, GFP_KERNEL); 149 if (!data) 150 goto out; 151 152 spin_lock_irq(&udc->lock); 153 for (i = 0; i < inode->i_size / 4; i++) 154 data[i] = usba_io_readl(udc->regs + i * 4); 155 spin_unlock_irq(&udc->lock); 156 157 file->private_data = data; 158 ret = 0; 159 160 out: 161 inode_unlock(inode); 162 163 return ret; 164 } 165 166 static ssize_t regs_dbg_read(struct file *file, char __user *buf, 167 size_t nbytes, loff_t *ppos) 168 { 169 struct inode *inode = file_inode(file); 170 int ret; 171 172 inode_lock(inode); 173 ret = simple_read_from_buffer(buf, nbytes, ppos, 174 file->private_data, 175 file_inode(file)->i_size); 176 inode_unlock(inode); 177 178 return ret; 179 } 180 181 static int regs_dbg_release(struct inode *inode, struct file *file) 182 { 183 kfree(file->private_data); 184 return 0; 185 } 186 187 const struct file_operations queue_dbg_fops = { 188 .owner = THIS_MODULE, 189 .open = queue_dbg_open, 190 .llseek = no_llseek, 191 .read = queue_dbg_read, 192 .release = queue_dbg_release, 193 }; 194 195 const struct file_operations regs_dbg_fops = { 196 .owner = THIS_MODULE, 197 .open = regs_dbg_open, 198 .llseek = generic_file_llseek, 199 .read = regs_dbg_read, 200 .release = regs_dbg_release, 201 }; 202 203 static void usba_ep_init_debugfs(struct usba_udc *udc, 204 struct usba_ep *ep) 205 { 206 struct dentry *ep_root; 207 208 ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root); 209 if (!ep_root) 210 goto err_root; 211 ep->debugfs_dir = ep_root; 212 213 ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root, 214 ep, &queue_dbg_fops); 215 if (!ep->debugfs_queue) 216 goto err_queue; 217 218 if (ep->can_dma) { 219 ep->debugfs_dma_status 220 = debugfs_create_u32("dma_status", 0400, ep_root, 221 &ep->last_dma_status); 222 if (!ep->debugfs_dma_status) 223 goto err_dma_status; 224 } 225 if (ep_is_control(ep)) { 226 ep->debugfs_state 227 = debugfs_create_u32("state", 0400, ep_root, 228 &ep->state); 229 if (!ep->debugfs_state) 230 goto err_state; 231 } 232 233 return; 234 235 err_state: 236 if (ep->can_dma) 237 debugfs_remove(ep->debugfs_dma_status); 238 err_dma_status: 239 debugfs_remove(ep->debugfs_queue); 240 err_queue: 241 debugfs_remove(ep_root); 242 err_root: 243 dev_err(&ep->udc->pdev->dev, 244 "failed to create debugfs directory for %s\n", ep->ep.name); 245 } 246 247 static void usba_ep_cleanup_debugfs(struct usba_ep *ep) 248 { 249 debugfs_remove(ep->debugfs_queue); 250 debugfs_remove(ep->debugfs_dma_status); 251 debugfs_remove(ep->debugfs_state); 252 debugfs_remove(ep->debugfs_dir); 253 ep->debugfs_dma_status = NULL; 254 ep->debugfs_dir = NULL; 255 } 256 257 static void usba_init_debugfs(struct usba_udc *udc) 258 { 259 struct dentry *root, *regs; 260 struct resource *regs_resource; 261 262 root = debugfs_create_dir(udc->gadget.name, NULL); 263 if (IS_ERR(root) || !root) 264 goto err_root; 265 udc->debugfs_root = root; 266 267 regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM, 268 CTRL_IOMEM_ID); 269 270 if (regs_resource) { 271 regs = debugfs_create_file_size("regs", 0400, root, udc, 272 ®s_dbg_fops, 273 resource_size(regs_resource)); 274 if (!regs) 275 goto err_regs; 276 udc->debugfs_regs = regs; 277 } 278 279 usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0)); 280 281 return; 282 283 err_regs: 284 debugfs_remove(root); 285 err_root: 286 udc->debugfs_root = NULL; 287 dev_err(&udc->pdev->dev, "debugfs is not available\n"); 288 } 289 290 static void usba_cleanup_debugfs(struct usba_udc *udc) 291 { 292 usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0)); 293 debugfs_remove(udc->debugfs_regs); 294 debugfs_remove(udc->debugfs_root); 295 udc->debugfs_regs = NULL; 296 udc->debugfs_root = NULL; 297 } 298 #else 299 static inline void usba_ep_init_debugfs(struct usba_udc *udc, 300 struct usba_ep *ep) 301 { 302 303 } 304 305 static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep) 306 { 307 308 } 309 310 static inline void usba_init_debugfs(struct usba_udc *udc) 311 { 312 313 } 314 315 static inline void usba_cleanup_debugfs(struct usba_udc *udc) 316 { 317 318 } 319 #endif 320 321 static inline u32 usba_int_enb_get(struct usba_udc *udc) 322 { 323 return udc->int_enb_cache; 324 } 325 326 static inline void usba_int_enb_set(struct usba_udc *udc, u32 val) 327 { 328 usba_writel(udc, INT_ENB, val); 329 udc->int_enb_cache = val; 330 } 331 332 static int vbus_is_present(struct usba_udc *udc) 333 { 334 if (gpio_is_valid(udc->vbus_pin)) 335 return gpio_get_value(udc->vbus_pin) ^ udc->vbus_pin_inverted; 336 337 /* No Vbus detection: Assume always present */ 338 return 1; 339 } 340 341 static void toggle_bias(struct usba_udc *udc, int is_on) 342 { 343 if (udc->errata && udc->errata->toggle_bias) 344 udc->errata->toggle_bias(udc, is_on); 345 } 346 347 static void generate_bias_pulse(struct usba_udc *udc) 348 { 349 if (!udc->bias_pulse_needed) 350 return; 351 352 if (udc->errata && udc->errata->pulse_bias) 353 udc->errata->pulse_bias(udc); 354 355 udc->bias_pulse_needed = false; 356 } 357 358 static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req) 359 { 360 unsigned int transaction_len; 361 362 transaction_len = req->req.length - req->req.actual; 363 req->last_transaction = 1; 364 if (transaction_len > ep->ep.maxpacket) { 365 transaction_len = ep->ep.maxpacket; 366 req->last_transaction = 0; 367 } else if (transaction_len == ep->ep.maxpacket && req->req.zero) 368 req->last_transaction = 0; 369 370 DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n", 371 ep->ep.name, req, transaction_len, 372 req->last_transaction ? ", done" : ""); 373 374 memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len); 375 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); 376 req->req.actual += transaction_len; 377 } 378 379 static void submit_request(struct usba_ep *ep, struct usba_request *req) 380 { 381 DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n", 382 ep->ep.name, req, req->req.length); 383 384 req->req.actual = 0; 385 req->submitted = 1; 386 387 if (req->using_dma) { 388 if (req->req.length == 0) { 389 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); 390 return; 391 } 392 393 if (req->req.zero) 394 usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET); 395 else 396 usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET); 397 398 usba_dma_writel(ep, ADDRESS, req->req.dma); 399 usba_dma_writel(ep, CONTROL, req->ctrl); 400 } else { 401 next_fifo_transaction(ep, req); 402 if (req->last_transaction) { 403 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); 404 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); 405 } else { 406 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); 407 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); 408 } 409 } 410 } 411 412 static void submit_next_request(struct usba_ep *ep) 413 { 414 struct usba_request *req; 415 416 if (list_empty(&ep->queue)) { 417 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY); 418 return; 419 } 420 421 req = list_entry(ep->queue.next, struct usba_request, queue); 422 if (!req->submitted) 423 submit_request(ep, req); 424 } 425 426 static void send_status(struct usba_udc *udc, struct usba_ep *ep) 427 { 428 ep->state = STATUS_STAGE_IN; 429 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); 430 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); 431 } 432 433 static void receive_data(struct usba_ep *ep) 434 { 435 struct usba_udc *udc = ep->udc; 436 struct usba_request *req; 437 unsigned long status; 438 unsigned int bytecount, nr_busy; 439 int is_complete = 0; 440 441 status = usba_ep_readl(ep, STA); 442 nr_busy = USBA_BFEXT(BUSY_BANKS, status); 443 444 DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy); 445 446 while (nr_busy > 0) { 447 if (list_empty(&ep->queue)) { 448 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); 449 break; 450 } 451 req = list_entry(ep->queue.next, 452 struct usba_request, queue); 453 454 bytecount = USBA_BFEXT(BYTE_COUNT, status); 455 456 if (status & (1 << 31)) 457 is_complete = 1; 458 if (req->req.actual + bytecount >= req->req.length) { 459 is_complete = 1; 460 bytecount = req->req.length - req->req.actual; 461 } 462 463 memcpy_fromio(req->req.buf + req->req.actual, 464 ep->fifo, bytecount); 465 req->req.actual += bytecount; 466 467 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); 468 469 if (is_complete) { 470 DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name); 471 req->req.status = 0; 472 list_del_init(&req->queue); 473 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); 474 spin_unlock(&udc->lock); 475 usb_gadget_giveback_request(&ep->ep, &req->req); 476 spin_lock(&udc->lock); 477 } 478 479 status = usba_ep_readl(ep, STA); 480 nr_busy = USBA_BFEXT(BUSY_BANKS, status); 481 482 if (is_complete && ep_is_control(ep)) { 483 send_status(udc, ep); 484 break; 485 } 486 } 487 } 488 489 static void 490 request_complete(struct usba_ep *ep, struct usba_request *req, int status) 491 { 492 struct usba_udc *udc = ep->udc; 493 494 WARN_ON(!list_empty(&req->queue)); 495 496 if (req->req.status == -EINPROGRESS) 497 req->req.status = status; 498 499 if (req->using_dma) 500 usb_gadget_unmap_request(&udc->gadget, &req->req, ep->is_in); 501 502 DBG(DBG_GADGET | DBG_REQ, 503 "%s: req %p complete: status %d, actual %u\n", 504 ep->ep.name, req, req->req.status, req->req.actual); 505 506 spin_unlock(&udc->lock); 507 usb_gadget_giveback_request(&ep->ep, &req->req); 508 spin_lock(&udc->lock); 509 } 510 511 static void 512 request_complete_list(struct usba_ep *ep, struct list_head *list, int status) 513 { 514 struct usba_request *req, *tmp_req; 515 516 list_for_each_entry_safe(req, tmp_req, list, queue) { 517 list_del_init(&req->queue); 518 request_complete(ep, req, status); 519 } 520 } 521 522 static int 523 usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) 524 { 525 struct usba_ep *ep = to_usba_ep(_ep); 526 struct usba_udc *udc = ep->udc; 527 unsigned long flags, ept_cfg, maxpacket; 528 unsigned int nr_trans; 529 530 DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc); 531 532 maxpacket = usb_endpoint_maxp(desc) & 0x7ff; 533 534 if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index) 535 || ep->index == 0 536 || desc->bDescriptorType != USB_DT_ENDPOINT 537 || maxpacket == 0 538 || maxpacket > ep->fifo_size) { 539 DBG(DBG_ERR, "ep_enable: Invalid argument"); 540 return -EINVAL; 541 } 542 543 ep->is_isoc = 0; 544 ep->is_in = 0; 545 546 if (maxpacket <= 8) 547 ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8); 548 else 549 /* LSB is bit 1, not 0 */ 550 ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3); 551 552 DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n", 553 ep->ep.name, ept_cfg, maxpacket); 554 555 if (usb_endpoint_dir_in(desc)) { 556 ep->is_in = 1; 557 ept_cfg |= USBA_EPT_DIR_IN; 558 } 559 560 switch (usb_endpoint_type(desc)) { 561 case USB_ENDPOINT_XFER_CONTROL: 562 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL); 563 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE); 564 break; 565 case USB_ENDPOINT_XFER_ISOC: 566 if (!ep->can_isoc) { 567 DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n", 568 ep->ep.name); 569 return -EINVAL; 570 } 571 572 /* 573 * Bits 11:12 specify number of _additional_ 574 * transactions per microframe. 575 */ 576 nr_trans = ((usb_endpoint_maxp(desc) >> 11) & 3) + 1; 577 if (nr_trans > 3) 578 return -EINVAL; 579 580 ep->is_isoc = 1; 581 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO); 582 583 /* 584 * Do triple-buffering on high-bandwidth iso endpoints. 585 */ 586 if (nr_trans > 1 && ep->nr_banks == 3) 587 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE); 588 else 589 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); 590 ept_cfg |= USBA_BF(NB_TRANS, nr_trans); 591 break; 592 case USB_ENDPOINT_XFER_BULK: 593 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK); 594 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); 595 break; 596 case USB_ENDPOINT_XFER_INT: 597 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT); 598 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); 599 break; 600 } 601 602 spin_lock_irqsave(&ep->udc->lock, flags); 603 604 ep->ep.desc = desc; 605 ep->ep.maxpacket = maxpacket; 606 607 usba_ep_writel(ep, CFG, ept_cfg); 608 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); 609 610 if (ep->can_dma) { 611 u32 ctrl; 612 613 usba_int_enb_set(udc, usba_int_enb_get(udc) | 614 USBA_BF(EPT_INT, 1 << ep->index) | 615 USBA_BF(DMA_INT, 1 << ep->index)); 616 ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA; 617 usba_ep_writel(ep, CTL_ENB, ctrl); 618 } else { 619 usba_int_enb_set(udc, usba_int_enb_get(udc) | 620 USBA_BF(EPT_INT, 1 << ep->index)); 621 } 622 623 spin_unlock_irqrestore(&udc->lock, flags); 624 625 DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index, 626 (unsigned long)usba_ep_readl(ep, CFG)); 627 DBG(DBG_HW, "INT_ENB after init: %#08lx\n", 628 (unsigned long)usba_int_enb_get(udc)); 629 630 return 0; 631 } 632 633 static int usba_ep_disable(struct usb_ep *_ep) 634 { 635 struct usba_ep *ep = to_usba_ep(_ep); 636 struct usba_udc *udc = ep->udc; 637 LIST_HEAD(req_list); 638 unsigned long flags; 639 640 DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name); 641 642 spin_lock_irqsave(&udc->lock, flags); 643 644 if (!ep->ep.desc) { 645 spin_unlock_irqrestore(&udc->lock, flags); 646 /* REVISIT because this driver disables endpoints in 647 * reset_all_endpoints() before calling disconnect(), 648 * most gadget drivers would trigger this non-error ... 649 */ 650 if (udc->gadget.speed != USB_SPEED_UNKNOWN) 651 DBG(DBG_ERR, "ep_disable: %s not enabled\n", 652 ep->ep.name); 653 return -EINVAL; 654 } 655 ep->ep.desc = NULL; 656 657 list_splice_init(&ep->queue, &req_list); 658 if (ep->can_dma) { 659 usba_dma_writel(ep, CONTROL, 0); 660 usba_dma_writel(ep, ADDRESS, 0); 661 usba_dma_readl(ep, STATUS); 662 } 663 usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE); 664 usba_int_enb_set(udc, usba_int_enb_get(udc) & 665 ~USBA_BF(EPT_INT, 1 << ep->index)); 666 667 request_complete_list(ep, &req_list, -ESHUTDOWN); 668 669 spin_unlock_irqrestore(&udc->lock, flags); 670 671 return 0; 672 } 673 674 static struct usb_request * 675 usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) 676 { 677 struct usba_request *req; 678 679 DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags); 680 681 req = kzalloc(sizeof(*req), gfp_flags); 682 if (!req) 683 return NULL; 684 685 INIT_LIST_HEAD(&req->queue); 686 687 return &req->req; 688 } 689 690 static void 691 usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) 692 { 693 struct usba_request *req = to_usba_req(_req); 694 695 DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req); 696 697 kfree(req); 698 } 699 700 static int queue_dma(struct usba_udc *udc, struct usba_ep *ep, 701 struct usba_request *req, gfp_t gfp_flags) 702 { 703 unsigned long flags; 704 int ret; 705 706 DBG(DBG_DMA, "%s: req l/%u d/%pad %c%c%c\n", 707 ep->ep.name, req->req.length, &req->req.dma, 708 req->req.zero ? 'Z' : 'z', 709 req->req.short_not_ok ? 'S' : 's', 710 req->req.no_interrupt ? 'I' : 'i'); 711 712 if (req->req.length > 0x10000) { 713 /* Lengths from 0 to 65536 (inclusive) are supported */ 714 DBG(DBG_ERR, "invalid request length %u\n", req->req.length); 715 return -EINVAL; 716 } 717 718 ret = usb_gadget_map_request(&udc->gadget, &req->req, ep->is_in); 719 if (ret) 720 return ret; 721 722 req->using_dma = 1; 723 req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length) 724 | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE 725 | USBA_DMA_END_BUF_EN; 726 727 if (!ep->is_in) 728 req->ctrl |= USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE; 729 730 /* 731 * Add this request to the queue and submit for DMA if 732 * possible. Check if we're still alive first -- we may have 733 * received a reset since last time we checked. 734 */ 735 ret = -ESHUTDOWN; 736 spin_lock_irqsave(&udc->lock, flags); 737 if (ep->ep.desc) { 738 if (list_empty(&ep->queue)) 739 submit_request(ep, req); 740 741 list_add_tail(&req->queue, &ep->queue); 742 ret = 0; 743 } 744 spin_unlock_irqrestore(&udc->lock, flags); 745 746 return ret; 747 } 748 749 static int 750 usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) 751 { 752 struct usba_request *req = to_usba_req(_req); 753 struct usba_ep *ep = to_usba_ep(_ep); 754 struct usba_udc *udc = ep->udc; 755 unsigned long flags; 756 int ret; 757 758 DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n", 759 ep->ep.name, req, _req->length); 760 761 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN || 762 !ep->ep.desc) 763 return -ESHUTDOWN; 764 765 req->submitted = 0; 766 req->using_dma = 0; 767 req->last_transaction = 0; 768 769 _req->status = -EINPROGRESS; 770 _req->actual = 0; 771 772 if (ep->can_dma) 773 return queue_dma(udc, ep, req, gfp_flags); 774 775 /* May have received a reset since last time we checked */ 776 ret = -ESHUTDOWN; 777 spin_lock_irqsave(&udc->lock, flags); 778 if (ep->ep.desc) { 779 list_add_tail(&req->queue, &ep->queue); 780 781 if ((!ep_is_control(ep) && ep->is_in) || 782 (ep_is_control(ep) 783 && (ep->state == DATA_STAGE_IN 784 || ep->state == STATUS_STAGE_IN))) 785 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); 786 else 787 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY); 788 ret = 0; 789 } 790 spin_unlock_irqrestore(&udc->lock, flags); 791 792 return ret; 793 } 794 795 static void 796 usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status) 797 { 798 req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status); 799 } 800 801 static int stop_dma(struct usba_ep *ep, u32 *pstatus) 802 { 803 unsigned int timeout; 804 u32 status; 805 806 /* 807 * Stop the DMA controller. When writing both CH_EN 808 * and LINK to 0, the other bits are not affected. 809 */ 810 usba_dma_writel(ep, CONTROL, 0); 811 812 /* Wait for the FIFO to empty */ 813 for (timeout = 40; timeout; --timeout) { 814 status = usba_dma_readl(ep, STATUS); 815 if (!(status & USBA_DMA_CH_EN)) 816 break; 817 udelay(1); 818 } 819 820 if (pstatus) 821 *pstatus = status; 822 823 if (timeout == 0) { 824 dev_err(&ep->udc->pdev->dev, 825 "%s: timed out waiting for DMA FIFO to empty\n", 826 ep->ep.name); 827 return -ETIMEDOUT; 828 } 829 830 return 0; 831 } 832 833 static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) 834 { 835 struct usba_ep *ep = to_usba_ep(_ep); 836 struct usba_udc *udc = ep->udc; 837 struct usba_request *req; 838 unsigned long flags; 839 u32 status; 840 841 DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n", 842 ep->ep.name, req); 843 844 spin_lock_irqsave(&udc->lock, flags); 845 846 list_for_each_entry(req, &ep->queue, queue) { 847 if (&req->req == _req) 848 break; 849 } 850 851 if (&req->req != _req) { 852 spin_unlock_irqrestore(&udc->lock, flags); 853 return -EINVAL; 854 } 855 856 if (req->using_dma) { 857 /* 858 * If this request is currently being transferred, 859 * stop the DMA controller and reset the FIFO. 860 */ 861 if (ep->queue.next == &req->queue) { 862 status = usba_dma_readl(ep, STATUS); 863 if (status & USBA_DMA_CH_EN) 864 stop_dma(ep, &status); 865 866 #ifdef CONFIG_USB_GADGET_DEBUG_FS 867 ep->last_dma_status = status; 868 #endif 869 870 usba_writel(udc, EPT_RST, 1 << ep->index); 871 872 usba_update_req(ep, req, status); 873 } 874 } 875 876 /* 877 * Errors should stop the queue from advancing until the 878 * completion function returns. 879 */ 880 list_del_init(&req->queue); 881 882 request_complete(ep, req, -ECONNRESET); 883 884 /* Process the next request if any */ 885 submit_next_request(ep); 886 spin_unlock_irqrestore(&udc->lock, flags); 887 888 return 0; 889 } 890 891 static int usba_ep_set_halt(struct usb_ep *_ep, int value) 892 { 893 struct usba_ep *ep = to_usba_ep(_ep); 894 struct usba_udc *udc = ep->udc; 895 unsigned long flags; 896 int ret = 0; 897 898 DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name, 899 value ? "set" : "clear"); 900 901 if (!ep->ep.desc) { 902 DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n", 903 ep->ep.name); 904 return -ENODEV; 905 } 906 if (ep->is_isoc) { 907 DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n", 908 ep->ep.name); 909 return -ENOTTY; 910 } 911 912 spin_lock_irqsave(&udc->lock, flags); 913 914 /* 915 * We can't halt IN endpoints while there are still data to be 916 * transferred 917 */ 918 if (!list_empty(&ep->queue) 919 || ((value && ep->is_in && (usba_ep_readl(ep, STA) 920 & USBA_BF(BUSY_BANKS, -1L))))) { 921 ret = -EAGAIN; 922 } else { 923 if (value) 924 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL); 925 else 926 usba_ep_writel(ep, CLR_STA, 927 USBA_FORCE_STALL | USBA_TOGGLE_CLR); 928 usba_ep_readl(ep, STA); 929 } 930 931 spin_unlock_irqrestore(&udc->lock, flags); 932 933 return ret; 934 } 935 936 static int usba_ep_fifo_status(struct usb_ep *_ep) 937 { 938 struct usba_ep *ep = to_usba_ep(_ep); 939 940 return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA)); 941 } 942 943 static void usba_ep_fifo_flush(struct usb_ep *_ep) 944 { 945 struct usba_ep *ep = to_usba_ep(_ep); 946 struct usba_udc *udc = ep->udc; 947 948 usba_writel(udc, EPT_RST, 1 << ep->index); 949 } 950 951 static const struct usb_ep_ops usba_ep_ops = { 952 .enable = usba_ep_enable, 953 .disable = usba_ep_disable, 954 .alloc_request = usba_ep_alloc_request, 955 .free_request = usba_ep_free_request, 956 .queue = usba_ep_queue, 957 .dequeue = usba_ep_dequeue, 958 .set_halt = usba_ep_set_halt, 959 .fifo_status = usba_ep_fifo_status, 960 .fifo_flush = usba_ep_fifo_flush, 961 }; 962 963 static int usba_udc_get_frame(struct usb_gadget *gadget) 964 { 965 struct usba_udc *udc = to_usba_udc(gadget); 966 967 return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM)); 968 } 969 970 static int usba_udc_wakeup(struct usb_gadget *gadget) 971 { 972 struct usba_udc *udc = to_usba_udc(gadget); 973 unsigned long flags; 974 u32 ctrl; 975 int ret = -EINVAL; 976 977 spin_lock_irqsave(&udc->lock, flags); 978 if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) { 979 ctrl = usba_readl(udc, CTRL); 980 usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP); 981 ret = 0; 982 } 983 spin_unlock_irqrestore(&udc->lock, flags); 984 985 return ret; 986 } 987 988 static int 989 usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered) 990 { 991 struct usba_udc *udc = to_usba_udc(gadget); 992 unsigned long flags; 993 994 gadget->is_selfpowered = (is_selfpowered != 0); 995 spin_lock_irqsave(&udc->lock, flags); 996 if (is_selfpowered) 997 udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED; 998 else 999 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED); 1000 spin_unlock_irqrestore(&udc->lock, flags); 1001 1002 return 0; 1003 } 1004 1005 static int atmel_usba_start(struct usb_gadget *gadget, 1006 struct usb_gadget_driver *driver); 1007 static int atmel_usba_stop(struct usb_gadget *gadget); 1008 1009 static const struct usb_gadget_ops usba_udc_ops = { 1010 .get_frame = usba_udc_get_frame, 1011 .wakeup = usba_udc_wakeup, 1012 .set_selfpowered = usba_udc_set_selfpowered, 1013 .udc_start = atmel_usba_start, 1014 .udc_stop = atmel_usba_stop, 1015 }; 1016 1017 static struct usb_endpoint_descriptor usba_ep0_desc = { 1018 .bLength = USB_DT_ENDPOINT_SIZE, 1019 .bDescriptorType = USB_DT_ENDPOINT, 1020 .bEndpointAddress = 0, 1021 .bmAttributes = USB_ENDPOINT_XFER_CONTROL, 1022 .wMaxPacketSize = cpu_to_le16(64), 1023 /* FIXME: I have no idea what to put here */ 1024 .bInterval = 1, 1025 }; 1026 1027 static struct usb_gadget usba_gadget_template = { 1028 .ops = &usba_udc_ops, 1029 .max_speed = USB_SPEED_HIGH, 1030 .name = "atmel_usba_udc", 1031 }; 1032 1033 /* 1034 * Called with interrupts disabled and udc->lock held. 1035 */ 1036 static void reset_all_endpoints(struct usba_udc *udc) 1037 { 1038 struct usba_ep *ep; 1039 struct usba_request *req, *tmp_req; 1040 1041 usba_writel(udc, EPT_RST, ~0UL); 1042 1043 ep = to_usba_ep(udc->gadget.ep0); 1044 list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) { 1045 list_del_init(&req->queue); 1046 request_complete(ep, req, -ECONNRESET); 1047 } 1048 1049 /* NOTE: normally, the next call to the gadget driver is in 1050 * charge of disabling endpoints... usually disconnect(). 1051 * The exception would be entering a high speed test mode. 1052 * 1053 * FIXME remove this code ... and retest thoroughly. 1054 */ 1055 list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) { 1056 if (ep->ep.desc) { 1057 spin_unlock(&udc->lock); 1058 usba_ep_disable(&ep->ep); 1059 spin_lock(&udc->lock); 1060 } 1061 } 1062 } 1063 1064 static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex) 1065 { 1066 struct usba_ep *ep; 1067 1068 if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0) 1069 return to_usba_ep(udc->gadget.ep0); 1070 1071 list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) { 1072 u8 bEndpointAddress; 1073 1074 if (!ep->ep.desc) 1075 continue; 1076 bEndpointAddress = ep->ep.desc->bEndpointAddress; 1077 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN) 1078 continue; 1079 if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) 1080 == (wIndex & USB_ENDPOINT_NUMBER_MASK)) 1081 return ep; 1082 } 1083 1084 return NULL; 1085 } 1086 1087 /* Called with interrupts disabled and udc->lock held */ 1088 static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep) 1089 { 1090 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL); 1091 ep->state = WAIT_FOR_SETUP; 1092 } 1093 1094 static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep) 1095 { 1096 if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL) 1097 return 1; 1098 return 0; 1099 } 1100 1101 static inline void set_address(struct usba_udc *udc, unsigned int addr) 1102 { 1103 u32 regval; 1104 1105 DBG(DBG_BUS, "setting address %u...\n", addr); 1106 regval = usba_readl(udc, CTRL); 1107 regval = USBA_BFINS(DEV_ADDR, addr, regval); 1108 usba_writel(udc, CTRL, regval); 1109 } 1110 1111 static int do_test_mode(struct usba_udc *udc) 1112 { 1113 static const char test_packet_buffer[] = { 1114 /* JKJKJKJK * 9 */ 1115 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 1116 /* JJKKJJKK * 8 */ 1117 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 1118 /* JJKKJJKK * 8 */ 1119 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 1120 /* JJJJJJJKKKKKKK * 8 */ 1121 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1122 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1123 /* JJJJJJJK * 8 */ 1124 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 1125 /* {JKKKKKKK * 10}, JK */ 1126 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E 1127 }; 1128 struct usba_ep *ep; 1129 struct device *dev = &udc->pdev->dev; 1130 int test_mode; 1131 1132 test_mode = udc->test_mode; 1133 1134 /* Start from a clean slate */ 1135 reset_all_endpoints(udc); 1136 1137 switch (test_mode) { 1138 case 0x0100: 1139 /* Test_J */ 1140 usba_writel(udc, TST, USBA_TST_J_MODE); 1141 dev_info(dev, "Entering Test_J mode...\n"); 1142 break; 1143 case 0x0200: 1144 /* Test_K */ 1145 usba_writel(udc, TST, USBA_TST_K_MODE); 1146 dev_info(dev, "Entering Test_K mode...\n"); 1147 break; 1148 case 0x0300: 1149 /* 1150 * Test_SE0_NAK: Force high-speed mode and set up ep0 1151 * for Bulk IN transfers 1152 */ 1153 ep = &udc->usba_ep[0]; 1154 usba_writel(udc, TST, 1155 USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH)); 1156 usba_ep_writel(ep, CFG, 1157 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64) 1158 | USBA_EPT_DIR_IN 1159 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK) 1160 | USBA_BF(BK_NUMBER, 1)); 1161 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) { 1162 set_protocol_stall(udc, ep); 1163 dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n"); 1164 } else { 1165 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); 1166 dev_info(dev, "Entering Test_SE0_NAK mode...\n"); 1167 } 1168 break; 1169 case 0x0400: 1170 /* Test_Packet */ 1171 ep = &udc->usba_ep[0]; 1172 usba_ep_writel(ep, CFG, 1173 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64) 1174 | USBA_EPT_DIR_IN 1175 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK) 1176 | USBA_BF(BK_NUMBER, 1)); 1177 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) { 1178 set_protocol_stall(udc, ep); 1179 dev_err(dev, "Test_Packet: ep0 not mapped\n"); 1180 } else { 1181 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); 1182 usba_writel(udc, TST, USBA_TST_PKT_MODE); 1183 memcpy_toio(ep->fifo, test_packet_buffer, 1184 sizeof(test_packet_buffer)); 1185 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); 1186 dev_info(dev, "Entering Test_Packet mode...\n"); 1187 } 1188 break; 1189 default: 1190 dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode); 1191 return -EINVAL; 1192 } 1193 1194 return 0; 1195 } 1196 1197 /* Avoid overly long expressions */ 1198 static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq) 1199 { 1200 if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP)) 1201 return true; 1202 return false; 1203 } 1204 1205 static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq) 1206 { 1207 if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE)) 1208 return true; 1209 return false; 1210 } 1211 1212 static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq) 1213 { 1214 if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT)) 1215 return true; 1216 return false; 1217 } 1218 1219 static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep, 1220 struct usb_ctrlrequest *crq) 1221 { 1222 int retval = 0; 1223 1224 switch (crq->bRequest) { 1225 case USB_REQ_GET_STATUS: { 1226 u16 status; 1227 1228 if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) { 1229 status = cpu_to_le16(udc->devstatus); 1230 } else if (crq->bRequestType 1231 == (USB_DIR_IN | USB_RECIP_INTERFACE)) { 1232 status = cpu_to_le16(0); 1233 } else if (crq->bRequestType 1234 == (USB_DIR_IN | USB_RECIP_ENDPOINT)) { 1235 struct usba_ep *target; 1236 1237 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); 1238 if (!target) 1239 goto stall; 1240 1241 status = 0; 1242 if (is_stalled(udc, target)) 1243 status |= cpu_to_le16(1); 1244 } else 1245 goto delegate; 1246 1247 /* Write directly to the FIFO. No queueing is done. */ 1248 if (crq->wLength != cpu_to_le16(sizeof(status))) 1249 goto stall; 1250 ep->state = DATA_STAGE_IN; 1251 usba_io_writew(status, ep->fifo); 1252 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); 1253 break; 1254 } 1255 1256 case USB_REQ_CLEAR_FEATURE: { 1257 if (crq->bRequestType == USB_RECIP_DEVICE) { 1258 if (feature_is_dev_remote_wakeup(crq)) 1259 udc->devstatus 1260 &= ~(1 << USB_DEVICE_REMOTE_WAKEUP); 1261 else 1262 /* Can't CLEAR_FEATURE TEST_MODE */ 1263 goto stall; 1264 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) { 1265 struct usba_ep *target; 1266 1267 if (crq->wLength != cpu_to_le16(0) 1268 || !feature_is_ep_halt(crq)) 1269 goto stall; 1270 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); 1271 if (!target) 1272 goto stall; 1273 1274 usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL); 1275 if (target->index != 0) 1276 usba_ep_writel(target, CLR_STA, 1277 USBA_TOGGLE_CLR); 1278 } else { 1279 goto delegate; 1280 } 1281 1282 send_status(udc, ep); 1283 break; 1284 } 1285 1286 case USB_REQ_SET_FEATURE: { 1287 if (crq->bRequestType == USB_RECIP_DEVICE) { 1288 if (feature_is_dev_test_mode(crq)) { 1289 send_status(udc, ep); 1290 ep->state = STATUS_STAGE_TEST; 1291 udc->test_mode = le16_to_cpu(crq->wIndex); 1292 return 0; 1293 } else if (feature_is_dev_remote_wakeup(crq)) { 1294 udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP; 1295 } else { 1296 goto stall; 1297 } 1298 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) { 1299 struct usba_ep *target; 1300 1301 if (crq->wLength != cpu_to_le16(0) 1302 || !feature_is_ep_halt(crq)) 1303 goto stall; 1304 1305 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); 1306 if (!target) 1307 goto stall; 1308 1309 usba_ep_writel(target, SET_STA, USBA_FORCE_STALL); 1310 } else 1311 goto delegate; 1312 1313 send_status(udc, ep); 1314 break; 1315 } 1316 1317 case USB_REQ_SET_ADDRESS: 1318 if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE)) 1319 goto delegate; 1320 1321 set_address(udc, le16_to_cpu(crq->wValue)); 1322 send_status(udc, ep); 1323 ep->state = STATUS_STAGE_ADDR; 1324 break; 1325 1326 default: 1327 delegate: 1328 spin_unlock(&udc->lock); 1329 retval = udc->driver->setup(&udc->gadget, crq); 1330 spin_lock(&udc->lock); 1331 } 1332 1333 return retval; 1334 1335 stall: 1336 pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, " 1337 "halting endpoint...\n", 1338 ep->ep.name, crq->bRequestType, crq->bRequest, 1339 le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex), 1340 le16_to_cpu(crq->wLength)); 1341 set_protocol_stall(udc, ep); 1342 return -1; 1343 } 1344 1345 static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep) 1346 { 1347 struct usba_request *req; 1348 u32 epstatus; 1349 u32 epctrl; 1350 1351 restart: 1352 epstatus = usba_ep_readl(ep, STA); 1353 epctrl = usba_ep_readl(ep, CTL); 1354 1355 DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n", 1356 ep->ep.name, ep->state, epstatus, epctrl); 1357 1358 req = NULL; 1359 if (!list_empty(&ep->queue)) 1360 req = list_entry(ep->queue.next, 1361 struct usba_request, queue); 1362 1363 if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) { 1364 if (req->submitted) 1365 next_fifo_transaction(ep, req); 1366 else 1367 submit_request(ep, req); 1368 1369 if (req->last_transaction) { 1370 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); 1371 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); 1372 } 1373 goto restart; 1374 } 1375 if ((epstatus & epctrl) & USBA_TX_COMPLETE) { 1376 usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE); 1377 1378 switch (ep->state) { 1379 case DATA_STAGE_IN: 1380 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY); 1381 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); 1382 ep->state = STATUS_STAGE_OUT; 1383 break; 1384 case STATUS_STAGE_ADDR: 1385 /* Activate our new address */ 1386 usba_writel(udc, CTRL, (usba_readl(udc, CTRL) 1387 | USBA_FADDR_EN)); 1388 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); 1389 ep->state = WAIT_FOR_SETUP; 1390 break; 1391 case STATUS_STAGE_IN: 1392 if (req) { 1393 list_del_init(&req->queue); 1394 request_complete(ep, req, 0); 1395 submit_next_request(ep); 1396 } 1397 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); 1398 ep->state = WAIT_FOR_SETUP; 1399 break; 1400 case STATUS_STAGE_TEST: 1401 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); 1402 ep->state = WAIT_FOR_SETUP; 1403 if (do_test_mode(udc)) 1404 set_protocol_stall(udc, ep); 1405 break; 1406 default: 1407 pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, " 1408 "halting endpoint...\n", 1409 ep->ep.name, ep->state); 1410 set_protocol_stall(udc, ep); 1411 break; 1412 } 1413 1414 goto restart; 1415 } 1416 if ((epstatus & epctrl) & USBA_RX_BK_RDY) { 1417 switch (ep->state) { 1418 case STATUS_STAGE_OUT: 1419 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); 1420 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); 1421 1422 if (req) { 1423 list_del_init(&req->queue); 1424 request_complete(ep, req, 0); 1425 } 1426 ep->state = WAIT_FOR_SETUP; 1427 break; 1428 1429 case DATA_STAGE_OUT: 1430 receive_data(ep); 1431 break; 1432 1433 default: 1434 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); 1435 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); 1436 pr_err("udc: %s: RXRDY: Invalid endpoint state %d, " 1437 "halting endpoint...\n", 1438 ep->ep.name, ep->state); 1439 set_protocol_stall(udc, ep); 1440 break; 1441 } 1442 1443 goto restart; 1444 } 1445 if (epstatus & USBA_RX_SETUP) { 1446 union { 1447 struct usb_ctrlrequest crq; 1448 unsigned long data[2]; 1449 } crq; 1450 unsigned int pkt_len; 1451 int ret; 1452 1453 if (ep->state != WAIT_FOR_SETUP) { 1454 /* 1455 * Didn't expect a SETUP packet at this 1456 * point. Clean up any pending requests (which 1457 * may be successful). 1458 */ 1459 int status = -EPROTO; 1460 1461 /* 1462 * RXRDY and TXCOMP are dropped when SETUP 1463 * packets arrive. Just pretend we received 1464 * the status packet. 1465 */ 1466 if (ep->state == STATUS_STAGE_OUT 1467 || ep->state == STATUS_STAGE_IN) { 1468 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); 1469 status = 0; 1470 } 1471 1472 if (req) { 1473 list_del_init(&req->queue); 1474 request_complete(ep, req, status); 1475 } 1476 } 1477 1478 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA)); 1479 DBG(DBG_HW, "Packet length: %u\n", pkt_len); 1480 if (pkt_len != sizeof(crq)) { 1481 pr_warning("udc: Invalid packet length %u " 1482 "(expected %zu)\n", pkt_len, sizeof(crq)); 1483 set_protocol_stall(udc, ep); 1484 return; 1485 } 1486 1487 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo); 1488 memcpy_fromio(crq.data, ep->fifo, sizeof(crq)); 1489 1490 /* Free up one bank in the FIFO so that we can 1491 * generate or receive a reply right away. */ 1492 usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP); 1493 1494 /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n", 1495 ep->state, crq.crq.bRequestType, 1496 crq.crq.bRequest); */ 1497 1498 if (crq.crq.bRequestType & USB_DIR_IN) { 1499 /* 1500 * The USB 2.0 spec states that "if wLength is 1501 * zero, there is no data transfer phase." 1502 * However, testusb #14 seems to actually 1503 * expect a data phase even if wLength = 0... 1504 */ 1505 ep->state = DATA_STAGE_IN; 1506 } else { 1507 if (crq.crq.wLength != cpu_to_le16(0)) 1508 ep->state = DATA_STAGE_OUT; 1509 else 1510 ep->state = STATUS_STAGE_IN; 1511 } 1512 1513 ret = -1; 1514 if (ep->index == 0) 1515 ret = handle_ep0_setup(udc, ep, &crq.crq); 1516 else { 1517 spin_unlock(&udc->lock); 1518 ret = udc->driver->setup(&udc->gadget, &crq.crq); 1519 spin_lock(&udc->lock); 1520 } 1521 1522 DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n", 1523 crq.crq.bRequestType, crq.crq.bRequest, 1524 le16_to_cpu(crq.crq.wLength), ep->state, ret); 1525 1526 if (ret < 0) { 1527 /* Let the host know that we failed */ 1528 set_protocol_stall(udc, ep); 1529 } 1530 } 1531 } 1532 1533 static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep) 1534 { 1535 struct usba_request *req; 1536 u32 epstatus; 1537 u32 epctrl; 1538 1539 epstatus = usba_ep_readl(ep, STA); 1540 epctrl = usba_ep_readl(ep, CTL); 1541 1542 DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus); 1543 1544 while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) { 1545 DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name); 1546 1547 if (list_empty(&ep->queue)) { 1548 dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n"); 1549 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); 1550 return; 1551 } 1552 1553 req = list_entry(ep->queue.next, struct usba_request, queue); 1554 1555 if (req->using_dma) { 1556 /* Send a zero-length packet */ 1557 usba_ep_writel(ep, SET_STA, 1558 USBA_TX_PK_RDY); 1559 usba_ep_writel(ep, CTL_DIS, 1560 USBA_TX_PK_RDY); 1561 list_del_init(&req->queue); 1562 submit_next_request(ep); 1563 request_complete(ep, req, 0); 1564 } else { 1565 if (req->submitted) 1566 next_fifo_transaction(ep, req); 1567 else 1568 submit_request(ep, req); 1569 1570 if (req->last_transaction) { 1571 list_del_init(&req->queue); 1572 submit_next_request(ep); 1573 request_complete(ep, req, 0); 1574 } 1575 } 1576 1577 epstatus = usba_ep_readl(ep, STA); 1578 epctrl = usba_ep_readl(ep, CTL); 1579 } 1580 if ((epstatus & epctrl) & USBA_RX_BK_RDY) { 1581 DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name); 1582 receive_data(ep); 1583 } 1584 } 1585 1586 static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep) 1587 { 1588 struct usba_request *req; 1589 u32 status, control, pending; 1590 1591 status = usba_dma_readl(ep, STATUS); 1592 control = usba_dma_readl(ep, CONTROL); 1593 #ifdef CONFIG_USB_GADGET_DEBUG_FS 1594 ep->last_dma_status = status; 1595 #endif 1596 pending = status & control; 1597 DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control); 1598 1599 if (status & USBA_DMA_CH_EN) { 1600 dev_err(&udc->pdev->dev, 1601 "DMA_CH_EN is set after transfer is finished!\n"); 1602 dev_err(&udc->pdev->dev, 1603 "status=%#08x, pending=%#08x, control=%#08x\n", 1604 status, pending, control); 1605 1606 /* 1607 * try to pretend nothing happened. We might have to 1608 * do something here... 1609 */ 1610 } 1611 1612 if (list_empty(&ep->queue)) 1613 /* Might happen if a reset comes along at the right moment */ 1614 return; 1615 1616 if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) { 1617 req = list_entry(ep->queue.next, struct usba_request, queue); 1618 usba_update_req(ep, req, status); 1619 1620 list_del_init(&req->queue); 1621 submit_next_request(ep); 1622 request_complete(ep, req, 0); 1623 } 1624 } 1625 1626 static irqreturn_t usba_udc_irq(int irq, void *devid) 1627 { 1628 struct usba_udc *udc = devid; 1629 u32 status, int_enb; 1630 u32 dma_status; 1631 u32 ep_status; 1632 1633 spin_lock(&udc->lock); 1634 1635 int_enb = usba_int_enb_get(udc); 1636 status = usba_readl(udc, INT_STA) & (int_enb | USBA_HIGH_SPEED); 1637 DBG(DBG_INT, "irq, status=%#08x\n", status); 1638 1639 if (status & USBA_DET_SUSPEND) { 1640 toggle_bias(udc, 0); 1641 usba_writel(udc, INT_CLR, USBA_DET_SUSPEND); 1642 usba_int_enb_set(udc, int_enb | USBA_WAKE_UP); 1643 udc->bias_pulse_needed = true; 1644 DBG(DBG_BUS, "Suspend detected\n"); 1645 if (udc->gadget.speed != USB_SPEED_UNKNOWN 1646 && udc->driver && udc->driver->suspend) { 1647 spin_unlock(&udc->lock); 1648 udc->driver->suspend(&udc->gadget); 1649 spin_lock(&udc->lock); 1650 } 1651 } 1652 1653 if (status & USBA_WAKE_UP) { 1654 toggle_bias(udc, 1); 1655 usba_writel(udc, INT_CLR, USBA_WAKE_UP); 1656 usba_int_enb_set(udc, int_enb & ~USBA_WAKE_UP); 1657 DBG(DBG_BUS, "Wake Up CPU detected\n"); 1658 } 1659 1660 if (status & USBA_END_OF_RESUME) { 1661 usba_writel(udc, INT_CLR, USBA_END_OF_RESUME); 1662 generate_bias_pulse(udc); 1663 DBG(DBG_BUS, "Resume detected\n"); 1664 if (udc->gadget.speed != USB_SPEED_UNKNOWN 1665 && udc->driver && udc->driver->resume) { 1666 spin_unlock(&udc->lock); 1667 udc->driver->resume(&udc->gadget); 1668 spin_lock(&udc->lock); 1669 } 1670 } 1671 1672 dma_status = USBA_BFEXT(DMA_INT, status); 1673 if (dma_status) { 1674 int i; 1675 1676 for (i = 1; i <= USBA_NR_DMAS; i++) 1677 if (dma_status & (1 << i)) 1678 usba_dma_irq(udc, &udc->usba_ep[i]); 1679 } 1680 1681 ep_status = USBA_BFEXT(EPT_INT, status); 1682 if (ep_status) { 1683 int i; 1684 1685 for (i = 0; i < udc->num_ep; i++) 1686 if (ep_status & (1 << i)) { 1687 if (ep_is_control(&udc->usba_ep[i])) 1688 usba_control_irq(udc, &udc->usba_ep[i]); 1689 else 1690 usba_ep_irq(udc, &udc->usba_ep[i]); 1691 } 1692 } 1693 1694 if (status & USBA_END_OF_RESET) { 1695 struct usba_ep *ep0; 1696 1697 usba_writel(udc, INT_CLR, USBA_END_OF_RESET); 1698 generate_bias_pulse(udc); 1699 reset_all_endpoints(udc); 1700 1701 if (udc->gadget.speed != USB_SPEED_UNKNOWN && udc->driver) { 1702 udc->gadget.speed = USB_SPEED_UNKNOWN; 1703 spin_unlock(&udc->lock); 1704 usb_gadget_udc_reset(&udc->gadget, udc->driver); 1705 spin_lock(&udc->lock); 1706 } 1707 1708 if (status & USBA_HIGH_SPEED) 1709 udc->gadget.speed = USB_SPEED_HIGH; 1710 else 1711 udc->gadget.speed = USB_SPEED_FULL; 1712 DBG(DBG_BUS, "%s bus reset detected\n", 1713 usb_speed_string(udc->gadget.speed)); 1714 1715 ep0 = &udc->usba_ep[0]; 1716 ep0->ep.desc = &usba_ep0_desc; 1717 ep0->state = WAIT_FOR_SETUP; 1718 usba_ep_writel(ep0, CFG, 1719 (USBA_BF(EPT_SIZE, EP0_EPT_SIZE) 1720 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL) 1721 | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE))); 1722 usba_ep_writel(ep0, CTL_ENB, 1723 USBA_EPT_ENABLE | USBA_RX_SETUP); 1724 usba_int_enb_set(udc, int_enb | USBA_BF(EPT_INT, 1) | 1725 USBA_DET_SUSPEND | USBA_END_OF_RESUME); 1726 1727 /* 1728 * Unclear why we hit this irregularly, e.g. in usbtest, 1729 * but it's clearly harmless... 1730 */ 1731 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED)) 1732 dev_dbg(&udc->pdev->dev, 1733 "ODD: EP0 configuration is invalid!\n"); 1734 } 1735 1736 spin_unlock(&udc->lock); 1737 1738 return IRQ_HANDLED; 1739 } 1740 1741 static int start_clock(struct usba_udc *udc) 1742 { 1743 int ret; 1744 1745 if (udc->clocked) 1746 return 0; 1747 1748 ret = clk_prepare_enable(udc->pclk); 1749 if (ret) 1750 return ret; 1751 ret = clk_prepare_enable(udc->hclk); 1752 if (ret) { 1753 clk_disable_unprepare(udc->pclk); 1754 return ret; 1755 } 1756 1757 udc->clocked = true; 1758 return 0; 1759 } 1760 1761 static void stop_clock(struct usba_udc *udc) 1762 { 1763 if (!udc->clocked) 1764 return; 1765 1766 clk_disable_unprepare(udc->hclk); 1767 clk_disable_unprepare(udc->pclk); 1768 1769 udc->clocked = false; 1770 } 1771 1772 static int usba_start(struct usba_udc *udc) 1773 { 1774 unsigned long flags; 1775 int ret; 1776 1777 ret = start_clock(udc); 1778 if (ret) 1779 return ret; 1780 1781 spin_lock_irqsave(&udc->lock, flags); 1782 toggle_bias(udc, 1); 1783 usba_writel(udc, CTRL, USBA_ENABLE_MASK); 1784 usba_int_enb_set(udc, USBA_END_OF_RESET); 1785 spin_unlock_irqrestore(&udc->lock, flags); 1786 1787 return 0; 1788 } 1789 1790 static void usba_stop(struct usba_udc *udc) 1791 { 1792 unsigned long flags; 1793 1794 spin_lock_irqsave(&udc->lock, flags); 1795 udc->gadget.speed = USB_SPEED_UNKNOWN; 1796 reset_all_endpoints(udc); 1797 1798 /* This will also disable the DP pullup */ 1799 toggle_bias(udc, 0); 1800 usba_writel(udc, CTRL, USBA_DISABLE_MASK); 1801 spin_unlock_irqrestore(&udc->lock, flags); 1802 1803 stop_clock(udc); 1804 } 1805 1806 static irqreturn_t usba_vbus_irq_thread(int irq, void *devid) 1807 { 1808 struct usba_udc *udc = devid; 1809 int vbus; 1810 1811 /* debounce */ 1812 udelay(10); 1813 1814 mutex_lock(&udc->vbus_mutex); 1815 1816 vbus = vbus_is_present(udc); 1817 if (vbus != udc->vbus_prev) { 1818 if (vbus) { 1819 usba_start(udc); 1820 } else { 1821 usba_stop(udc); 1822 1823 if (udc->driver->disconnect) 1824 udc->driver->disconnect(&udc->gadget); 1825 } 1826 udc->vbus_prev = vbus; 1827 } 1828 1829 mutex_unlock(&udc->vbus_mutex); 1830 return IRQ_HANDLED; 1831 } 1832 1833 static int atmel_usba_start(struct usb_gadget *gadget, 1834 struct usb_gadget_driver *driver) 1835 { 1836 int ret; 1837 struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget); 1838 unsigned long flags; 1839 1840 spin_lock_irqsave(&udc->lock, flags); 1841 udc->devstatus = 1 << USB_DEVICE_SELF_POWERED; 1842 udc->driver = driver; 1843 spin_unlock_irqrestore(&udc->lock, flags); 1844 1845 mutex_lock(&udc->vbus_mutex); 1846 1847 if (gpio_is_valid(udc->vbus_pin)) 1848 enable_irq(gpio_to_irq(udc->vbus_pin)); 1849 1850 /* If Vbus is present, enable the controller and wait for reset */ 1851 udc->vbus_prev = vbus_is_present(udc); 1852 if (udc->vbus_prev) { 1853 ret = usba_start(udc); 1854 if (ret) 1855 goto err; 1856 } 1857 1858 mutex_unlock(&udc->vbus_mutex); 1859 return 0; 1860 1861 err: 1862 if (gpio_is_valid(udc->vbus_pin)) 1863 disable_irq(gpio_to_irq(udc->vbus_pin)); 1864 1865 mutex_unlock(&udc->vbus_mutex); 1866 1867 spin_lock_irqsave(&udc->lock, flags); 1868 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED); 1869 udc->driver = NULL; 1870 spin_unlock_irqrestore(&udc->lock, flags); 1871 return ret; 1872 } 1873 1874 static int atmel_usba_stop(struct usb_gadget *gadget) 1875 { 1876 struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget); 1877 1878 if (gpio_is_valid(udc->vbus_pin)) 1879 disable_irq(gpio_to_irq(udc->vbus_pin)); 1880 1881 usba_stop(udc); 1882 1883 udc->driver = NULL; 1884 1885 return 0; 1886 } 1887 1888 #ifdef CONFIG_OF 1889 static void at91sam9rl_toggle_bias(struct usba_udc *udc, int is_on) 1890 { 1891 unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR); 1892 1893 if (is_on) 1894 at91_pmc_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN); 1895 else 1896 at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN)); 1897 } 1898 1899 static void at91sam9g45_pulse_bias(struct usba_udc *udc) 1900 { 1901 unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR); 1902 1903 at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN)); 1904 at91_pmc_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN); 1905 } 1906 1907 static const struct usba_udc_errata at91sam9rl_errata = { 1908 .toggle_bias = at91sam9rl_toggle_bias, 1909 }; 1910 1911 static const struct usba_udc_errata at91sam9g45_errata = { 1912 .pulse_bias = at91sam9g45_pulse_bias, 1913 }; 1914 1915 static const struct of_device_id atmel_udc_dt_ids[] = { 1916 { .compatible = "atmel,at91sam9rl-udc", .data = &at91sam9rl_errata }, 1917 { .compatible = "atmel,at91sam9g45-udc", .data = &at91sam9g45_errata }, 1918 { .compatible = "atmel,sama5d3-udc" }, 1919 { /* sentinel */ } 1920 }; 1921 1922 MODULE_DEVICE_TABLE(of, atmel_udc_dt_ids); 1923 1924 static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev, 1925 struct usba_udc *udc) 1926 { 1927 u32 val; 1928 const char *name; 1929 enum of_gpio_flags flags; 1930 struct device_node *np = pdev->dev.of_node; 1931 const struct of_device_id *match; 1932 struct device_node *pp; 1933 int i, ret; 1934 struct usba_ep *eps, *ep; 1935 1936 match = of_match_node(atmel_udc_dt_ids, np); 1937 if (!match) 1938 return ERR_PTR(-EINVAL); 1939 1940 udc->errata = match->data; 1941 1942 udc->num_ep = 0; 1943 1944 udc->vbus_pin = of_get_named_gpio_flags(np, "atmel,vbus-gpio", 0, 1945 &flags); 1946 udc->vbus_pin_inverted = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0; 1947 1948 pp = NULL; 1949 while ((pp = of_get_next_child(np, pp))) 1950 udc->num_ep++; 1951 1952 eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * udc->num_ep, 1953 GFP_KERNEL); 1954 if (!eps) 1955 return ERR_PTR(-ENOMEM); 1956 1957 udc->gadget.ep0 = &eps[0].ep; 1958 1959 INIT_LIST_HEAD(&eps[0].ep.ep_list); 1960 1961 pp = NULL; 1962 i = 0; 1963 while ((pp = of_get_next_child(np, pp))) { 1964 ep = &eps[i]; 1965 1966 ret = of_property_read_u32(pp, "reg", &val); 1967 if (ret) { 1968 dev_err(&pdev->dev, "of_probe: reg error(%d)\n", ret); 1969 goto err; 1970 } 1971 ep->index = val; 1972 1973 ret = of_property_read_u32(pp, "atmel,fifo-size", &val); 1974 if (ret) { 1975 dev_err(&pdev->dev, "of_probe: fifo-size error(%d)\n", ret); 1976 goto err; 1977 } 1978 ep->fifo_size = val; 1979 1980 ret = of_property_read_u32(pp, "atmel,nb-banks", &val); 1981 if (ret) { 1982 dev_err(&pdev->dev, "of_probe: nb-banks error(%d)\n", ret); 1983 goto err; 1984 } 1985 ep->nr_banks = val; 1986 1987 ep->can_dma = of_property_read_bool(pp, "atmel,can-dma"); 1988 ep->can_isoc = of_property_read_bool(pp, "atmel,can-isoc"); 1989 1990 ret = of_property_read_string(pp, "name", &name); 1991 if (ret) { 1992 dev_err(&pdev->dev, "of_probe: name error(%d)\n", ret); 1993 goto err; 1994 } 1995 ep->ep.name = name; 1996 1997 ep->ep_regs = udc->regs + USBA_EPT_BASE(i); 1998 ep->dma_regs = udc->regs + USBA_DMA_BASE(i); 1999 ep->fifo = udc->fifo + USBA_FIFO_BASE(i); 2000 ep->ep.ops = &usba_ep_ops; 2001 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size); 2002 ep->udc = udc; 2003 INIT_LIST_HEAD(&ep->queue); 2004 2005 if (ep->index == 0) { 2006 ep->ep.caps.type_control = true; 2007 } else { 2008 ep->ep.caps.type_iso = ep->can_isoc; 2009 ep->ep.caps.type_bulk = true; 2010 ep->ep.caps.type_int = true; 2011 } 2012 2013 ep->ep.caps.dir_in = true; 2014 ep->ep.caps.dir_out = true; 2015 2016 if (i) 2017 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); 2018 2019 i++; 2020 } 2021 2022 if (i == 0) { 2023 dev_err(&pdev->dev, "of_probe: no endpoint specified\n"); 2024 ret = -EINVAL; 2025 goto err; 2026 } 2027 2028 return eps; 2029 err: 2030 return ERR_PTR(ret); 2031 } 2032 #else 2033 static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev, 2034 struct usba_udc *udc) 2035 { 2036 return ERR_PTR(-ENOSYS); 2037 } 2038 #endif 2039 2040 static struct usba_ep * usba_udc_pdata(struct platform_device *pdev, 2041 struct usba_udc *udc) 2042 { 2043 struct usba_platform_data *pdata = dev_get_platdata(&pdev->dev); 2044 struct usba_ep *eps; 2045 int i; 2046 2047 if (!pdata) 2048 return ERR_PTR(-ENXIO); 2049 2050 eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * pdata->num_ep, 2051 GFP_KERNEL); 2052 if (!eps) 2053 return ERR_PTR(-ENOMEM); 2054 2055 udc->gadget.ep0 = &eps[0].ep; 2056 2057 udc->vbus_pin = pdata->vbus_pin; 2058 udc->vbus_pin_inverted = pdata->vbus_pin_inverted; 2059 udc->num_ep = pdata->num_ep; 2060 2061 INIT_LIST_HEAD(&eps[0].ep.ep_list); 2062 2063 for (i = 0; i < pdata->num_ep; i++) { 2064 struct usba_ep *ep = &eps[i]; 2065 2066 ep->ep_regs = udc->regs + USBA_EPT_BASE(i); 2067 ep->dma_regs = udc->regs + USBA_DMA_BASE(i); 2068 ep->fifo = udc->fifo + USBA_FIFO_BASE(i); 2069 ep->ep.ops = &usba_ep_ops; 2070 ep->ep.name = pdata->ep[i].name; 2071 ep->fifo_size = pdata->ep[i].fifo_size; 2072 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size); 2073 ep->udc = udc; 2074 INIT_LIST_HEAD(&ep->queue); 2075 ep->nr_banks = pdata->ep[i].nr_banks; 2076 ep->index = pdata->ep[i].index; 2077 ep->can_dma = pdata->ep[i].can_dma; 2078 ep->can_isoc = pdata->ep[i].can_isoc; 2079 2080 if (i == 0) { 2081 ep->ep.caps.type_control = true; 2082 } else { 2083 ep->ep.caps.type_iso = ep->can_isoc; 2084 ep->ep.caps.type_bulk = true; 2085 ep->ep.caps.type_int = true; 2086 } 2087 2088 ep->ep.caps.dir_in = true; 2089 ep->ep.caps.dir_out = true; 2090 2091 if (i) 2092 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); 2093 } 2094 2095 return eps; 2096 } 2097 2098 static int usba_udc_probe(struct platform_device *pdev) 2099 { 2100 struct resource *regs, *fifo; 2101 struct clk *pclk, *hclk; 2102 struct usba_udc *udc; 2103 int irq, ret, i; 2104 2105 udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL); 2106 if (!udc) 2107 return -ENOMEM; 2108 2109 udc->gadget = usba_gadget_template; 2110 INIT_LIST_HEAD(&udc->gadget.ep_list); 2111 2112 regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID); 2113 fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID); 2114 if (!regs || !fifo) 2115 return -ENXIO; 2116 2117 irq = platform_get_irq(pdev, 0); 2118 if (irq < 0) 2119 return irq; 2120 2121 pclk = devm_clk_get(&pdev->dev, "pclk"); 2122 if (IS_ERR(pclk)) 2123 return PTR_ERR(pclk); 2124 hclk = devm_clk_get(&pdev->dev, "hclk"); 2125 if (IS_ERR(hclk)) 2126 return PTR_ERR(hclk); 2127 2128 spin_lock_init(&udc->lock); 2129 mutex_init(&udc->vbus_mutex); 2130 udc->pdev = pdev; 2131 udc->pclk = pclk; 2132 udc->hclk = hclk; 2133 udc->vbus_pin = -ENODEV; 2134 2135 ret = -ENOMEM; 2136 udc->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs)); 2137 if (!udc->regs) { 2138 dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n"); 2139 return ret; 2140 } 2141 dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n", 2142 (unsigned long)regs->start, udc->regs); 2143 udc->fifo = devm_ioremap(&pdev->dev, fifo->start, resource_size(fifo)); 2144 if (!udc->fifo) { 2145 dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n"); 2146 return ret; 2147 } 2148 dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n", 2149 (unsigned long)fifo->start, udc->fifo); 2150 2151 platform_set_drvdata(pdev, udc); 2152 2153 /* Make sure we start from a clean slate */ 2154 ret = clk_prepare_enable(pclk); 2155 if (ret) { 2156 dev_err(&pdev->dev, "Unable to enable pclk, aborting.\n"); 2157 return ret; 2158 } 2159 2160 usba_writel(udc, CTRL, USBA_DISABLE_MASK); 2161 clk_disable_unprepare(pclk); 2162 2163 if (pdev->dev.of_node) 2164 udc->usba_ep = atmel_udc_of_init(pdev, udc); 2165 else 2166 udc->usba_ep = usba_udc_pdata(pdev, udc); 2167 2168 toggle_bias(udc, 0); 2169 2170 if (IS_ERR(udc->usba_ep)) 2171 return PTR_ERR(udc->usba_ep); 2172 2173 ret = devm_request_irq(&pdev->dev, irq, usba_udc_irq, 0, 2174 "atmel_usba_udc", udc); 2175 if (ret) { 2176 dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n", 2177 irq, ret); 2178 return ret; 2179 } 2180 udc->irq = irq; 2181 2182 if (gpio_is_valid(udc->vbus_pin)) { 2183 if (!devm_gpio_request(&pdev->dev, udc->vbus_pin, "atmel_usba_udc")) { 2184 irq_set_status_flags(gpio_to_irq(udc->vbus_pin), 2185 IRQ_NOAUTOEN); 2186 ret = devm_request_threaded_irq(&pdev->dev, 2187 gpio_to_irq(udc->vbus_pin), NULL, 2188 usba_vbus_irq_thread, IRQF_ONESHOT, 2189 "atmel_usba_udc", udc); 2190 if (ret) { 2191 udc->vbus_pin = -ENODEV; 2192 dev_warn(&udc->pdev->dev, 2193 "failed to request vbus irq; " 2194 "assuming always on\n"); 2195 } 2196 } else { 2197 /* gpio_request fail so use -EINVAL for gpio_is_valid */ 2198 udc->vbus_pin = -EINVAL; 2199 } 2200 } 2201 2202 ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget); 2203 if (ret) 2204 return ret; 2205 device_init_wakeup(&pdev->dev, 1); 2206 2207 usba_init_debugfs(udc); 2208 for (i = 1; i < udc->num_ep; i++) 2209 usba_ep_init_debugfs(udc, &udc->usba_ep[i]); 2210 2211 return 0; 2212 } 2213 2214 static int usba_udc_remove(struct platform_device *pdev) 2215 { 2216 struct usba_udc *udc; 2217 int i; 2218 2219 udc = platform_get_drvdata(pdev); 2220 2221 device_init_wakeup(&pdev->dev, 0); 2222 usb_del_gadget_udc(&udc->gadget); 2223 2224 for (i = 1; i < udc->num_ep; i++) 2225 usba_ep_cleanup_debugfs(&udc->usba_ep[i]); 2226 usba_cleanup_debugfs(udc); 2227 2228 return 0; 2229 } 2230 2231 #ifdef CONFIG_PM_SLEEP 2232 static int usba_udc_suspend(struct device *dev) 2233 { 2234 struct usba_udc *udc = dev_get_drvdata(dev); 2235 2236 /* Not started */ 2237 if (!udc->driver) 2238 return 0; 2239 2240 mutex_lock(&udc->vbus_mutex); 2241 2242 if (!device_may_wakeup(dev)) { 2243 usba_stop(udc); 2244 goto out; 2245 } 2246 2247 /* 2248 * Device may wake up. We stay clocked if we failed 2249 * to request vbus irq, assuming always on. 2250 */ 2251 if (gpio_is_valid(udc->vbus_pin)) { 2252 usba_stop(udc); 2253 enable_irq_wake(gpio_to_irq(udc->vbus_pin)); 2254 } 2255 2256 out: 2257 mutex_unlock(&udc->vbus_mutex); 2258 return 0; 2259 } 2260 2261 static int usba_udc_resume(struct device *dev) 2262 { 2263 struct usba_udc *udc = dev_get_drvdata(dev); 2264 2265 /* Not started */ 2266 if (!udc->driver) 2267 return 0; 2268 2269 if (device_may_wakeup(dev) && gpio_is_valid(udc->vbus_pin)) 2270 disable_irq_wake(gpio_to_irq(udc->vbus_pin)); 2271 2272 /* If Vbus is present, enable the controller and wait for reset */ 2273 mutex_lock(&udc->vbus_mutex); 2274 udc->vbus_prev = vbus_is_present(udc); 2275 if (udc->vbus_prev) 2276 usba_start(udc); 2277 mutex_unlock(&udc->vbus_mutex); 2278 2279 return 0; 2280 } 2281 #endif 2282 2283 static SIMPLE_DEV_PM_OPS(usba_udc_pm_ops, usba_udc_suspend, usba_udc_resume); 2284 2285 static struct platform_driver udc_driver = { 2286 .remove = usba_udc_remove, 2287 .driver = { 2288 .name = "atmel_usba_udc", 2289 .pm = &usba_udc_pm_ops, 2290 .of_match_table = of_match_ptr(atmel_udc_dt_ids), 2291 }, 2292 }; 2293 2294 module_platform_driver_probe(udc_driver, usba_udc_probe); 2295 2296 MODULE_DESCRIPTION("Atmel USBA UDC driver"); 2297 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); 2298 MODULE_LICENSE("GPL"); 2299 MODULE_ALIAS("platform:atmel_usba_udc"); 2300