1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Driver for the Atmel USBA high speed USB device controller 4 * 5 * Copyright (C) 2005-2007 Atmel Corporation 6 */ 7 #include <linux/clk.h> 8 #include <linux/clk/at91_pmc.h> 9 #include <linux/module.h> 10 #include <linux/init.h> 11 #include <linux/interrupt.h> 12 #include <linux/io.h> 13 #include <linux/slab.h> 14 #include <linux/device.h> 15 #include <linux/dma-mapping.h> 16 #include <linux/list.h> 17 #include <linux/mfd/syscon.h> 18 #include <linux/platform_device.h> 19 #include <linux/regmap.h> 20 #include <linux/ctype.h> 21 #include <linux/usb/ch9.h> 22 #include <linux/usb/gadget.h> 23 #include <linux/usb/atmel_usba_udc.h> 24 #include <linux/delay.h> 25 #include <linux/of.h> 26 #include <linux/of_gpio.h> 27 28 #include "atmel_usba_udc.h" 29 #define USBA_VBUS_IRQFLAGS (IRQF_ONESHOT \ 30 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING) 31 32 #ifdef CONFIG_USB_GADGET_DEBUG_FS 33 #include <linux/debugfs.h> 34 #include <linux/uaccess.h> 35 36 static int queue_dbg_open(struct inode *inode, struct file *file) 37 { 38 struct usba_ep *ep = inode->i_private; 39 struct usba_request *req, *req_copy; 40 struct list_head *queue_data; 41 42 queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL); 43 if (!queue_data) 44 return -ENOMEM; 45 INIT_LIST_HEAD(queue_data); 46 47 spin_lock_irq(&ep->udc->lock); 48 list_for_each_entry(req, &ep->queue, queue) { 49 req_copy = kmemdup(req, sizeof(*req_copy), GFP_ATOMIC); 50 if (!req_copy) 51 goto fail; 52 list_add_tail(&req_copy->queue, queue_data); 53 } 54 spin_unlock_irq(&ep->udc->lock); 55 56 file->private_data = queue_data; 57 return 0; 58 59 fail: 60 spin_unlock_irq(&ep->udc->lock); 61 list_for_each_entry_safe(req, req_copy, queue_data, queue) { 62 list_del(&req->queue); 63 kfree(req); 64 } 65 kfree(queue_data); 66 return -ENOMEM; 67 } 68 69 /* 70 * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0 71 * 72 * b: buffer address 73 * l: buffer length 74 * I/i: interrupt/no interrupt 75 * Z/z: zero/no zero 76 * S/s: short ok/short not ok 77 * s: status 78 * n: nr_packets 79 * F/f: submitted/not submitted to FIFO 80 * D/d: using/not using DMA 81 * L/l: last transaction/not last transaction 82 */ 83 static ssize_t queue_dbg_read(struct file *file, char __user *buf, 84 size_t nbytes, loff_t *ppos) 85 { 86 struct list_head *queue = file->private_data; 87 struct usba_request *req, *tmp_req; 88 size_t len, remaining, actual = 0; 89 char tmpbuf[38]; 90 91 if (!access_ok(VERIFY_WRITE, buf, nbytes)) 92 return -EFAULT; 93 94 inode_lock(file_inode(file)); 95 list_for_each_entry_safe(req, tmp_req, queue, queue) { 96 len = snprintf(tmpbuf, sizeof(tmpbuf), 97 "%8p %08x %c%c%c %5d %c%c%c\n", 98 req->req.buf, req->req.length, 99 req->req.no_interrupt ? 'i' : 'I', 100 req->req.zero ? 'Z' : 'z', 101 req->req.short_not_ok ? 's' : 'S', 102 req->req.status, 103 req->submitted ? 'F' : 'f', 104 req->using_dma ? 'D' : 'd', 105 req->last_transaction ? 'L' : 'l'); 106 len = min(len, sizeof(tmpbuf)); 107 if (len > nbytes) 108 break; 109 110 list_del(&req->queue); 111 kfree(req); 112 113 remaining = __copy_to_user(buf, tmpbuf, len); 114 actual += len - remaining; 115 if (remaining) 116 break; 117 118 nbytes -= len; 119 buf += len; 120 } 121 inode_unlock(file_inode(file)); 122 123 return actual; 124 } 125 126 static int queue_dbg_release(struct inode *inode, struct file *file) 127 { 128 struct list_head *queue_data = file->private_data; 129 struct usba_request *req, *tmp_req; 130 131 list_for_each_entry_safe(req, tmp_req, queue_data, queue) { 132 list_del(&req->queue); 133 kfree(req); 134 } 135 kfree(queue_data); 136 return 0; 137 } 138 139 static int regs_dbg_open(struct inode *inode, struct file *file) 140 { 141 struct usba_udc *udc; 142 unsigned int i; 143 u32 *data; 144 int ret = -ENOMEM; 145 146 inode_lock(inode); 147 udc = inode->i_private; 148 data = kmalloc(inode->i_size, GFP_KERNEL); 149 if (!data) 150 goto out; 151 152 spin_lock_irq(&udc->lock); 153 for (i = 0; i < inode->i_size / 4; i++) 154 data[i] = readl_relaxed(udc->regs + i * 4); 155 spin_unlock_irq(&udc->lock); 156 157 file->private_data = data; 158 ret = 0; 159 160 out: 161 inode_unlock(inode); 162 163 return ret; 164 } 165 166 static ssize_t regs_dbg_read(struct file *file, char __user *buf, 167 size_t nbytes, loff_t *ppos) 168 { 169 struct inode *inode = file_inode(file); 170 int ret; 171 172 inode_lock(inode); 173 ret = simple_read_from_buffer(buf, nbytes, ppos, 174 file->private_data, 175 file_inode(file)->i_size); 176 inode_unlock(inode); 177 178 return ret; 179 } 180 181 static int regs_dbg_release(struct inode *inode, struct file *file) 182 { 183 kfree(file->private_data); 184 return 0; 185 } 186 187 const struct file_operations queue_dbg_fops = { 188 .owner = THIS_MODULE, 189 .open = queue_dbg_open, 190 .llseek = no_llseek, 191 .read = queue_dbg_read, 192 .release = queue_dbg_release, 193 }; 194 195 const struct file_operations regs_dbg_fops = { 196 .owner = THIS_MODULE, 197 .open = regs_dbg_open, 198 .llseek = generic_file_llseek, 199 .read = regs_dbg_read, 200 .release = regs_dbg_release, 201 }; 202 203 static void usba_ep_init_debugfs(struct usba_udc *udc, 204 struct usba_ep *ep) 205 { 206 struct dentry *ep_root; 207 208 ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root); 209 if (!ep_root) 210 goto err_root; 211 ep->debugfs_dir = ep_root; 212 213 ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root, 214 ep, &queue_dbg_fops); 215 if (!ep->debugfs_queue) 216 goto err_queue; 217 218 if (ep->can_dma) { 219 ep->debugfs_dma_status 220 = debugfs_create_u32("dma_status", 0400, ep_root, 221 &ep->last_dma_status); 222 if (!ep->debugfs_dma_status) 223 goto err_dma_status; 224 } 225 if (ep_is_control(ep)) { 226 ep->debugfs_state 227 = debugfs_create_u32("state", 0400, ep_root, 228 &ep->state); 229 if (!ep->debugfs_state) 230 goto err_state; 231 } 232 233 return; 234 235 err_state: 236 if (ep->can_dma) 237 debugfs_remove(ep->debugfs_dma_status); 238 err_dma_status: 239 debugfs_remove(ep->debugfs_queue); 240 err_queue: 241 debugfs_remove(ep_root); 242 err_root: 243 dev_err(&ep->udc->pdev->dev, 244 "failed to create debugfs directory for %s\n", ep->ep.name); 245 } 246 247 static void usba_ep_cleanup_debugfs(struct usba_ep *ep) 248 { 249 debugfs_remove(ep->debugfs_queue); 250 debugfs_remove(ep->debugfs_dma_status); 251 debugfs_remove(ep->debugfs_state); 252 debugfs_remove(ep->debugfs_dir); 253 ep->debugfs_dma_status = NULL; 254 ep->debugfs_dir = NULL; 255 } 256 257 static void usba_init_debugfs(struct usba_udc *udc) 258 { 259 struct dentry *root, *regs; 260 struct resource *regs_resource; 261 262 root = debugfs_create_dir(udc->gadget.name, NULL); 263 if (IS_ERR(root) || !root) 264 goto err_root; 265 udc->debugfs_root = root; 266 267 regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM, 268 CTRL_IOMEM_ID); 269 270 if (regs_resource) { 271 regs = debugfs_create_file_size("regs", 0400, root, udc, 272 ®s_dbg_fops, 273 resource_size(regs_resource)); 274 if (!regs) 275 goto err_regs; 276 udc->debugfs_regs = regs; 277 } 278 279 usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0)); 280 281 return; 282 283 err_regs: 284 debugfs_remove(root); 285 err_root: 286 udc->debugfs_root = NULL; 287 dev_err(&udc->pdev->dev, "debugfs is not available\n"); 288 } 289 290 static void usba_cleanup_debugfs(struct usba_udc *udc) 291 { 292 usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0)); 293 debugfs_remove(udc->debugfs_regs); 294 debugfs_remove(udc->debugfs_root); 295 udc->debugfs_regs = NULL; 296 udc->debugfs_root = NULL; 297 } 298 #else 299 static inline void usba_ep_init_debugfs(struct usba_udc *udc, 300 struct usba_ep *ep) 301 { 302 303 } 304 305 static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep) 306 { 307 308 } 309 310 static inline void usba_init_debugfs(struct usba_udc *udc) 311 { 312 313 } 314 315 static inline void usba_cleanup_debugfs(struct usba_udc *udc) 316 { 317 318 } 319 #endif 320 321 static ushort fifo_mode; 322 323 module_param(fifo_mode, ushort, 0x0); 324 MODULE_PARM_DESC(fifo_mode, "Endpoint configuration mode"); 325 326 /* mode 0 - uses autoconfig */ 327 328 /* mode 1 - fits in 8KB, generic max fifo configuration */ 329 static struct usba_fifo_cfg mode_1_cfg[] = { 330 { .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, }, 331 { .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 2, }, 332 { .hw_ep_num = 2, .fifo_size = 1024, .nr_banks = 1, }, 333 { .hw_ep_num = 3, .fifo_size = 1024, .nr_banks = 1, }, 334 { .hw_ep_num = 4, .fifo_size = 1024, .nr_banks = 1, }, 335 { .hw_ep_num = 5, .fifo_size = 1024, .nr_banks = 1, }, 336 { .hw_ep_num = 6, .fifo_size = 1024, .nr_banks = 1, }, 337 }; 338 339 /* mode 2 - fits in 8KB, performance max fifo configuration */ 340 static struct usba_fifo_cfg mode_2_cfg[] = { 341 { .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, }, 342 { .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 3, }, 343 { .hw_ep_num = 2, .fifo_size = 1024, .nr_banks = 2, }, 344 { .hw_ep_num = 3, .fifo_size = 1024, .nr_banks = 2, }, 345 }; 346 347 /* mode 3 - fits in 8KB, mixed fifo configuration */ 348 static struct usba_fifo_cfg mode_3_cfg[] = { 349 { .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, }, 350 { .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 2, }, 351 { .hw_ep_num = 2, .fifo_size = 512, .nr_banks = 2, }, 352 { .hw_ep_num = 3, .fifo_size = 512, .nr_banks = 2, }, 353 { .hw_ep_num = 4, .fifo_size = 512, .nr_banks = 2, }, 354 { .hw_ep_num = 5, .fifo_size = 512, .nr_banks = 2, }, 355 { .hw_ep_num = 6, .fifo_size = 512, .nr_banks = 2, }, 356 }; 357 358 /* mode 4 - fits in 8KB, custom fifo configuration */ 359 static struct usba_fifo_cfg mode_4_cfg[] = { 360 { .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, }, 361 { .hw_ep_num = 1, .fifo_size = 512, .nr_banks = 2, }, 362 { .hw_ep_num = 2, .fifo_size = 512, .nr_banks = 2, }, 363 { .hw_ep_num = 3, .fifo_size = 8, .nr_banks = 2, }, 364 { .hw_ep_num = 4, .fifo_size = 512, .nr_banks = 2, }, 365 { .hw_ep_num = 5, .fifo_size = 512, .nr_banks = 2, }, 366 { .hw_ep_num = 6, .fifo_size = 16, .nr_banks = 2, }, 367 { .hw_ep_num = 7, .fifo_size = 8, .nr_banks = 2, }, 368 { .hw_ep_num = 8, .fifo_size = 8, .nr_banks = 2, }, 369 }; 370 /* Add additional configurations here */ 371 372 static int usba_config_fifo_table(struct usba_udc *udc) 373 { 374 int n; 375 376 switch (fifo_mode) { 377 default: 378 fifo_mode = 0; 379 case 0: 380 udc->fifo_cfg = NULL; 381 n = 0; 382 break; 383 case 1: 384 udc->fifo_cfg = mode_1_cfg; 385 n = ARRAY_SIZE(mode_1_cfg); 386 break; 387 case 2: 388 udc->fifo_cfg = mode_2_cfg; 389 n = ARRAY_SIZE(mode_2_cfg); 390 break; 391 case 3: 392 udc->fifo_cfg = mode_3_cfg; 393 n = ARRAY_SIZE(mode_3_cfg); 394 break; 395 case 4: 396 udc->fifo_cfg = mode_4_cfg; 397 n = ARRAY_SIZE(mode_4_cfg); 398 break; 399 } 400 DBG(DBG_HW, "Setup fifo_mode %d\n", fifo_mode); 401 402 return n; 403 } 404 405 static inline u32 usba_int_enb_get(struct usba_udc *udc) 406 { 407 return udc->int_enb_cache; 408 } 409 410 static inline void usba_int_enb_set(struct usba_udc *udc, u32 val) 411 { 412 usba_writel(udc, INT_ENB, val); 413 udc->int_enb_cache = val; 414 } 415 416 static int vbus_is_present(struct usba_udc *udc) 417 { 418 if (gpio_is_valid(udc->vbus_pin)) 419 return gpio_get_value(udc->vbus_pin) ^ udc->vbus_pin_inverted; 420 421 /* No Vbus detection: Assume always present */ 422 return 1; 423 } 424 425 static void toggle_bias(struct usba_udc *udc, int is_on) 426 { 427 if (udc->errata && udc->errata->toggle_bias) 428 udc->errata->toggle_bias(udc, is_on); 429 } 430 431 static void generate_bias_pulse(struct usba_udc *udc) 432 { 433 if (!udc->bias_pulse_needed) 434 return; 435 436 if (udc->errata && udc->errata->pulse_bias) 437 udc->errata->pulse_bias(udc); 438 439 udc->bias_pulse_needed = false; 440 } 441 442 static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req) 443 { 444 unsigned int transaction_len; 445 446 transaction_len = req->req.length - req->req.actual; 447 req->last_transaction = 1; 448 if (transaction_len > ep->ep.maxpacket) { 449 transaction_len = ep->ep.maxpacket; 450 req->last_transaction = 0; 451 } else if (transaction_len == ep->ep.maxpacket && req->req.zero) 452 req->last_transaction = 0; 453 454 DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n", 455 ep->ep.name, req, transaction_len, 456 req->last_transaction ? ", done" : ""); 457 458 memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len); 459 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); 460 req->req.actual += transaction_len; 461 } 462 463 static void submit_request(struct usba_ep *ep, struct usba_request *req) 464 { 465 DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n", 466 ep->ep.name, req, req->req.length); 467 468 req->req.actual = 0; 469 req->submitted = 1; 470 471 if (req->using_dma) { 472 if (req->req.length == 0) { 473 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); 474 return; 475 } 476 477 if (req->req.zero) 478 usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET); 479 else 480 usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET); 481 482 usba_dma_writel(ep, ADDRESS, req->req.dma); 483 usba_dma_writel(ep, CONTROL, req->ctrl); 484 } else { 485 next_fifo_transaction(ep, req); 486 if (req->last_transaction) { 487 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); 488 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); 489 } else { 490 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); 491 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); 492 } 493 } 494 } 495 496 static void submit_next_request(struct usba_ep *ep) 497 { 498 struct usba_request *req; 499 500 if (list_empty(&ep->queue)) { 501 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY); 502 return; 503 } 504 505 req = list_entry(ep->queue.next, struct usba_request, queue); 506 if (!req->submitted) 507 submit_request(ep, req); 508 } 509 510 static void send_status(struct usba_udc *udc, struct usba_ep *ep) 511 { 512 ep->state = STATUS_STAGE_IN; 513 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); 514 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); 515 } 516 517 static void receive_data(struct usba_ep *ep) 518 { 519 struct usba_udc *udc = ep->udc; 520 struct usba_request *req; 521 unsigned long status; 522 unsigned int bytecount, nr_busy; 523 int is_complete = 0; 524 525 status = usba_ep_readl(ep, STA); 526 nr_busy = USBA_BFEXT(BUSY_BANKS, status); 527 528 DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy); 529 530 while (nr_busy > 0) { 531 if (list_empty(&ep->queue)) { 532 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); 533 break; 534 } 535 req = list_entry(ep->queue.next, 536 struct usba_request, queue); 537 538 bytecount = USBA_BFEXT(BYTE_COUNT, status); 539 540 if (status & (1 << 31)) 541 is_complete = 1; 542 if (req->req.actual + bytecount >= req->req.length) { 543 is_complete = 1; 544 bytecount = req->req.length - req->req.actual; 545 } 546 547 memcpy_fromio(req->req.buf + req->req.actual, 548 ep->fifo, bytecount); 549 req->req.actual += bytecount; 550 551 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); 552 553 if (is_complete) { 554 DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name); 555 req->req.status = 0; 556 list_del_init(&req->queue); 557 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); 558 spin_unlock(&udc->lock); 559 usb_gadget_giveback_request(&ep->ep, &req->req); 560 spin_lock(&udc->lock); 561 } 562 563 status = usba_ep_readl(ep, STA); 564 nr_busy = USBA_BFEXT(BUSY_BANKS, status); 565 566 if (is_complete && ep_is_control(ep)) { 567 send_status(udc, ep); 568 break; 569 } 570 } 571 } 572 573 static void 574 request_complete(struct usba_ep *ep, struct usba_request *req, int status) 575 { 576 struct usba_udc *udc = ep->udc; 577 578 WARN_ON(!list_empty(&req->queue)); 579 580 if (req->req.status == -EINPROGRESS) 581 req->req.status = status; 582 583 if (req->using_dma) 584 usb_gadget_unmap_request(&udc->gadget, &req->req, ep->is_in); 585 586 DBG(DBG_GADGET | DBG_REQ, 587 "%s: req %p complete: status %d, actual %u\n", 588 ep->ep.name, req, req->req.status, req->req.actual); 589 590 spin_unlock(&udc->lock); 591 usb_gadget_giveback_request(&ep->ep, &req->req); 592 spin_lock(&udc->lock); 593 } 594 595 static void 596 request_complete_list(struct usba_ep *ep, struct list_head *list, int status) 597 { 598 struct usba_request *req, *tmp_req; 599 600 list_for_each_entry_safe(req, tmp_req, list, queue) { 601 list_del_init(&req->queue); 602 request_complete(ep, req, status); 603 } 604 } 605 606 static int 607 usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) 608 { 609 struct usba_ep *ep = to_usba_ep(_ep); 610 struct usba_udc *udc = ep->udc; 611 unsigned long flags, maxpacket; 612 unsigned int nr_trans; 613 614 DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc); 615 616 maxpacket = usb_endpoint_maxp(desc); 617 618 if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index) 619 || ep->index == 0 620 || desc->bDescriptorType != USB_DT_ENDPOINT 621 || maxpacket == 0 622 || maxpacket > ep->fifo_size) { 623 DBG(DBG_ERR, "ep_enable: Invalid argument"); 624 return -EINVAL; 625 } 626 627 ep->is_isoc = 0; 628 ep->is_in = 0; 629 630 DBG(DBG_ERR, "%s: EPT_CFG = 0x%lx (maxpacket = %lu)\n", 631 ep->ep.name, ep->ept_cfg, maxpacket); 632 633 if (usb_endpoint_dir_in(desc)) { 634 ep->is_in = 1; 635 ep->ept_cfg |= USBA_EPT_DIR_IN; 636 } 637 638 switch (usb_endpoint_type(desc)) { 639 case USB_ENDPOINT_XFER_CONTROL: 640 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL); 641 break; 642 case USB_ENDPOINT_XFER_ISOC: 643 if (!ep->can_isoc) { 644 DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n", 645 ep->ep.name); 646 return -EINVAL; 647 } 648 649 /* 650 * Bits 11:12 specify number of _additional_ 651 * transactions per microframe. 652 */ 653 nr_trans = usb_endpoint_maxp_mult(desc); 654 if (nr_trans > 3) 655 return -EINVAL; 656 657 ep->is_isoc = 1; 658 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO); 659 ep->ept_cfg |= USBA_BF(NB_TRANS, nr_trans); 660 661 break; 662 case USB_ENDPOINT_XFER_BULK: 663 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK); 664 break; 665 case USB_ENDPOINT_XFER_INT: 666 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT); 667 break; 668 } 669 670 spin_lock_irqsave(&ep->udc->lock, flags); 671 672 ep->ep.desc = desc; 673 ep->ep.maxpacket = maxpacket; 674 675 usba_ep_writel(ep, CFG, ep->ept_cfg); 676 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); 677 678 if (ep->can_dma) { 679 u32 ctrl; 680 681 usba_int_enb_set(udc, usba_int_enb_get(udc) | 682 USBA_BF(EPT_INT, 1 << ep->index) | 683 USBA_BF(DMA_INT, 1 << ep->index)); 684 ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA; 685 usba_ep_writel(ep, CTL_ENB, ctrl); 686 } else { 687 usba_int_enb_set(udc, usba_int_enb_get(udc) | 688 USBA_BF(EPT_INT, 1 << ep->index)); 689 } 690 691 spin_unlock_irqrestore(&udc->lock, flags); 692 693 DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index, 694 (unsigned long)usba_ep_readl(ep, CFG)); 695 DBG(DBG_HW, "INT_ENB after init: %#08lx\n", 696 (unsigned long)usba_int_enb_get(udc)); 697 698 return 0; 699 } 700 701 static int usba_ep_disable(struct usb_ep *_ep) 702 { 703 struct usba_ep *ep = to_usba_ep(_ep); 704 struct usba_udc *udc = ep->udc; 705 LIST_HEAD(req_list); 706 unsigned long flags; 707 708 DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name); 709 710 spin_lock_irqsave(&udc->lock, flags); 711 712 if (!ep->ep.desc) { 713 spin_unlock_irqrestore(&udc->lock, flags); 714 /* REVISIT because this driver disables endpoints in 715 * reset_all_endpoints() before calling disconnect(), 716 * most gadget drivers would trigger this non-error ... 717 */ 718 if (udc->gadget.speed != USB_SPEED_UNKNOWN) 719 DBG(DBG_ERR, "ep_disable: %s not enabled\n", 720 ep->ep.name); 721 return -EINVAL; 722 } 723 ep->ep.desc = NULL; 724 725 list_splice_init(&ep->queue, &req_list); 726 if (ep->can_dma) { 727 usba_dma_writel(ep, CONTROL, 0); 728 usba_dma_writel(ep, ADDRESS, 0); 729 usba_dma_readl(ep, STATUS); 730 } 731 usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE); 732 usba_int_enb_set(udc, usba_int_enb_get(udc) & 733 ~USBA_BF(EPT_INT, 1 << ep->index)); 734 735 request_complete_list(ep, &req_list, -ESHUTDOWN); 736 737 spin_unlock_irqrestore(&udc->lock, flags); 738 739 return 0; 740 } 741 742 static struct usb_request * 743 usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) 744 { 745 struct usba_request *req; 746 747 DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags); 748 749 req = kzalloc(sizeof(*req), gfp_flags); 750 if (!req) 751 return NULL; 752 753 INIT_LIST_HEAD(&req->queue); 754 755 return &req->req; 756 } 757 758 static void 759 usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) 760 { 761 struct usba_request *req = to_usba_req(_req); 762 763 DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req); 764 765 kfree(req); 766 } 767 768 static int queue_dma(struct usba_udc *udc, struct usba_ep *ep, 769 struct usba_request *req, gfp_t gfp_flags) 770 { 771 unsigned long flags; 772 int ret; 773 774 DBG(DBG_DMA, "%s: req l/%u d/%pad %c%c%c\n", 775 ep->ep.name, req->req.length, &req->req.dma, 776 req->req.zero ? 'Z' : 'z', 777 req->req.short_not_ok ? 'S' : 's', 778 req->req.no_interrupt ? 'I' : 'i'); 779 780 if (req->req.length > 0x10000) { 781 /* Lengths from 0 to 65536 (inclusive) are supported */ 782 DBG(DBG_ERR, "invalid request length %u\n", req->req.length); 783 return -EINVAL; 784 } 785 786 ret = usb_gadget_map_request(&udc->gadget, &req->req, ep->is_in); 787 if (ret) 788 return ret; 789 790 req->using_dma = 1; 791 req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length) 792 | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE 793 | USBA_DMA_END_BUF_EN; 794 795 if (!ep->is_in) 796 req->ctrl |= USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE; 797 798 /* 799 * Add this request to the queue and submit for DMA if 800 * possible. Check if we're still alive first -- we may have 801 * received a reset since last time we checked. 802 */ 803 ret = -ESHUTDOWN; 804 spin_lock_irqsave(&udc->lock, flags); 805 if (ep->ep.desc) { 806 if (list_empty(&ep->queue)) 807 submit_request(ep, req); 808 809 list_add_tail(&req->queue, &ep->queue); 810 ret = 0; 811 } 812 spin_unlock_irqrestore(&udc->lock, flags); 813 814 return ret; 815 } 816 817 static int 818 usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) 819 { 820 struct usba_request *req = to_usba_req(_req); 821 struct usba_ep *ep = to_usba_ep(_ep); 822 struct usba_udc *udc = ep->udc; 823 unsigned long flags; 824 int ret; 825 826 DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n", 827 ep->ep.name, req, _req->length); 828 829 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN || 830 !ep->ep.desc) 831 return -ESHUTDOWN; 832 833 req->submitted = 0; 834 req->using_dma = 0; 835 req->last_transaction = 0; 836 837 _req->status = -EINPROGRESS; 838 _req->actual = 0; 839 840 if (ep->can_dma) 841 return queue_dma(udc, ep, req, gfp_flags); 842 843 /* May have received a reset since last time we checked */ 844 ret = -ESHUTDOWN; 845 spin_lock_irqsave(&udc->lock, flags); 846 if (ep->ep.desc) { 847 list_add_tail(&req->queue, &ep->queue); 848 849 if ((!ep_is_control(ep) && ep->is_in) || 850 (ep_is_control(ep) 851 && (ep->state == DATA_STAGE_IN 852 || ep->state == STATUS_STAGE_IN))) 853 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); 854 else 855 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY); 856 ret = 0; 857 } 858 spin_unlock_irqrestore(&udc->lock, flags); 859 860 return ret; 861 } 862 863 static void 864 usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status) 865 { 866 req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status); 867 } 868 869 static int stop_dma(struct usba_ep *ep, u32 *pstatus) 870 { 871 unsigned int timeout; 872 u32 status; 873 874 /* 875 * Stop the DMA controller. When writing both CH_EN 876 * and LINK to 0, the other bits are not affected. 877 */ 878 usba_dma_writel(ep, CONTROL, 0); 879 880 /* Wait for the FIFO to empty */ 881 for (timeout = 40; timeout; --timeout) { 882 status = usba_dma_readl(ep, STATUS); 883 if (!(status & USBA_DMA_CH_EN)) 884 break; 885 udelay(1); 886 } 887 888 if (pstatus) 889 *pstatus = status; 890 891 if (timeout == 0) { 892 dev_err(&ep->udc->pdev->dev, 893 "%s: timed out waiting for DMA FIFO to empty\n", 894 ep->ep.name); 895 return -ETIMEDOUT; 896 } 897 898 return 0; 899 } 900 901 static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) 902 { 903 struct usba_ep *ep = to_usba_ep(_ep); 904 struct usba_udc *udc = ep->udc; 905 struct usba_request *req; 906 unsigned long flags; 907 u32 status; 908 909 DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n", 910 ep->ep.name, req); 911 912 spin_lock_irqsave(&udc->lock, flags); 913 914 list_for_each_entry(req, &ep->queue, queue) { 915 if (&req->req == _req) 916 break; 917 } 918 919 if (&req->req != _req) { 920 spin_unlock_irqrestore(&udc->lock, flags); 921 return -EINVAL; 922 } 923 924 if (req->using_dma) { 925 /* 926 * If this request is currently being transferred, 927 * stop the DMA controller and reset the FIFO. 928 */ 929 if (ep->queue.next == &req->queue) { 930 status = usba_dma_readl(ep, STATUS); 931 if (status & USBA_DMA_CH_EN) 932 stop_dma(ep, &status); 933 934 #ifdef CONFIG_USB_GADGET_DEBUG_FS 935 ep->last_dma_status = status; 936 #endif 937 938 usba_writel(udc, EPT_RST, 1 << ep->index); 939 940 usba_update_req(ep, req, status); 941 } 942 } 943 944 /* 945 * Errors should stop the queue from advancing until the 946 * completion function returns. 947 */ 948 list_del_init(&req->queue); 949 950 request_complete(ep, req, -ECONNRESET); 951 952 /* Process the next request if any */ 953 submit_next_request(ep); 954 spin_unlock_irqrestore(&udc->lock, flags); 955 956 return 0; 957 } 958 959 static int usba_ep_set_halt(struct usb_ep *_ep, int value) 960 { 961 struct usba_ep *ep = to_usba_ep(_ep); 962 struct usba_udc *udc = ep->udc; 963 unsigned long flags; 964 int ret = 0; 965 966 DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name, 967 value ? "set" : "clear"); 968 969 if (!ep->ep.desc) { 970 DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n", 971 ep->ep.name); 972 return -ENODEV; 973 } 974 if (ep->is_isoc) { 975 DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n", 976 ep->ep.name); 977 return -ENOTTY; 978 } 979 980 spin_lock_irqsave(&udc->lock, flags); 981 982 /* 983 * We can't halt IN endpoints while there are still data to be 984 * transferred 985 */ 986 if (!list_empty(&ep->queue) 987 || ((value && ep->is_in && (usba_ep_readl(ep, STA) 988 & USBA_BF(BUSY_BANKS, -1L))))) { 989 ret = -EAGAIN; 990 } else { 991 if (value) 992 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL); 993 else 994 usba_ep_writel(ep, CLR_STA, 995 USBA_FORCE_STALL | USBA_TOGGLE_CLR); 996 usba_ep_readl(ep, STA); 997 } 998 999 spin_unlock_irqrestore(&udc->lock, flags); 1000 1001 return ret; 1002 } 1003 1004 static int usba_ep_fifo_status(struct usb_ep *_ep) 1005 { 1006 struct usba_ep *ep = to_usba_ep(_ep); 1007 1008 return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA)); 1009 } 1010 1011 static void usba_ep_fifo_flush(struct usb_ep *_ep) 1012 { 1013 struct usba_ep *ep = to_usba_ep(_ep); 1014 struct usba_udc *udc = ep->udc; 1015 1016 usba_writel(udc, EPT_RST, 1 << ep->index); 1017 } 1018 1019 static const struct usb_ep_ops usba_ep_ops = { 1020 .enable = usba_ep_enable, 1021 .disable = usba_ep_disable, 1022 .alloc_request = usba_ep_alloc_request, 1023 .free_request = usba_ep_free_request, 1024 .queue = usba_ep_queue, 1025 .dequeue = usba_ep_dequeue, 1026 .set_halt = usba_ep_set_halt, 1027 .fifo_status = usba_ep_fifo_status, 1028 .fifo_flush = usba_ep_fifo_flush, 1029 }; 1030 1031 static int usba_udc_get_frame(struct usb_gadget *gadget) 1032 { 1033 struct usba_udc *udc = to_usba_udc(gadget); 1034 1035 return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM)); 1036 } 1037 1038 static int usba_udc_wakeup(struct usb_gadget *gadget) 1039 { 1040 struct usba_udc *udc = to_usba_udc(gadget); 1041 unsigned long flags; 1042 u32 ctrl; 1043 int ret = -EINVAL; 1044 1045 spin_lock_irqsave(&udc->lock, flags); 1046 if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) { 1047 ctrl = usba_readl(udc, CTRL); 1048 usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP); 1049 ret = 0; 1050 } 1051 spin_unlock_irqrestore(&udc->lock, flags); 1052 1053 return ret; 1054 } 1055 1056 static int 1057 usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered) 1058 { 1059 struct usba_udc *udc = to_usba_udc(gadget); 1060 unsigned long flags; 1061 1062 gadget->is_selfpowered = (is_selfpowered != 0); 1063 spin_lock_irqsave(&udc->lock, flags); 1064 if (is_selfpowered) 1065 udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED; 1066 else 1067 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED); 1068 spin_unlock_irqrestore(&udc->lock, flags); 1069 1070 return 0; 1071 } 1072 1073 static int atmel_usba_start(struct usb_gadget *gadget, 1074 struct usb_gadget_driver *driver); 1075 static int atmel_usba_stop(struct usb_gadget *gadget); 1076 1077 static struct usb_ep *atmel_usba_match_ep(struct usb_gadget *gadget, 1078 struct usb_endpoint_descriptor *desc, 1079 struct usb_ss_ep_comp_descriptor *ep_comp) 1080 { 1081 struct usb_ep *_ep; 1082 struct usba_ep *ep; 1083 1084 /* Look at endpoints until an unclaimed one looks usable */ 1085 list_for_each_entry(_ep, &gadget->ep_list, ep_list) { 1086 if (usb_gadget_ep_match_desc(gadget, _ep, desc, ep_comp)) 1087 goto found_ep; 1088 } 1089 /* Fail */ 1090 return NULL; 1091 1092 found_ep: 1093 1094 if (fifo_mode == 0) { 1095 /* Optimize hw fifo size based on ep type and other info */ 1096 ep = to_usba_ep(_ep); 1097 1098 switch (usb_endpoint_type(desc)) { 1099 case USB_ENDPOINT_XFER_CONTROL: 1100 break; 1101 1102 case USB_ENDPOINT_XFER_ISOC: 1103 ep->fifo_size = 1024; 1104 ep->nr_banks = 2; 1105 break; 1106 1107 case USB_ENDPOINT_XFER_BULK: 1108 ep->fifo_size = 512; 1109 ep->nr_banks = 1; 1110 break; 1111 1112 case USB_ENDPOINT_XFER_INT: 1113 if (desc->wMaxPacketSize == 0) 1114 ep->fifo_size = 1115 roundup_pow_of_two(_ep->maxpacket_limit); 1116 else 1117 ep->fifo_size = 1118 roundup_pow_of_two(le16_to_cpu(desc->wMaxPacketSize)); 1119 ep->nr_banks = 1; 1120 break; 1121 } 1122 1123 /* It might be a little bit late to set this */ 1124 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size); 1125 1126 /* Generate ept_cfg basd on FIFO size and number of banks */ 1127 if (ep->fifo_size <= 8) 1128 ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8); 1129 else 1130 /* LSB is bit 1, not 0 */ 1131 ep->ept_cfg = 1132 USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3); 1133 1134 ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks); 1135 1136 ep->udc->configured_ep++; 1137 } 1138 1139 return _ep; 1140 } 1141 1142 static const struct usb_gadget_ops usba_udc_ops = { 1143 .get_frame = usba_udc_get_frame, 1144 .wakeup = usba_udc_wakeup, 1145 .set_selfpowered = usba_udc_set_selfpowered, 1146 .udc_start = atmel_usba_start, 1147 .udc_stop = atmel_usba_stop, 1148 .match_ep = atmel_usba_match_ep, 1149 }; 1150 1151 static struct usb_endpoint_descriptor usba_ep0_desc = { 1152 .bLength = USB_DT_ENDPOINT_SIZE, 1153 .bDescriptorType = USB_DT_ENDPOINT, 1154 .bEndpointAddress = 0, 1155 .bmAttributes = USB_ENDPOINT_XFER_CONTROL, 1156 .wMaxPacketSize = cpu_to_le16(64), 1157 /* FIXME: I have no idea what to put here */ 1158 .bInterval = 1, 1159 }; 1160 1161 static struct usb_gadget usba_gadget_template = { 1162 .ops = &usba_udc_ops, 1163 .max_speed = USB_SPEED_HIGH, 1164 .name = "atmel_usba_udc", 1165 }; 1166 1167 /* 1168 * Called with interrupts disabled and udc->lock held. 1169 */ 1170 static void reset_all_endpoints(struct usba_udc *udc) 1171 { 1172 struct usba_ep *ep; 1173 struct usba_request *req, *tmp_req; 1174 1175 usba_writel(udc, EPT_RST, ~0UL); 1176 1177 ep = to_usba_ep(udc->gadget.ep0); 1178 list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) { 1179 list_del_init(&req->queue); 1180 request_complete(ep, req, -ECONNRESET); 1181 } 1182 } 1183 1184 static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex) 1185 { 1186 struct usba_ep *ep; 1187 1188 if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0) 1189 return to_usba_ep(udc->gadget.ep0); 1190 1191 list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) { 1192 u8 bEndpointAddress; 1193 1194 if (!ep->ep.desc) 1195 continue; 1196 bEndpointAddress = ep->ep.desc->bEndpointAddress; 1197 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN) 1198 continue; 1199 if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) 1200 == (wIndex & USB_ENDPOINT_NUMBER_MASK)) 1201 return ep; 1202 } 1203 1204 return NULL; 1205 } 1206 1207 /* Called with interrupts disabled and udc->lock held */ 1208 static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep) 1209 { 1210 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL); 1211 ep->state = WAIT_FOR_SETUP; 1212 } 1213 1214 static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep) 1215 { 1216 if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL) 1217 return 1; 1218 return 0; 1219 } 1220 1221 static inline void set_address(struct usba_udc *udc, unsigned int addr) 1222 { 1223 u32 regval; 1224 1225 DBG(DBG_BUS, "setting address %u...\n", addr); 1226 regval = usba_readl(udc, CTRL); 1227 regval = USBA_BFINS(DEV_ADDR, addr, regval); 1228 usba_writel(udc, CTRL, regval); 1229 } 1230 1231 static int do_test_mode(struct usba_udc *udc) 1232 { 1233 static const char test_packet_buffer[] = { 1234 /* JKJKJKJK * 9 */ 1235 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 1236 /* JJKKJJKK * 8 */ 1237 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 1238 /* JJKKJJKK * 8 */ 1239 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 1240 /* JJJJJJJKKKKKKK * 8 */ 1241 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1242 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1243 /* JJJJJJJK * 8 */ 1244 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 1245 /* {JKKKKKKK * 10}, JK */ 1246 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E 1247 }; 1248 struct usba_ep *ep; 1249 struct device *dev = &udc->pdev->dev; 1250 int test_mode; 1251 1252 test_mode = udc->test_mode; 1253 1254 /* Start from a clean slate */ 1255 reset_all_endpoints(udc); 1256 1257 switch (test_mode) { 1258 case 0x0100: 1259 /* Test_J */ 1260 usba_writel(udc, TST, USBA_TST_J_MODE); 1261 dev_info(dev, "Entering Test_J mode...\n"); 1262 break; 1263 case 0x0200: 1264 /* Test_K */ 1265 usba_writel(udc, TST, USBA_TST_K_MODE); 1266 dev_info(dev, "Entering Test_K mode...\n"); 1267 break; 1268 case 0x0300: 1269 /* 1270 * Test_SE0_NAK: Force high-speed mode and set up ep0 1271 * for Bulk IN transfers 1272 */ 1273 ep = &udc->usba_ep[0]; 1274 usba_writel(udc, TST, 1275 USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH)); 1276 usba_ep_writel(ep, CFG, 1277 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64) 1278 | USBA_EPT_DIR_IN 1279 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK) 1280 | USBA_BF(BK_NUMBER, 1)); 1281 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) { 1282 set_protocol_stall(udc, ep); 1283 dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n"); 1284 } else { 1285 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); 1286 dev_info(dev, "Entering Test_SE0_NAK mode...\n"); 1287 } 1288 break; 1289 case 0x0400: 1290 /* Test_Packet */ 1291 ep = &udc->usba_ep[0]; 1292 usba_ep_writel(ep, CFG, 1293 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64) 1294 | USBA_EPT_DIR_IN 1295 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK) 1296 | USBA_BF(BK_NUMBER, 1)); 1297 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) { 1298 set_protocol_stall(udc, ep); 1299 dev_err(dev, "Test_Packet: ep0 not mapped\n"); 1300 } else { 1301 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); 1302 usba_writel(udc, TST, USBA_TST_PKT_MODE); 1303 memcpy_toio(ep->fifo, test_packet_buffer, 1304 sizeof(test_packet_buffer)); 1305 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); 1306 dev_info(dev, "Entering Test_Packet mode...\n"); 1307 } 1308 break; 1309 default: 1310 dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode); 1311 return -EINVAL; 1312 } 1313 1314 return 0; 1315 } 1316 1317 /* Avoid overly long expressions */ 1318 static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq) 1319 { 1320 if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP)) 1321 return true; 1322 return false; 1323 } 1324 1325 static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq) 1326 { 1327 if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE)) 1328 return true; 1329 return false; 1330 } 1331 1332 static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq) 1333 { 1334 if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT)) 1335 return true; 1336 return false; 1337 } 1338 1339 static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep, 1340 struct usb_ctrlrequest *crq) 1341 { 1342 int retval = 0; 1343 1344 switch (crq->bRequest) { 1345 case USB_REQ_GET_STATUS: { 1346 u16 status; 1347 1348 if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) { 1349 status = cpu_to_le16(udc->devstatus); 1350 } else if (crq->bRequestType 1351 == (USB_DIR_IN | USB_RECIP_INTERFACE)) { 1352 status = cpu_to_le16(0); 1353 } else if (crq->bRequestType 1354 == (USB_DIR_IN | USB_RECIP_ENDPOINT)) { 1355 struct usba_ep *target; 1356 1357 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); 1358 if (!target) 1359 goto stall; 1360 1361 status = 0; 1362 if (is_stalled(udc, target)) 1363 status |= cpu_to_le16(1); 1364 } else 1365 goto delegate; 1366 1367 /* Write directly to the FIFO. No queueing is done. */ 1368 if (crq->wLength != cpu_to_le16(sizeof(status))) 1369 goto stall; 1370 ep->state = DATA_STAGE_IN; 1371 writew_relaxed(status, ep->fifo); 1372 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); 1373 break; 1374 } 1375 1376 case USB_REQ_CLEAR_FEATURE: { 1377 if (crq->bRequestType == USB_RECIP_DEVICE) { 1378 if (feature_is_dev_remote_wakeup(crq)) 1379 udc->devstatus 1380 &= ~(1 << USB_DEVICE_REMOTE_WAKEUP); 1381 else 1382 /* Can't CLEAR_FEATURE TEST_MODE */ 1383 goto stall; 1384 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) { 1385 struct usba_ep *target; 1386 1387 if (crq->wLength != cpu_to_le16(0) 1388 || !feature_is_ep_halt(crq)) 1389 goto stall; 1390 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); 1391 if (!target) 1392 goto stall; 1393 1394 usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL); 1395 if (target->index != 0) 1396 usba_ep_writel(target, CLR_STA, 1397 USBA_TOGGLE_CLR); 1398 } else { 1399 goto delegate; 1400 } 1401 1402 send_status(udc, ep); 1403 break; 1404 } 1405 1406 case USB_REQ_SET_FEATURE: { 1407 if (crq->bRequestType == USB_RECIP_DEVICE) { 1408 if (feature_is_dev_test_mode(crq)) { 1409 send_status(udc, ep); 1410 ep->state = STATUS_STAGE_TEST; 1411 udc->test_mode = le16_to_cpu(crq->wIndex); 1412 return 0; 1413 } else if (feature_is_dev_remote_wakeup(crq)) { 1414 udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP; 1415 } else { 1416 goto stall; 1417 } 1418 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) { 1419 struct usba_ep *target; 1420 1421 if (crq->wLength != cpu_to_le16(0) 1422 || !feature_is_ep_halt(crq)) 1423 goto stall; 1424 1425 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); 1426 if (!target) 1427 goto stall; 1428 1429 usba_ep_writel(target, SET_STA, USBA_FORCE_STALL); 1430 } else 1431 goto delegate; 1432 1433 send_status(udc, ep); 1434 break; 1435 } 1436 1437 case USB_REQ_SET_ADDRESS: 1438 if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE)) 1439 goto delegate; 1440 1441 set_address(udc, le16_to_cpu(crq->wValue)); 1442 send_status(udc, ep); 1443 ep->state = STATUS_STAGE_ADDR; 1444 break; 1445 1446 default: 1447 delegate: 1448 spin_unlock(&udc->lock); 1449 retval = udc->driver->setup(&udc->gadget, crq); 1450 spin_lock(&udc->lock); 1451 } 1452 1453 return retval; 1454 1455 stall: 1456 pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, " 1457 "halting endpoint...\n", 1458 ep->ep.name, crq->bRequestType, crq->bRequest, 1459 le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex), 1460 le16_to_cpu(crq->wLength)); 1461 set_protocol_stall(udc, ep); 1462 return -1; 1463 } 1464 1465 static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep) 1466 { 1467 struct usba_request *req; 1468 u32 epstatus; 1469 u32 epctrl; 1470 1471 restart: 1472 epstatus = usba_ep_readl(ep, STA); 1473 epctrl = usba_ep_readl(ep, CTL); 1474 1475 DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n", 1476 ep->ep.name, ep->state, epstatus, epctrl); 1477 1478 req = NULL; 1479 if (!list_empty(&ep->queue)) 1480 req = list_entry(ep->queue.next, 1481 struct usba_request, queue); 1482 1483 if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) { 1484 if (req->submitted) 1485 next_fifo_transaction(ep, req); 1486 else 1487 submit_request(ep, req); 1488 1489 if (req->last_transaction) { 1490 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); 1491 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); 1492 } 1493 goto restart; 1494 } 1495 if ((epstatus & epctrl) & USBA_TX_COMPLETE) { 1496 usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE); 1497 1498 switch (ep->state) { 1499 case DATA_STAGE_IN: 1500 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY); 1501 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); 1502 ep->state = STATUS_STAGE_OUT; 1503 break; 1504 case STATUS_STAGE_ADDR: 1505 /* Activate our new address */ 1506 usba_writel(udc, CTRL, (usba_readl(udc, CTRL) 1507 | USBA_FADDR_EN)); 1508 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); 1509 ep->state = WAIT_FOR_SETUP; 1510 break; 1511 case STATUS_STAGE_IN: 1512 if (req) { 1513 list_del_init(&req->queue); 1514 request_complete(ep, req, 0); 1515 submit_next_request(ep); 1516 } 1517 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); 1518 ep->state = WAIT_FOR_SETUP; 1519 break; 1520 case STATUS_STAGE_TEST: 1521 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); 1522 ep->state = WAIT_FOR_SETUP; 1523 if (do_test_mode(udc)) 1524 set_protocol_stall(udc, ep); 1525 break; 1526 default: 1527 pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, " 1528 "halting endpoint...\n", 1529 ep->ep.name, ep->state); 1530 set_protocol_stall(udc, ep); 1531 break; 1532 } 1533 1534 goto restart; 1535 } 1536 if ((epstatus & epctrl) & USBA_RX_BK_RDY) { 1537 switch (ep->state) { 1538 case STATUS_STAGE_OUT: 1539 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); 1540 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); 1541 1542 if (req) { 1543 list_del_init(&req->queue); 1544 request_complete(ep, req, 0); 1545 } 1546 ep->state = WAIT_FOR_SETUP; 1547 break; 1548 1549 case DATA_STAGE_OUT: 1550 receive_data(ep); 1551 break; 1552 1553 default: 1554 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); 1555 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); 1556 pr_err("udc: %s: RXRDY: Invalid endpoint state %d, " 1557 "halting endpoint...\n", 1558 ep->ep.name, ep->state); 1559 set_protocol_stall(udc, ep); 1560 break; 1561 } 1562 1563 goto restart; 1564 } 1565 if (epstatus & USBA_RX_SETUP) { 1566 union { 1567 struct usb_ctrlrequest crq; 1568 unsigned long data[2]; 1569 } crq; 1570 unsigned int pkt_len; 1571 int ret; 1572 1573 if (ep->state != WAIT_FOR_SETUP) { 1574 /* 1575 * Didn't expect a SETUP packet at this 1576 * point. Clean up any pending requests (which 1577 * may be successful). 1578 */ 1579 int status = -EPROTO; 1580 1581 /* 1582 * RXRDY and TXCOMP are dropped when SETUP 1583 * packets arrive. Just pretend we received 1584 * the status packet. 1585 */ 1586 if (ep->state == STATUS_STAGE_OUT 1587 || ep->state == STATUS_STAGE_IN) { 1588 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); 1589 status = 0; 1590 } 1591 1592 if (req) { 1593 list_del_init(&req->queue); 1594 request_complete(ep, req, status); 1595 } 1596 } 1597 1598 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA)); 1599 DBG(DBG_HW, "Packet length: %u\n", pkt_len); 1600 if (pkt_len != sizeof(crq)) { 1601 pr_warn("udc: Invalid packet length %u (expected %zu)\n", 1602 pkt_len, sizeof(crq)); 1603 set_protocol_stall(udc, ep); 1604 return; 1605 } 1606 1607 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo); 1608 memcpy_fromio(crq.data, ep->fifo, sizeof(crq)); 1609 1610 /* Free up one bank in the FIFO so that we can 1611 * generate or receive a reply right away. */ 1612 usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP); 1613 1614 /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n", 1615 ep->state, crq.crq.bRequestType, 1616 crq.crq.bRequest); */ 1617 1618 if (crq.crq.bRequestType & USB_DIR_IN) { 1619 /* 1620 * The USB 2.0 spec states that "if wLength is 1621 * zero, there is no data transfer phase." 1622 * However, testusb #14 seems to actually 1623 * expect a data phase even if wLength = 0... 1624 */ 1625 ep->state = DATA_STAGE_IN; 1626 } else { 1627 if (crq.crq.wLength != cpu_to_le16(0)) 1628 ep->state = DATA_STAGE_OUT; 1629 else 1630 ep->state = STATUS_STAGE_IN; 1631 } 1632 1633 ret = -1; 1634 if (ep->index == 0) 1635 ret = handle_ep0_setup(udc, ep, &crq.crq); 1636 else { 1637 spin_unlock(&udc->lock); 1638 ret = udc->driver->setup(&udc->gadget, &crq.crq); 1639 spin_lock(&udc->lock); 1640 } 1641 1642 DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n", 1643 crq.crq.bRequestType, crq.crq.bRequest, 1644 le16_to_cpu(crq.crq.wLength), ep->state, ret); 1645 1646 if (ret < 0) { 1647 /* Let the host know that we failed */ 1648 set_protocol_stall(udc, ep); 1649 } 1650 } 1651 } 1652 1653 static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep) 1654 { 1655 struct usba_request *req; 1656 u32 epstatus; 1657 u32 epctrl; 1658 1659 epstatus = usba_ep_readl(ep, STA); 1660 epctrl = usba_ep_readl(ep, CTL); 1661 1662 DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus); 1663 1664 while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) { 1665 DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name); 1666 1667 if (list_empty(&ep->queue)) { 1668 dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n"); 1669 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); 1670 return; 1671 } 1672 1673 req = list_entry(ep->queue.next, struct usba_request, queue); 1674 1675 if (req->using_dma) { 1676 /* Send a zero-length packet */ 1677 usba_ep_writel(ep, SET_STA, 1678 USBA_TX_PK_RDY); 1679 usba_ep_writel(ep, CTL_DIS, 1680 USBA_TX_PK_RDY); 1681 list_del_init(&req->queue); 1682 submit_next_request(ep); 1683 request_complete(ep, req, 0); 1684 } else { 1685 if (req->submitted) 1686 next_fifo_transaction(ep, req); 1687 else 1688 submit_request(ep, req); 1689 1690 if (req->last_transaction) { 1691 list_del_init(&req->queue); 1692 submit_next_request(ep); 1693 request_complete(ep, req, 0); 1694 } 1695 } 1696 1697 epstatus = usba_ep_readl(ep, STA); 1698 epctrl = usba_ep_readl(ep, CTL); 1699 } 1700 if ((epstatus & epctrl) & USBA_RX_BK_RDY) { 1701 DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name); 1702 receive_data(ep); 1703 } 1704 } 1705 1706 static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep) 1707 { 1708 struct usba_request *req; 1709 u32 status, control, pending; 1710 1711 status = usba_dma_readl(ep, STATUS); 1712 control = usba_dma_readl(ep, CONTROL); 1713 #ifdef CONFIG_USB_GADGET_DEBUG_FS 1714 ep->last_dma_status = status; 1715 #endif 1716 pending = status & control; 1717 DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control); 1718 1719 if (status & USBA_DMA_CH_EN) { 1720 dev_err(&udc->pdev->dev, 1721 "DMA_CH_EN is set after transfer is finished!\n"); 1722 dev_err(&udc->pdev->dev, 1723 "status=%#08x, pending=%#08x, control=%#08x\n", 1724 status, pending, control); 1725 1726 /* 1727 * try to pretend nothing happened. We might have to 1728 * do something here... 1729 */ 1730 } 1731 1732 if (list_empty(&ep->queue)) 1733 /* Might happen if a reset comes along at the right moment */ 1734 return; 1735 1736 if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) { 1737 req = list_entry(ep->queue.next, struct usba_request, queue); 1738 usba_update_req(ep, req, status); 1739 1740 list_del_init(&req->queue); 1741 submit_next_request(ep); 1742 request_complete(ep, req, 0); 1743 } 1744 } 1745 1746 static irqreturn_t usba_udc_irq(int irq, void *devid) 1747 { 1748 struct usba_udc *udc = devid; 1749 u32 status, int_enb; 1750 u32 dma_status; 1751 u32 ep_status; 1752 1753 spin_lock(&udc->lock); 1754 1755 int_enb = usba_int_enb_get(udc); 1756 status = usba_readl(udc, INT_STA) & (int_enb | USBA_HIGH_SPEED); 1757 DBG(DBG_INT, "irq, status=%#08x\n", status); 1758 1759 if (status & USBA_DET_SUSPEND) { 1760 toggle_bias(udc, 0); 1761 usba_writel(udc, INT_CLR, USBA_DET_SUSPEND); 1762 usba_int_enb_set(udc, int_enb | USBA_WAKE_UP); 1763 udc->bias_pulse_needed = true; 1764 DBG(DBG_BUS, "Suspend detected\n"); 1765 if (udc->gadget.speed != USB_SPEED_UNKNOWN 1766 && udc->driver && udc->driver->suspend) { 1767 spin_unlock(&udc->lock); 1768 udc->driver->suspend(&udc->gadget); 1769 spin_lock(&udc->lock); 1770 } 1771 } 1772 1773 if (status & USBA_WAKE_UP) { 1774 toggle_bias(udc, 1); 1775 usba_writel(udc, INT_CLR, USBA_WAKE_UP); 1776 usba_int_enb_set(udc, int_enb & ~USBA_WAKE_UP); 1777 DBG(DBG_BUS, "Wake Up CPU detected\n"); 1778 } 1779 1780 if (status & USBA_END_OF_RESUME) { 1781 usba_writel(udc, INT_CLR, USBA_END_OF_RESUME); 1782 generate_bias_pulse(udc); 1783 DBG(DBG_BUS, "Resume detected\n"); 1784 if (udc->gadget.speed != USB_SPEED_UNKNOWN 1785 && udc->driver && udc->driver->resume) { 1786 spin_unlock(&udc->lock); 1787 udc->driver->resume(&udc->gadget); 1788 spin_lock(&udc->lock); 1789 } 1790 } 1791 1792 dma_status = USBA_BFEXT(DMA_INT, status); 1793 if (dma_status) { 1794 int i; 1795 1796 for (i = 1; i <= USBA_NR_DMAS; i++) 1797 if (dma_status & (1 << i)) 1798 usba_dma_irq(udc, &udc->usba_ep[i]); 1799 } 1800 1801 ep_status = USBA_BFEXT(EPT_INT, status); 1802 if (ep_status) { 1803 int i; 1804 1805 for (i = 0; i < udc->num_ep; i++) 1806 if (ep_status & (1 << i)) { 1807 if (ep_is_control(&udc->usba_ep[i])) 1808 usba_control_irq(udc, &udc->usba_ep[i]); 1809 else 1810 usba_ep_irq(udc, &udc->usba_ep[i]); 1811 } 1812 } 1813 1814 if (status & USBA_END_OF_RESET) { 1815 struct usba_ep *ep0, *ep; 1816 int i, n; 1817 1818 usba_writel(udc, INT_CLR, USBA_END_OF_RESET); 1819 generate_bias_pulse(udc); 1820 reset_all_endpoints(udc); 1821 1822 if (udc->gadget.speed != USB_SPEED_UNKNOWN && udc->driver) { 1823 udc->gadget.speed = USB_SPEED_UNKNOWN; 1824 spin_unlock(&udc->lock); 1825 usb_gadget_udc_reset(&udc->gadget, udc->driver); 1826 spin_lock(&udc->lock); 1827 } 1828 1829 if (status & USBA_HIGH_SPEED) 1830 udc->gadget.speed = USB_SPEED_HIGH; 1831 else 1832 udc->gadget.speed = USB_SPEED_FULL; 1833 DBG(DBG_BUS, "%s bus reset detected\n", 1834 usb_speed_string(udc->gadget.speed)); 1835 1836 ep0 = &udc->usba_ep[0]; 1837 ep0->ep.desc = &usba_ep0_desc; 1838 ep0->state = WAIT_FOR_SETUP; 1839 usba_ep_writel(ep0, CFG, 1840 (USBA_BF(EPT_SIZE, EP0_EPT_SIZE) 1841 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL) 1842 | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE))); 1843 usba_ep_writel(ep0, CTL_ENB, 1844 USBA_EPT_ENABLE | USBA_RX_SETUP); 1845 usba_int_enb_set(udc, int_enb | USBA_BF(EPT_INT, 1) | 1846 USBA_DET_SUSPEND | USBA_END_OF_RESUME); 1847 1848 /* 1849 * Unclear why we hit this irregularly, e.g. in usbtest, 1850 * but it's clearly harmless... 1851 */ 1852 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED)) 1853 dev_err(&udc->pdev->dev, 1854 "ODD: EP0 configuration is invalid!\n"); 1855 1856 /* Preallocate other endpoints */ 1857 n = fifo_mode ? udc->num_ep : udc->configured_ep; 1858 for (i = 1; i < n; i++) { 1859 ep = &udc->usba_ep[i]; 1860 usba_ep_writel(ep, CFG, ep->ept_cfg); 1861 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) 1862 dev_err(&udc->pdev->dev, 1863 "ODD: EP%d configuration is invalid!\n", i); 1864 } 1865 } 1866 1867 spin_unlock(&udc->lock); 1868 1869 return IRQ_HANDLED; 1870 } 1871 1872 static int start_clock(struct usba_udc *udc) 1873 { 1874 int ret; 1875 1876 if (udc->clocked) 1877 return 0; 1878 1879 ret = clk_prepare_enable(udc->pclk); 1880 if (ret) 1881 return ret; 1882 ret = clk_prepare_enable(udc->hclk); 1883 if (ret) { 1884 clk_disable_unprepare(udc->pclk); 1885 return ret; 1886 } 1887 1888 udc->clocked = true; 1889 return 0; 1890 } 1891 1892 static void stop_clock(struct usba_udc *udc) 1893 { 1894 if (!udc->clocked) 1895 return; 1896 1897 clk_disable_unprepare(udc->hclk); 1898 clk_disable_unprepare(udc->pclk); 1899 1900 udc->clocked = false; 1901 } 1902 1903 static int usba_start(struct usba_udc *udc) 1904 { 1905 unsigned long flags; 1906 int ret; 1907 1908 ret = start_clock(udc); 1909 if (ret) 1910 return ret; 1911 1912 spin_lock_irqsave(&udc->lock, flags); 1913 toggle_bias(udc, 1); 1914 usba_writel(udc, CTRL, USBA_ENABLE_MASK); 1915 usba_int_enb_set(udc, USBA_END_OF_RESET); 1916 spin_unlock_irqrestore(&udc->lock, flags); 1917 1918 return 0; 1919 } 1920 1921 static void usba_stop(struct usba_udc *udc) 1922 { 1923 unsigned long flags; 1924 1925 spin_lock_irqsave(&udc->lock, flags); 1926 udc->gadget.speed = USB_SPEED_UNKNOWN; 1927 reset_all_endpoints(udc); 1928 1929 /* This will also disable the DP pullup */ 1930 toggle_bias(udc, 0); 1931 usba_writel(udc, CTRL, USBA_DISABLE_MASK); 1932 spin_unlock_irqrestore(&udc->lock, flags); 1933 1934 stop_clock(udc); 1935 } 1936 1937 static irqreturn_t usba_vbus_irq_thread(int irq, void *devid) 1938 { 1939 struct usba_udc *udc = devid; 1940 int vbus; 1941 1942 /* debounce */ 1943 udelay(10); 1944 1945 mutex_lock(&udc->vbus_mutex); 1946 1947 vbus = vbus_is_present(udc); 1948 if (vbus != udc->vbus_prev) { 1949 if (vbus) { 1950 usba_start(udc); 1951 } else { 1952 usba_stop(udc); 1953 1954 if (udc->driver->disconnect) 1955 udc->driver->disconnect(&udc->gadget); 1956 } 1957 udc->vbus_prev = vbus; 1958 } 1959 1960 mutex_unlock(&udc->vbus_mutex); 1961 return IRQ_HANDLED; 1962 } 1963 1964 static int atmel_usba_start(struct usb_gadget *gadget, 1965 struct usb_gadget_driver *driver) 1966 { 1967 int ret; 1968 struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget); 1969 unsigned long flags; 1970 1971 spin_lock_irqsave(&udc->lock, flags); 1972 udc->devstatus = 1 << USB_DEVICE_SELF_POWERED; 1973 udc->driver = driver; 1974 spin_unlock_irqrestore(&udc->lock, flags); 1975 1976 mutex_lock(&udc->vbus_mutex); 1977 1978 if (gpio_is_valid(udc->vbus_pin)) 1979 enable_irq(gpio_to_irq(udc->vbus_pin)); 1980 1981 /* If Vbus is present, enable the controller and wait for reset */ 1982 udc->vbus_prev = vbus_is_present(udc); 1983 if (udc->vbus_prev) { 1984 ret = usba_start(udc); 1985 if (ret) 1986 goto err; 1987 } 1988 1989 mutex_unlock(&udc->vbus_mutex); 1990 return 0; 1991 1992 err: 1993 if (gpio_is_valid(udc->vbus_pin)) 1994 disable_irq(gpio_to_irq(udc->vbus_pin)); 1995 1996 mutex_unlock(&udc->vbus_mutex); 1997 1998 spin_lock_irqsave(&udc->lock, flags); 1999 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED); 2000 udc->driver = NULL; 2001 spin_unlock_irqrestore(&udc->lock, flags); 2002 return ret; 2003 } 2004 2005 static int atmel_usba_stop(struct usb_gadget *gadget) 2006 { 2007 struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget); 2008 2009 if (gpio_is_valid(udc->vbus_pin)) 2010 disable_irq(gpio_to_irq(udc->vbus_pin)); 2011 2012 if (fifo_mode == 0) 2013 udc->configured_ep = 1; 2014 2015 usba_stop(udc); 2016 2017 udc->driver = NULL; 2018 2019 return 0; 2020 } 2021 2022 #ifdef CONFIG_OF 2023 static void at91sam9rl_toggle_bias(struct usba_udc *udc, int is_on) 2024 { 2025 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN, 2026 is_on ? AT91_PMC_BIASEN : 0); 2027 } 2028 2029 static void at91sam9g45_pulse_bias(struct usba_udc *udc) 2030 { 2031 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN, 0); 2032 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN, 2033 AT91_PMC_BIASEN); 2034 } 2035 2036 static const struct usba_udc_errata at91sam9rl_errata = { 2037 .toggle_bias = at91sam9rl_toggle_bias, 2038 }; 2039 2040 static const struct usba_udc_errata at91sam9g45_errata = { 2041 .pulse_bias = at91sam9g45_pulse_bias, 2042 }; 2043 2044 static const struct of_device_id atmel_udc_dt_ids[] = { 2045 { .compatible = "atmel,at91sam9rl-udc", .data = &at91sam9rl_errata }, 2046 { .compatible = "atmel,at91sam9g45-udc", .data = &at91sam9g45_errata }, 2047 { .compatible = "atmel,sama5d3-udc" }, 2048 { /* sentinel */ } 2049 }; 2050 2051 MODULE_DEVICE_TABLE(of, atmel_udc_dt_ids); 2052 2053 static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev, 2054 struct usba_udc *udc) 2055 { 2056 u32 val; 2057 const char *name; 2058 enum of_gpio_flags flags; 2059 struct device_node *np = pdev->dev.of_node; 2060 const struct of_device_id *match; 2061 struct device_node *pp; 2062 int i, ret; 2063 struct usba_ep *eps, *ep; 2064 2065 match = of_match_node(atmel_udc_dt_ids, np); 2066 if (!match) 2067 return ERR_PTR(-EINVAL); 2068 2069 udc->errata = match->data; 2070 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9g45-pmc"); 2071 if (IS_ERR(udc->pmc)) 2072 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9x5-pmc"); 2073 if (udc->errata && IS_ERR(udc->pmc)) 2074 return ERR_CAST(udc->pmc); 2075 2076 udc->num_ep = 0; 2077 2078 udc->vbus_pin = of_get_named_gpio_flags(np, "atmel,vbus-gpio", 0, 2079 &flags); 2080 udc->vbus_pin_inverted = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0; 2081 2082 if (fifo_mode == 0) { 2083 pp = NULL; 2084 while ((pp = of_get_next_child(np, pp))) 2085 udc->num_ep++; 2086 udc->configured_ep = 1; 2087 } else { 2088 udc->num_ep = usba_config_fifo_table(udc); 2089 } 2090 2091 eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * udc->num_ep, 2092 GFP_KERNEL); 2093 if (!eps) 2094 return ERR_PTR(-ENOMEM); 2095 2096 udc->gadget.ep0 = &eps[0].ep; 2097 2098 INIT_LIST_HEAD(&eps[0].ep.ep_list); 2099 2100 pp = NULL; 2101 i = 0; 2102 while ((pp = of_get_next_child(np, pp)) && i < udc->num_ep) { 2103 ep = &eps[i]; 2104 2105 ret = of_property_read_u32(pp, "reg", &val); 2106 if (ret) { 2107 dev_err(&pdev->dev, "of_probe: reg error(%d)\n", ret); 2108 goto err; 2109 } 2110 ep->index = fifo_mode ? udc->fifo_cfg[i].hw_ep_num : val; 2111 2112 ret = of_property_read_u32(pp, "atmel,fifo-size", &val); 2113 if (ret) { 2114 dev_err(&pdev->dev, "of_probe: fifo-size error(%d)\n", ret); 2115 goto err; 2116 } 2117 if (fifo_mode) { 2118 if (val < udc->fifo_cfg[i].fifo_size) { 2119 dev_warn(&pdev->dev, 2120 "Using max fifo-size value from DT\n"); 2121 ep->fifo_size = val; 2122 } else { 2123 ep->fifo_size = udc->fifo_cfg[i].fifo_size; 2124 } 2125 } else { 2126 ep->fifo_size = val; 2127 } 2128 2129 ret = of_property_read_u32(pp, "atmel,nb-banks", &val); 2130 if (ret) { 2131 dev_err(&pdev->dev, "of_probe: nb-banks error(%d)\n", ret); 2132 goto err; 2133 } 2134 if (fifo_mode) { 2135 if (val < udc->fifo_cfg[i].nr_banks) { 2136 dev_warn(&pdev->dev, 2137 "Using max nb-banks value from DT\n"); 2138 ep->nr_banks = val; 2139 } else { 2140 ep->nr_banks = udc->fifo_cfg[i].nr_banks; 2141 } 2142 } else { 2143 ep->nr_banks = val; 2144 } 2145 2146 ep->can_dma = of_property_read_bool(pp, "atmel,can-dma"); 2147 ep->can_isoc = of_property_read_bool(pp, "atmel,can-isoc"); 2148 2149 ret = of_property_read_string(pp, "name", &name); 2150 if (ret) { 2151 dev_err(&pdev->dev, "of_probe: name error(%d)\n", ret); 2152 goto err; 2153 } 2154 sprintf(ep->name, "ep%d", ep->index); 2155 ep->ep.name = ep->name; 2156 2157 ep->ep_regs = udc->regs + USBA_EPT_BASE(i); 2158 ep->dma_regs = udc->regs + USBA_DMA_BASE(i); 2159 ep->fifo = udc->fifo + USBA_FIFO_BASE(i); 2160 ep->ep.ops = &usba_ep_ops; 2161 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size); 2162 ep->udc = udc; 2163 INIT_LIST_HEAD(&ep->queue); 2164 2165 if (ep->index == 0) { 2166 ep->ep.caps.type_control = true; 2167 } else { 2168 ep->ep.caps.type_iso = ep->can_isoc; 2169 ep->ep.caps.type_bulk = true; 2170 ep->ep.caps.type_int = true; 2171 } 2172 2173 ep->ep.caps.dir_in = true; 2174 ep->ep.caps.dir_out = true; 2175 2176 if (fifo_mode != 0) { 2177 /* 2178 * Generate ept_cfg based on FIFO size and 2179 * banks number 2180 */ 2181 if (ep->fifo_size <= 8) 2182 ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8); 2183 else 2184 /* LSB is bit 1, not 0 */ 2185 ep->ept_cfg = 2186 USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3); 2187 2188 ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks); 2189 } 2190 2191 if (i) 2192 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); 2193 2194 i++; 2195 } 2196 2197 if (i == 0) { 2198 dev_err(&pdev->dev, "of_probe: no endpoint specified\n"); 2199 ret = -EINVAL; 2200 goto err; 2201 } 2202 2203 return eps; 2204 err: 2205 return ERR_PTR(ret); 2206 } 2207 #else 2208 static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev, 2209 struct usba_udc *udc) 2210 { 2211 return ERR_PTR(-ENOSYS); 2212 } 2213 #endif 2214 2215 static struct usba_ep * usba_udc_pdata(struct platform_device *pdev, 2216 struct usba_udc *udc) 2217 { 2218 struct usba_platform_data *pdata = dev_get_platdata(&pdev->dev); 2219 struct usba_ep *eps; 2220 int i; 2221 2222 if (!pdata) 2223 return ERR_PTR(-ENXIO); 2224 2225 eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * pdata->num_ep, 2226 GFP_KERNEL); 2227 if (!eps) 2228 return ERR_PTR(-ENOMEM); 2229 2230 udc->gadget.ep0 = &eps[0].ep; 2231 2232 udc->vbus_pin = pdata->vbus_pin; 2233 udc->vbus_pin_inverted = pdata->vbus_pin_inverted; 2234 udc->num_ep = pdata->num_ep; 2235 2236 INIT_LIST_HEAD(&eps[0].ep.ep_list); 2237 2238 for (i = 0; i < pdata->num_ep; i++) { 2239 struct usba_ep *ep = &eps[i]; 2240 2241 ep->ep_regs = udc->regs + USBA_EPT_BASE(i); 2242 ep->dma_regs = udc->regs + USBA_DMA_BASE(i); 2243 ep->fifo = udc->fifo + USBA_FIFO_BASE(i); 2244 ep->ep.ops = &usba_ep_ops; 2245 ep->ep.name = pdata->ep[i].name; 2246 ep->fifo_size = pdata->ep[i].fifo_size; 2247 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size); 2248 ep->udc = udc; 2249 INIT_LIST_HEAD(&ep->queue); 2250 ep->nr_banks = pdata->ep[i].nr_banks; 2251 ep->index = pdata->ep[i].index; 2252 ep->can_dma = pdata->ep[i].can_dma; 2253 ep->can_isoc = pdata->ep[i].can_isoc; 2254 2255 if (i == 0) { 2256 ep->ep.caps.type_control = true; 2257 } else { 2258 ep->ep.caps.type_iso = ep->can_isoc; 2259 ep->ep.caps.type_bulk = true; 2260 ep->ep.caps.type_int = true; 2261 } 2262 2263 ep->ep.caps.dir_in = true; 2264 ep->ep.caps.dir_out = true; 2265 2266 if (i) 2267 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); 2268 } 2269 2270 return eps; 2271 } 2272 2273 static int usba_udc_probe(struct platform_device *pdev) 2274 { 2275 struct resource *regs, *fifo; 2276 struct clk *pclk, *hclk; 2277 struct usba_udc *udc; 2278 int irq, ret, i; 2279 2280 udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL); 2281 if (!udc) 2282 return -ENOMEM; 2283 2284 udc->gadget = usba_gadget_template; 2285 INIT_LIST_HEAD(&udc->gadget.ep_list); 2286 2287 regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID); 2288 fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID); 2289 if (!regs || !fifo) 2290 return -ENXIO; 2291 2292 irq = platform_get_irq(pdev, 0); 2293 if (irq < 0) 2294 return irq; 2295 2296 pclk = devm_clk_get(&pdev->dev, "pclk"); 2297 if (IS_ERR(pclk)) 2298 return PTR_ERR(pclk); 2299 hclk = devm_clk_get(&pdev->dev, "hclk"); 2300 if (IS_ERR(hclk)) 2301 return PTR_ERR(hclk); 2302 2303 spin_lock_init(&udc->lock); 2304 mutex_init(&udc->vbus_mutex); 2305 udc->pdev = pdev; 2306 udc->pclk = pclk; 2307 udc->hclk = hclk; 2308 udc->vbus_pin = -ENODEV; 2309 2310 ret = -ENOMEM; 2311 udc->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs)); 2312 if (!udc->regs) { 2313 dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n"); 2314 return ret; 2315 } 2316 dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n", 2317 (unsigned long)regs->start, udc->regs); 2318 udc->fifo = devm_ioremap(&pdev->dev, fifo->start, resource_size(fifo)); 2319 if (!udc->fifo) { 2320 dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n"); 2321 return ret; 2322 } 2323 dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n", 2324 (unsigned long)fifo->start, udc->fifo); 2325 2326 platform_set_drvdata(pdev, udc); 2327 2328 /* Make sure we start from a clean slate */ 2329 ret = clk_prepare_enable(pclk); 2330 if (ret) { 2331 dev_err(&pdev->dev, "Unable to enable pclk, aborting.\n"); 2332 return ret; 2333 } 2334 2335 usba_writel(udc, CTRL, USBA_DISABLE_MASK); 2336 clk_disable_unprepare(pclk); 2337 2338 if (pdev->dev.of_node) 2339 udc->usba_ep = atmel_udc_of_init(pdev, udc); 2340 else 2341 udc->usba_ep = usba_udc_pdata(pdev, udc); 2342 2343 toggle_bias(udc, 0); 2344 2345 if (IS_ERR(udc->usba_ep)) 2346 return PTR_ERR(udc->usba_ep); 2347 2348 ret = devm_request_irq(&pdev->dev, irq, usba_udc_irq, 0, 2349 "atmel_usba_udc", udc); 2350 if (ret) { 2351 dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n", 2352 irq, ret); 2353 return ret; 2354 } 2355 udc->irq = irq; 2356 2357 if (gpio_is_valid(udc->vbus_pin)) { 2358 if (!devm_gpio_request(&pdev->dev, udc->vbus_pin, "atmel_usba_udc")) { 2359 irq_set_status_flags(gpio_to_irq(udc->vbus_pin), 2360 IRQ_NOAUTOEN); 2361 ret = devm_request_threaded_irq(&pdev->dev, 2362 gpio_to_irq(udc->vbus_pin), NULL, 2363 usba_vbus_irq_thread, USBA_VBUS_IRQFLAGS, 2364 "atmel_usba_udc", udc); 2365 if (ret) { 2366 udc->vbus_pin = -ENODEV; 2367 dev_warn(&udc->pdev->dev, 2368 "failed to request vbus irq; " 2369 "assuming always on\n"); 2370 } 2371 } else { 2372 /* gpio_request fail so use -EINVAL for gpio_is_valid */ 2373 udc->vbus_pin = -EINVAL; 2374 } 2375 } 2376 2377 ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget); 2378 if (ret) 2379 return ret; 2380 device_init_wakeup(&pdev->dev, 1); 2381 2382 usba_init_debugfs(udc); 2383 for (i = 1; i < udc->num_ep; i++) 2384 usba_ep_init_debugfs(udc, &udc->usba_ep[i]); 2385 2386 return 0; 2387 } 2388 2389 static int usba_udc_remove(struct platform_device *pdev) 2390 { 2391 struct usba_udc *udc; 2392 int i; 2393 2394 udc = platform_get_drvdata(pdev); 2395 2396 device_init_wakeup(&pdev->dev, 0); 2397 usb_del_gadget_udc(&udc->gadget); 2398 2399 for (i = 1; i < udc->num_ep; i++) 2400 usba_ep_cleanup_debugfs(&udc->usba_ep[i]); 2401 usba_cleanup_debugfs(udc); 2402 2403 return 0; 2404 } 2405 2406 #ifdef CONFIG_PM_SLEEP 2407 static int usba_udc_suspend(struct device *dev) 2408 { 2409 struct usba_udc *udc = dev_get_drvdata(dev); 2410 2411 /* Not started */ 2412 if (!udc->driver) 2413 return 0; 2414 2415 mutex_lock(&udc->vbus_mutex); 2416 2417 if (!device_may_wakeup(dev)) { 2418 usba_stop(udc); 2419 goto out; 2420 } 2421 2422 /* 2423 * Device may wake up. We stay clocked if we failed 2424 * to request vbus irq, assuming always on. 2425 */ 2426 if (gpio_is_valid(udc->vbus_pin)) { 2427 usba_stop(udc); 2428 enable_irq_wake(gpio_to_irq(udc->vbus_pin)); 2429 } 2430 2431 out: 2432 mutex_unlock(&udc->vbus_mutex); 2433 return 0; 2434 } 2435 2436 static int usba_udc_resume(struct device *dev) 2437 { 2438 struct usba_udc *udc = dev_get_drvdata(dev); 2439 2440 /* Not started */ 2441 if (!udc->driver) 2442 return 0; 2443 2444 if (device_may_wakeup(dev) && gpio_is_valid(udc->vbus_pin)) 2445 disable_irq_wake(gpio_to_irq(udc->vbus_pin)); 2446 2447 /* If Vbus is present, enable the controller and wait for reset */ 2448 mutex_lock(&udc->vbus_mutex); 2449 udc->vbus_prev = vbus_is_present(udc); 2450 if (udc->vbus_prev) 2451 usba_start(udc); 2452 mutex_unlock(&udc->vbus_mutex); 2453 2454 return 0; 2455 } 2456 #endif 2457 2458 static SIMPLE_DEV_PM_OPS(usba_udc_pm_ops, usba_udc_suspend, usba_udc_resume); 2459 2460 static struct platform_driver udc_driver = { 2461 .remove = usba_udc_remove, 2462 .driver = { 2463 .name = "atmel_usba_udc", 2464 .pm = &usba_udc_pm_ops, 2465 .of_match_table = of_match_ptr(atmel_udc_dt_ids), 2466 }, 2467 }; 2468 2469 module_platform_driver_probe(udc_driver, usba_udc_probe); 2470 2471 MODULE_DESCRIPTION("Atmel USBA UDC driver"); 2472 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); 2473 MODULE_LICENSE("GPL"); 2474 MODULE_ALIAS("platform:atmel_usba_udc"); 2475