xref: /openbmc/linux/drivers/usb/gadget/udc/at91_udc.h (revision 9aa02165)
190fccb52SAndrzej Pietrasiewicz /*
290fccb52SAndrzej Pietrasiewicz  * Copyright (C) 2004 by Thomas Rathbone, HP Labs
390fccb52SAndrzej Pietrasiewicz  * Copyright (C) 2005 by Ivan Kokshaysky
490fccb52SAndrzej Pietrasiewicz  * Copyright (C) 2006 by SAN People
590fccb52SAndrzej Pietrasiewicz  *
690fccb52SAndrzej Pietrasiewicz  * This program is free software; you can redistribute it and/or modify
790fccb52SAndrzej Pietrasiewicz  * it under the terms of the GNU General Public License as published by
890fccb52SAndrzej Pietrasiewicz  * the Free Software Foundation; either version 2 of the License, or
990fccb52SAndrzej Pietrasiewicz  * (at your option) any later version.
1090fccb52SAndrzej Pietrasiewicz  */
1190fccb52SAndrzej Pietrasiewicz 
1290fccb52SAndrzej Pietrasiewicz #ifndef AT91_UDC_H
1390fccb52SAndrzej Pietrasiewicz #define AT91_UDC_H
1490fccb52SAndrzej Pietrasiewicz 
1590fccb52SAndrzej Pietrasiewicz /*
1690fccb52SAndrzej Pietrasiewicz  * USB Device Port (UDP) registers.
1790fccb52SAndrzej Pietrasiewicz  * Based on AT91RM9200 datasheet revision E.
1890fccb52SAndrzej Pietrasiewicz  */
1990fccb52SAndrzej Pietrasiewicz 
2090fccb52SAndrzej Pietrasiewicz #define AT91_UDP_FRM_NUM	0x00		/* Frame Number Register */
2190fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_NUM	(0x7ff <<  0)	/* Frame Number */
2290fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_FRM_ERR	(1     << 16)	/* Frame Error */
2390fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_FRM_OK	(1     << 17)	/* Frame OK */
2490fccb52SAndrzej Pietrasiewicz 
2590fccb52SAndrzej Pietrasiewicz #define AT91_UDP_GLB_STAT	0x04		/* Global State Register */
2690fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_FADDEN	(1 <<  0)	/* Function Address Enable */
2790fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_CONFG	(1 <<  1)	/* Configured */
2890fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_ESR	(1 <<  2)	/* Enable Send Resume */
2990fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_RSMINPR	(1 <<  3)	/* Resume has been sent */
3090fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_RMWUPE	(1 <<  4)	/* Remote Wake Up Enable */
3190fccb52SAndrzej Pietrasiewicz 
3290fccb52SAndrzej Pietrasiewicz #define AT91_UDP_FADDR		0x08		/* Function Address Register */
3390fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_FADD	(0x7f << 0)	/* Function Address Value */
3490fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_FEN	(1    << 8)	/* Function Enable */
3590fccb52SAndrzej Pietrasiewicz 
3690fccb52SAndrzej Pietrasiewicz #define AT91_UDP_IER		0x10		/* Interrupt Enable Register */
3790fccb52SAndrzej Pietrasiewicz #define AT91_UDP_IDR		0x14		/* Interrupt Disable Register */
3890fccb52SAndrzej Pietrasiewicz #define AT91_UDP_IMR		0x18		/* Interrupt Mask Register */
3990fccb52SAndrzej Pietrasiewicz 
4090fccb52SAndrzej Pietrasiewicz #define AT91_UDP_ISR		0x1c		/* Interrupt Status Register */
4190fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_EP(n)	(1 << (n))	/* Endpoint Interrupt Status */
4290fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_RXSUSP	(1 <<  8) 	/* USB Suspend Interrupt Status */
4390fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_RXRSM	(1 <<  9)	/* USB Resume Interrupt Status */
4490fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_EXTRSM	(1 << 10)	/* External Resume Interrupt Status [AT91RM9200 only] */
4590fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_SOFINT	(1 << 11)	/* Start of Frame Interrupt Status */
4690fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_ENDBUSRES	(1 << 12)	/* End of Bus Reset Interrupt Status */
4790fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_WAKEUP	(1 << 13)	/* USB Wakeup Interrupt Status [AT91RM9200 only] */
4890fccb52SAndrzej Pietrasiewicz 
4990fccb52SAndrzej Pietrasiewicz #define AT91_UDP_ICR		0x20		/* Interrupt Clear Register */
5090fccb52SAndrzej Pietrasiewicz #define AT91_UDP_RST_EP		0x28		/* Reset Endpoint Register */
5190fccb52SAndrzej Pietrasiewicz 
5290fccb52SAndrzej Pietrasiewicz #define AT91_UDP_CSR(n)		(0x30+((n)*4))	/* Endpoint Control/Status Registers 0-7 */
5390fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_TXCOMP	(1 <<  0)	/* Generates IN packet with data previously written in DPR */
5490fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_RX_DATA_BK0 (1 <<  1)	/* Receive Data Bank 0 */
5590fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_RXSETUP	(1 <<  2)	/* Send STALL to the host */
5690fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_STALLSENT	(1 <<  3)	/* Stall Sent / Isochronous error (Isochronous endpoints) */
5790fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_TXPKTRDY	(1 <<  4)	/* Transmit Packet Ready */
5890fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_FORCESTALL	(1 <<  5)	/* Force Stall */
5990fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_RX_DATA_BK1 (1 <<  6)	/* Receive Data Bank 1 */
6090fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_DIR	(1 <<  7)	/* Transfer Direction */
6190fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_EPTYPE	(7 <<  8)	/* Endpoint Type */
6290fccb52SAndrzej Pietrasiewicz #define		AT91_UDP_EPTYPE_CTRL		(0 <<  8)
6390fccb52SAndrzej Pietrasiewicz #define		AT91_UDP_EPTYPE_ISO_OUT		(1 <<  8)
6490fccb52SAndrzej Pietrasiewicz #define		AT91_UDP_EPTYPE_BULK_OUT	(2 <<  8)
6590fccb52SAndrzej Pietrasiewicz #define		AT91_UDP_EPTYPE_INT_OUT		(3 <<  8)
6690fccb52SAndrzej Pietrasiewicz #define		AT91_UDP_EPTYPE_ISO_IN		(5 <<  8)
6790fccb52SAndrzej Pietrasiewicz #define		AT91_UDP_EPTYPE_BULK_IN		(6 <<  8)
6890fccb52SAndrzej Pietrasiewicz #define		AT91_UDP_EPTYPE_INT_IN		(7 <<  8)
6990fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_DTGLE	(1 << 11)	/* Data Toggle */
7090fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_EPEDS	(1 << 15)	/* Endpoint Enable/Disable */
7190fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_RXBYTECNT	(0x7ff << 16)	/* Number of bytes in FIFO */
7290fccb52SAndrzej Pietrasiewicz 
7390fccb52SAndrzej Pietrasiewicz #define AT91_UDP_FDR(n)		(0x50+((n)*4))	/* Endpoint FIFO Data Registers 0-7 */
7490fccb52SAndrzej Pietrasiewicz 
7590fccb52SAndrzej Pietrasiewicz #define AT91_UDP_TXVC		0x74		/* Transceiver Control Register */
7690fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_TXVC_TXVDIS (1 << 8)	/* Transceiver Disable */
7790fccb52SAndrzej Pietrasiewicz #define     AT91_UDP_TXVC_PUON   (1 << 9)	/* PullUp On [AT91SAM9260 only] */
7890fccb52SAndrzej Pietrasiewicz 
7990fccb52SAndrzej Pietrasiewicz /*-------------------------------------------------------------------------*/
8090fccb52SAndrzej Pietrasiewicz 
8190fccb52SAndrzej Pietrasiewicz /*
8290fccb52SAndrzej Pietrasiewicz  * controller driver data structures
8390fccb52SAndrzej Pietrasiewicz  */
8490fccb52SAndrzej Pietrasiewicz 
8590fccb52SAndrzej Pietrasiewicz #define	NUM_ENDPOINTS	6
8690fccb52SAndrzej Pietrasiewicz 
8790fccb52SAndrzej Pietrasiewicz /*
8890fccb52SAndrzej Pietrasiewicz  * hardware won't disable bus reset, or resume while the controller
8990fccb52SAndrzej Pietrasiewicz  * is suspended ... watching suspend helps keep the logic symmetric.
9090fccb52SAndrzej Pietrasiewicz  */
9190fccb52SAndrzej Pietrasiewicz #define	MINIMUS_INTERRUPTUS \
9290fccb52SAndrzej Pietrasiewicz 	(AT91_UDP_ENDBUSRES | AT91_UDP_RXRSM | AT91_UDP_RXSUSP)
9390fccb52SAndrzej Pietrasiewicz 
9490fccb52SAndrzej Pietrasiewicz struct at91_ep {
9590fccb52SAndrzej Pietrasiewicz 	struct usb_ep			ep;
9690fccb52SAndrzej Pietrasiewicz 	struct list_head		queue;
9790fccb52SAndrzej Pietrasiewicz 	struct at91_udc			*udc;
9890fccb52SAndrzej Pietrasiewicz 	void __iomem			*creg;
9990fccb52SAndrzej Pietrasiewicz 
10090fccb52SAndrzej Pietrasiewicz 	unsigned			maxpacket:16;
10190fccb52SAndrzej Pietrasiewicz 	u8				int_mask;
10290fccb52SAndrzej Pietrasiewicz 	unsigned			is_pingpong:1;
10390fccb52SAndrzej Pietrasiewicz 
10490fccb52SAndrzej Pietrasiewicz 	unsigned			stopped:1;
10590fccb52SAndrzej Pietrasiewicz 	unsigned			is_in:1;
10690fccb52SAndrzej Pietrasiewicz 	unsigned			is_iso:1;
10790fccb52SAndrzej Pietrasiewicz 	unsigned			fifo_bank:1;
10890fccb52SAndrzej Pietrasiewicz };
10990fccb52SAndrzej Pietrasiewicz 
11090fccb52SAndrzej Pietrasiewicz /*
11190fccb52SAndrzej Pietrasiewicz  * driver is non-SMP, and just blocks IRQs whenever it needs
11290fccb52SAndrzej Pietrasiewicz  * access protection for chip registers or driver state
11390fccb52SAndrzej Pietrasiewicz  */
11490fccb52SAndrzej Pietrasiewicz struct at91_udc {
11590fccb52SAndrzej Pietrasiewicz 	struct usb_gadget		gadget;
11690fccb52SAndrzej Pietrasiewicz 	struct at91_ep			ep[NUM_ENDPOINTS];
11790fccb52SAndrzej Pietrasiewicz 	struct usb_gadget_driver	*driver;
11890fccb52SAndrzej Pietrasiewicz 	unsigned			vbus:1;
11990fccb52SAndrzej Pietrasiewicz 	unsigned			enabled:1;
12090fccb52SAndrzej Pietrasiewicz 	unsigned			clocked:1;
12190fccb52SAndrzej Pietrasiewicz 	unsigned			suspended:1;
12290fccb52SAndrzej Pietrasiewicz 	unsigned			req_pending:1;
12390fccb52SAndrzej Pietrasiewicz 	unsigned			wait_for_addr_ack:1;
12490fccb52SAndrzej Pietrasiewicz 	unsigned			wait_for_config_ack:1;
12590fccb52SAndrzej Pietrasiewicz 	unsigned			selfpowered:1;
12690fccb52SAndrzej Pietrasiewicz 	unsigned			active_suspend:1;
12790fccb52SAndrzej Pietrasiewicz 	u8				addr;
12890fccb52SAndrzej Pietrasiewicz 	struct at91_udc_data		board;
1299aa02165SBoris Brezillon 	struct clk			*iclk, *fclk;
13090fccb52SAndrzej Pietrasiewicz 	struct platform_device		*pdev;
13190fccb52SAndrzej Pietrasiewicz 	struct proc_dir_entry		*pde;
13290fccb52SAndrzej Pietrasiewicz 	void __iomem			*udp_baseaddr;
13390fccb52SAndrzej Pietrasiewicz 	int				udp_irq;
13490fccb52SAndrzej Pietrasiewicz 	spinlock_t			lock;
13590fccb52SAndrzej Pietrasiewicz 	struct timer_list		vbus_timer;
13690fccb52SAndrzej Pietrasiewicz 	struct work_struct		vbus_timer_work;
13790fccb52SAndrzej Pietrasiewicz };
13890fccb52SAndrzej Pietrasiewicz 
13990fccb52SAndrzej Pietrasiewicz static inline struct at91_udc *to_udc(struct usb_gadget *g)
14090fccb52SAndrzej Pietrasiewicz {
14190fccb52SAndrzej Pietrasiewicz 	return container_of(g, struct at91_udc, gadget);
14290fccb52SAndrzej Pietrasiewicz }
14390fccb52SAndrzej Pietrasiewicz 
14490fccb52SAndrzej Pietrasiewicz struct at91_request {
14590fccb52SAndrzej Pietrasiewicz 	struct usb_request		req;
14690fccb52SAndrzej Pietrasiewicz 	struct list_head		queue;
14790fccb52SAndrzej Pietrasiewicz };
14890fccb52SAndrzej Pietrasiewicz 
14990fccb52SAndrzej Pietrasiewicz /*-------------------------------------------------------------------------*/
15090fccb52SAndrzej Pietrasiewicz 
15190fccb52SAndrzej Pietrasiewicz #ifdef VERBOSE_DEBUG
15290fccb52SAndrzej Pietrasiewicz #    define VDBG		DBG
15390fccb52SAndrzej Pietrasiewicz #else
15490fccb52SAndrzej Pietrasiewicz #    define VDBG(stuff...)	do{}while(0)
15590fccb52SAndrzej Pietrasiewicz #endif
15690fccb52SAndrzej Pietrasiewicz 
15790fccb52SAndrzej Pietrasiewicz #ifdef PACKET_TRACE
15890fccb52SAndrzej Pietrasiewicz #    define PACKET		VDBG
15990fccb52SAndrzej Pietrasiewicz #else
16090fccb52SAndrzej Pietrasiewicz #    define PACKET(stuff...)	do{}while(0)
16190fccb52SAndrzej Pietrasiewicz #endif
16290fccb52SAndrzej Pietrasiewicz 
16390fccb52SAndrzej Pietrasiewicz #define ERR(stuff...)		pr_err("udc: " stuff)
16490fccb52SAndrzej Pietrasiewicz #define WARNING(stuff...)	pr_warning("udc: " stuff)
16590fccb52SAndrzej Pietrasiewicz #define INFO(stuff...)		pr_info("udc: " stuff)
16690fccb52SAndrzej Pietrasiewicz #define DBG(stuff...)		pr_debug("udc: " stuff)
16790fccb52SAndrzej Pietrasiewicz 
16890fccb52SAndrzej Pietrasiewicz #endif
16990fccb52SAndrzej Pietrasiewicz 
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