1 /* 2 * xhci-dbc.h - xHCI debug capability early driver 3 * 4 * Copyright (C) 2016 Intel Corporation 5 * 6 * Author: Lu Baolu <baolu.lu@linux.intel.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #ifndef __LINUX_XHCI_DBC_H 14 #define __LINUX_XHCI_DBC_H 15 16 #include <linux/types.h> 17 #include <linux/usb/ch9.h> 18 19 /* 20 * xHCI Debug Capability Register interfaces: 21 */ 22 struct xdbc_regs { 23 __le32 capability; 24 __le32 doorbell; 25 __le32 ersts; /* Event Ring Segment Table Size*/ 26 __le32 __reserved_0; /* 0c~0f reserved bits */ 27 __le64 erstba; /* Event Ring Segment Table Base Address */ 28 __le64 erdp; /* Event Ring Dequeue Pointer */ 29 __le32 control; 30 __le32 status; 31 __le32 portsc; /* Port status and control */ 32 __le32 __reserved_1; /* 2b~28 reserved bits */ 33 __le64 dccp; /* Debug Capability Context Pointer */ 34 __le32 devinfo1; /* Device Descriptor Info Register 1 */ 35 __le32 devinfo2; /* Device Descriptor Info Register 2 */ 36 }; 37 38 #define DEBUG_MAX_BURST(p) (((p) >> 16) & 0xff) 39 40 #define CTRL_DBC_RUN BIT(0) 41 #define CTRL_PORT_ENABLE BIT(1) 42 #define CTRL_HALT_OUT_TR BIT(2) 43 #define CTRL_HALT_IN_TR BIT(3) 44 #define CTRL_DBC_RUN_CHANGE BIT(4) 45 #define CTRL_DBC_ENABLE BIT(31) 46 47 #define DCST_DEBUG_PORT(p) (((p) >> 24) & 0xff) 48 49 #define PORTSC_CONN_STATUS BIT(0) 50 #define PORTSC_CONN_CHANGE BIT(17) 51 #define PORTSC_RESET_CHANGE BIT(21) 52 #define PORTSC_LINK_CHANGE BIT(22) 53 #define PORTSC_CONFIG_CHANGE BIT(23) 54 55 /* 56 * xHCI Debug Capability data structures: 57 */ 58 struct xdbc_trb { 59 __le32 field[4]; 60 }; 61 62 struct xdbc_erst_entry { 63 __le64 seg_addr; 64 __le32 seg_size; 65 __le32 __reserved_0; 66 }; 67 68 struct xdbc_info_context { 69 __le64 string0; 70 __le64 manufacturer; 71 __le64 product; 72 __le64 serial; 73 __le32 length; 74 __le32 __reserved_0[7]; 75 }; 76 77 struct xdbc_ep_context { 78 __le32 ep_info1; 79 __le32 ep_info2; 80 __le64 deq; 81 __le32 tx_info; 82 __le32 __reserved_0[11]; 83 }; 84 85 struct xdbc_context { 86 struct xdbc_info_context info; 87 struct xdbc_ep_context out; 88 struct xdbc_ep_context in; 89 }; 90 91 #define XDBC_INFO_CONTEXT_SIZE 48 92 #define XDBC_MAX_STRING_LENGTH 64 93 #define XDBC_STRING_MANUFACTURER "Linux" 94 #define XDBC_STRING_PRODUCT "Remote GDB" 95 #define XDBC_STRING_SERIAL "0001" 96 97 struct xdbc_strings { 98 char string0[XDBC_MAX_STRING_LENGTH]; 99 char manufacturer[XDBC_MAX_STRING_LENGTH]; 100 char product[XDBC_MAX_STRING_LENGTH]; 101 char serial[XDBC_MAX_STRING_LENGTH]; 102 }; 103 104 #define XDBC_PROTOCOL 1 /* GNU Remote Debug Command Set */ 105 #define XDBC_VENDOR_ID 0x1d6b /* Linux Foundation 0x1d6b */ 106 #define XDBC_PRODUCT_ID 0x0004 /* __le16 idProduct; device 0004 */ 107 #define XDBC_DEVICE_REV 0x0010 /* 0.10 */ 108 109 /* 110 * xHCI Debug Capability software state structures: 111 */ 112 struct xdbc_segment { 113 struct xdbc_trb *trbs; 114 dma_addr_t dma; 115 }; 116 117 #define XDBC_TRBS_PER_SEGMENT 256 118 119 struct xdbc_ring { 120 struct xdbc_segment *segment; 121 struct xdbc_trb *enqueue; 122 struct xdbc_trb *dequeue; 123 u32 cycle_state; 124 }; 125 126 #define XDBC_EPID_OUT 2 127 #define XDBC_EPID_IN 3 128 129 struct xdbc_state { 130 u16 vendor; 131 u16 device; 132 u32 bus; 133 u32 dev; 134 u32 func; 135 void __iomem *xhci_base; 136 u64 xhci_start; 137 size_t xhci_length; 138 int port_number; 139 140 /* DbC register base */ 141 struct xdbc_regs __iomem *xdbc_reg; 142 143 /* DbC table page */ 144 dma_addr_t table_dma; 145 void *table_base; 146 147 /* event ring segment table */ 148 dma_addr_t erst_dma; 149 size_t erst_size; 150 void *erst_base; 151 152 /* event ring segments */ 153 struct xdbc_ring evt_ring; 154 struct xdbc_segment evt_seg; 155 156 /* debug capability contexts */ 157 dma_addr_t dbcc_dma; 158 size_t dbcc_size; 159 void *dbcc_base; 160 161 /* descriptor strings */ 162 dma_addr_t string_dma; 163 size_t string_size; 164 void *string_base; 165 166 /* bulk OUT endpoint */ 167 struct xdbc_ring out_ring; 168 struct xdbc_segment out_seg; 169 void *out_buf; 170 dma_addr_t out_dma; 171 172 /* bulk IN endpoint */ 173 struct xdbc_ring in_ring; 174 struct xdbc_segment in_seg; 175 void *in_buf; 176 dma_addr_t in_dma; 177 178 u32 flags; 179 180 /* spinlock for early_xdbc_write() reentrancy */ 181 raw_spinlock_t lock; 182 }; 183 184 #define XDBC_PCI_MAX_BUSES 256 185 #define XDBC_PCI_MAX_DEVICES 32 186 #define XDBC_PCI_MAX_FUNCTION 8 187 188 #define XDBC_TABLE_ENTRY_SIZE 64 189 #define XDBC_ERST_ENTRY_NUM 1 190 #define XDBC_DBCC_ENTRY_NUM 3 191 #define XDBC_STRING_ENTRY_NUM 4 192 193 /* Bits definitions for xdbc_state.flags: */ 194 #define XDBC_FLAGS_INITIALIZED BIT(0) 195 #define XDBC_FLAGS_IN_STALL BIT(1) 196 #define XDBC_FLAGS_OUT_STALL BIT(2) 197 #define XDBC_FLAGS_IN_PROCESS BIT(3) 198 #define XDBC_FLAGS_OUT_PROCESS BIT(4) 199 #define XDBC_FLAGS_CONFIGURED BIT(5) 200 201 #define XDBC_MAX_PACKET 1024 202 203 /* Door bell target: */ 204 #define OUT_EP_DOORBELL 0 205 #define IN_EP_DOORBELL 1 206 #define DOOR_BELL_TARGET(p) (((p) & 0xff) << 8) 207 208 #define xdbc_read64(regs) xhci_read_64(NULL, (regs)) 209 #define xdbc_write64(val, regs) xhci_write_64(NULL, (val), (regs)) 210 211 #endif /* __LINUX_XHCI_DBC_H */ 212