1f83fca07SPeter Griffin /** 2f83fca07SPeter Griffin * dwc3-st.c Support for dwc3 platform devices on ST Microelectronics platforms 3f83fca07SPeter Griffin * 4f83fca07SPeter Griffin * This is a small driver for the dwc3 to provide the glue logic 5f83fca07SPeter Griffin * to configure the controller. Tested on STi platforms. 6f83fca07SPeter Griffin * 7f83fca07SPeter Griffin * Copyright (C) 2014 Stmicroelectronics 8f83fca07SPeter Griffin * 9f83fca07SPeter Griffin * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 10f83fca07SPeter Griffin * Contributors: Aymen Bouattay <aymen.bouattay@st.com> 11f83fca07SPeter Griffin * Peter Griffin <peter.griffin@linaro.org> 12f83fca07SPeter Griffin * 13f83fca07SPeter Griffin * This program is free software; you can redistribute it and/or modify 14f83fca07SPeter Griffin * it under the terms of the GNU General Public License as published by 15f83fca07SPeter Griffin * the Free Software Foundation; either version 2 of the License, or 16f83fca07SPeter Griffin * (at your option) any later version. 17f83fca07SPeter Griffin * 18f83fca07SPeter Griffin * Inspired by dwc3-omap.c and dwc3-exynos.c. 19f83fca07SPeter Griffin */ 20f83fca07SPeter Griffin 21f83fca07SPeter Griffin #include <linux/delay.h> 22f83fca07SPeter Griffin #include <linux/interrupt.h> 23f83fca07SPeter Griffin #include <linux/io.h> 24f83fca07SPeter Griffin #include <linux/ioport.h> 25f83fca07SPeter Griffin #include <linux/kernel.h> 26f83fca07SPeter Griffin #include <linux/mfd/syscon.h> 27f83fca07SPeter Griffin #include <linux/module.h> 28f83fca07SPeter Griffin #include <linux/of.h> 29f83fca07SPeter Griffin #include <linux/of_platform.h> 30f83fca07SPeter Griffin #include <linux/platform_device.h> 31f83fca07SPeter Griffin #include <linux/slab.h> 32f83fca07SPeter Griffin #include <linux/regmap.h> 33f83fca07SPeter Griffin #include <linux/reset.h> 34f83fca07SPeter Griffin #include <linux/usb/of.h> 35f83fca07SPeter Griffin 36f83fca07SPeter Griffin #include "core.h" 37f83fca07SPeter Griffin #include "io.h" 38f83fca07SPeter Griffin 39f83fca07SPeter Griffin /* glue registers */ 40f83fca07SPeter Griffin #define CLKRST_CTRL 0x00 41f83fca07SPeter Griffin #define AUX_CLK_EN BIT(0) 42f83fca07SPeter Griffin #define SW_PIPEW_RESET_N BIT(4) 43f83fca07SPeter Griffin #define EXT_CFG_RESET_N BIT(8) 44f83fca07SPeter Griffin /* 45f83fca07SPeter Griffin * 1'b0 : The host controller complies with the xHCI revision 0.96 46f83fca07SPeter Griffin * 1'b1 : The host controller complies with the xHCI revision 1.0 47f83fca07SPeter Griffin */ 48f83fca07SPeter Griffin #define XHCI_REVISION BIT(12) 49f83fca07SPeter Griffin 50f83fca07SPeter Griffin #define USB2_VBUS_MNGMNT_SEL1 0x2C 51f83fca07SPeter Griffin /* 52f83fca07SPeter Griffin * For all fields in USB2_VBUS_MNGMNT_SEL1 53f83fca07SPeter Griffin * 2’b00 : Override value from Reg 0x30 is selected 54f83fca07SPeter Griffin * 2’b01 : utmiotg_<signal_name> from usb3_top is selected 55f83fca07SPeter Griffin * 2’b10 : pipew_<signal_name> from PIPEW instance is selected 56f83fca07SPeter Griffin * 2’b11 : value is 1'b0 57f83fca07SPeter Griffin */ 58f83fca07SPeter Griffin #define USB2_VBUS_REG30 0x0 59f83fca07SPeter Griffin #define USB2_VBUS_UTMIOTG 0x1 60f83fca07SPeter Griffin #define USB2_VBUS_PIPEW 0x2 61f83fca07SPeter Griffin #define USB2_VBUS_ZERO 0x3 62f83fca07SPeter Griffin 63f83fca07SPeter Griffin #define SEL_OVERRIDE_VBUSVALID(n) (n << 0) 64f83fca07SPeter Griffin #define SEL_OVERRIDE_POWERPRESENT(n) (n << 4) 65f83fca07SPeter Griffin #define SEL_OVERRIDE_BVALID(n) (n << 8) 66f83fca07SPeter Griffin 67f83fca07SPeter Griffin /* Static DRD configuration */ 68f83fca07SPeter Griffin #define USB3_CONTROL_MASK 0xf77 69f83fca07SPeter Griffin 70f83fca07SPeter Griffin #define USB3_DEVICE_NOT_HOST BIT(0) 71f83fca07SPeter Griffin #define USB3_FORCE_VBUSVALID BIT(1) 72f83fca07SPeter Griffin #define USB3_DELAY_VBUSVALID BIT(2) 73f83fca07SPeter Griffin #define USB3_SEL_FORCE_OPMODE BIT(4) 74f83fca07SPeter Griffin #define USB3_FORCE_OPMODE(n) (n << 5) 75f83fca07SPeter Griffin #define USB3_SEL_FORCE_DPPULLDOWN2 BIT(8) 76f83fca07SPeter Griffin #define USB3_FORCE_DPPULLDOWN2 BIT(9) 77f83fca07SPeter Griffin #define USB3_SEL_FORCE_DMPULLDOWN2 BIT(10) 78f83fca07SPeter Griffin #define USB3_FORCE_DMPULLDOWN2 BIT(11) 79f83fca07SPeter Griffin 80f83fca07SPeter Griffin /** 81f83fca07SPeter Griffin * struct st_dwc3 - dwc3-st driver private structure 82f83fca07SPeter Griffin * @dev: device pointer 83f83fca07SPeter Griffin * @glue_base: ioaddr for the glue registers 84f83fca07SPeter Griffin * @regmap: regmap pointer for getting syscfg 85f83fca07SPeter Griffin * @syscfg_reg_off: usb syscfg control offset 86f83fca07SPeter Griffin * @dr_mode: drd static host/device config 87f83fca07SPeter Griffin * @rstc_pwrdn: rest controller for powerdown signal 88f83fca07SPeter Griffin * @rstc_rst: reset controller for softreset signal 89f83fca07SPeter Griffin */ 90f83fca07SPeter Griffin 91f83fca07SPeter Griffin struct st_dwc3 { 92f83fca07SPeter Griffin struct device *dev; 93f83fca07SPeter Griffin void __iomem *glue_base; 94f83fca07SPeter Griffin struct regmap *regmap; 95f83fca07SPeter Griffin int syscfg_reg_off; 96f83fca07SPeter Griffin enum usb_dr_mode dr_mode; 97f83fca07SPeter Griffin struct reset_control *rstc_pwrdn; 98f83fca07SPeter Griffin struct reset_control *rstc_rst; 99f83fca07SPeter Griffin }; 100f83fca07SPeter Griffin 101f83fca07SPeter Griffin static inline u32 st_dwc3_readl(void __iomem *base, u32 offset) 102f83fca07SPeter Griffin { 103f83fca07SPeter Griffin return readl_relaxed(base + offset); 104f83fca07SPeter Griffin } 105f83fca07SPeter Griffin 106f83fca07SPeter Griffin static inline void st_dwc3_writel(void __iomem *base, u32 offset, u32 value) 107f83fca07SPeter Griffin { 108f83fca07SPeter Griffin writel_relaxed(value, base + offset); 109f83fca07SPeter Griffin } 110f83fca07SPeter Griffin 111f83fca07SPeter Griffin /** 112f83fca07SPeter Griffin * st_dwc3_drd_init: program the port 113f83fca07SPeter Griffin * @dwc3_data: driver private structure 114f83fca07SPeter Griffin * Description: this function is to program the port as either host or device 115f83fca07SPeter Griffin * according to the static configuration passed from devicetree. 116f83fca07SPeter Griffin * OTG and dual role are not yet supported! 117f83fca07SPeter Griffin */ 118f83fca07SPeter Griffin static int st_dwc3_drd_init(struct st_dwc3 *dwc3_data) 119f83fca07SPeter Griffin { 120f83fca07SPeter Griffin u32 val; 121f83fca07SPeter Griffin int err; 122f83fca07SPeter Griffin 123f83fca07SPeter Griffin err = regmap_read(dwc3_data->regmap, dwc3_data->syscfg_reg_off, &val); 124f83fca07SPeter Griffin if (err) 125f83fca07SPeter Griffin return err; 126f83fca07SPeter Griffin 127f83fca07SPeter Griffin val &= USB3_CONTROL_MASK; 128f83fca07SPeter Griffin 129f83fca07SPeter Griffin switch (dwc3_data->dr_mode) { 130f83fca07SPeter Griffin case USB_DR_MODE_PERIPHERAL: 131f83fca07SPeter Griffin 132f83fca07SPeter Griffin val &= ~(USB3_FORCE_VBUSVALID | USB3_DELAY_VBUSVALID 133f83fca07SPeter Griffin | USB3_SEL_FORCE_OPMODE | USB3_FORCE_OPMODE(0x3) 134f83fca07SPeter Griffin | USB3_SEL_FORCE_DPPULLDOWN2 | USB3_FORCE_DPPULLDOWN2 135f83fca07SPeter Griffin | USB3_SEL_FORCE_DMPULLDOWN2 | USB3_FORCE_DMPULLDOWN2); 136f83fca07SPeter Griffin 137f83fca07SPeter Griffin val |= USB3_DEVICE_NOT_HOST; 138f83fca07SPeter Griffin 139f83fca07SPeter Griffin dev_dbg(dwc3_data->dev, "Configuring as Device\n"); 140f83fca07SPeter Griffin break; 141f83fca07SPeter Griffin 142f83fca07SPeter Griffin case USB_DR_MODE_HOST: 143f83fca07SPeter Griffin 144f83fca07SPeter Griffin val &= ~(USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID 145f83fca07SPeter Griffin | USB3_SEL_FORCE_OPMODE | USB3_FORCE_OPMODE(0x3) 146f83fca07SPeter Griffin | USB3_SEL_FORCE_DPPULLDOWN2 | USB3_FORCE_DPPULLDOWN2 147f83fca07SPeter Griffin | USB3_SEL_FORCE_DMPULLDOWN2 | USB3_FORCE_DMPULLDOWN2); 148f83fca07SPeter Griffin 149f83fca07SPeter Griffin /* 150f83fca07SPeter Griffin * USB3_DELAY_VBUSVALID is ANDed with USB_C_VBUSVALID. Thus, 151f83fca07SPeter Griffin * when set to ‘0‘, it can delay the arrival of VBUSVALID 152f83fca07SPeter Griffin * information to VBUSVLDEXT2 input of the pico PHY. 153f83fca07SPeter Griffin * We don't want to do that so we set the bit to '1'. 154f83fca07SPeter Griffin */ 155f83fca07SPeter Griffin 156f83fca07SPeter Griffin val |= USB3_DELAY_VBUSVALID; 157f83fca07SPeter Griffin 158f83fca07SPeter Griffin dev_dbg(dwc3_data->dev, "Configuring as Host\n"); 159f83fca07SPeter Griffin break; 160f83fca07SPeter Griffin 161f83fca07SPeter Griffin default: 162f83fca07SPeter Griffin dev_err(dwc3_data->dev, "Unsupported mode of operation %d\n", 163f83fca07SPeter Griffin dwc3_data->dr_mode); 164f83fca07SPeter Griffin return -EINVAL; 165f83fca07SPeter Griffin } 166f83fca07SPeter Griffin 167f83fca07SPeter Griffin return regmap_write(dwc3_data->regmap, dwc3_data->syscfg_reg_off, val); 168f83fca07SPeter Griffin } 169f83fca07SPeter Griffin 170f83fca07SPeter Griffin /** 171f83fca07SPeter Griffin * st_dwc3_init: init the controller via glue logic 172f83fca07SPeter Griffin * @dwc3_data: driver private structure 173f83fca07SPeter Griffin */ 174f83fca07SPeter Griffin static void st_dwc3_init(struct st_dwc3 *dwc3_data) 175f83fca07SPeter Griffin { 176f83fca07SPeter Griffin u32 reg = st_dwc3_readl(dwc3_data->glue_base, CLKRST_CTRL); 177f83fca07SPeter Griffin 178f83fca07SPeter Griffin reg |= AUX_CLK_EN | EXT_CFG_RESET_N | XHCI_REVISION; 179f83fca07SPeter Griffin reg &= ~SW_PIPEW_RESET_N; 180f83fca07SPeter Griffin st_dwc3_writel(dwc3_data->glue_base, CLKRST_CTRL, reg); 181f83fca07SPeter Griffin 182f83fca07SPeter Griffin /* configure mux for vbus, powerpresent and bvalid signals */ 183f83fca07SPeter Griffin reg = st_dwc3_readl(dwc3_data->glue_base, USB2_VBUS_MNGMNT_SEL1); 184f83fca07SPeter Griffin 185f83fca07SPeter Griffin reg |= SEL_OVERRIDE_VBUSVALID(USB2_VBUS_UTMIOTG) | 186f83fca07SPeter Griffin SEL_OVERRIDE_POWERPRESENT(USB2_VBUS_UTMIOTG) | 187f83fca07SPeter Griffin SEL_OVERRIDE_BVALID(USB2_VBUS_UTMIOTG); 188f83fca07SPeter Griffin 189f83fca07SPeter Griffin st_dwc3_writel(dwc3_data->glue_base, USB2_VBUS_MNGMNT_SEL1, reg); 190f83fca07SPeter Griffin 191f83fca07SPeter Griffin reg = st_dwc3_readl(dwc3_data->glue_base, CLKRST_CTRL); 192f83fca07SPeter Griffin reg |= SW_PIPEW_RESET_N; 193f83fca07SPeter Griffin st_dwc3_writel(dwc3_data->glue_base, CLKRST_CTRL, reg); 194f83fca07SPeter Griffin } 195f83fca07SPeter Griffin 196f83fca07SPeter Griffin static int st_dwc3_probe(struct platform_device *pdev) 197f83fca07SPeter Griffin { 198f83fca07SPeter Griffin struct st_dwc3 *dwc3_data; 199f83fca07SPeter Griffin struct resource *res; 200f83fca07SPeter Griffin struct device *dev = &pdev->dev; 201f83fca07SPeter Griffin struct device_node *node = dev->of_node, *child; 202f83fca07SPeter Griffin struct regmap *regmap; 203f83fca07SPeter Griffin int ret; 204f83fca07SPeter Griffin 205f83fca07SPeter Griffin dwc3_data = devm_kzalloc(dev, sizeof(*dwc3_data), GFP_KERNEL); 206f83fca07SPeter Griffin if (!dwc3_data) 207f83fca07SPeter Griffin return -ENOMEM; 208f83fca07SPeter Griffin 209f83fca07SPeter Griffin res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "reg-glue"); 210f83fca07SPeter Griffin dwc3_data->glue_base = devm_ioremap_resource(dev, res); 211f83fca07SPeter Griffin if (IS_ERR(dwc3_data->glue_base)) 212f83fca07SPeter Griffin return PTR_ERR(dwc3_data->glue_base); 213f83fca07SPeter Griffin 214f83fca07SPeter Griffin regmap = syscon_regmap_lookup_by_phandle(node, "st,syscfg"); 215f83fca07SPeter Griffin if (IS_ERR(regmap)) 216f83fca07SPeter Griffin return PTR_ERR(regmap); 217f83fca07SPeter Griffin 218f83fca07SPeter Griffin dma_set_coherent_mask(dev, dev->coherent_dma_mask); 219f83fca07SPeter Griffin dwc3_data->dev = dev; 220f83fca07SPeter Griffin dwc3_data->regmap = regmap; 221f83fca07SPeter Griffin 222f83fca07SPeter Griffin res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "syscfg-reg"); 223f83fca07SPeter Griffin if (!res) { 224f83fca07SPeter Griffin ret = -ENXIO; 225f83fca07SPeter Griffin goto undo_platform_dev_alloc; 226f83fca07SPeter Griffin } 227f83fca07SPeter Griffin 228f83fca07SPeter Griffin dwc3_data->syscfg_reg_off = res->start; 229f83fca07SPeter Griffin 230f83fca07SPeter Griffin dev_vdbg(&pdev->dev, "glue-logic addr 0x%p, syscfg-reg offset 0x%x\n", 231f83fca07SPeter Griffin dwc3_data->glue_base, dwc3_data->syscfg_reg_off); 232f83fca07SPeter Griffin 233f83fca07SPeter Griffin dwc3_data->rstc_pwrdn = devm_reset_control_get(dev, "powerdown"); 234f83fca07SPeter Griffin if (IS_ERR(dwc3_data->rstc_pwrdn)) { 235f83fca07SPeter Griffin dev_err(&pdev->dev, "could not get power controller\n"); 236f83fca07SPeter Griffin ret = PTR_ERR(dwc3_data->rstc_pwrdn); 237f83fca07SPeter Griffin goto undo_platform_dev_alloc; 238f83fca07SPeter Griffin } 239f83fca07SPeter Griffin 240f83fca07SPeter Griffin /* Manage PowerDown */ 241f83fca07SPeter Griffin reset_control_deassert(dwc3_data->rstc_pwrdn); 242f83fca07SPeter Griffin 243f83fca07SPeter Griffin dwc3_data->rstc_rst = devm_reset_control_get(dev, "softreset"); 244f83fca07SPeter Griffin if (IS_ERR(dwc3_data->rstc_rst)) { 245f83fca07SPeter Griffin dev_err(&pdev->dev, "could not get reset controller\n"); 246f83fca07SPeter Griffin ret = PTR_ERR(dwc3_data->rstc_pwrdn); 247f83fca07SPeter Griffin goto undo_powerdown; 248f83fca07SPeter Griffin } 249f83fca07SPeter Griffin 250f83fca07SPeter Griffin /* Manage SoftReset */ 251f83fca07SPeter Griffin reset_control_deassert(dwc3_data->rstc_rst); 252f83fca07SPeter Griffin 253f83fca07SPeter Griffin child = of_get_child_by_name(node, "dwc3"); 254f83fca07SPeter Griffin if (!child) { 255f83fca07SPeter Griffin dev_err(&pdev->dev, "failed to find dwc3 core node\n"); 256f83fca07SPeter Griffin ret = -ENODEV; 257f83fca07SPeter Griffin goto undo_softreset; 258f83fca07SPeter Griffin } 259f83fca07SPeter Griffin 260f83fca07SPeter Griffin dwc3_data->dr_mode = of_usb_get_dr_mode(child); 261f83fca07SPeter Griffin 262f83fca07SPeter Griffin /* Allocate and initialize the core */ 263f83fca07SPeter Griffin ret = of_platform_populate(node, NULL, NULL, dev); 264f83fca07SPeter Griffin if (ret) { 265f83fca07SPeter Griffin dev_err(dev, "failed to add dwc3 core\n"); 266f83fca07SPeter Griffin goto undo_softreset; 267f83fca07SPeter Griffin } 268f83fca07SPeter Griffin 269f83fca07SPeter Griffin /* 270f83fca07SPeter Griffin * Configure the USB port as device or host according to the static 271f83fca07SPeter Griffin * configuration passed from DT. 272f83fca07SPeter Griffin * DRD is the only mode currently supported so this will be enhanced 273f83fca07SPeter Griffin * as soon as OTG is available. 274f83fca07SPeter Griffin */ 275f83fca07SPeter Griffin ret = st_dwc3_drd_init(dwc3_data); 276f83fca07SPeter Griffin if (ret) { 277f83fca07SPeter Griffin dev_err(dev, "drd initialisation failed\n"); 278f83fca07SPeter Griffin goto undo_softreset; 279f83fca07SPeter Griffin } 280f83fca07SPeter Griffin 281f83fca07SPeter Griffin /* ST glue logic init */ 282f83fca07SPeter Griffin st_dwc3_init(dwc3_data); 283f83fca07SPeter Griffin 284f83fca07SPeter Griffin platform_set_drvdata(pdev, dwc3_data); 285f83fca07SPeter Griffin return 0; 286f83fca07SPeter Griffin 287f83fca07SPeter Griffin undo_softreset: 288f83fca07SPeter Griffin reset_control_assert(dwc3_data->rstc_rst); 289f83fca07SPeter Griffin undo_powerdown: 290f83fca07SPeter Griffin reset_control_assert(dwc3_data->rstc_pwrdn); 291f83fca07SPeter Griffin undo_platform_dev_alloc: 292f83fca07SPeter Griffin platform_device_put(pdev); 293f83fca07SPeter Griffin return ret; 294f83fca07SPeter Griffin } 295f83fca07SPeter Griffin 296f83fca07SPeter Griffin static int st_dwc3_remove(struct platform_device *pdev) 297f83fca07SPeter Griffin { 298f83fca07SPeter Griffin struct st_dwc3 *dwc3_data = platform_get_drvdata(pdev); 299f83fca07SPeter Griffin 300f83fca07SPeter Griffin of_platform_depopulate(&pdev->dev); 301f83fca07SPeter Griffin 302f83fca07SPeter Griffin reset_control_assert(dwc3_data->rstc_pwrdn); 303f83fca07SPeter Griffin reset_control_assert(dwc3_data->rstc_rst); 304f83fca07SPeter Griffin 305f83fca07SPeter Griffin return 0; 306f83fca07SPeter Griffin } 307f83fca07SPeter Griffin 308f83fca07SPeter Griffin #ifdef CONFIG_PM_SLEEP 309f83fca07SPeter Griffin static int st_dwc3_suspend(struct device *dev) 310f83fca07SPeter Griffin { 311f83fca07SPeter Griffin struct st_dwc3 *dwc3_data = dev_get_drvdata(dev); 312f83fca07SPeter Griffin 313f83fca07SPeter Griffin reset_control_assert(dwc3_data->rstc_pwrdn); 314f83fca07SPeter Griffin reset_control_assert(dwc3_data->rstc_rst); 315f83fca07SPeter Griffin 316f83fca07SPeter Griffin pinctrl_pm_select_sleep_state(dev); 317f83fca07SPeter Griffin 318f83fca07SPeter Griffin return 0; 319f83fca07SPeter Griffin } 320f83fca07SPeter Griffin 321f83fca07SPeter Griffin static int st_dwc3_resume(struct device *dev) 322f83fca07SPeter Griffin { 323f83fca07SPeter Griffin struct st_dwc3 *dwc3_data = dev_get_drvdata(dev); 324f83fca07SPeter Griffin int ret; 325f83fca07SPeter Griffin 326f83fca07SPeter Griffin pinctrl_pm_select_default_state(dev); 327f83fca07SPeter Griffin 328f83fca07SPeter Griffin reset_control_deassert(dwc3_data->rstc_pwrdn); 329f83fca07SPeter Griffin reset_control_deassert(dwc3_data->rstc_rst); 330f83fca07SPeter Griffin 331f83fca07SPeter Griffin ret = st_dwc3_drd_init(dwc3_data); 332f83fca07SPeter Griffin if (ret) { 333f83fca07SPeter Griffin dev_err(dev, "drd initialisation failed\n"); 334f83fca07SPeter Griffin return ret; 335f83fca07SPeter Griffin } 336f83fca07SPeter Griffin 337f83fca07SPeter Griffin /* ST glue logic init */ 338f83fca07SPeter Griffin st_dwc3_init(dwc3_data); 339f83fca07SPeter Griffin 340f83fca07SPeter Griffin return 0; 341f83fca07SPeter Griffin } 342f83fca07SPeter Griffin #endif /* CONFIG_PM_SLEEP */ 343f83fca07SPeter Griffin 344f83fca07SPeter Griffin static SIMPLE_DEV_PM_OPS(st_dwc3_dev_pm_ops, st_dwc3_suspend, st_dwc3_resume); 345f83fca07SPeter Griffin 346f83fca07SPeter Griffin static const struct of_device_id st_dwc3_match[] = { 347f83fca07SPeter Griffin { .compatible = "st,stih407-dwc3" }, 348f83fca07SPeter Griffin { /* sentinel */ }, 349f83fca07SPeter Griffin }; 350f83fca07SPeter Griffin 351f83fca07SPeter Griffin MODULE_DEVICE_TABLE(of, st_dwc3_match); 352f83fca07SPeter Griffin 353f83fca07SPeter Griffin static struct platform_driver st_dwc3_driver = { 354f83fca07SPeter Griffin .probe = st_dwc3_probe, 355f83fca07SPeter Griffin .remove = st_dwc3_remove, 356f83fca07SPeter Griffin .driver = { 357f83fca07SPeter Griffin .name = "usb-st-dwc3", 358f83fca07SPeter Griffin .of_match_table = st_dwc3_match, 359f83fca07SPeter Griffin .pm = &st_dwc3_dev_pm_ops, 360f83fca07SPeter Griffin }, 361f83fca07SPeter Griffin }; 362f83fca07SPeter Griffin 363f83fca07SPeter Griffin module_platform_driver(st_dwc3_driver); 364f83fca07SPeter Griffin 365f83fca07SPeter Griffin MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>"); 366f83fca07SPeter Griffin MODULE_DESCRIPTION("DesignWare USB3 STi Glue Layer"); 367f83fca07SPeter Griffin MODULE_LICENSE("GPL v2"); 368