15fd54aceSGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0+ 2*c9714d65SAditya Srivastava /* 3f83fca07SPeter Griffin * dwc3-st.c Support for dwc3 platform devices on ST Microelectronics platforms 4f83fca07SPeter Griffin * 5f83fca07SPeter Griffin * This is a small driver for the dwc3 to provide the glue logic 6f83fca07SPeter Griffin * to configure the controller. Tested on STi platforms. 7f83fca07SPeter Griffin * 8f83fca07SPeter Griffin * Copyright (C) 2014 Stmicroelectronics 9f83fca07SPeter Griffin * 10f83fca07SPeter Griffin * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 11f83fca07SPeter Griffin * Contributors: Aymen Bouattay <aymen.bouattay@st.com> 12f83fca07SPeter Griffin * Peter Griffin <peter.griffin@linaro.org> 13f83fca07SPeter Griffin * 14f83fca07SPeter Griffin * Inspired by dwc3-omap.c and dwc3-exynos.c. 15f83fca07SPeter Griffin */ 16f83fca07SPeter Griffin 17f83fca07SPeter Griffin #include <linux/delay.h> 18f83fca07SPeter Griffin #include <linux/interrupt.h> 19f83fca07SPeter Griffin #include <linux/io.h> 20f83fca07SPeter Griffin #include <linux/ioport.h> 21f83fca07SPeter Griffin #include <linux/kernel.h> 22f83fca07SPeter Griffin #include <linux/mfd/syscon.h> 23f83fca07SPeter Griffin #include <linux/module.h> 24f83fca07SPeter Griffin #include <linux/of.h> 25f83fca07SPeter Griffin #include <linux/of_platform.h> 26f83fca07SPeter Griffin #include <linux/platform_device.h> 27f83fca07SPeter Griffin #include <linux/slab.h> 28f83fca07SPeter Griffin #include <linux/regmap.h> 29f83fca07SPeter Griffin #include <linux/reset.h> 304accb8a1SFelipe Balbi #include <linux/pinctrl/consumer.h> 31f83fca07SPeter Griffin #include <linux/usb/of.h> 32f83fca07SPeter Griffin 33f83fca07SPeter Griffin #include "core.h" 34f83fca07SPeter Griffin #include "io.h" 35f83fca07SPeter Griffin 36f83fca07SPeter Griffin /* glue registers */ 37f83fca07SPeter Griffin #define CLKRST_CTRL 0x00 38f83fca07SPeter Griffin #define AUX_CLK_EN BIT(0) 39f83fca07SPeter Griffin #define SW_PIPEW_RESET_N BIT(4) 40f83fca07SPeter Griffin #define EXT_CFG_RESET_N BIT(8) 41f83fca07SPeter Griffin /* 42f83fca07SPeter Griffin * 1'b0 : The host controller complies with the xHCI revision 0.96 43f83fca07SPeter Griffin * 1'b1 : The host controller complies with the xHCI revision 1.0 44f83fca07SPeter Griffin */ 45f83fca07SPeter Griffin #define XHCI_REVISION BIT(12) 46f83fca07SPeter Griffin 47f83fca07SPeter Griffin #define USB2_VBUS_MNGMNT_SEL1 0x2C 48f83fca07SPeter Griffin /* 49f83fca07SPeter Griffin * For all fields in USB2_VBUS_MNGMNT_SEL1 50f83fca07SPeter Griffin * 2’b00 : Override value from Reg 0x30 is selected 51f83fca07SPeter Griffin * 2’b01 : utmiotg_<signal_name> from usb3_top is selected 52f83fca07SPeter Griffin * 2’b10 : pipew_<signal_name> from PIPEW instance is selected 53f83fca07SPeter Griffin * 2’b11 : value is 1'b0 54f83fca07SPeter Griffin */ 55f83fca07SPeter Griffin #define USB2_VBUS_REG30 0x0 56f83fca07SPeter Griffin #define USB2_VBUS_UTMIOTG 0x1 57f83fca07SPeter Griffin #define USB2_VBUS_PIPEW 0x2 58f83fca07SPeter Griffin #define USB2_VBUS_ZERO 0x3 59f83fca07SPeter Griffin 60f83fca07SPeter Griffin #define SEL_OVERRIDE_VBUSVALID(n) (n << 0) 61f83fca07SPeter Griffin #define SEL_OVERRIDE_POWERPRESENT(n) (n << 4) 62f83fca07SPeter Griffin #define SEL_OVERRIDE_BVALID(n) (n << 8) 63f83fca07SPeter Griffin 64f83fca07SPeter Griffin /* Static DRD configuration */ 65f83fca07SPeter Griffin #define USB3_CONTROL_MASK 0xf77 66f83fca07SPeter Griffin 67f83fca07SPeter Griffin #define USB3_DEVICE_NOT_HOST BIT(0) 68f83fca07SPeter Griffin #define USB3_FORCE_VBUSVALID BIT(1) 69f83fca07SPeter Griffin #define USB3_DELAY_VBUSVALID BIT(2) 70f83fca07SPeter Griffin #define USB3_SEL_FORCE_OPMODE BIT(4) 71f83fca07SPeter Griffin #define USB3_FORCE_OPMODE(n) (n << 5) 72f83fca07SPeter Griffin #define USB3_SEL_FORCE_DPPULLDOWN2 BIT(8) 73f83fca07SPeter Griffin #define USB3_FORCE_DPPULLDOWN2 BIT(9) 74f83fca07SPeter Griffin #define USB3_SEL_FORCE_DMPULLDOWN2 BIT(10) 75f83fca07SPeter Griffin #define USB3_FORCE_DMPULLDOWN2 BIT(11) 76f83fca07SPeter Griffin 77f83fca07SPeter Griffin /** 78f83fca07SPeter Griffin * struct st_dwc3 - dwc3-st driver private structure 79f83fca07SPeter Griffin * @dev: device pointer 80f83fca07SPeter Griffin * @glue_base: ioaddr for the glue registers 81f83fca07SPeter Griffin * @regmap: regmap pointer for getting syscfg 82f83fca07SPeter Griffin * @syscfg_reg_off: usb syscfg control offset 83f83fca07SPeter Griffin * @dr_mode: drd static host/device config 84f83fca07SPeter Griffin * @rstc_pwrdn: rest controller for powerdown signal 85f83fca07SPeter Griffin * @rstc_rst: reset controller for softreset signal 86f83fca07SPeter Griffin */ 87f83fca07SPeter Griffin 88f83fca07SPeter Griffin struct st_dwc3 { 89f83fca07SPeter Griffin struct device *dev; 90f83fca07SPeter Griffin void __iomem *glue_base; 91f83fca07SPeter Griffin struct regmap *regmap; 92f83fca07SPeter Griffin int syscfg_reg_off; 93f83fca07SPeter Griffin enum usb_dr_mode dr_mode; 94f83fca07SPeter Griffin struct reset_control *rstc_pwrdn; 95f83fca07SPeter Griffin struct reset_control *rstc_rst; 96f83fca07SPeter Griffin }; 97f83fca07SPeter Griffin 98f83fca07SPeter Griffin static inline u32 st_dwc3_readl(void __iomem *base, u32 offset) 99f83fca07SPeter Griffin { 100f83fca07SPeter Griffin return readl_relaxed(base + offset); 101f83fca07SPeter Griffin } 102f83fca07SPeter Griffin 103f83fca07SPeter Griffin static inline void st_dwc3_writel(void __iomem *base, u32 offset, u32 value) 104f83fca07SPeter Griffin { 105f83fca07SPeter Griffin writel_relaxed(value, base + offset); 106f83fca07SPeter Griffin } 107f83fca07SPeter Griffin 108f83fca07SPeter Griffin /** 109f83fca07SPeter Griffin * st_dwc3_drd_init: program the port 110f83fca07SPeter Griffin * @dwc3_data: driver private structure 111f83fca07SPeter Griffin * Description: this function is to program the port as either host or device 112f83fca07SPeter Griffin * according to the static configuration passed from devicetree. 113f83fca07SPeter Griffin * OTG and dual role are not yet supported! 114f83fca07SPeter Griffin */ 115f83fca07SPeter Griffin static int st_dwc3_drd_init(struct st_dwc3 *dwc3_data) 116f83fca07SPeter Griffin { 117f83fca07SPeter Griffin u32 val; 118f83fca07SPeter Griffin int err; 119f83fca07SPeter Griffin 120f83fca07SPeter Griffin err = regmap_read(dwc3_data->regmap, dwc3_data->syscfg_reg_off, &val); 121f83fca07SPeter Griffin if (err) 122f83fca07SPeter Griffin return err; 123f83fca07SPeter Griffin 124f83fca07SPeter Griffin val &= USB3_CONTROL_MASK; 125f83fca07SPeter Griffin 126f83fca07SPeter Griffin switch (dwc3_data->dr_mode) { 127f83fca07SPeter Griffin case USB_DR_MODE_PERIPHERAL: 128f83fca07SPeter Griffin 12927a0faafSPeter Griffin val &= ~(USB3_DELAY_VBUSVALID 130f83fca07SPeter Griffin | USB3_SEL_FORCE_OPMODE | USB3_FORCE_OPMODE(0x3) 131f83fca07SPeter Griffin | USB3_SEL_FORCE_DPPULLDOWN2 | USB3_FORCE_DPPULLDOWN2 132f83fca07SPeter Griffin | USB3_SEL_FORCE_DMPULLDOWN2 | USB3_FORCE_DMPULLDOWN2); 133f83fca07SPeter Griffin 13427a0faafSPeter Griffin /* 13527a0faafSPeter Griffin * USB3_PORT2_FORCE_VBUSVALID When '1' and when 13627a0faafSPeter Griffin * USB3_PORT2_DEVICE_NOT_HOST = 1, forces VBUSVLDEXT2 input 13727a0faafSPeter Griffin * of the pico PHY to 1. 13827a0faafSPeter Griffin */ 13927a0faafSPeter Griffin 14027a0faafSPeter Griffin val |= USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID; 141f83fca07SPeter Griffin break; 142f83fca07SPeter Griffin 143f83fca07SPeter Griffin case USB_DR_MODE_HOST: 144f83fca07SPeter Griffin 145f83fca07SPeter Griffin val &= ~(USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID 146f83fca07SPeter Griffin | USB3_SEL_FORCE_OPMODE | USB3_FORCE_OPMODE(0x3) 147f83fca07SPeter Griffin | USB3_SEL_FORCE_DPPULLDOWN2 | USB3_FORCE_DPPULLDOWN2 148f83fca07SPeter Griffin | USB3_SEL_FORCE_DMPULLDOWN2 | USB3_FORCE_DMPULLDOWN2); 149f83fca07SPeter Griffin 150f83fca07SPeter Griffin /* 151f83fca07SPeter Griffin * USB3_DELAY_VBUSVALID is ANDed with USB_C_VBUSVALID. Thus, 152f83fca07SPeter Griffin * when set to ‘0‘, it can delay the arrival of VBUSVALID 153f83fca07SPeter Griffin * information to VBUSVLDEXT2 input of the pico PHY. 154f83fca07SPeter Griffin * We don't want to do that so we set the bit to '1'. 155f83fca07SPeter Griffin */ 156f83fca07SPeter Griffin 157f83fca07SPeter Griffin val |= USB3_DELAY_VBUSVALID; 158f83fca07SPeter Griffin break; 159f83fca07SPeter Griffin 160f83fca07SPeter Griffin default: 161f83fca07SPeter Griffin dev_err(dwc3_data->dev, "Unsupported mode of operation %d\n", 162f83fca07SPeter Griffin dwc3_data->dr_mode); 163f83fca07SPeter Griffin return -EINVAL; 164f83fca07SPeter Griffin } 165f83fca07SPeter Griffin 166f83fca07SPeter Griffin return regmap_write(dwc3_data->regmap, dwc3_data->syscfg_reg_off, val); 167f83fca07SPeter Griffin } 168f83fca07SPeter Griffin 169f83fca07SPeter Griffin /** 170f83fca07SPeter Griffin * st_dwc3_init: init the controller via glue logic 171f83fca07SPeter Griffin * @dwc3_data: driver private structure 172f83fca07SPeter Griffin */ 173f83fca07SPeter Griffin static void st_dwc3_init(struct st_dwc3 *dwc3_data) 174f83fca07SPeter Griffin { 175f83fca07SPeter Griffin u32 reg = st_dwc3_readl(dwc3_data->glue_base, CLKRST_CTRL); 176f83fca07SPeter Griffin 177f83fca07SPeter Griffin reg |= AUX_CLK_EN | EXT_CFG_RESET_N | XHCI_REVISION; 178f83fca07SPeter Griffin reg &= ~SW_PIPEW_RESET_N; 179f83fca07SPeter Griffin st_dwc3_writel(dwc3_data->glue_base, CLKRST_CTRL, reg); 180f83fca07SPeter Griffin 181f83fca07SPeter Griffin /* configure mux for vbus, powerpresent and bvalid signals */ 182f83fca07SPeter Griffin reg = st_dwc3_readl(dwc3_data->glue_base, USB2_VBUS_MNGMNT_SEL1); 183f83fca07SPeter Griffin 184f83fca07SPeter Griffin reg |= SEL_OVERRIDE_VBUSVALID(USB2_VBUS_UTMIOTG) | 185f83fca07SPeter Griffin SEL_OVERRIDE_POWERPRESENT(USB2_VBUS_UTMIOTG) | 186f83fca07SPeter Griffin SEL_OVERRIDE_BVALID(USB2_VBUS_UTMIOTG); 187f83fca07SPeter Griffin 188f83fca07SPeter Griffin st_dwc3_writel(dwc3_data->glue_base, USB2_VBUS_MNGMNT_SEL1, reg); 189f83fca07SPeter Griffin 190f83fca07SPeter Griffin reg = st_dwc3_readl(dwc3_data->glue_base, CLKRST_CTRL); 191f83fca07SPeter Griffin reg |= SW_PIPEW_RESET_N; 192f83fca07SPeter Griffin st_dwc3_writel(dwc3_data->glue_base, CLKRST_CTRL, reg); 193f83fca07SPeter Griffin } 194f83fca07SPeter Griffin 195f83fca07SPeter Griffin static int st_dwc3_probe(struct platform_device *pdev) 196f83fca07SPeter Griffin { 197f83fca07SPeter Griffin struct st_dwc3 *dwc3_data; 198f83fca07SPeter Griffin struct resource *res; 199f83fca07SPeter Griffin struct device *dev = &pdev->dev; 200f83fca07SPeter Griffin struct device_node *node = dev->of_node, *child; 20166647273SHeikki Krogerus struct platform_device *child_pdev; 202f83fca07SPeter Griffin struct regmap *regmap; 203f83fca07SPeter Griffin int ret; 204f83fca07SPeter Griffin 205f83fca07SPeter Griffin dwc3_data = devm_kzalloc(dev, sizeof(*dwc3_data), GFP_KERNEL); 206f83fca07SPeter Griffin if (!dwc3_data) 207f83fca07SPeter Griffin return -ENOMEM; 208f83fca07SPeter Griffin 209db123beaSChunfeng Yun dwc3_data->glue_base = 210db123beaSChunfeng Yun devm_platform_ioremap_resource_byname(pdev, "reg-glue"); 211f83fca07SPeter Griffin if (IS_ERR(dwc3_data->glue_base)) 212f83fca07SPeter Griffin return PTR_ERR(dwc3_data->glue_base); 213f83fca07SPeter Griffin 214f83fca07SPeter Griffin regmap = syscon_regmap_lookup_by_phandle(node, "st,syscfg"); 215f83fca07SPeter Griffin if (IS_ERR(regmap)) 216f83fca07SPeter Griffin return PTR_ERR(regmap); 217f83fca07SPeter Griffin 218f83fca07SPeter Griffin dwc3_data->dev = dev; 219f83fca07SPeter Griffin dwc3_data->regmap = regmap; 220f83fca07SPeter Griffin 221f83fca07SPeter Griffin res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "syscfg-reg"); 222f83fca07SPeter Griffin if (!res) { 223f83fca07SPeter Griffin ret = -ENXIO; 224f83fca07SPeter Griffin goto undo_platform_dev_alloc; 225f83fca07SPeter Griffin } 226f83fca07SPeter Griffin 227f83fca07SPeter Griffin dwc3_data->syscfg_reg_off = res->start; 228f83fca07SPeter Griffin 22904fb365cSFelipe Balbi dev_vdbg(&pdev->dev, "glue-logic addr 0x%pK, syscfg-reg offset 0x%x\n", 230f83fca07SPeter Griffin dwc3_data->glue_base, dwc3_data->syscfg_reg_off); 231f83fca07SPeter Griffin 2325baaf3b9SLee Jones dwc3_data->rstc_pwrdn = 2335baaf3b9SLee Jones devm_reset_control_get_exclusive(dev, "powerdown"); 234f83fca07SPeter Griffin if (IS_ERR(dwc3_data->rstc_pwrdn)) { 235f83fca07SPeter Griffin dev_err(&pdev->dev, "could not get power controller\n"); 236f83fca07SPeter Griffin ret = PTR_ERR(dwc3_data->rstc_pwrdn); 237f83fca07SPeter Griffin goto undo_platform_dev_alloc; 238f83fca07SPeter Griffin } 239f83fca07SPeter Griffin 240f83fca07SPeter Griffin /* Manage PowerDown */ 241f83fca07SPeter Griffin reset_control_deassert(dwc3_data->rstc_pwrdn); 242f83fca07SPeter Griffin 243002f17bcSLee Jones dwc3_data->rstc_rst = 244002f17bcSLee Jones devm_reset_control_get_shared(dev, "softreset"); 245f83fca07SPeter Griffin if (IS_ERR(dwc3_data->rstc_rst)) { 246f83fca07SPeter Griffin dev_err(&pdev->dev, "could not get reset controller\n"); 2476cd6159dSJulia Lawall ret = PTR_ERR(dwc3_data->rstc_rst); 248f83fca07SPeter Griffin goto undo_powerdown; 249f83fca07SPeter Griffin } 250f83fca07SPeter Griffin 251f83fca07SPeter Griffin /* Manage SoftReset */ 252f83fca07SPeter Griffin reset_control_deassert(dwc3_data->rstc_rst); 253f83fca07SPeter Griffin 254f83fca07SPeter Griffin child = of_get_child_by_name(node, "dwc3"); 255f83fca07SPeter Griffin if (!child) { 256f83fca07SPeter Griffin dev_err(&pdev->dev, "failed to find dwc3 core node\n"); 257f83fca07SPeter Griffin ret = -ENODEV; 258e36721b9SNishka Dasgupta goto err_node_put; 259f83fca07SPeter Griffin } 260f83fca07SPeter Griffin 261f83fca07SPeter Griffin /* Allocate and initialize the core */ 262f83fca07SPeter Griffin ret = of_platform_populate(node, NULL, NULL, dev); 263f83fca07SPeter Griffin if (ret) { 264f83fca07SPeter Griffin dev_err(dev, "failed to add dwc3 core\n"); 265e36721b9SNishka Dasgupta goto err_node_put; 266f83fca07SPeter Griffin } 267f83fca07SPeter Griffin 26866647273SHeikki Krogerus child_pdev = of_find_device_by_node(child); 26966647273SHeikki Krogerus if (!child_pdev) { 27066647273SHeikki Krogerus dev_err(dev, "failed to find dwc3 core device\n"); 27166647273SHeikki Krogerus ret = -ENODEV; 272e36721b9SNishka Dasgupta goto err_node_put; 27366647273SHeikki Krogerus } 27466647273SHeikki Krogerus 27506e7114fSHeikki Krogerus dwc3_data->dr_mode = usb_get_dr_mode(&child_pdev->dev); 276e36721b9SNishka Dasgupta of_node_put(child); 27783c4a4eeSRob Herring platform_device_put(child_pdev); 27866647273SHeikki Krogerus 279f83fca07SPeter Griffin /* 280f83fca07SPeter Griffin * Configure the USB port as device or host according to the static 281f83fca07SPeter Griffin * configuration passed from DT. 282f83fca07SPeter Griffin * DRD is the only mode currently supported so this will be enhanced 283f83fca07SPeter Griffin * as soon as OTG is available. 284f83fca07SPeter Griffin */ 285f83fca07SPeter Griffin ret = st_dwc3_drd_init(dwc3_data); 286f83fca07SPeter Griffin if (ret) { 287f83fca07SPeter Griffin dev_err(dev, "drd initialisation failed\n"); 288f83fca07SPeter Griffin goto undo_softreset; 289f83fca07SPeter Griffin } 290f83fca07SPeter Griffin 291f83fca07SPeter Griffin /* ST glue logic init */ 292f83fca07SPeter Griffin st_dwc3_init(dwc3_data); 293f83fca07SPeter Griffin 294f83fca07SPeter Griffin platform_set_drvdata(pdev, dwc3_data); 295f83fca07SPeter Griffin return 0; 296f83fca07SPeter Griffin 297e36721b9SNishka Dasgupta err_node_put: 298e36721b9SNishka Dasgupta of_node_put(child); 299f83fca07SPeter Griffin undo_softreset: 300f83fca07SPeter Griffin reset_control_assert(dwc3_data->rstc_rst); 301f83fca07SPeter Griffin undo_powerdown: 302f83fca07SPeter Griffin reset_control_assert(dwc3_data->rstc_pwrdn); 303f83fca07SPeter Griffin undo_platform_dev_alloc: 304f83fca07SPeter Griffin platform_device_put(pdev); 305f83fca07SPeter Griffin return ret; 306f83fca07SPeter Griffin } 307f83fca07SPeter Griffin 308f83fca07SPeter Griffin static int st_dwc3_remove(struct platform_device *pdev) 309f83fca07SPeter Griffin { 310f83fca07SPeter Griffin struct st_dwc3 *dwc3_data = platform_get_drvdata(pdev); 311f83fca07SPeter Griffin 312f83fca07SPeter Griffin of_platform_depopulate(&pdev->dev); 313f83fca07SPeter Griffin 314f83fca07SPeter Griffin reset_control_assert(dwc3_data->rstc_pwrdn); 315f83fca07SPeter Griffin reset_control_assert(dwc3_data->rstc_rst); 316f83fca07SPeter Griffin 317f83fca07SPeter Griffin return 0; 318f83fca07SPeter Griffin } 319f83fca07SPeter Griffin 320f83fca07SPeter Griffin #ifdef CONFIG_PM_SLEEP 321f83fca07SPeter Griffin static int st_dwc3_suspend(struct device *dev) 322f83fca07SPeter Griffin { 323f83fca07SPeter Griffin struct st_dwc3 *dwc3_data = dev_get_drvdata(dev); 324f83fca07SPeter Griffin 325f83fca07SPeter Griffin reset_control_assert(dwc3_data->rstc_pwrdn); 326f83fca07SPeter Griffin reset_control_assert(dwc3_data->rstc_rst); 327f83fca07SPeter Griffin 328f83fca07SPeter Griffin pinctrl_pm_select_sleep_state(dev); 329f83fca07SPeter Griffin 330f83fca07SPeter Griffin return 0; 331f83fca07SPeter Griffin } 332f83fca07SPeter Griffin 333f83fca07SPeter Griffin static int st_dwc3_resume(struct device *dev) 334f83fca07SPeter Griffin { 335f83fca07SPeter Griffin struct st_dwc3 *dwc3_data = dev_get_drvdata(dev); 336f83fca07SPeter Griffin int ret; 337f83fca07SPeter Griffin 338f83fca07SPeter Griffin pinctrl_pm_select_default_state(dev); 339f83fca07SPeter Griffin 340f83fca07SPeter Griffin reset_control_deassert(dwc3_data->rstc_pwrdn); 341f83fca07SPeter Griffin reset_control_deassert(dwc3_data->rstc_rst); 342f83fca07SPeter Griffin 343f83fca07SPeter Griffin ret = st_dwc3_drd_init(dwc3_data); 344f83fca07SPeter Griffin if (ret) { 345f83fca07SPeter Griffin dev_err(dev, "drd initialisation failed\n"); 346f83fca07SPeter Griffin return ret; 347f83fca07SPeter Griffin } 348f83fca07SPeter Griffin 349f83fca07SPeter Griffin /* ST glue logic init */ 350f83fca07SPeter Griffin st_dwc3_init(dwc3_data); 351f83fca07SPeter Griffin 352f83fca07SPeter Griffin return 0; 353f83fca07SPeter Griffin } 354f83fca07SPeter Griffin #endif /* CONFIG_PM_SLEEP */ 355f83fca07SPeter Griffin 356f83fca07SPeter Griffin static SIMPLE_DEV_PM_OPS(st_dwc3_dev_pm_ops, st_dwc3_suspend, st_dwc3_resume); 357f83fca07SPeter Griffin 358f83fca07SPeter Griffin static const struct of_device_id st_dwc3_match[] = { 359f83fca07SPeter Griffin { .compatible = "st,stih407-dwc3" }, 360f83fca07SPeter Griffin { /* sentinel */ }, 361f83fca07SPeter Griffin }; 362f83fca07SPeter Griffin 363f83fca07SPeter Griffin MODULE_DEVICE_TABLE(of, st_dwc3_match); 364f83fca07SPeter Griffin 365f83fca07SPeter Griffin static struct platform_driver st_dwc3_driver = { 366f83fca07SPeter Griffin .probe = st_dwc3_probe, 367f83fca07SPeter Griffin .remove = st_dwc3_remove, 368f83fca07SPeter Griffin .driver = { 369f83fca07SPeter Griffin .name = "usb-st-dwc3", 370f83fca07SPeter Griffin .of_match_table = st_dwc3_match, 371f83fca07SPeter Griffin .pm = &st_dwc3_dev_pm_ops, 372f83fca07SPeter Griffin }, 373f83fca07SPeter Griffin }; 374f83fca07SPeter Griffin 375f83fca07SPeter Griffin module_platform_driver(st_dwc3_driver); 376f83fca07SPeter Griffin 377f83fca07SPeter Griffin MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>"); 378f83fca07SPeter Griffin MODULE_DESCRIPTION("DesignWare USB3 STi Glue Layer"); 379f83fca07SPeter Griffin MODULE_LICENSE("GPL v2"); 380