1 // SPDX-License-Identifier: GPL-2.0 2 /** 3 * dwc3-pci.c - PCI Specific glue layer 4 * 5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com 6 * 7 * Authors: Felipe Balbi <balbi@ti.com>, 8 * Sebastian Andrzej Siewior <bigeasy@linutronix.de> 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/slab.h> 14 #include <linux/pci.h> 15 #include <linux/workqueue.h> 16 #include <linux/pm_runtime.h> 17 #include <linux/platform_device.h> 18 #include <linux/gpio/consumer.h> 19 #include <linux/gpio/machine.h> 20 #include <linux/acpi.h> 21 #include <linux/delay.h> 22 23 #define PCI_DEVICE_ID_INTEL_BYT 0x0f37 24 #define PCI_DEVICE_ID_INTEL_MRFLD 0x119e 25 #define PCI_DEVICE_ID_INTEL_BSW 0x22b7 26 #define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30 27 #define PCI_DEVICE_ID_INTEL_SPTH 0xa130 28 #define PCI_DEVICE_ID_INTEL_BXT 0x0aaa 29 #define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa 30 #define PCI_DEVICE_ID_INTEL_APL 0x5aaa 31 #define PCI_DEVICE_ID_INTEL_KBP 0xa2b0 32 #define PCI_DEVICE_ID_INTEL_GLK 0x31aa 33 #define PCI_DEVICE_ID_INTEL_CNPLP 0x9dee 34 #define PCI_DEVICE_ID_INTEL_CNPH 0xa36e 35 #define PCI_DEVICE_ID_INTEL_ICLLP 0x34ee 36 37 #define PCI_INTEL_BXT_DSM_GUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511" 38 #define PCI_INTEL_BXT_FUNC_PMU_PWR 4 39 #define PCI_INTEL_BXT_STATE_D0 0 40 #define PCI_INTEL_BXT_STATE_D3 3 41 42 #define GP_RWBAR 1 43 #define GP_RWREG1 0xa0 44 #define GP_RWREG1_ULPI_REFCLK_DISABLE (1 << 17) 45 46 /** 47 * struct dwc3_pci - Driver private structure 48 * @dwc3: child dwc3 platform_device 49 * @pci: our link to PCI bus 50 * @guid: _DSM GUID 51 * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM 52 * @wakeup_work: work for asynchronous resume 53 */ 54 struct dwc3_pci { 55 struct platform_device *dwc3; 56 struct pci_dev *pci; 57 58 guid_t guid; 59 60 unsigned int has_dsm_for_pm:1; 61 struct work_struct wakeup_work; 62 }; 63 64 static const struct acpi_gpio_params reset_gpios = { 0, 0, false }; 65 static const struct acpi_gpio_params cs_gpios = { 1, 0, false }; 66 67 static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = { 68 { "reset-gpios", &reset_gpios, 1 }, 69 { "cs-gpios", &cs_gpios, 1 }, 70 { }, 71 }; 72 73 static struct gpiod_lookup_table platform_bytcr_gpios = { 74 .dev_id = "0000:00:16.0", 75 .table = { 76 GPIO_LOOKUP("INT33FC:00", 54, "reset", GPIO_ACTIVE_HIGH), 77 GPIO_LOOKUP("INT33FC:02", 14, "cs", GPIO_ACTIVE_HIGH), 78 {} 79 }, 80 }; 81 82 static int dwc3_byt_enable_ulpi_refclock(struct pci_dev *pci) 83 { 84 void __iomem *reg; 85 u32 value; 86 87 reg = pcim_iomap(pci, GP_RWBAR, 0); 88 if (IS_ERR(reg)) 89 return PTR_ERR(reg); 90 91 value = readl(reg + GP_RWREG1); 92 if (!(value & GP_RWREG1_ULPI_REFCLK_DISABLE)) 93 goto unmap; /* ULPI refclk already enabled */ 94 95 value &= ~GP_RWREG1_ULPI_REFCLK_DISABLE; 96 writel(value, reg + GP_RWREG1); 97 /* This comes from the Intel Android x86 tree w/o any explanation */ 98 msleep(100); 99 unmap: 100 pcim_iounmap(pci, reg); 101 return 0; 102 } 103 104 static const struct property_entry dwc3_pci_intel_properties[] = { 105 PROPERTY_ENTRY_STRING("dr_mode", "peripheral"), 106 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"), 107 {} 108 }; 109 110 static const struct property_entry dwc3_pci_mrfld_properties[] = { 111 PROPERTY_ENTRY_STRING("dr_mode", "otg"), 112 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"), 113 {} 114 }; 115 116 static const struct property_entry dwc3_pci_amd_properties[] = { 117 PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"), 118 PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf), 119 PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"), 120 PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"), 121 PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"), 122 PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"), 123 PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"), 124 PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"), 125 PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"), 126 PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"), 127 PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1), 128 /* FIXME these quirks should be removed when AMD NL tapes out */ 129 PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"), 130 PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"), 131 PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"), 132 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"), 133 {} 134 }; 135 136 static int dwc3_pci_quirks(struct dwc3_pci *dwc) 137 { 138 struct pci_dev *pdev = dwc->pci; 139 140 if (pdev->vendor == PCI_VENDOR_ID_INTEL) { 141 if (pdev->device == PCI_DEVICE_ID_INTEL_BXT || 142 pdev->device == PCI_DEVICE_ID_INTEL_BXT_M) { 143 guid_parse(PCI_INTEL_BXT_DSM_GUID, &dwc->guid); 144 dwc->has_dsm_for_pm = true; 145 } 146 147 if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) { 148 struct gpio_desc *gpio; 149 int ret; 150 151 /* On BYT the FW does not always enable the refclock */ 152 ret = dwc3_byt_enable_ulpi_refclock(pdev); 153 if (ret) 154 return ret; 155 156 ret = devm_acpi_dev_add_driver_gpios(&pdev->dev, 157 acpi_dwc3_byt_gpios); 158 if (ret) 159 dev_dbg(&pdev->dev, "failed to add mapping table\n"); 160 161 /* 162 * A lot of BYT devices lack ACPI resource entries for 163 * the GPIOs, add a fallback mapping to the reference 164 * design GPIOs which all boards seem to use. 165 */ 166 gpiod_add_lookup_table(&platform_bytcr_gpios); 167 168 /* 169 * These GPIOs will turn on the USB2 PHY. Note that we have to 170 * put the gpio descriptors again here because the phy driver 171 * might want to grab them, too. 172 */ 173 gpio = devm_gpiod_get_optional(&pdev->dev, "cs", 174 GPIOD_OUT_LOW); 175 if (IS_ERR(gpio)) 176 return PTR_ERR(gpio); 177 178 gpiod_set_value_cansleep(gpio, 1); 179 180 gpio = devm_gpiod_get_optional(&pdev->dev, "reset", 181 GPIOD_OUT_LOW); 182 if (IS_ERR(gpio)) 183 return PTR_ERR(gpio); 184 185 if (gpio) { 186 gpiod_set_value_cansleep(gpio, 1); 187 usleep_range(10000, 11000); 188 } 189 } 190 } 191 192 return 0; 193 } 194 195 #ifdef CONFIG_PM 196 static void dwc3_pci_resume_work(struct work_struct *work) 197 { 198 struct dwc3_pci *dwc = container_of(work, struct dwc3_pci, wakeup_work); 199 struct platform_device *dwc3 = dwc->dwc3; 200 int ret; 201 202 ret = pm_runtime_get_sync(&dwc3->dev); 203 if (ret) 204 return; 205 206 pm_runtime_mark_last_busy(&dwc3->dev); 207 pm_runtime_put_sync_autosuspend(&dwc3->dev); 208 } 209 #endif 210 211 static int dwc3_pci_probe(struct pci_dev *pci, const struct pci_device_id *id) 212 { 213 struct property_entry *p = (struct property_entry *)id->driver_data; 214 struct dwc3_pci *dwc; 215 struct resource res[2]; 216 int ret; 217 struct device *dev = &pci->dev; 218 219 ret = pcim_enable_device(pci); 220 if (ret) { 221 dev_err(dev, "failed to enable pci device\n"); 222 return -ENODEV; 223 } 224 225 pci_set_master(pci); 226 227 dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL); 228 if (!dwc) 229 return -ENOMEM; 230 231 dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO); 232 if (!dwc->dwc3) 233 return -ENOMEM; 234 235 memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res)); 236 237 res[0].start = pci_resource_start(pci, 0); 238 res[0].end = pci_resource_end(pci, 0); 239 res[0].name = "dwc_usb3"; 240 res[0].flags = IORESOURCE_MEM; 241 242 res[1].start = pci->irq; 243 res[1].name = "dwc_usb3"; 244 res[1].flags = IORESOURCE_IRQ; 245 246 ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res)); 247 if (ret) { 248 dev_err(dev, "couldn't add resources to dwc3 device\n"); 249 goto err; 250 } 251 252 dwc->pci = pci; 253 dwc->dwc3->dev.parent = dev; 254 ACPI_COMPANION_SET(&dwc->dwc3->dev, ACPI_COMPANION(dev)); 255 256 ret = platform_device_add_properties(dwc->dwc3, p); 257 if (ret < 0) 258 return ret; 259 260 ret = dwc3_pci_quirks(dwc); 261 if (ret) 262 goto err; 263 264 ret = platform_device_add(dwc->dwc3); 265 if (ret) { 266 dev_err(dev, "failed to register dwc3 device\n"); 267 goto err; 268 } 269 270 device_init_wakeup(dev, true); 271 pci_set_drvdata(pci, dwc); 272 pm_runtime_put(dev); 273 #ifdef CONFIG_PM 274 INIT_WORK(&dwc->wakeup_work, dwc3_pci_resume_work); 275 #endif 276 277 return 0; 278 err: 279 platform_device_put(dwc->dwc3); 280 return ret; 281 } 282 283 static void dwc3_pci_remove(struct pci_dev *pci) 284 { 285 struct dwc3_pci *dwc = pci_get_drvdata(pci); 286 287 gpiod_remove_lookup_table(&platform_bytcr_gpios); 288 #ifdef CONFIG_PM 289 cancel_work_sync(&dwc->wakeup_work); 290 #endif 291 device_init_wakeup(&pci->dev, false); 292 pm_runtime_get(&pci->dev); 293 platform_device_unregister(dwc->dwc3); 294 } 295 296 static const struct pci_device_id dwc3_pci_id_table[] = { 297 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BSW), 298 (kernel_ulong_t) &dwc3_pci_intel_properties }, 299 300 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BYT), 301 (kernel_ulong_t) &dwc3_pci_intel_properties, }, 302 303 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MRFLD), 304 (kernel_ulong_t) &dwc3_pci_mrfld_properties, }, 305 306 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SPTLP), 307 (kernel_ulong_t) &dwc3_pci_intel_properties, }, 308 309 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SPTH), 310 (kernel_ulong_t) &dwc3_pci_intel_properties, }, 311 312 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BXT), 313 (kernel_ulong_t) &dwc3_pci_intel_properties, }, 314 315 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BXT_M), 316 (kernel_ulong_t) &dwc3_pci_intel_properties, }, 317 318 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_APL), 319 (kernel_ulong_t) &dwc3_pci_intel_properties, }, 320 321 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_KBP), 322 (kernel_ulong_t) &dwc3_pci_intel_properties, }, 323 324 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_GLK), 325 (kernel_ulong_t) &dwc3_pci_intel_properties, }, 326 327 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CNPLP), 328 (kernel_ulong_t) &dwc3_pci_intel_properties, }, 329 330 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CNPH), 331 (kernel_ulong_t) &dwc3_pci_intel_properties, }, 332 333 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICLLP), 334 (kernel_ulong_t) &dwc3_pci_intel_properties, }, 335 336 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_NL_USB), 337 (kernel_ulong_t) &dwc3_pci_amd_properties, }, 338 { } /* Terminating Entry */ 339 }; 340 MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table); 341 342 #if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP) 343 static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param) 344 { 345 union acpi_object *obj; 346 union acpi_object tmp; 347 union acpi_object argv4 = ACPI_INIT_DSM_ARGV4(1, &tmp); 348 349 if (!dwc->has_dsm_for_pm) 350 return 0; 351 352 tmp.type = ACPI_TYPE_INTEGER; 353 tmp.integer.value = param; 354 355 obj = acpi_evaluate_dsm(ACPI_HANDLE(&dwc->pci->dev), &dwc->guid, 356 1, PCI_INTEL_BXT_FUNC_PMU_PWR, &argv4); 357 if (!obj) { 358 dev_err(&dwc->pci->dev, "failed to evaluate _DSM\n"); 359 return -EIO; 360 } 361 362 ACPI_FREE(obj); 363 364 return 0; 365 } 366 #endif /* CONFIG_PM || CONFIG_PM_SLEEP */ 367 368 #ifdef CONFIG_PM 369 static int dwc3_pci_runtime_suspend(struct device *dev) 370 { 371 struct dwc3_pci *dwc = dev_get_drvdata(dev); 372 373 if (device_can_wakeup(dev)) 374 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3); 375 376 return -EBUSY; 377 } 378 379 static int dwc3_pci_runtime_resume(struct device *dev) 380 { 381 struct dwc3_pci *dwc = dev_get_drvdata(dev); 382 int ret; 383 384 ret = dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0); 385 if (ret) 386 return ret; 387 388 queue_work(pm_wq, &dwc->wakeup_work); 389 390 return 0; 391 } 392 #endif /* CONFIG_PM */ 393 394 #ifdef CONFIG_PM_SLEEP 395 static int dwc3_pci_suspend(struct device *dev) 396 { 397 struct dwc3_pci *dwc = dev_get_drvdata(dev); 398 399 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3); 400 } 401 402 static int dwc3_pci_resume(struct device *dev) 403 { 404 struct dwc3_pci *dwc = dev_get_drvdata(dev); 405 406 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0); 407 } 408 #endif /* CONFIG_PM_SLEEP */ 409 410 static const struct dev_pm_ops dwc3_pci_dev_pm_ops = { 411 SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume) 412 SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume, 413 NULL) 414 }; 415 416 static struct pci_driver dwc3_pci_driver = { 417 .name = "dwc3-pci", 418 .id_table = dwc3_pci_id_table, 419 .probe = dwc3_pci_probe, 420 .remove = dwc3_pci_remove, 421 .driver = { 422 .pm = &dwc3_pci_dev_pm_ops, 423 } 424 }; 425 426 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); 427 MODULE_LICENSE("GPL v2"); 428 MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer"); 429 430 module_pci_driver(dwc3_pci_driver); 431