1 /** 2 * dwc3-pci.c - PCI Specific glue layer 3 * 4 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com 5 * 6 * Authors: Felipe Balbi <balbi@ti.com>, 7 * Sebastian Andrzej Siewior <bigeasy@linutronix.de> 8 * 9 * This program is free software: you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 of 11 * the License as published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 */ 18 19 #include <linux/kernel.h> 20 #include <linux/module.h> 21 #include <linux/slab.h> 22 #include <linux/pci.h> 23 #include <linux/pm_runtime.h> 24 #include <linux/platform_device.h> 25 #include <linux/gpio/consumer.h> 26 #include <linux/acpi.h> 27 #include <linux/delay.h> 28 29 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd 30 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI 0xabce 31 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31 0xabcf 32 #define PCI_DEVICE_ID_INTEL_BYT 0x0f37 33 #define PCI_DEVICE_ID_INTEL_MRFLD 0x119e 34 #define PCI_DEVICE_ID_INTEL_BSW 0x22b7 35 #define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30 36 #define PCI_DEVICE_ID_INTEL_SPTH 0xa130 37 #define PCI_DEVICE_ID_INTEL_BXT 0x0aaa 38 #define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa 39 #define PCI_DEVICE_ID_INTEL_APL 0x5aaa 40 #define PCI_DEVICE_ID_INTEL_KBP 0xa2b0 41 #define PCI_DEVICE_ID_INTEL_GLK 0x31aa 42 43 #define PCI_INTEL_BXT_DSM_UUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511" 44 #define PCI_INTEL_BXT_FUNC_PMU_PWR 4 45 #define PCI_INTEL_BXT_STATE_D0 0 46 #define PCI_INTEL_BXT_STATE_D3 3 47 48 /** 49 * struct dwc3_pci - Driver private structure 50 * @dwc3: child dwc3 platform_device 51 * @pci: our link to PCI bus 52 * @uuid: _DSM UUID 53 * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM 54 */ 55 struct dwc3_pci { 56 struct platform_device *dwc3; 57 struct pci_dev *pci; 58 59 u8 uuid[16]; 60 61 unsigned int has_dsm_for_pm:1; 62 }; 63 64 static const struct acpi_gpio_params reset_gpios = { 0, 0, false }; 65 static const struct acpi_gpio_params cs_gpios = { 1, 0, false }; 66 67 static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = { 68 { "reset-gpios", &reset_gpios, 1 }, 69 { "cs-gpios", &cs_gpios, 1 }, 70 { }, 71 }; 72 73 static int dwc3_pci_quirks(struct dwc3_pci *dwc) 74 { 75 struct platform_device *dwc3 = dwc->dwc3; 76 struct pci_dev *pdev = dwc->pci; 77 78 if (pdev->vendor == PCI_VENDOR_ID_AMD && 79 pdev->device == PCI_DEVICE_ID_AMD_NL_USB) { 80 struct property_entry properties[] = { 81 PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"), 82 PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf), 83 PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"), 84 PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"), 85 PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"), 86 PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"), 87 PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"), 88 PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"), 89 PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"), 90 PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"), 91 PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1), 92 /* 93 * FIXME these quirks should be removed when AMD NL 94 * tapes out 95 */ 96 PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"), 97 PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"), 98 PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"), 99 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"), 100 { }, 101 }; 102 103 return platform_device_add_properties(dwc3, properties); 104 } 105 106 if (pdev->vendor == PCI_VENDOR_ID_INTEL) { 107 int ret; 108 109 struct property_entry properties[] = { 110 PROPERTY_ENTRY_STRING("dr_mode", "peripheral"), 111 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"), 112 { } 113 }; 114 115 ret = platform_device_add_properties(dwc3, properties); 116 if (ret < 0) 117 return ret; 118 119 if (pdev->device == PCI_DEVICE_ID_INTEL_BXT || 120 pdev->device == PCI_DEVICE_ID_INTEL_BXT_M) { 121 acpi_str_to_uuid(PCI_INTEL_BXT_DSM_UUID, dwc->uuid); 122 dwc->has_dsm_for_pm = true; 123 } 124 125 if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) { 126 struct gpio_desc *gpio; 127 128 ret = devm_acpi_dev_add_driver_gpios(&pdev->dev, 129 acpi_dwc3_byt_gpios); 130 if (ret) 131 dev_dbg(&pdev->dev, "failed to add mapping table\n"); 132 133 /* 134 * These GPIOs will turn on the USB2 PHY. Note that we have to 135 * put the gpio descriptors again here because the phy driver 136 * might want to grab them, too. 137 */ 138 gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW); 139 if (IS_ERR(gpio)) 140 return PTR_ERR(gpio); 141 142 gpiod_set_value_cansleep(gpio, 1); 143 gpiod_put(gpio); 144 145 gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW); 146 if (IS_ERR(gpio)) 147 return PTR_ERR(gpio); 148 149 if (gpio) { 150 gpiod_set_value_cansleep(gpio, 1); 151 gpiod_put(gpio); 152 usleep_range(10000, 11000); 153 } 154 } 155 } 156 157 if (pdev->vendor == PCI_VENDOR_ID_SYNOPSYS && 158 (pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 || 159 pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI || 160 pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31)) { 161 struct property_entry properties[] = { 162 PROPERTY_ENTRY_BOOL("snps,usb3_lpm_capable"), 163 PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"), 164 PROPERTY_ENTRY_BOOL("snps,dis_enblslpm_quirk"), 165 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"), 166 { }, 167 }; 168 169 return platform_device_add_properties(dwc3, properties); 170 } 171 172 return 0; 173 } 174 175 static int dwc3_pci_probe(struct pci_dev *pci, 176 const struct pci_device_id *id) 177 { 178 struct dwc3_pci *dwc; 179 struct resource res[2]; 180 int ret; 181 struct device *dev = &pci->dev; 182 183 ret = pcim_enable_device(pci); 184 if (ret) { 185 dev_err(dev, "failed to enable pci device\n"); 186 return -ENODEV; 187 } 188 189 pci_set_master(pci); 190 191 dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL); 192 if (!dwc) 193 return -ENOMEM; 194 195 dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO); 196 if (!dwc->dwc3) 197 return -ENOMEM; 198 199 memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res)); 200 201 res[0].start = pci_resource_start(pci, 0); 202 res[0].end = pci_resource_end(pci, 0); 203 res[0].name = "dwc_usb3"; 204 res[0].flags = IORESOURCE_MEM; 205 206 res[1].start = pci->irq; 207 res[1].name = "dwc_usb3"; 208 res[1].flags = IORESOURCE_IRQ; 209 210 ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res)); 211 if (ret) { 212 dev_err(dev, "couldn't add resources to dwc3 device\n"); 213 return ret; 214 } 215 216 dwc->pci = pci; 217 dwc->dwc3->dev.parent = dev; 218 ACPI_COMPANION_SET(&dwc->dwc3->dev, ACPI_COMPANION(dev)); 219 220 ret = dwc3_pci_quirks(dwc); 221 if (ret) 222 goto err; 223 224 ret = platform_device_add(dwc->dwc3); 225 if (ret) { 226 dev_err(dev, "failed to register dwc3 device\n"); 227 goto err; 228 } 229 230 device_init_wakeup(dev, true); 231 device_set_run_wake(dev, true); 232 pci_set_drvdata(pci, dwc); 233 pm_runtime_put(dev); 234 235 return 0; 236 err: 237 platform_device_put(dwc->dwc3); 238 return ret; 239 } 240 241 static void dwc3_pci_remove(struct pci_dev *pci) 242 { 243 struct dwc3_pci *dwc = pci_get_drvdata(pci); 244 245 device_init_wakeup(&pci->dev, false); 246 pm_runtime_get(&pci->dev); 247 platform_device_unregister(dwc->dwc3); 248 } 249 250 static const struct pci_device_id dwc3_pci_id_table[] = { 251 { 252 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, 253 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3), 254 }, 255 { 256 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, 257 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI), 258 }, 259 { 260 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, 261 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31), 262 }, 263 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BSW), }, 264 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), }, 265 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), }, 266 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), }, 267 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), }, 268 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT), }, 269 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT_M), }, 270 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL), }, 271 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBP), }, 272 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GLK), }, 273 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), }, 274 { } /* Terminating Entry */ 275 }; 276 MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table); 277 278 #if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP) 279 static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param) 280 { 281 union acpi_object *obj; 282 union acpi_object tmp; 283 union acpi_object argv4 = ACPI_INIT_DSM_ARGV4(1, &tmp); 284 285 if (!dwc->has_dsm_for_pm) 286 return 0; 287 288 tmp.type = ACPI_TYPE_INTEGER; 289 tmp.integer.value = param; 290 291 obj = acpi_evaluate_dsm(ACPI_HANDLE(&dwc->pci->dev), dwc->uuid, 292 1, PCI_INTEL_BXT_FUNC_PMU_PWR, &argv4); 293 if (!obj) { 294 dev_err(&dwc->pci->dev, "failed to evaluate _DSM\n"); 295 return -EIO; 296 } 297 298 ACPI_FREE(obj); 299 300 return 0; 301 } 302 #endif /* CONFIG_PM || CONFIG_PM_SLEEP */ 303 304 #ifdef CONFIG_PM 305 static int dwc3_pci_runtime_suspend(struct device *dev) 306 { 307 struct dwc3_pci *dwc = dev_get_drvdata(dev); 308 309 if (device_run_wake(dev)) 310 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3); 311 312 return -EBUSY; 313 } 314 315 static int dwc3_pci_runtime_resume(struct device *dev) 316 { 317 struct dwc3_pci *dwc = dev_get_drvdata(dev); 318 struct platform_device *dwc3 = dwc->dwc3; 319 int ret; 320 321 ret = dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0); 322 if (ret) 323 return ret; 324 325 return pm_runtime_get(&dwc3->dev); 326 } 327 #endif /* CONFIG_PM */ 328 329 #ifdef CONFIG_PM_SLEEP 330 static int dwc3_pci_suspend(struct device *dev) 331 { 332 struct dwc3_pci *dwc = dev_get_drvdata(dev); 333 334 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3); 335 } 336 337 static int dwc3_pci_resume(struct device *dev) 338 { 339 struct dwc3_pci *dwc = dev_get_drvdata(dev); 340 341 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0); 342 } 343 #endif /* CONFIG_PM_SLEEP */ 344 345 static struct dev_pm_ops dwc3_pci_dev_pm_ops = { 346 SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume) 347 SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume, 348 NULL) 349 }; 350 351 static struct pci_driver dwc3_pci_driver = { 352 .name = "dwc3-pci", 353 .id_table = dwc3_pci_id_table, 354 .probe = dwc3_pci_probe, 355 .remove = dwc3_pci_remove, 356 .driver = { 357 .pm = &dwc3_pci_dev_pm_ops, 358 } 359 }; 360 361 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); 362 MODULE_LICENSE("GPL v2"); 363 MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer"); 364 365 module_pci_driver(dwc3_pci_driver); 366