1 /** 2 * dwc3-pci.c - PCI Specific glue layer 3 * 4 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com 5 * 6 * Authors: Felipe Balbi <balbi@ti.com>, 7 * Sebastian Andrzej Siewior <bigeasy@linutronix.de> 8 * 9 * This program is free software: you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 of 11 * the License as published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 */ 18 19 #include <linux/kernel.h> 20 #include <linux/module.h> 21 #include <linux/slab.h> 22 #include <linux/pci.h> 23 #include <linux/pm_runtime.h> 24 #include <linux/platform_device.h> 25 #include <linux/gpio/consumer.h> 26 #include <linux/acpi.h> 27 #include <linux/delay.h> 28 29 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd 30 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI 0xabce 31 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31 0xabcf 32 #define PCI_DEVICE_ID_INTEL_BYT 0x0f37 33 #define PCI_DEVICE_ID_INTEL_MRFLD 0x119e 34 #define PCI_DEVICE_ID_INTEL_BSW 0x22b7 35 #define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30 36 #define PCI_DEVICE_ID_INTEL_SPTH 0xa130 37 #define PCI_DEVICE_ID_INTEL_BXT 0x0aaa 38 #define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa 39 #define PCI_DEVICE_ID_INTEL_APL 0x5aaa 40 #define PCI_DEVICE_ID_INTEL_KBP 0xa2b0 41 #define PCI_DEVICE_ID_INTEL_GLK 0x31aa 42 #define PCI_DEVICE_ID_INTEL_CNPLP 0x9dee 43 #define PCI_DEVICE_ID_INTEL_CNPH 0xa36e 44 45 #define PCI_INTEL_BXT_DSM_UUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511" 46 #define PCI_INTEL_BXT_FUNC_PMU_PWR 4 47 #define PCI_INTEL_BXT_STATE_D0 0 48 #define PCI_INTEL_BXT_STATE_D3 3 49 50 /** 51 * struct dwc3_pci - Driver private structure 52 * @dwc3: child dwc3 platform_device 53 * @pci: our link to PCI bus 54 * @uuid: _DSM UUID 55 * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM 56 */ 57 struct dwc3_pci { 58 struct platform_device *dwc3; 59 struct pci_dev *pci; 60 61 u8 uuid[16]; 62 63 unsigned int has_dsm_for_pm:1; 64 }; 65 66 static const struct acpi_gpio_params reset_gpios = { 0, 0, false }; 67 static const struct acpi_gpio_params cs_gpios = { 1, 0, false }; 68 69 static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = { 70 { "reset-gpios", &reset_gpios, 1 }, 71 { "cs-gpios", &cs_gpios, 1 }, 72 { }, 73 }; 74 75 static int dwc3_pci_quirks(struct dwc3_pci *dwc) 76 { 77 struct platform_device *dwc3 = dwc->dwc3; 78 struct pci_dev *pdev = dwc->pci; 79 80 if (pdev->vendor == PCI_VENDOR_ID_AMD && 81 pdev->device == PCI_DEVICE_ID_AMD_NL_USB) { 82 struct property_entry properties[] = { 83 PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"), 84 PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf), 85 PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"), 86 PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"), 87 PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"), 88 PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"), 89 PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"), 90 PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"), 91 PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"), 92 PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"), 93 PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1), 94 /* 95 * FIXME these quirks should be removed when AMD NL 96 * tapes out 97 */ 98 PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"), 99 PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"), 100 PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"), 101 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"), 102 { }, 103 }; 104 105 return platform_device_add_properties(dwc3, properties); 106 } 107 108 if (pdev->vendor == PCI_VENDOR_ID_INTEL) { 109 int ret; 110 111 struct property_entry properties[] = { 112 PROPERTY_ENTRY_STRING("dr_mode", "peripheral"), 113 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"), 114 { } 115 }; 116 117 ret = platform_device_add_properties(dwc3, properties); 118 if (ret < 0) 119 return ret; 120 121 if (pdev->device == PCI_DEVICE_ID_INTEL_BXT || 122 pdev->device == PCI_DEVICE_ID_INTEL_BXT_M) { 123 acpi_str_to_uuid(PCI_INTEL_BXT_DSM_UUID, dwc->uuid); 124 dwc->has_dsm_for_pm = true; 125 } 126 127 if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) { 128 struct gpio_desc *gpio; 129 130 ret = devm_acpi_dev_add_driver_gpios(&pdev->dev, 131 acpi_dwc3_byt_gpios); 132 if (ret) 133 dev_dbg(&pdev->dev, "failed to add mapping table\n"); 134 135 /* 136 * These GPIOs will turn on the USB2 PHY. Note that we have to 137 * put the gpio descriptors again here because the phy driver 138 * might want to grab them, too. 139 */ 140 gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW); 141 if (IS_ERR(gpio)) 142 return PTR_ERR(gpio); 143 144 gpiod_set_value_cansleep(gpio, 1); 145 gpiod_put(gpio); 146 147 gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW); 148 if (IS_ERR(gpio)) 149 return PTR_ERR(gpio); 150 151 if (gpio) { 152 gpiod_set_value_cansleep(gpio, 1); 153 gpiod_put(gpio); 154 usleep_range(10000, 11000); 155 } 156 } 157 } 158 159 if (pdev->vendor == PCI_VENDOR_ID_SYNOPSYS && 160 (pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 || 161 pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI || 162 pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31)) { 163 struct property_entry properties[] = { 164 PROPERTY_ENTRY_BOOL("snps,usb3_lpm_capable"), 165 PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"), 166 PROPERTY_ENTRY_BOOL("snps,dis_enblslpm_quirk"), 167 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"), 168 { }, 169 }; 170 171 return platform_device_add_properties(dwc3, properties); 172 } 173 174 return 0; 175 } 176 177 static int dwc3_pci_probe(struct pci_dev *pci, 178 const struct pci_device_id *id) 179 { 180 struct dwc3_pci *dwc; 181 struct resource res[2]; 182 int ret; 183 struct device *dev = &pci->dev; 184 185 ret = pcim_enable_device(pci); 186 if (ret) { 187 dev_err(dev, "failed to enable pci device\n"); 188 return -ENODEV; 189 } 190 191 pci_set_master(pci); 192 193 dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL); 194 if (!dwc) 195 return -ENOMEM; 196 197 dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO); 198 if (!dwc->dwc3) 199 return -ENOMEM; 200 201 memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res)); 202 203 res[0].start = pci_resource_start(pci, 0); 204 res[0].end = pci_resource_end(pci, 0); 205 res[0].name = "dwc_usb3"; 206 res[0].flags = IORESOURCE_MEM; 207 208 res[1].start = pci->irq; 209 res[1].name = "dwc_usb3"; 210 res[1].flags = IORESOURCE_IRQ; 211 212 ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res)); 213 if (ret) { 214 dev_err(dev, "couldn't add resources to dwc3 device\n"); 215 return ret; 216 } 217 218 dwc->pci = pci; 219 dwc->dwc3->dev.parent = dev; 220 ACPI_COMPANION_SET(&dwc->dwc3->dev, ACPI_COMPANION(dev)); 221 222 ret = dwc3_pci_quirks(dwc); 223 if (ret) 224 goto err; 225 226 ret = platform_device_add(dwc->dwc3); 227 if (ret) { 228 dev_err(dev, "failed to register dwc3 device\n"); 229 goto err; 230 } 231 232 device_init_wakeup(dev, true); 233 device_set_run_wake(dev, true); 234 pci_set_drvdata(pci, dwc); 235 pm_runtime_put(dev); 236 237 return 0; 238 err: 239 platform_device_put(dwc->dwc3); 240 return ret; 241 } 242 243 static void dwc3_pci_remove(struct pci_dev *pci) 244 { 245 struct dwc3_pci *dwc = pci_get_drvdata(pci); 246 247 device_init_wakeup(&pci->dev, false); 248 pm_runtime_get(&pci->dev); 249 platform_device_unregister(dwc->dwc3); 250 } 251 252 static const struct pci_device_id dwc3_pci_id_table[] = { 253 { 254 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, 255 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3), 256 }, 257 { 258 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, 259 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI), 260 }, 261 { 262 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, 263 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31), 264 }, 265 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BSW), }, 266 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), }, 267 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), }, 268 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), }, 269 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), }, 270 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT), }, 271 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT_M), }, 272 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL), }, 273 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBP), }, 274 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GLK), }, 275 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CNPLP), }, 276 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CNPH), }, 277 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), }, 278 { } /* Terminating Entry */ 279 }; 280 MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table); 281 282 #if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP) 283 static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param) 284 { 285 union acpi_object *obj; 286 union acpi_object tmp; 287 union acpi_object argv4 = ACPI_INIT_DSM_ARGV4(1, &tmp); 288 289 if (!dwc->has_dsm_for_pm) 290 return 0; 291 292 tmp.type = ACPI_TYPE_INTEGER; 293 tmp.integer.value = param; 294 295 obj = acpi_evaluate_dsm(ACPI_HANDLE(&dwc->pci->dev), dwc->uuid, 296 1, PCI_INTEL_BXT_FUNC_PMU_PWR, &argv4); 297 if (!obj) { 298 dev_err(&dwc->pci->dev, "failed to evaluate _DSM\n"); 299 return -EIO; 300 } 301 302 ACPI_FREE(obj); 303 304 return 0; 305 } 306 #endif /* CONFIG_PM || CONFIG_PM_SLEEP */ 307 308 #ifdef CONFIG_PM 309 static int dwc3_pci_runtime_suspend(struct device *dev) 310 { 311 struct dwc3_pci *dwc = dev_get_drvdata(dev); 312 313 if (device_run_wake(dev)) 314 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3); 315 316 return -EBUSY; 317 } 318 319 static int dwc3_pci_runtime_resume(struct device *dev) 320 { 321 struct dwc3_pci *dwc = dev_get_drvdata(dev); 322 struct platform_device *dwc3 = dwc->dwc3; 323 int ret; 324 325 ret = dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0); 326 if (ret) 327 return ret; 328 329 return pm_runtime_get(&dwc3->dev); 330 } 331 #endif /* CONFIG_PM */ 332 333 #ifdef CONFIG_PM_SLEEP 334 static int dwc3_pci_suspend(struct device *dev) 335 { 336 struct dwc3_pci *dwc = dev_get_drvdata(dev); 337 338 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3); 339 } 340 341 static int dwc3_pci_resume(struct device *dev) 342 { 343 struct dwc3_pci *dwc = dev_get_drvdata(dev); 344 345 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0); 346 } 347 #endif /* CONFIG_PM_SLEEP */ 348 349 static struct dev_pm_ops dwc3_pci_dev_pm_ops = { 350 SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume) 351 SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume, 352 NULL) 353 }; 354 355 static struct pci_driver dwc3_pci_driver = { 356 .name = "dwc3-pci", 357 .id_table = dwc3_pci_id_table, 358 .probe = dwc3_pci_probe, 359 .remove = dwc3_pci_remove, 360 .driver = { 361 .pm = &dwc3_pci_dev_pm_ops, 362 } 363 }; 364 365 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); 366 MODULE_LICENSE("GPL v2"); 367 MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer"); 368 369 module_pci_driver(dwc3_pci_driver); 370