xref: /openbmc/linux/drivers/usb/dwc3/dwc3-pci.c (revision 80483c3a)
1 /**
2  * dwc3-pci.c - PCI Specific glue layer
3  *
4  * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
5  *
6  * Authors: Felipe Balbi <balbi@ti.com>,
7  *	    Sebastian Andrzej Siewior <bigeasy@linutronix.de>
8  *
9  * This program is free software: you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2  of
11  * the License as published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  */
18 
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/slab.h>
22 #include <linux/pci.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/platform_device.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/acpi.h>
27 #include <linux/delay.h>
28 
29 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3		0xabcd
30 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI	0xabce
31 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31	0xabcf
32 #define PCI_DEVICE_ID_INTEL_BYT			0x0f37
33 #define PCI_DEVICE_ID_INTEL_MRFLD		0x119e
34 #define PCI_DEVICE_ID_INTEL_BSW			0x22b7
35 #define PCI_DEVICE_ID_INTEL_SPTLP		0x9d30
36 #define PCI_DEVICE_ID_INTEL_SPTH		0xa130
37 #define PCI_DEVICE_ID_INTEL_BXT			0x0aaa
38 #define PCI_DEVICE_ID_INTEL_BXT_M		0x1aaa
39 #define PCI_DEVICE_ID_INTEL_APL			0x5aaa
40 
41 static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
42 static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
43 
44 static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
45 	{ "reset-gpios", &reset_gpios, 1 },
46 	{ "cs-gpios", &cs_gpios, 1 },
47 	{ },
48 };
49 
50 static int dwc3_pci_quirks(struct pci_dev *pdev, struct platform_device *dwc3)
51 {
52 	if (pdev->vendor == PCI_VENDOR_ID_AMD &&
53 	    pdev->device == PCI_DEVICE_ID_AMD_NL_USB) {
54 		struct property_entry properties[] = {
55 			PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
56 			PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf),
57 			PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"),
58 			PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"),
59 			PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"),
60 			PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"),
61 			PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"),
62 			PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"),
63 			PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"),
64 			PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"),
65 			PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1),
66 			/*
67 			 * FIXME these quirks should be removed when AMD NL
68 			 * tapes out
69 			 */
70 			PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"),
71 			PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
72 			PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
73 			{ },
74 		};
75 
76 		return platform_device_add_properties(dwc3, properties);
77 	}
78 
79 	if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
80 		int ret;
81 
82 		struct property_entry properties[] = {
83 			PROPERTY_ENTRY_STRING("dr-mode", "peripheral"),
84 			{ }
85 		};
86 
87 		ret = platform_device_add_properties(dwc3, properties);
88 		if (ret < 0)
89 			return ret;
90 
91 		if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
92 			struct gpio_desc *gpio;
93 
94 			acpi_dev_add_driver_gpios(ACPI_COMPANION(&pdev->dev),
95 					acpi_dwc3_byt_gpios);
96 
97 			/*
98 			 * These GPIOs will turn on the USB2 PHY. Note that we have to
99 			 * put the gpio descriptors again here because the phy driver
100 			 * might want to grab them, too.
101 			 */
102 			gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW);
103 			if (IS_ERR(gpio))
104 				return PTR_ERR(gpio);
105 
106 			gpiod_set_value_cansleep(gpio, 1);
107 			gpiod_put(gpio);
108 
109 			gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW);
110 			if (IS_ERR(gpio))
111 				return PTR_ERR(gpio);
112 
113 			if (gpio) {
114 				gpiod_set_value_cansleep(gpio, 1);
115 				gpiod_put(gpio);
116 				usleep_range(10000, 11000);
117 			}
118 		}
119 	}
120 
121 	if (pdev->vendor == PCI_VENDOR_ID_SYNOPSYS &&
122 	    (pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 ||
123 	     pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI ||
124 	     pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31)) {
125 		struct property_entry properties[] = {
126 			PROPERTY_ENTRY_BOOL("snps,usb3_lpm_capable"),
127 			PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
128 			PROPERTY_ENTRY_BOOL("snps,dis_enblslpm_quirk"),
129 			{ },
130 		};
131 
132 		return platform_device_add_properties(dwc3, properties);
133 	}
134 
135 	return 0;
136 }
137 
138 static int dwc3_pci_probe(struct pci_dev *pci,
139 		const struct pci_device_id *id)
140 {
141 	struct resource		res[2];
142 	struct platform_device	*dwc3;
143 	int			ret;
144 	struct device		*dev = &pci->dev;
145 
146 	ret = pcim_enable_device(pci);
147 	if (ret) {
148 		dev_err(dev, "failed to enable pci device\n");
149 		return -ENODEV;
150 	}
151 
152 	pci_set_master(pci);
153 
154 	dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
155 	if (!dwc3) {
156 		dev_err(dev, "couldn't allocate dwc3 device\n");
157 		return -ENOMEM;
158 	}
159 
160 	memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
161 
162 	res[0].start	= pci_resource_start(pci, 0);
163 	res[0].end	= pci_resource_end(pci, 0);
164 	res[0].name	= "dwc_usb3";
165 	res[0].flags	= IORESOURCE_MEM;
166 
167 	res[1].start	= pci->irq;
168 	res[1].name	= "dwc_usb3";
169 	res[1].flags	= IORESOURCE_IRQ;
170 
171 	ret = platform_device_add_resources(dwc3, res, ARRAY_SIZE(res));
172 	if (ret) {
173 		dev_err(dev, "couldn't add resources to dwc3 device\n");
174 		return ret;
175 	}
176 
177 	dwc3->dev.parent = dev;
178 	ACPI_COMPANION_SET(&dwc3->dev, ACPI_COMPANION(dev));
179 
180 	ret = dwc3_pci_quirks(pci, dwc3);
181 	if (ret)
182 		goto err;
183 
184 	ret = platform_device_add(dwc3);
185 	if (ret) {
186 		dev_err(dev, "failed to register dwc3 device\n");
187 		goto err;
188 	}
189 
190 	device_init_wakeup(dev, true);
191 	device_set_run_wake(dev, true);
192 	pci_set_drvdata(pci, dwc3);
193 	pm_runtime_put(dev);
194 
195 	return 0;
196 err:
197 	platform_device_put(dwc3);
198 	return ret;
199 }
200 
201 static void dwc3_pci_remove(struct pci_dev *pci)
202 {
203 	device_init_wakeup(&pci->dev, false);
204 	pm_runtime_get(&pci->dev);
205 	acpi_dev_remove_driver_gpios(ACPI_COMPANION(&pci->dev));
206 	platform_device_unregister(pci_get_drvdata(pci));
207 }
208 
209 static const struct pci_device_id dwc3_pci_id_table[] = {
210 	{
211 		PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
212 				PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3),
213 	},
214 	{
215 		PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
216 				PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI),
217 	},
218 	{
219 		PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
220 				PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31),
221 	},
222 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BSW), },
223 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), },
224 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), },
225 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), },
226 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), },
227 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT), },
228 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT_M), },
229 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL), },
230 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
231 	{  }	/* Terminating Entry */
232 };
233 MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
234 
235 #ifdef CONFIG_PM
236 static int dwc3_pci_runtime_suspend(struct device *dev)
237 {
238 	if (device_run_wake(dev))
239 		return 0;
240 
241 	return -EBUSY;
242 }
243 
244 static int dwc3_pci_pm_dummy(struct device *dev)
245 {
246 	/*
247 	 * There's nothing to do here. No, seriously. Everything is either taken
248 	 * care either by PCI subsystem or dwc3/core.c, so we have nothing
249 	 * missing here.
250 	 *
251 	 * So you'd think we didn't need this at all, but PCI subsystem will
252 	 * bail out if we don't have a valid callback :-s
253 	 */
254 	return 0;
255 }
256 #endif /* CONFIG_PM */
257 
258 static struct dev_pm_ops dwc3_pci_dev_pm_ops = {
259 	SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_pm_dummy, dwc3_pci_pm_dummy)
260 	SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_pm_dummy,
261 		NULL)
262 };
263 
264 static struct pci_driver dwc3_pci_driver = {
265 	.name		= "dwc3-pci",
266 	.id_table	= dwc3_pci_id_table,
267 	.probe		= dwc3_pci_probe,
268 	.remove		= dwc3_pci_remove,
269 	.driver		= {
270 		.pm	= &dwc3_pci_dev_pm_ops,
271 	}
272 };
273 
274 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
275 MODULE_LICENSE("GPL v2");
276 MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
277 
278 module_pci_driver(dwc3_pci_driver);
279