xref: /openbmc/linux/drivers/usb/dwc3/dwc3-pci.c (revision 40662333)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * dwc3-pci.c - PCI Specific glue layer
4  *
5  * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
6  *
7  * Authors: Felipe Balbi <balbi@ti.com>,
8  *	    Sebastian Andrzej Siewior <bigeasy@linutronix.de>
9  */
10 
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/slab.h>
14 #include <linux/pci.h>
15 #include <linux/workqueue.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/platform_device.h>
18 #include <linux/gpio/consumer.h>
19 #include <linux/gpio/machine.h>
20 #include <linux/acpi.h>
21 #include <linux/delay.h>
22 
23 #define PCI_DEVICE_ID_INTEL_BYT			0x0f37
24 #define PCI_DEVICE_ID_INTEL_MRFLD		0x119e
25 #define PCI_DEVICE_ID_INTEL_BSW			0x22b7
26 #define PCI_DEVICE_ID_INTEL_SPTLP		0x9d30
27 #define PCI_DEVICE_ID_INTEL_SPTH		0xa130
28 #define PCI_DEVICE_ID_INTEL_BXT			0x0aaa
29 #define PCI_DEVICE_ID_INTEL_BXT_M		0x1aaa
30 #define PCI_DEVICE_ID_INTEL_APL			0x5aaa
31 #define PCI_DEVICE_ID_INTEL_KBP			0xa2b0
32 #define PCI_DEVICE_ID_INTEL_CMLLP		0x02ee
33 #define PCI_DEVICE_ID_INTEL_CMLH		0x06ee
34 #define PCI_DEVICE_ID_INTEL_GLK			0x31aa
35 #define PCI_DEVICE_ID_INTEL_CNPLP		0x9dee
36 #define PCI_DEVICE_ID_INTEL_CNPH		0xa36e
37 #define PCI_DEVICE_ID_INTEL_CNPV		0xa3b0
38 #define PCI_DEVICE_ID_INTEL_ICLLP		0x34ee
39 #define PCI_DEVICE_ID_INTEL_EHL			0x4b7e
40 #define PCI_DEVICE_ID_INTEL_TGPLP		0xa0ee
41 #define PCI_DEVICE_ID_INTEL_TGPH		0x43ee
42 #define PCI_DEVICE_ID_INTEL_JSP			0x4dee
43 #define PCI_DEVICE_ID_INTEL_ADL			0x465e
44 #define PCI_DEVICE_ID_INTEL_ADLP		0x51ee
45 #define PCI_DEVICE_ID_INTEL_ADLM		0x54ee
46 #define PCI_DEVICE_ID_INTEL_ADLS		0x7ae1
47 #define PCI_DEVICE_ID_INTEL_RPL			0x460e
48 #define PCI_DEVICE_ID_INTEL_RPLS		0x7a61
49 #define PCI_DEVICE_ID_INTEL_MTLP		0x7ec1
50 #define PCI_DEVICE_ID_INTEL_MTL			0x7e7e
51 #define PCI_DEVICE_ID_INTEL_TGL			0x9a15
52 #define PCI_DEVICE_ID_AMD_MR			0x163a
53 
54 #define PCI_INTEL_BXT_DSM_GUID		"732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
55 #define PCI_INTEL_BXT_FUNC_PMU_PWR	4
56 #define PCI_INTEL_BXT_STATE_D0		0
57 #define PCI_INTEL_BXT_STATE_D3		3
58 
59 #define GP_RWBAR			1
60 #define GP_RWREG1			0xa0
61 #define GP_RWREG1_ULPI_REFCLK_DISABLE	(1 << 17)
62 
63 /**
64  * struct dwc3_pci - Driver private structure
65  * @dwc3: child dwc3 platform_device
66  * @pci: our link to PCI bus
67  * @guid: _DSM GUID
68  * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM
69  * @wakeup_work: work for asynchronous resume
70  */
71 struct dwc3_pci {
72 	struct platform_device *dwc3;
73 	struct pci_dev *pci;
74 
75 	guid_t guid;
76 
77 	unsigned int has_dsm_for_pm:1;
78 	struct work_struct wakeup_work;
79 };
80 
81 static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
82 static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
83 
84 static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
85 	{ "reset-gpios", &reset_gpios, 1 },
86 	{ "cs-gpios", &cs_gpios, 1 },
87 	{ },
88 };
89 
90 static struct gpiod_lookup_table platform_bytcr_gpios = {
91 	.dev_id		= "0000:00:16.0",
92 	.table		= {
93 		GPIO_LOOKUP("INT33FC:00", 54, "cs", GPIO_ACTIVE_HIGH),
94 		GPIO_LOOKUP("INT33FC:02", 14, "reset", GPIO_ACTIVE_HIGH),
95 		{}
96 	},
97 };
98 
99 static int dwc3_byt_enable_ulpi_refclock(struct pci_dev *pci)
100 {
101 	void __iomem	*reg;
102 	u32		value;
103 
104 	reg = pcim_iomap(pci, GP_RWBAR, 0);
105 	if (!reg)
106 		return -ENOMEM;
107 
108 	value = readl(reg + GP_RWREG1);
109 	if (!(value & GP_RWREG1_ULPI_REFCLK_DISABLE))
110 		goto unmap; /* ULPI refclk already enabled */
111 
112 	value &= ~GP_RWREG1_ULPI_REFCLK_DISABLE;
113 	writel(value, reg + GP_RWREG1);
114 	/* This comes from the Intel Android x86 tree w/o any explanation */
115 	msleep(100);
116 unmap:
117 	pcim_iounmap(pci, reg);
118 	return 0;
119 }
120 
121 static const struct property_entry dwc3_pci_intel_properties[] = {
122 	PROPERTY_ENTRY_STRING("dr_mode", "peripheral"),
123 	PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
124 	{}
125 };
126 
127 static const struct property_entry dwc3_pci_intel_phy_charger_detect_properties[] = {
128 	PROPERTY_ENTRY_STRING("dr_mode", "peripheral"),
129 	PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
130 	PROPERTY_ENTRY_BOOL("linux,phy_charger_detect"),
131 	PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
132 	{}
133 };
134 
135 static const struct property_entry dwc3_pci_intel_byt_properties[] = {
136 	PROPERTY_ENTRY_STRING("dr_mode", "peripheral"),
137 	PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
138 	PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
139 	{}
140 };
141 
142 static const struct property_entry dwc3_pci_mrfld_properties[] = {
143 	PROPERTY_ENTRY_STRING("dr_mode", "otg"),
144 	PROPERTY_ENTRY_STRING("linux,extcon-name", "mrfld_bcove_pwrsrc"),
145 	PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
146 	PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
147 	PROPERTY_ENTRY_BOOL("snps,usb2-gadget-lpm-disable"),
148 	PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
149 	{}
150 };
151 
152 static const struct property_entry dwc3_pci_amd_properties[] = {
153 	PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
154 	PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf),
155 	PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"),
156 	PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"),
157 	PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"),
158 	PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"),
159 	PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"),
160 	PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"),
161 	PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"),
162 	PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"),
163 	PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1),
164 	/* FIXME these quirks should be removed when AMD NL tapes out */
165 	PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"),
166 	PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
167 	PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
168 	PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
169 	{}
170 };
171 
172 static const struct property_entry dwc3_pci_mr_properties[] = {
173 	PROPERTY_ENTRY_STRING("dr_mode", "otg"),
174 	PROPERTY_ENTRY_BOOL("usb-role-switch"),
175 	PROPERTY_ENTRY_STRING("role-switch-default-mode", "host"),
176 	PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
177 	{}
178 };
179 
180 static const struct software_node dwc3_pci_intel_swnode = {
181 	.properties = dwc3_pci_intel_properties,
182 };
183 
184 static const struct software_node dwc3_pci_intel_phy_charger_detect_swnode = {
185 	.properties = dwc3_pci_intel_phy_charger_detect_properties,
186 };
187 
188 static const struct software_node dwc3_pci_intel_byt_swnode = {
189 	.properties = dwc3_pci_intel_byt_properties,
190 };
191 
192 static const struct software_node dwc3_pci_intel_mrfld_swnode = {
193 	.properties = dwc3_pci_mrfld_properties,
194 };
195 
196 static const struct software_node dwc3_pci_amd_swnode = {
197 	.properties = dwc3_pci_amd_properties,
198 };
199 
200 static const struct software_node dwc3_pci_amd_mr_swnode = {
201 	.properties = dwc3_pci_mr_properties,
202 };
203 
204 static int dwc3_pci_quirks(struct dwc3_pci *dwc,
205 			   const struct software_node *swnode)
206 {
207 	struct pci_dev			*pdev = dwc->pci;
208 
209 	if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
210 		if (pdev->device == PCI_DEVICE_ID_INTEL_BXT ||
211 		    pdev->device == PCI_DEVICE_ID_INTEL_BXT_M ||
212 		    pdev->device == PCI_DEVICE_ID_INTEL_EHL) {
213 			guid_parse(PCI_INTEL_BXT_DSM_GUID, &dwc->guid);
214 			dwc->has_dsm_for_pm = true;
215 		}
216 
217 		if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
218 			struct gpio_desc *gpio;
219 			int ret;
220 
221 			/* On BYT the FW does not always enable the refclock */
222 			ret = dwc3_byt_enable_ulpi_refclock(pdev);
223 			if (ret)
224 				return ret;
225 
226 			ret = devm_acpi_dev_add_driver_gpios(&pdev->dev,
227 					acpi_dwc3_byt_gpios);
228 			if (ret)
229 				dev_dbg(&pdev->dev, "failed to add mapping table\n");
230 
231 			/*
232 			 * A lot of BYT devices lack ACPI resource entries for
233 			 * the GPIOs, add a fallback mapping to the reference
234 			 * design GPIOs which all boards seem to use.
235 			 */
236 			gpiod_add_lookup_table(&platform_bytcr_gpios);
237 
238 			/*
239 			 * These GPIOs will turn on the USB2 PHY. Note that we have to
240 			 * put the gpio descriptors again here because the phy driver
241 			 * might want to grab them, too.
242 			 */
243 			gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW);
244 			if (IS_ERR(gpio))
245 				return PTR_ERR(gpio);
246 
247 			gpiod_set_value_cansleep(gpio, 1);
248 			gpiod_put(gpio);
249 
250 			gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW);
251 			if (IS_ERR(gpio))
252 				return PTR_ERR(gpio);
253 
254 			if (gpio) {
255 				gpiod_set_value_cansleep(gpio, 1);
256 				gpiod_put(gpio);
257 				usleep_range(10000, 11000);
258 			}
259 
260 			/*
261 			 * Make the pdev name predictable (only 1 DWC3 on BYT)
262 			 * and patch the phy dev-name into the lookup table so
263 			 * that the phy-driver can get the GPIOs.
264 			 */
265 			dwc->dwc3->id = PLATFORM_DEVID_NONE;
266 			platform_bytcr_gpios.dev_id = "dwc3.ulpi";
267 
268 			/*
269 			 * Some Android tablets with a Crystal Cove PMIC
270 			 * (INT33FD), rely on the TUSB1211 phy for charger
271 			 * detection. These can be identified by them _not_
272 			 * using the standard ACPI battery and ac drivers.
273 			 */
274 			if (acpi_dev_present("INT33FD", "1", 2) &&
275 			    acpi_quirk_skip_acpi_ac_and_battery()) {
276 				dev_info(&pdev->dev, "Using TUSB1211 phy for charger detection\n");
277 				swnode = &dwc3_pci_intel_phy_charger_detect_swnode;
278 			}
279 		}
280 	}
281 
282 	return device_add_software_node(&dwc->dwc3->dev, swnode);
283 }
284 
285 #ifdef CONFIG_PM
286 static void dwc3_pci_resume_work(struct work_struct *work)
287 {
288 	struct dwc3_pci *dwc = container_of(work, struct dwc3_pci, wakeup_work);
289 	struct platform_device *dwc3 = dwc->dwc3;
290 	int ret;
291 
292 	ret = pm_runtime_get_sync(&dwc3->dev);
293 	if (ret < 0) {
294 		pm_runtime_put_sync_autosuspend(&dwc3->dev);
295 		return;
296 	}
297 
298 	pm_runtime_mark_last_busy(&dwc3->dev);
299 	pm_runtime_put_sync_autosuspend(&dwc3->dev);
300 }
301 #endif
302 
303 static int dwc3_pci_probe(struct pci_dev *pci, const struct pci_device_id *id)
304 {
305 	struct dwc3_pci		*dwc;
306 	struct resource		res[2];
307 	int			ret;
308 	struct device		*dev = &pci->dev;
309 
310 	ret = pcim_enable_device(pci);
311 	if (ret) {
312 		dev_err(dev, "failed to enable pci device\n");
313 		return -ENODEV;
314 	}
315 
316 	pci_set_master(pci);
317 
318 	dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL);
319 	if (!dwc)
320 		return -ENOMEM;
321 
322 	dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
323 	if (!dwc->dwc3)
324 		return -ENOMEM;
325 
326 	memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
327 
328 	res[0].start	= pci_resource_start(pci, 0);
329 	res[0].end	= pci_resource_end(pci, 0);
330 	res[0].name	= "dwc_usb3";
331 	res[0].flags	= IORESOURCE_MEM;
332 
333 	res[1].start	= pci->irq;
334 	res[1].name	= "dwc_usb3";
335 	res[1].flags	= IORESOURCE_IRQ;
336 
337 	ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res));
338 	if (ret) {
339 		dev_err(dev, "couldn't add resources to dwc3 device\n");
340 		goto err;
341 	}
342 
343 	dwc->pci = pci;
344 	dwc->dwc3->dev.parent = dev;
345 	ACPI_COMPANION_SET(&dwc->dwc3->dev, ACPI_COMPANION(dev));
346 
347 	ret = dwc3_pci_quirks(dwc, (void *)id->driver_data);
348 	if (ret)
349 		goto err;
350 
351 	ret = platform_device_add(dwc->dwc3);
352 	if (ret) {
353 		dev_err(dev, "failed to register dwc3 device\n");
354 		goto err;
355 	}
356 
357 	device_init_wakeup(dev, true);
358 	pci_set_drvdata(pci, dwc);
359 	pm_runtime_put(dev);
360 #ifdef CONFIG_PM
361 	INIT_WORK(&dwc->wakeup_work, dwc3_pci_resume_work);
362 #endif
363 
364 	return 0;
365 err:
366 	device_remove_software_node(&dwc->dwc3->dev);
367 	platform_device_put(dwc->dwc3);
368 	return ret;
369 }
370 
371 static void dwc3_pci_remove(struct pci_dev *pci)
372 {
373 	struct dwc3_pci		*dwc = pci_get_drvdata(pci);
374 	struct pci_dev		*pdev = dwc->pci;
375 
376 	if (pdev->device == PCI_DEVICE_ID_INTEL_BYT)
377 		gpiod_remove_lookup_table(&platform_bytcr_gpios);
378 #ifdef CONFIG_PM
379 	cancel_work_sync(&dwc->wakeup_work);
380 #endif
381 	device_init_wakeup(&pci->dev, false);
382 	pm_runtime_get(&pci->dev);
383 	device_remove_software_node(&dwc->dwc3->dev);
384 	platform_device_unregister(dwc->dwc3);
385 }
386 
387 static const struct pci_device_id dwc3_pci_id_table[] = {
388 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BSW),
389 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
390 
391 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BYT),
392 	  (kernel_ulong_t) &dwc3_pci_intel_byt_swnode, },
393 
394 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MRFLD),
395 	  (kernel_ulong_t) &dwc3_pci_intel_mrfld_swnode, },
396 
397 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CMLLP),
398 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
399 
400 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CMLH),
401 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
402 
403 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SPTLP),
404 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
405 
406 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SPTH),
407 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
408 
409 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BXT),
410 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
411 
412 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BXT_M),
413 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
414 
415 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_APL),
416 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
417 
418 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_KBP),
419 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
420 
421 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_GLK),
422 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
423 
424 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CNPLP),
425 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
426 
427 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CNPH),
428 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
429 
430 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CNPV),
431 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
432 
433 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICLLP),
434 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
435 
436 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_EHL),
437 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
438 
439 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TGPLP),
440 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
441 
442 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TGPH),
443 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
444 
445 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_JSP),
446 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
447 
448 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADL),
449 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
450 
451 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADLP),
452 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
453 
454 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADLM),
455 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
456 
457 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADLS),
458 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
459 
460 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_RPL),
461 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
462 
463 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_RPLS),
464 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
465 
466 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MTLP),
467 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
468 
469 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MTL),
470 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
471 
472 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TGL),
473 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
474 
475 	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_NL_USB),
476 	  (kernel_ulong_t) &dwc3_pci_amd_swnode, },
477 
478 	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_MR),
479 	  (kernel_ulong_t)&dwc3_pci_amd_mr_swnode, },
480 
481 	{  }	/* Terminating Entry */
482 };
483 MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
484 
485 #if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP)
486 static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param)
487 {
488 	union acpi_object *obj;
489 	union acpi_object tmp;
490 	union acpi_object argv4 = ACPI_INIT_DSM_ARGV4(1, &tmp);
491 
492 	if (!dwc->has_dsm_for_pm)
493 		return 0;
494 
495 	tmp.type = ACPI_TYPE_INTEGER;
496 	tmp.integer.value = param;
497 
498 	obj = acpi_evaluate_dsm(ACPI_HANDLE(&dwc->pci->dev), &dwc->guid,
499 			1, PCI_INTEL_BXT_FUNC_PMU_PWR, &argv4);
500 	if (!obj) {
501 		dev_err(&dwc->pci->dev, "failed to evaluate _DSM\n");
502 		return -EIO;
503 	}
504 
505 	ACPI_FREE(obj);
506 
507 	return 0;
508 }
509 #endif /* CONFIG_PM || CONFIG_PM_SLEEP */
510 
511 #ifdef CONFIG_PM
512 static int dwc3_pci_runtime_suspend(struct device *dev)
513 {
514 	struct dwc3_pci		*dwc = dev_get_drvdata(dev);
515 
516 	if (device_can_wakeup(dev))
517 		return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
518 
519 	return -EBUSY;
520 }
521 
522 static int dwc3_pci_runtime_resume(struct device *dev)
523 {
524 	struct dwc3_pci		*dwc = dev_get_drvdata(dev);
525 	int			ret;
526 
527 	ret = dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
528 	if (ret)
529 		return ret;
530 
531 	queue_work(pm_wq, &dwc->wakeup_work);
532 
533 	return 0;
534 }
535 #endif /* CONFIG_PM */
536 
537 #ifdef CONFIG_PM_SLEEP
538 static int dwc3_pci_suspend(struct device *dev)
539 {
540 	struct dwc3_pci		*dwc = dev_get_drvdata(dev);
541 
542 	return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
543 }
544 
545 static int dwc3_pci_resume(struct device *dev)
546 {
547 	struct dwc3_pci		*dwc = dev_get_drvdata(dev);
548 
549 	return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
550 }
551 #endif /* CONFIG_PM_SLEEP */
552 
553 static const struct dev_pm_ops dwc3_pci_dev_pm_ops = {
554 	SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume)
555 	SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume,
556 		NULL)
557 };
558 
559 static struct pci_driver dwc3_pci_driver = {
560 	.name		= "dwc3-pci",
561 	.id_table	= dwc3_pci_id_table,
562 	.probe		= dwc3_pci_probe,
563 	.remove		= dwc3_pci_remove,
564 	.driver		= {
565 		.pm	= &dwc3_pci_dev_pm_ops,
566 	}
567 };
568 
569 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
570 MODULE_LICENSE("GPL v2");
571 MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
572 
573 module_pci_driver(dwc3_pci_driver);
574