1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * drd.c - DesignWare USB3 DRD Controller Dual-role support 4 * 5 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com 6 * 7 * Authors: Roger Quadros <rogerq@ti.com> 8 */ 9 10 #include <linux/extcon.h> 11 #include <linux/of_graph.h> 12 #include <linux/of_platform.h> 13 #include <linux/platform_device.h> 14 #include <linux/property.h> 15 16 #include "debug.h" 17 #include "core.h" 18 #include "gadget.h" 19 20 static void dwc3_otg_disable_events(struct dwc3 *dwc, u32 disable_mask) 21 { 22 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN); 23 24 reg &= ~(disable_mask); 25 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); 26 } 27 28 static void dwc3_otg_enable_events(struct dwc3 *dwc, u32 enable_mask) 29 { 30 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN); 31 32 reg |= (enable_mask); 33 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); 34 } 35 36 static void dwc3_otg_clear_events(struct dwc3 *dwc) 37 { 38 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVT); 39 40 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); 41 } 42 43 #define DWC3_OTG_ALL_EVENTS (DWC3_OEVTEN_XHCIRUNSTPSETEN | \ 44 DWC3_OEVTEN_DEVRUNSTPSETEN | DWC3_OEVTEN_HIBENTRYEN | \ 45 DWC3_OEVTEN_CONIDSTSCHNGEN | DWC3_OEVTEN_HRRCONFNOTIFEN | \ 46 DWC3_OEVTEN_HRRINITNOTIFEN | DWC3_OEVTEN_ADEVIDLEEN | \ 47 DWC3_OEVTEN_ADEVBHOSTENDEN | DWC3_OEVTEN_ADEVHOSTEN | \ 48 DWC3_OEVTEN_ADEVHNPCHNGEN | DWC3_OEVTEN_ADEVSRPDETEN | \ 49 DWC3_OEVTEN_ADEVSESSENDDETEN | DWC3_OEVTEN_BDEVBHOSTENDEN | \ 50 DWC3_OEVTEN_BDEVHNPCHNGEN | DWC3_OEVTEN_BDEVSESSVLDDETEN | \ 51 DWC3_OEVTEN_BDEVVBUSCHNGEN) 52 53 static irqreturn_t dwc3_otg_thread_irq(int irq, void *_dwc) 54 { 55 struct dwc3 *dwc = _dwc; 56 57 spin_lock(&dwc->lock); 58 if (dwc->otg_restart_host) { 59 dwc3_otg_host_init(dwc); 60 dwc->otg_restart_host = false; 61 } 62 63 spin_unlock(&dwc->lock); 64 65 dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_OTG); 66 67 return IRQ_HANDLED; 68 } 69 70 static irqreturn_t dwc3_otg_irq(int irq, void *_dwc) 71 { 72 u32 reg; 73 struct dwc3 *dwc = _dwc; 74 irqreturn_t ret = IRQ_NONE; 75 76 reg = dwc3_readl(dwc->regs, DWC3_OEVT); 77 if (reg) { 78 /* ignore non OTG events, we can't disable them in OEVTEN */ 79 if (!(reg & DWC3_OTG_ALL_EVENTS)) { 80 dwc3_writel(dwc->regs, DWC3_OEVT, reg); 81 return IRQ_NONE; 82 } 83 84 if (dwc->current_otg_role == DWC3_OTG_ROLE_HOST && 85 !(reg & DWC3_OEVT_DEVICEMODE)) 86 dwc->otg_restart_host = true; 87 dwc3_writel(dwc->regs, DWC3_OEVT, reg); 88 ret = IRQ_WAKE_THREAD; 89 } 90 91 return ret; 92 } 93 94 static void dwc3_otgregs_init(struct dwc3 *dwc) 95 { 96 u32 reg; 97 98 /* 99 * Prevent host/device reset from resetting OTG core. 100 * If we don't do this then xhci_reset (USBCMD.HCRST) will reset 101 * the signal outputs sent to the PHY, the OTG FSM logic of the 102 * core and also the resets to the VBUS filters inside the core. 103 */ 104 reg = dwc3_readl(dwc->regs, DWC3_OCFG); 105 reg |= DWC3_OCFG_SFTRSTMASK; 106 dwc3_writel(dwc->regs, DWC3_OCFG, reg); 107 108 /* Disable hibernation for simplicity */ 109 reg = dwc3_readl(dwc->regs, DWC3_GCTL); 110 reg &= ~DWC3_GCTL_GBLHIBERNATIONEN; 111 dwc3_writel(dwc->regs, DWC3_GCTL, reg); 112 113 /* 114 * Initialize OTG registers as per 115 * Figure 11-4 OTG Driver Overall Programming Flow 116 */ 117 /* OCFG.SRPCap = 0, OCFG.HNPCap = 0 */ 118 reg = dwc3_readl(dwc->regs, DWC3_OCFG); 119 reg &= ~(DWC3_OCFG_SRPCAP | DWC3_OCFG_HNPCAP); 120 dwc3_writel(dwc->regs, DWC3_OCFG, reg); 121 /* OEVT = FFFF */ 122 dwc3_otg_clear_events(dwc); 123 /* OEVTEN = 0 */ 124 dwc3_otg_disable_events(dwc, DWC3_OTG_ALL_EVENTS); 125 /* OEVTEN.ConIDStsChngEn = 1. Instead we enable all events */ 126 dwc3_otg_enable_events(dwc, DWC3_OTG_ALL_EVENTS); 127 /* 128 * OCTL.PeriMode = 1, OCTL.DevSetHNPEn = 0, OCTL.HstSetHNPEn = 0, 129 * OCTL.HNPReq = 0 130 */ 131 reg = dwc3_readl(dwc->regs, DWC3_OCTL); 132 reg |= DWC3_OCTL_PERIMODE; 133 reg &= ~(DWC3_OCTL_DEVSETHNPEN | DWC3_OCTL_HSTSETHNPEN | 134 DWC3_OCTL_HNPREQ); 135 dwc3_writel(dwc->regs, DWC3_OCTL, reg); 136 } 137 138 static int dwc3_otg_get_irq(struct dwc3 *dwc) 139 { 140 struct platform_device *dwc3_pdev = to_platform_device(dwc->dev); 141 int irq; 142 143 irq = platform_get_irq_byname_optional(dwc3_pdev, "otg"); 144 if (irq > 0) 145 goto out; 146 147 if (irq == -EPROBE_DEFER) 148 goto out; 149 150 irq = platform_get_irq_byname_optional(dwc3_pdev, "dwc_usb3"); 151 if (irq > 0) 152 goto out; 153 154 if (irq == -EPROBE_DEFER) 155 goto out; 156 157 irq = platform_get_irq(dwc3_pdev, 0); 158 if (irq > 0) 159 goto out; 160 161 if (!irq) 162 irq = -EINVAL; 163 164 out: 165 return irq; 166 } 167 168 void dwc3_otg_init(struct dwc3 *dwc) 169 { 170 u32 reg; 171 172 /* 173 * As per Figure 11-4 OTG Driver Overall Programming Flow, 174 * block "Initialize GCTL for OTG operation". 175 */ 176 /* GCTL.PrtCapDir=2'b11 */ 177 dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_OTG); 178 /* GUSB2PHYCFG0.SusPHY=0 */ 179 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 180 reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; 181 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 182 183 /* Initialize OTG registers */ 184 dwc3_otgregs_init(dwc); 185 } 186 187 void dwc3_otg_exit(struct dwc3 *dwc) 188 { 189 /* disable all OTG IRQs */ 190 dwc3_otg_disable_events(dwc, DWC3_OTG_ALL_EVENTS); 191 /* clear all events */ 192 dwc3_otg_clear_events(dwc); 193 } 194 195 /* should be called before Host controller driver is started */ 196 void dwc3_otg_host_init(struct dwc3 *dwc) 197 { 198 u32 reg; 199 200 /* As per Figure 11-10 A-Device Flow Diagram */ 201 /* OCFG.HNPCap = 0, OCFG.SRPCap = 0. Already 0 */ 202 203 /* 204 * OCTL.PeriMode=0, OCTL.TermSelDLPulse = 0, 205 * OCTL.DevSetHNPEn = 0, OCTL.HstSetHNPEn = 0 206 */ 207 reg = dwc3_readl(dwc->regs, DWC3_OCTL); 208 reg &= ~(DWC3_OCTL_PERIMODE | DWC3_OCTL_TERMSELIDPULSE | 209 DWC3_OCTL_DEVSETHNPEN | DWC3_OCTL_HSTSETHNPEN); 210 dwc3_writel(dwc->regs, DWC3_OCTL, reg); 211 212 /* 213 * OCFG.DisPrtPwrCutoff = 0/1 214 */ 215 reg = dwc3_readl(dwc->regs, DWC3_OCFG); 216 reg &= ~DWC3_OCFG_DISPWRCUTTOFF; 217 dwc3_writel(dwc->regs, DWC3_OCFG, reg); 218 219 /* 220 * OCFG.SRPCap = 1, OCFG.HNPCap = GHWPARAMS6.HNP_CAP 221 * We don't want SRP/HNP for simple dual-role so leave 222 * these disabled. 223 */ 224 225 /* 226 * OEVTEN.OTGADevHostEvntEn = 1 227 * OEVTEN.OTGADevSessEndDetEvntEn = 1 228 * We don't want HNP/role-swap so leave these disabled. 229 */ 230 231 /* GUSB2PHYCFG.ULPIAutoRes = 1/0, GUSB2PHYCFG.SusPHY = 1 */ 232 if (!dwc->dis_u2_susphy_quirk) { 233 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 234 reg |= DWC3_GUSB2PHYCFG_SUSPHY; 235 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 236 } 237 238 /* Set Port Power to enable VBUS: OCTL.PrtPwrCtl = 1 */ 239 reg = dwc3_readl(dwc->regs, DWC3_OCTL); 240 reg |= DWC3_OCTL_PRTPWRCTL; 241 dwc3_writel(dwc->regs, DWC3_OCTL, reg); 242 } 243 244 /* should be called after Host controller driver is stopped */ 245 static void dwc3_otg_host_exit(struct dwc3 *dwc) 246 { 247 u32 reg; 248 249 /* 250 * Exit from A-device flow as per 251 * Figure 11-4 OTG Driver Overall Programming Flow 252 */ 253 254 /* 255 * OEVTEN.OTGADevBHostEndEvntEn=0, OEVTEN.OTGADevHNPChngEvntEn=0 256 * OEVTEN.OTGADevSessEndDetEvntEn=0, 257 * OEVTEN.OTGADevHostEvntEn = 0 258 * But we don't disable any OTG events 259 */ 260 261 /* OCTL.HstSetHNPEn = 0, OCTL.PrtPwrCtl=0 */ 262 reg = dwc3_readl(dwc->regs, DWC3_OCTL); 263 reg &= ~(DWC3_OCTL_HSTSETHNPEN | DWC3_OCTL_PRTPWRCTL); 264 dwc3_writel(dwc->regs, DWC3_OCTL, reg); 265 } 266 267 /* should be called before the gadget controller driver is started */ 268 static void dwc3_otg_device_init(struct dwc3 *dwc) 269 { 270 u32 reg; 271 272 /* As per Figure 11-20 B-Device Flow Diagram */ 273 274 /* 275 * OCFG.HNPCap = GHWPARAMS6.HNP_CAP, OCFG.SRPCap = 1 276 * but we keep them 0 for simple dual-role operation. 277 */ 278 reg = dwc3_readl(dwc->regs, DWC3_OCFG); 279 /* OCFG.OTGSftRstMsk = 0/1 */ 280 reg |= DWC3_OCFG_SFTRSTMASK; 281 dwc3_writel(dwc->regs, DWC3_OCFG, reg); 282 /* 283 * OCTL.PeriMode = 1 284 * OCTL.TermSelDLPulse = 0/1, OCTL.HNPReq = 0 285 * OCTL.DevSetHNPEn = 0, OCTL.HstSetHNPEn = 0 286 */ 287 reg = dwc3_readl(dwc->regs, DWC3_OCTL); 288 reg |= DWC3_OCTL_PERIMODE; 289 reg &= ~(DWC3_OCTL_TERMSELIDPULSE | DWC3_OCTL_HNPREQ | 290 DWC3_OCTL_DEVSETHNPEN | DWC3_OCTL_HSTSETHNPEN); 291 dwc3_writel(dwc->regs, DWC3_OCTL, reg); 292 /* OEVTEN.OTGBDevSesVldDetEvntEn = 1 */ 293 dwc3_otg_enable_events(dwc, DWC3_OEVTEN_BDEVSESSVLDDETEN); 294 /* GUSB2PHYCFG.ULPIAutoRes = 0, GUSB2PHYCFG0.SusPHY = 1 */ 295 if (!dwc->dis_u2_susphy_quirk) { 296 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 297 reg |= DWC3_GUSB2PHYCFG_SUSPHY; 298 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 299 } 300 /* GCTL.GblHibernationEn = 0. Already 0. */ 301 } 302 303 /* should be called after the gadget controller driver is stopped */ 304 static void dwc3_otg_device_exit(struct dwc3 *dwc) 305 { 306 u32 reg; 307 308 /* 309 * Exit from B-device flow as per 310 * Figure 11-4 OTG Driver Overall Programming Flow 311 */ 312 313 /* 314 * OEVTEN.OTGBDevHNPChngEvntEn = 0 315 * OEVTEN.OTGBDevVBusChngEvntEn = 0 316 * OEVTEN.OTGBDevBHostEndEvntEn = 0 317 */ 318 dwc3_otg_disable_events(dwc, DWC3_OEVTEN_BDEVHNPCHNGEN | 319 DWC3_OEVTEN_BDEVVBUSCHNGEN | 320 DWC3_OEVTEN_BDEVBHOSTENDEN); 321 322 /* OCTL.DevSetHNPEn = 0, OCTL.HNPReq = 0, OCTL.PeriMode=1 */ 323 reg = dwc3_readl(dwc->regs, DWC3_OCTL); 324 reg &= ~(DWC3_OCTL_DEVSETHNPEN | DWC3_OCTL_HNPREQ); 325 reg |= DWC3_OCTL_PERIMODE; 326 dwc3_writel(dwc->regs, DWC3_OCTL, reg); 327 } 328 329 void dwc3_otg_update(struct dwc3 *dwc, bool ignore_idstatus) 330 { 331 int ret; 332 u32 reg; 333 int id; 334 unsigned long flags; 335 336 if (dwc->dr_mode != USB_DR_MODE_OTG) 337 return; 338 339 /* don't do anything if debug user changed role to not OTG */ 340 if (dwc->current_dr_role != DWC3_GCTL_PRTCAP_OTG) 341 return; 342 343 if (!ignore_idstatus) { 344 reg = dwc3_readl(dwc->regs, DWC3_OSTS); 345 id = !!(reg & DWC3_OSTS_CONIDSTS); 346 347 dwc->desired_otg_role = id ? DWC3_OTG_ROLE_DEVICE : 348 DWC3_OTG_ROLE_HOST; 349 } 350 351 if (dwc->desired_otg_role == dwc->current_otg_role) 352 return; 353 354 switch (dwc->current_otg_role) { 355 case DWC3_OTG_ROLE_HOST: 356 dwc3_host_exit(dwc); 357 spin_lock_irqsave(&dwc->lock, flags); 358 dwc3_otg_host_exit(dwc); 359 spin_unlock_irqrestore(&dwc->lock, flags); 360 break; 361 case DWC3_OTG_ROLE_DEVICE: 362 dwc3_gadget_exit(dwc); 363 spin_lock_irqsave(&dwc->lock, flags); 364 dwc3_event_buffers_cleanup(dwc); 365 dwc3_otg_device_exit(dwc); 366 spin_unlock_irqrestore(&dwc->lock, flags); 367 break; 368 default: 369 break; 370 } 371 372 spin_lock_irqsave(&dwc->lock, flags); 373 374 dwc->current_otg_role = dwc->desired_otg_role; 375 376 spin_unlock_irqrestore(&dwc->lock, flags); 377 378 switch (dwc->desired_otg_role) { 379 case DWC3_OTG_ROLE_HOST: 380 spin_lock_irqsave(&dwc->lock, flags); 381 dwc3_otgregs_init(dwc); 382 dwc3_otg_host_init(dwc); 383 spin_unlock_irqrestore(&dwc->lock, flags); 384 ret = dwc3_host_init(dwc); 385 if (ret) { 386 dev_err(dwc->dev, "failed to initialize host\n"); 387 } else { 388 if (dwc->usb2_phy) 389 otg_set_vbus(dwc->usb2_phy->otg, true); 390 if (dwc->usb2_generic_phy) 391 phy_set_mode(dwc->usb2_generic_phy, 392 PHY_MODE_USB_HOST); 393 } 394 break; 395 case DWC3_OTG_ROLE_DEVICE: 396 spin_lock_irqsave(&dwc->lock, flags); 397 dwc3_otgregs_init(dwc); 398 dwc3_otg_device_init(dwc); 399 dwc3_event_buffers_setup(dwc); 400 spin_unlock_irqrestore(&dwc->lock, flags); 401 402 if (dwc->usb2_phy) 403 otg_set_vbus(dwc->usb2_phy->otg, false); 404 if (dwc->usb2_generic_phy) 405 phy_set_mode(dwc->usb2_generic_phy, 406 PHY_MODE_USB_DEVICE); 407 ret = dwc3_gadget_init(dwc); 408 if (ret) 409 dev_err(dwc->dev, "failed to initialize peripheral\n"); 410 break; 411 default: 412 break; 413 } 414 } 415 416 static void dwc3_drd_update(struct dwc3 *dwc) 417 { 418 int id; 419 420 if (dwc->edev) { 421 id = extcon_get_state(dwc->edev, EXTCON_USB_HOST); 422 if (id < 0) 423 id = 0; 424 dwc3_set_mode(dwc, id ? 425 DWC3_GCTL_PRTCAP_HOST : 426 DWC3_GCTL_PRTCAP_DEVICE); 427 } 428 } 429 430 static int dwc3_drd_notifier(struct notifier_block *nb, 431 unsigned long event, void *ptr) 432 { 433 struct dwc3 *dwc = container_of(nb, struct dwc3, edev_nb); 434 435 dwc3_set_mode(dwc, event ? 436 DWC3_GCTL_PRTCAP_HOST : 437 DWC3_GCTL_PRTCAP_DEVICE); 438 439 return NOTIFY_DONE; 440 } 441 442 static struct extcon_dev *dwc3_get_extcon(struct dwc3 *dwc) 443 { 444 struct device *dev = dwc->dev; 445 struct device_node *np_phy; 446 struct extcon_dev *edev = NULL; 447 const char *name; 448 449 if (device_property_read_bool(dev, "extcon")) 450 return extcon_get_edev_by_phandle(dev, 0); 451 452 /* 453 * Device tree platforms should get extcon via phandle. 454 * On ACPI platforms, we get the name from a device property. 455 * This device property is for kernel internal use only and 456 * is expected to be set by the glue code. 457 */ 458 if (device_property_read_string(dev, "linux,extcon-name", &name) == 0) 459 return extcon_get_extcon_dev(name); 460 461 /* 462 * Try to get an extcon device from the USB PHY controller's "port" 463 * node. Check if it has the "port" node first, to avoid printing the 464 * error message from underlying code, as it's a valid case: extcon 465 * device (and "port" node) may be missing in case of "usb-role-switch" 466 * or OTG mode. 467 */ 468 np_phy = of_parse_phandle(dev->of_node, "phys", 0); 469 if (of_graph_is_present(np_phy)) { 470 struct device_node *np_conn; 471 472 np_conn = of_graph_get_remote_node(np_phy, -1, -1); 473 if (np_conn) 474 edev = extcon_find_edev_by_node(np_conn); 475 of_node_put(np_conn); 476 } 477 of_node_put(np_phy); 478 479 return edev; 480 } 481 482 #if IS_ENABLED(CONFIG_USB_ROLE_SWITCH) 483 #define ROLE_SWITCH 1 484 static int dwc3_usb_role_switch_set(struct usb_role_switch *sw, 485 enum usb_role role) 486 { 487 struct dwc3 *dwc = usb_role_switch_get_drvdata(sw); 488 u32 mode; 489 490 switch (role) { 491 case USB_ROLE_HOST: 492 mode = DWC3_GCTL_PRTCAP_HOST; 493 break; 494 case USB_ROLE_DEVICE: 495 mode = DWC3_GCTL_PRTCAP_DEVICE; 496 break; 497 default: 498 if (dwc->role_switch_default_mode == USB_DR_MODE_HOST) 499 mode = DWC3_GCTL_PRTCAP_HOST; 500 else 501 mode = DWC3_GCTL_PRTCAP_DEVICE; 502 break; 503 } 504 505 dwc3_set_mode(dwc, mode); 506 return 0; 507 } 508 509 static enum usb_role dwc3_usb_role_switch_get(struct usb_role_switch *sw) 510 { 511 struct dwc3 *dwc = usb_role_switch_get_drvdata(sw); 512 unsigned long flags; 513 enum usb_role role; 514 515 spin_lock_irqsave(&dwc->lock, flags); 516 switch (dwc->current_dr_role) { 517 case DWC3_GCTL_PRTCAP_HOST: 518 role = USB_ROLE_HOST; 519 break; 520 case DWC3_GCTL_PRTCAP_DEVICE: 521 role = USB_ROLE_DEVICE; 522 break; 523 case DWC3_GCTL_PRTCAP_OTG: 524 role = dwc->current_otg_role; 525 break; 526 default: 527 if (dwc->role_switch_default_mode == USB_DR_MODE_HOST) 528 role = USB_ROLE_HOST; 529 else 530 role = USB_ROLE_DEVICE; 531 break; 532 } 533 spin_unlock_irqrestore(&dwc->lock, flags); 534 return role; 535 } 536 537 static int dwc3_setup_role_switch(struct dwc3 *dwc) 538 { 539 struct usb_role_switch_desc dwc3_role_switch = {NULL}; 540 u32 mode; 541 542 dwc->role_switch_default_mode = usb_get_role_switch_default_mode(dwc->dev); 543 if (dwc->role_switch_default_mode == USB_DR_MODE_HOST) { 544 mode = DWC3_GCTL_PRTCAP_HOST; 545 } else { 546 dwc->role_switch_default_mode = USB_DR_MODE_PERIPHERAL; 547 mode = DWC3_GCTL_PRTCAP_DEVICE; 548 } 549 550 dwc3_role_switch.fwnode = dev_fwnode(dwc->dev); 551 dwc3_role_switch.set = dwc3_usb_role_switch_set; 552 dwc3_role_switch.get = dwc3_usb_role_switch_get; 553 dwc3_role_switch.driver_data = dwc; 554 dwc->role_sw = usb_role_switch_register(dwc->dev, &dwc3_role_switch); 555 if (IS_ERR(dwc->role_sw)) 556 return PTR_ERR(dwc->role_sw); 557 558 if (dwc->dev->of_node) { 559 /* populate connector entry */ 560 int ret = devm_of_platform_populate(dwc->dev); 561 562 if (ret) { 563 usb_role_switch_unregister(dwc->role_sw); 564 dwc->role_sw = NULL; 565 dev_err(dwc->dev, "DWC3 platform devices creation failed: %i\n", ret); 566 return ret; 567 } 568 } 569 570 dwc3_set_mode(dwc, mode); 571 return 0; 572 } 573 #else 574 #define ROLE_SWITCH 0 575 #define dwc3_setup_role_switch(x) 0 576 #endif 577 578 int dwc3_drd_init(struct dwc3 *dwc) 579 { 580 int ret, irq; 581 582 if (ROLE_SWITCH && 583 device_property_read_bool(dwc->dev, "usb-role-switch")) 584 return dwc3_setup_role_switch(dwc); 585 586 dwc->edev = dwc3_get_extcon(dwc); 587 if (IS_ERR(dwc->edev)) 588 return PTR_ERR(dwc->edev); 589 590 if (dwc->edev) { 591 dwc->edev_nb.notifier_call = dwc3_drd_notifier; 592 ret = extcon_register_notifier(dwc->edev, EXTCON_USB_HOST, 593 &dwc->edev_nb); 594 if (ret < 0) { 595 dev_err(dwc->dev, "couldn't register cable notifier\n"); 596 return ret; 597 } 598 599 dwc3_drd_update(dwc); 600 } else { 601 dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_OTG); 602 603 /* use OTG block to get ID event */ 604 irq = dwc3_otg_get_irq(dwc); 605 if (irq < 0) 606 return irq; 607 608 dwc->otg_irq = irq; 609 610 /* disable all OTG IRQs */ 611 dwc3_otg_disable_events(dwc, DWC3_OTG_ALL_EVENTS); 612 /* clear all events */ 613 dwc3_otg_clear_events(dwc); 614 615 ret = request_threaded_irq(dwc->otg_irq, dwc3_otg_irq, 616 dwc3_otg_thread_irq, 617 IRQF_SHARED, "dwc3-otg", dwc); 618 if (ret) { 619 dev_err(dwc->dev, "failed to request irq #%d --> %d\n", 620 dwc->otg_irq, ret); 621 ret = -ENODEV; 622 return ret; 623 } 624 625 dwc3_otg_init(dwc); 626 dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_OTG); 627 } 628 629 return 0; 630 } 631 632 void dwc3_drd_exit(struct dwc3 *dwc) 633 { 634 unsigned long flags; 635 636 if (dwc->role_sw) 637 usb_role_switch_unregister(dwc->role_sw); 638 639 if (dwc->edev) 640 extcon_unregister_notifier(dwc->edev, EXTCON_USB_HOST, 641 &dwc->edev_nb); 642 643 cancel_work_sync(&dwc->drd_work); 644 645 /* debug user might have changed role, clean based on current role */ 646 switch (dwc->current_dr_role) { 647 case DWC3_GCTL_PRTCAP_HOST: 648 dwc3_host_exit(dwc); 649 break; 650 case DWC3_GCTL_PRTCAP_DEVICE: 651 dwc3_gadget_exit(dwc); 652 dwc3_event_buffers_cleanup(dwc); 653 break; 654 case DWC3_GCTL_PRTCAP_OTG: 655 dwc3_otg_exit(dwc); 656 spin_lock_irqsave(&dwc->lock, flags); 657 dwc->desired_otg_role = DWC3_OTG_ROLE_IDLE; 658 spin_unlock_irqrestore(&dwc->lock, flags); 659 dwc3_otg_update(dwc, 1); 660 break; 661 default: 662 break; 663 } 664 665 if (dwc->otg_irq) 666 free_irq(dwc->otg_irq, dwc); 667 } 668